diff --git a/data/chips/STM32C031G4.json b/data/chips/STM32C031G4.json index de0d0d5..912a90b 100644 --- a/data/chips/STM32C031G4.json +++ b/data/chips/STM32C031G4.json @@ -442,16 +442,6 @@ "signal": "SMBA", "af": 6 }, - { - "pin": "PA10", - "signal": "SDA", - "af": 6 - }, - { - "pin": "PA9", - "signal": "SCL", - "af": 6 - }, { "pin": "PB5", "signal": "SMBA", @@ -572,11 +562,6 @@ "block": "RCC" }, "pins": [ - { - "pin": "PA10", - "signal": "MCO_2", - "af": 3 - }, { "pin": "PA14", "signal": "MCO_2", @@ -601,11 +586,6 @@ "signal": "MCO_2", "af": 15 }, - { - "pin": "PA9", - "signal": "MCO_1", - "af": 0 - }, { "pin": "PC14", "signal": "OSCX_IN" @@ -959,11 +939,6 @@ "signal": "CH2", "af": 5 }, - { - "pin": "PA10", - "signal": "CH3", - "af": 2 - }, { "pin": "PA11", "signal": "BKIN2", @@ -1044,11 +1019,6 @@ "signal": "CH3N", "af": 10 }, - { - "pin": "PA9", - "signal": "CH2", - "af": 2 - }, { "pin": "PB0", "signal": "CH2N", @@ -1353,11 +1323,6 @@ "signal": "CH1", "af": 2 }, - { - "pin": "PA10", - "signal": "BKIN", - "af": 5 - }, { "pin": "PA4", "signal": "CH1N", @@ -1480,11 +1445,6 @@ "signal": "CH4", "af": 12 }, - { - "pin": "PA9", - "signal": "ETR", - "af": 3 - }, { "pin": "PB0", "signal": "CH3", @@ -1659,11 +1619,6 @@ "signal": "RX", "af": 4 }, - { - "pin": "PA10", - "signal": "RX", - "af": 1 - }, { "pin": "PA11", "signal": "CTS", @@ -1724,11 +1679,6 @@ "signal": "RX", "af": 14 }, - { - "pin": "PA9", - "signal": "TX", - "af": 1 - }, { "pin": "PB3", "signal": "CK", diff --git a/data/chips/STM32C031G6.json b/data/chips/STM32C031G6.json index 7e92ca7..c483f69 100644 --- a/data/chips/STM32C031G6.json +++ b/data/chips/STM32C031G6.json @@ -442,16 +442,6 @@ "signal": "SMBA", "af": 6 }, - { - "pin": "PA10", - "signal": "SDA", - "af": 6 - }, - { - "pin": "PA9", - "signal": "SCL", - "af": 6 - }, { "pin": "PB5", "signal": "SMBA", @@ -572,11 +562,6 @@ "block": "RCC" }, "pins": [ - { - "pin": "PA10", - "signal": "MCO_2", - "af": 3 - }, { "pin": "PA14", "signal": "MCO_2", @@ -601,11 +586,6 @@ "signal": "MCO_2", "af": 15 }, - { - "pin": "PA9", - "signal": "MCO_1", - "af": 0 - }, { "pin": "PC14", "signal": "OSCX_IN" @@ -959,11 +939,6 @@ "signal": "CH2", "af": 5 }, - { - "pin": "PA10", - "signal": "CH3", - "af": 2 - }, { "pin": "PA11", "signal": "BKIN2", @@ -1044,11 +1019,6 @@ "signal": "CH3N", "af": 10 }, - { - "pin": "PA9", - "signal": "CH2", - "af": 2 - }, { "pin": "PB0", "signal": "CH2N", @@ -1353,11 +1323,6 @@ "signal": "CH1", "af": 2 }, - { - "pin": "PA10", - "signal": "BKIN", - "af": 5 - }, { "pin": "PA4", "signal": "CH1N", @@ -1480,11 +1445,6 @@ "signal": "CH4", "af": 12 }, - { - "pin": "PA9", - "signal": "ETR", - "af": 3 - }, { "pin": "PB0", "signal": "CH3", @@ -1659,11 +1619,6 @@ "signal": "RX", "af": 4 }, - { - "pin": "PA10", - "signal": "RX", - "af": 1 - }, { "pin": "PA11", "signal": "CTS", @@ -1724,11 +1679,6 @@ "signal": "RX", "af": 14 }, - { - "pin": "PA9", - "signal": "TX", - "af": 1 - }, { "pin": "PB3", "signal": "CK", diff --git a/data/chips/STM32F030R8.json b/data/chips/STM32F030R8.json index 32f6729..5ffcd3e 100644 --- a/data/chips/STM32F030R8.json +++ b/data/chips/STM32F030R8.json @@ -1615,7 +1615,7 @@ { "pin": "PC8", "signal": "CH3", - "af": 1 + "af": 0 }, { "pin": "PC9", diff --git a/data/chips/STM32F051R4.json b/data/chips/STM32F051R4.json index 11e24d6..4295c20 100644 --- a/data/chips/STM32F051R4.json +++ b/data/chips/STM32F051R4.json @@ -1878,7 +1878,7 @@ { "pin": "PC8", "signal": "CH3", - "af": 1 + "af": 0 }, { "pin": "PC9", diff --git a/data/chips/STM32F051R6.json b/data/chips/STM32F051R6.json index 9404913..ecebd9b 100644 --- a/data/chips/STM32F051R6.json +++ b/data/chips/STM32F051R6.json @@ -1878,7 +1878,7 @@ { "pin": "PC8", "signal": "CH3", - "af": 1 + "af": 0 }, { "pin": "PC9", diff --git a/data/chips/STM32F051R8.json b/data/chips/STM32F051R8.json index c328770..aef1bbe 100644 --- a/data/chips/STM32F051R8.json +++ b/data/chips/STM32F051R8.json @@ -1943,7 +1943,7 @@ { "pin": "PC8", "signal": "CH3", - "af": 1 + "af": 0 }, { "pin": "PC9", diff --git a/data/chips/STM32F058R8.json b/data/chips/STM32F058R8.json index 183b398..ba88b5e 100644 --- a/data/chips/STM32F058R8.json +++ b/data/chips/STM32F058R8.json @@ -1943,7 +1943,7 @@ { "pin": "PC8", "signal": "CH3", - "af": 1 + "af": 0 }, { "pin": "PC9", diff --git a/data/chips/STM32G431C6.json b/data/chips/STM32G431C6.json index cc8749d..52b4cf8 100644 --- a/data/chips/STM32G431C6.json +++ b/data/chips/STM32G431C6.json @@ -3659,6 +3659,72 @@ } ] }, + { + "name": "UART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APB1ENR1", + "field": "UART4EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "UART4RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 14 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 5 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "UART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, { "name": "UCPD1", "address": 1073782784, diff --git a/data/chips/STM32G431C8.json b/data/chips/STM32G431C8.json index ac51750..86ab0c8 100644 --- a/data/chips/STM32G431C8.json +++ b/data/chips/STM32G431C8.json @@ -3659,6 +3659,72 @@ } ] }, + { + "name": "UART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APB1ENR1", + "field": "UART4EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "UART4RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 14 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 5 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "UART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, { "name": "UCPD1", "address": 1073782784, diff --git a/data/chips/STM32G431CB.json b/data/chips/STM32G431CB.json index 6b89af6..5bde89e 100644 --- a/data/chips/STM32G431CB.json +++ b/data/chips/STM32G431CB.json @@ -3663,6 +3663,72 @@ } ] }, + { + "name": "UART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APB1ENR1", + "field": "UART4EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "UART4RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 14 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 5 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "UART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, { "name": "UCPD1", "address": 1073782784, diff --git a/data/chips/STM32G441CB.json b/data/chips/STM32G441CB.json index 56e857d..1825841 100644 --- a/data/chips/STM32G441CB.json +++ b/data/chips/STM32G441CB.json @@ -3696,6 +3696,72 @@ } ] }, + { + "name": "UART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APB1ENR1", + "field": "UART4EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "UART4RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 14 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 5 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "UART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, { "name": "UCPD1", "address": 1073782784, diff --git a/data/chips/STM32H563VI.json b/data/chips/STM32H563VI.json index 906af85..943005c 100644 --- a/data/chips/STM32H563VI.json +++ b/data/chips/STM32H563VI.json @@ -859,6 +859,11 @@ "signal": "RX_ER", "af": 11 }, + { + "pin": "PB11", + "signal": "TX_EN", + "af": 11 + }, { "pin": "PB12", "signal": "TXD0", diff --git a/data/chips/STM32H563ZI.json b/data/chips/STM32H563ZI.json index c05eed3..50e46b6 100644 --- a/data/chips/STM32H563ZI.json +++ b/data/chips/STM32H563ZI.json @@ -933,6 +933,11 @@ "signal": "RX_ER", "af": 11 }, + { + "pin": "PB11", + "signal": "TX_EN", + "af": 11 + }, { "pin": "PB12", "signal": "TXD0", diff --git a/data/chips/STM32H573AI.json b/data/chips/STM32H573AI.json index 01f3f7d..6736774 100644 --- a/data/chips/STM32H573AI.json +++ b/data/chips/STM32H573AI.json @@ -1082,16 +1082,6 @@ "signal": "TXD0", "af": 11 }, - { - "pin": "PB13", - "signal": "TXD1", - "af": 11 - }, - { - "pin": "PB14", - "signal": "TX_EN", - "af": 11 - }, { "pin": "PB15", "signal": "TXD1", diff --git a/data/chips/STM32H573II.json b/data/chips/STM32H573II.json index d9bf26a..36b4492 100644 --- a/data/chips/STM32H573II.json +++ b/data/chips/STM32H573II.json @@ -1090,16 +1090,6 @@ "signal": "TXD0", "af": 11 }, - { - "pin": "PB13", - "signal": "TXD1", - "af": 11 - }, - { - "pin": "PB14", - "signal": "TX_EN", - "af": 11 - }, { "pin": "PB15", "signal": "TXD1", diff --git a/data/chips/STM32H573MI.json b/data/chips/STM32H573MI.json index 2075e6b..e36d0d9 100644 --- a/data/chips/STM32H573MI.json +++ b/data/chips/STM32H573MI.json @@ -859,16 +859,6 @@ "signal": "TXD0", "af": 11 }, - { - "pin": "PB13", - "signal": "TXD1", - "af": 11 - }, - { - "pin": "PB14", - "signal": "TX_EN", - "af": 11 - }, { "pin": "PB15", "signal": "TXD1", diff --git a/data/chips/STM32H573RI.json b/data/chips/STM32H573RI.json index 9c307e6..e14cb45 100644 --- a/data/chips/STM32H573RI.json +++ b/data/chips/STM32H573RI.json @@ -883,16 +883,6 @@ "signal": "TXD0", "af": 11 }, - { - "pin": "PB13", - "signal": "TXD1", - "af": 11 - }, - { - "pin": "PB14", - "signal": "TX_EN", - "af": 11 - }, { "pin": "PB15", "signal": "TXD1", diff --git a/data/chips/STM32H573VI.json b/data/chips/STM32H573VI.json index 1437851..56c2839 100644 --- a/data/chips/STM32H573VI.json +++ b/data/chips/STM32H573VI.json @@ -909,18 +909,13 @@ "af": 11 }, { - "pin": "PB12", - "signal": "TXD0", - "af": 11 - }, - { - "pin": "PB13", - "signal": "TXD1", + "pin": "PB11", + "signal": "TX_EN", "af": 11 }, { - "pin": "PB14", - "signal": "TX_EN", + "pin": "PB12", + "signal": "TXD0", "af": 11 }, { diff --git a/data/chips/STM32H573ZI.json b/data/chips/STM32H573ZI.json index a00b5c0..3780d16 100644 --- a/data/chips/STM32H573ZI.json +++ b/data/chips/STM32H573ZI.json @@ -983,18 +983,13 @@ "af": 11 }, { - "pin": "PB12", - "signal": "TXD0", - "af": 11 - }, - { - "pin": "PB13", - "signal": "TXD1", + "pin": "PB11", + "signal": "TX_EN", "af": 11 }, { - "pin": "PB14", - "signal": "TX_EN", + "pin": "PB12", + "signal": "TXD0", "af": 11 }, { diff --git a/data/chips/STM32H725IE.json b/data/chips/STM32H725IE.json index e3965de..7480459 100644 --- a/data/chips/STM32H725IE.json +++ b/data/chips/STM32H725IE.json @@ -754,10 +754,6 @@ { "pin": "PH5", "signal": "INN15" - }, - { - "pin": "PH5", - "signal": "INP16" } ], "interrupts": [ diff --git a/data/chips/STM32H725IG.json b/data/chips/STM32H725IG.json index 9def441..dc1513b 100644 --- a/data/chips/STM32H725IG.json +++ b/data/chips/STM32H725IG.json @@ -760,10 +760,6 @@ { "pin": "PH5", "signal": "INN15" - }, - { - "pin": "PH5", - "signal": "INP16" } ], "interrupts": [ diff --git a/data/chips/STM32H730IB.json b/data/chips/STM32H730IB.json index 31e6fae..5900022 100644 --- a/data/chips/STM32H730IB.json +++ b/data/chips/STM32H730IB.json @@ -772,10 +772,6 @@ { "pin": "PH5", "signal": "INN15" - }, - { - "pin": "PH5", - "signal": "INP16" } ], "interrupts": [ diff --git a/data/chips/STM32H735IG.json b/data/chips/STM32H735IG.json index d30954c..e1a5bb0 100644 --- a/data/chips/STM32H735IG.json +++ b/data/chips/STM32H735IG.json @@ -772,10 +772,6 @@ { "pin": "PH5", "signal": "INN15" - }, - { - "pin": "PH5", - "signal": "INP16" } ], "interrupts": [ diff --git a/data/chips/STM32H742AG.json b/data/chips/STM32H742AG.json index 67c65da..e5983ee 100644 --- a/data/chips/STM32H742AG.json +++ b/data/chips/STM32H742AG.json @@ -1773,6 +1773,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1803,6 +1808,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1877,6 +1887,11 @@ "pin": "PH3", "signal": "COL", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H742AI.json b/data/chips/STM32H742AI.json index b3ea4c8..218bae9 100644 --- a/data/chips/STM32H742AI.json +++ b/data/chips/STM32H742AI.json @@ -1784,6 +1784,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1814,6 +1819,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1888,6 +1898,11 @@ "pin": "PH3", "signal": "COL", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H742BG.json b/data/chips/STM32H742BG.json index 85e0cd7..4227ca1 100644 --- a/data/chips/STM32H742BG.json +++ b/data/chips/STM32H742BG.json @@ -1813,6 +1813,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1843,6 +1848,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1932,6 +1942,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H742BI.json b/data/chips/STM32H742BI.json index 64a07e0..a73eb17 100644 --- a/data/chips/STM32H742BI.json +++ b/data/chips/STM32H742BI.json @@ -1824,6 +1824,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1854,6 +1859,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1943,6 +1953,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H742IG.json b/data/chips/STM32H742IG.json index ec05e32..3221064 100644 --- a/data/chips/STM32H742IG.json +++ b/data/chips/STM32H742IG.json @@ -1817,6 +1817,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1847,6 +1852,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H742II.json b/data/chips/STM32H742II.json index 0d083b8..3602456 100644 --- a/data/chips/STM32H742II.json +++ b/data/chips/STM32H742II.json @@ -1828,6 +1828,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1858,6 +1863,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H742VG.json b/data/chips/STM32H742VG.json index a74f9f6..2c60a83 100644 --- a/data/chips/STM32H742VG.json +++ b/data/chips/STM32H742VG.json @@ -1582,6 +1582,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1612,6 +1617,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H742VI.json b/data/chips/STM32H742VI.json index 8ce92fc..f4bec58 100644 --- a/data/chips/STM32H742VI.json +++ b/data/chips/STM32H742VI.json @@ -1593,6 +1593,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1623,6 +1628,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H742XG.json b/data/chips/STM32H742XG.json index 6550fb7..7c9ec04 100644 --- a/data/chips/STM32H742XG.json +++ b/data/chips/STM32H742XG.json @@ -1877,6 +1877,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1907,6 +1912,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1996,6 +2006,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H742XI.json b/data/chips/STM32H742XI.json index 988ea7c..4ab9d8e 100644 --- a/data/chips/STM32H742XI.json +++ b/data/chips/STM32H742XI.json @@ -1888,6 +1888,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1918,6 +1923,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2007,6 +2017,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H742ZG.json b/data/chips/STM32H742ZG.json index e4cc153..8fda048 100644 --- a/data/chips/STM32H742ZG.json +++ b/data/chips/STM32H742ZG.json @@ -1700,6 +1700,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1730,6 +1735,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H742ZI.json b/data/chips/STM32H742ZI.json index 0977f19..6d7483d 100644 --- a/data/chips/STM32H742ZI.json +++ b/data/chips/STM32H742ZI.json @@ -1711,6 +1711,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1741,6 +1746,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H743AG.json b/data/chips/STM32H743AG.json index 4277394..1f49008 100644 --- a/data/chips/STM32H743AG.json +++ b/data/chips/STM32H743AG.json @@ -1815,6 +1815,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1845,6 +1850,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1919,6 +1929,11 @@ "pin": "PH3", "signal": "COL", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H743AI.json b/data/chips/STM32H743AI.json index 034477e..035f3c5 100644 --- a/data/chips/STM32H743AI.json +++ b/data/chips/STM32H743AI.json @@ -1826,6 +1826,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1856,6 +1861,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1930,6 +1940,11 @@ "pin": "PH3", "signal": "COL", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H743BG.json b/data/chips/STM32H743BG.json index 2a293d9..65eb6c4 100644 --- a/data/chips/STM32H743BG.json +++ b/data/chips/STM32H743BG.json @@ -1855,6 +1855,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1885,6 +1890,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1974,6 +1984,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H743BI.json b/data/chips/STM32H743BI.json index ef015e3..896ea58 100644 --- a/data/chips/STM32H743BI.json +++ b/data/chips/STM32H743BI.json @@ -1866,6 +1866,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1896,6 +1901,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1985,6 +1995,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H743IG.json b/data/chips/STM32H743IG.json index f4c81c3..8619c41 100644 --- a/data/chips/STM32H743IG.json +++ b/data/chips/STM32H743IG.json @@ -1859,6 +1859,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1889,6 +1894,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H743II.json b/data/chips/STM32H743II.json index 04ff5c5..6d73b5e 100644 --- a/data/chips/STM32H743II.json +++ b/data/chips/STM32H743II.json @@ -1870,6 +1870,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1900,6 +1905,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H743VG.json b/data/chips/STM32H743VG.json index 87e53c8..49b3512 100644 --- a/data/chips/STM32H743VG.json +++ b/data/chips/STM32H743VG.json @@ -1624,6 +1624,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1654,6 +1659,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H743VI.json b/data/chips/STM32H743VI.json index a37fa02..372ce11 100644 --- a/data/chips/STM32H743VI.json +++ b/data/chips/STM32H743VI.json @@ -1635,6 +1635,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1665,6 +1670,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H743XG.json b/data/chips/STM32H743XG.json index d644c18..51c92d9 100644 --- a/data/chips/STM32H743XG.json +++ b/data/chips/STM32H743XG.json @@ -1919,6 +1919,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1949,6 +1954,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2038,6 +2048,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H743XI.json b/data/chips/STM32H743XI.json index 17c33c5..e79c386 100644 --- a/data/chips/STM32H743XI.json +++ b/data/chips/STM32H743XI.json @@ -1930,6 +1930,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1960,6 +1965,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2049,6 +2059,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H743ZG.json b/data/chips/STM32H743ZG.json index 72b301e..9ac688a 100644 --- a/data/chips/STM32H743ZG.json +++ b/data/chips/STM32H743ZG.json @@ -1742,6 +1742,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1772,6 +1777,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H743ZI.json b/data/chips/STM32H743ZI.json index 1cae4df..b78e945 100644 --- a/data/chips/STM32H743ZI.json +++ b/data/chips/STM32H743ZI.json @@ -1753,6 +1753,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1783,6 +1788,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H745BG.json b/data/chips/STM32H745BG.json index 95ddb6a..5f850f5 100644 --- a/data/chips/STM32H745BG.json +++ b/data/chips/STM32H745BG.json @@ -1837,6 +1837,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1867,6 +1872,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11698,6 +11708,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11728,6 +11743,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H745BI.json b/data/chips/STM32H745BI.json index 8f0ba45..719dde8 100644 --- a/data/chips/STM32H745BI.json +++ b/data/chips/STM32H745BI.json @@ -1848,6 +1848,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1878,6 +1883,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11709,6 +11719,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11739,6 +11754,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H745IG.json b/data/chips/STM32H745IG.json index 7141871..d2e1001 100644 --- a/data/chips/STM32H745IG.json +++ b/data/chips/STM32H745IG.json @@ -1865,6 +1865,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1895,6 +1900,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11468,6 +11478,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11498,6 +11513,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H745II.json b/data/chips/STM32H745II.json index 8a90766..c2918cc 100644 --- a/data/chips/STM32H745II.json +++ b/data/chips/STM32H745II.json @@ -1876,6 +1876,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1906,6 +1911,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11479,6 +11489,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11509,6 +11524,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H745XG.json b/data/chips/STM32H745XG.json index 7aec576..34bcd19 100644 --- a/data/chips/STM32H745XG.json +++ b/data/chips/STM32H745XG.json @@ -1901,6 +1901,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1931,6 +1936,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2020,6 +2030,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ @@ -11931,6 +11946,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11961,6 +11981,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -12050,6 +12075,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H745XI.json b/data/chips/STM32H745XI.json index 6813757..466113f 100644 --- a/data/chips/STM32H745XI.json +++ b/data/chips/STM32H745XI.json @@ -1912,6 +1912,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1942,6 +1947,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2031,6 +2041,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ @@ -11942,6 +11957,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11972,6 +11992,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -12061,6 +12086,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H745ZG.json b/data/chips/STM32H745ZG.json index d7ff417..410137d 100644 --- a/data/chips/STM32H745ZG.json +++ b/data/chips/STM32H745ZG.json @@ -1682,6 +1682,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1712,6 +1717,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10478,6 +10488,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10508,6 +10523,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H745ZI.json b/data/chips/STM32H745ZI.json index e5f3458..0de1d5d 100644 --- a/data/chips/STM32H745ZI.json +++ b/data/chips/STM32H745ZI.json @@ -1693,6 +1693,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1723,6 +1728,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10489,6 +10499,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10519,6 +10534,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H747AG.json b/data/chips/STM32H747AG.json index 490146d..10e3cb3 100644 --- a/data/chips/STM32H747AG.json +++ b/data/chips/STM32H747AG.json @@ -1730,6 +1730,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1760,6 +1765,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10745,6 +10755,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10775,6 +10790,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H747AI.json b/data/chips/STM32H747AI.json index e1ed000..c274486 100644 --- a/data/chips/STM32H747AI.json +++ b/data/chips/STM32H747AI.json @@ -1741,6 +1741,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1771,6 +1776,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10756,6 +10766,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10786,6 +10801,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H747BG.json b/data/chips/STM32H747BG.json index 562dec1..f6796df 100644 --- a/data/chips/STM32H747BG.json +++ b/data/chips/STM32H747BG.json @@ -1843,6 +1843,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1873,6 +1878,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11533,6 +11543,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11563,6 +11578,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H747BI.json b/data/chips/STM32H747BI.json index 3f1f6d6..d0ebb98 100644 --- a/data/chips/STM32H747BI.json +++ b/data/chips/STM32H747BI.json @@ -1854,6 +1854,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1884,6 +1889,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11544,6 +11554,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11574,6 +11589,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H747IG.json b/data/chips/STM32H747IG.json index 472ef8b..fa9d21f 100644 --- a/data/chips/STM32H747IG.json +++ b/data/chips/STM32H747IG.json @@ -1730,6 +1730,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1760,6 +1765,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10745,6 +10755,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10775,6 +10790,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H747II.json b/data/chips/STM32H747II.json index 873369d..086ffd3 100644 --- a/data/chips/STM32H747II.json +++ b/data/chips/STM32H747II.json @@ -1741,6 +1741,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1771,6 +1776,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10756,6 +10766,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10786,6 +10801,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H747XG.json b/data/chips/STM32H747XG.json index d2bd7df..013edc2 100644 --- a/data/chips/STM32H747XG.json +++ b/data/chips/STM32H747XG.json @@ -1907,6 +1907,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1937,6 +1942,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2026,6 +2036,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ @@ -11941,6 +11956,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11971,6 +11991,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -12060,6 +12085,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H747XI.json b/data/chips/STM32H747XI.json index ac45781..fd9fa2f 100644 --- a/data/chips/STM32H747XI.json +++ b/data/chips/STM32H747XI.json @@ -1918,6 +1918,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1948,6 +1953,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2037,6 +2047,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ @@ -11952,6 +11967,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11982,6 +12002,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -12071,6 +12096,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H747ZI.json b/data/chips/STM32H747ZI.json index 3f20cb3..074742c 100644 --- a/data/chips/STM32H747ZI.json +++ b/data/chips/STM32H747ZI.json @@ -1679,6 +1679,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1709,6 +1714,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10151,6 +10161,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10181,6 +10196,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H750IB.json b/data/chips/STM32H750IB.json index 05ec334..3eba9bc 100644 --- a/data/chips/STM32H750IB.json +++ b/data/chips/STM32H750IB.json @@ -1886,6 +1886,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1916,6 +1921,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H750VB.json b/data/chips/STM32H750VB.json index c415c18..b634b43 100644 --- a/data/chips/STM32H750VB.json +++ b/data/chips/STM32H750VB.json @@ -1647,6 +1647,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1677,6 +1682,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H750XB.json b/data/chips/STM32H750XB.json index e45e260..e12ec90 100644 --- a/data/chips/STM32H750XB.json +++ b/data/chips/STM32H750XB.json @@ -1946,6 +1946,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1976,6 +1981,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2065,6 +2075,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H750ZB.json b/data/chips/STM32H750ZB.json index 1a1a73f..d2e15ba 100644 --- a/data/chips/STM32H750ZB.json +++ b/data/chips/STM32H750ZB.json @@ -1757,6 +1757,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1787,6 +1792,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H753AI.json b/data/chips/STM32H753AI.json index e47006d..c75243d 100644 --- a/data/chips/STM32H753AI.json +++ b/data/chips/STM32H753AI.json @@ -1871,6 +1871,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1901,6 +1906,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -1975,6 +1985,11 @@ "pin": "PH3", "signal": "COL", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H753BI.json b/data/chips/STM32H753BI.json index 9949d81..ff73eb2 100644 --- a/data/chips/STM32H753BI.json +++ b/data/chips/STM32H753BI.json @@ -1911,6 +1911,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1941,6 +1946,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2030,6 +2040,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H753II.json b/data/chips/STM32H753II.json index 60b3b92..d01bfd2 100644 --- a/data/chips/STM32H753II.json +++ b/data/chips/STM32H753II.json @@ -1915,6 +1915,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1945,6 +1950,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H753VI.json b/data/chips/STM32H753VI.json index aaa8dbb..7b41420 100644 --- a/data/chips/STM32H753VI.json +++ b/data/chips/STM32H753VI.json @@ -1680,6 +1680,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1710,6 +1715,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H753XI.json b/data/chips/STM32H753XI.json index 6ae6157..3709726 100644 --- a/data/chips/STM32H753XI.json +++ b/data/chips/STM32H753XI.json @@ -1975,6 +1975,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -2005,6 +2010,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2094,6 +2104,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H753ZI.json b/data/chips/STM32H753ZI.json index c08cd36..c672c8b 100644 --- a/data/chips/STM32H753ZI.json +++ b/data/chips/STM32H753ZI.json @@ -1798,6 +1798,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1828,6 +1833,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H755BI.json b/data/chips/STM32H755BI.json index 5ff3fd9..fc9bb47 100644 --- a/data/chips/STM32H755BI.json +++ b/data/chips/STM32H755BI.json @@ -1893,6 +1893,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1923,6 +1928,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11831,6 +11841,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11861,6 +11876,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H755II.json b/data/chips/STM32H755II.json index a85c8ef..bf64e17 100644 --- a/data/chips/STM32H755II.json +++ b/data/chips/STM32H755II.json @@ -1921,6 +1921,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1951,6 +1956,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11601,6 +11611,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11631,6 +11646,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H755XI.json b/data/chips/STM32H755XI.json index 9795776..4eee23e 100644 --- a/data/chips/STM32H755XI.json +++ b/data/chips/STM32H755XI.json @@ -1957,6 +1957,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1987,6 +1992,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2076,6 +2086,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ @@ -12064,6 +12079,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -12094,6 +12114,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -12183,6 +12208,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H755ZI.json b/data/chips/STM32H755ZI.json index 151dc06..dc45b4d 100644 --- a/data/chips/STM32H755ZI.json +++ b/data/chips/STM32H755ZI.json @@ -1738,6 +1738,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1768,6 +1773,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10611,6 +10621,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10641,6 +10656,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H757AI.json b/data/chips/STM32H757AI.json index 2970d9d..7fe4033 100644 --- a/data/chips/STM32H757AI.json +++ b/data/chips/STM32H757AI.json @@ -1786,6 +1786,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1816,6 +1821,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10878,6 +10888,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10908,6 +10923,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H757BI.json b/data/chips/STM32H757BI.json index 88f9092..2173275 100644 --- a/data/chips/STM32H757BI.json +++ b/data/chips/STM32H757BI.json @@ -1899,6 +1899,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1929,6 +1934,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -11666,6 +11676,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -11696,6 +11711,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H757II.json b/data/chips/STM32H757II.json index 02c3617..11fbe89 100644 --- a/data/chips/STM32H757II.json +++ b/data/chips/STM32H757II.json @@ -1786,6 +1786,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1816,6 +1821,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10878,6 +10888,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10908,6 +10923,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32H757XI.json b/data/chips/STM32H757XI.json index b97441b..9aa14ff 100644 --- a/data/chips/STM32H757XI.json +++ b/data/chips/STM32H757XI.json @@ -1963,6 +1963,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1993,6 +1998,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -2082,6 +2092,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ @@ -12074,6 +12089,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -12104,6 +12124,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -12193,6 +12218,11 @@ "pin": "PI10", "signal": "RX_ER", "af": 11 + }, + { + "pin": "PI12", + "signal": "TX_ER", + "af": 11 } ], "interrupts": [ diff --git a/data/chips/STM32H757ZI.json b/data/chips/STM32H757ZI.json index 96466f2..c9b16b4 100644 --- a/data/chips/STM32H757ZI.json +++ b/data/chips/STM32H757ZI.json @@ -1724,6 +1724,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -1754,6 +1759,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", @@ -10273,6 +10283,11 @@ "signal": "RX_DV", "af": 11 }, + { + "pin": "PA9", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB0", "signal": "RXD2", @@ -10303,6 +10318,11 @@ "signal": "TXD1", "af": 11 }, + { + "pin": "PB2", + "signal": "TX_ER", + "af": 11 + }, { "pin": "PB5", "signal": "PPS_OUT", diff --git a/data/chips/STM32L053C6.json b/data/chips/STM32L053C6.json index 1d8a0ef..93a4847 100644 --- a/data/chips/STM32L053C6.json +++ b/data/chips/STM32L053C6.json @@ -1115,7 +1115,7 @@ }, { "pin": "PB12", - "signal": "VLCD2" + "signal": "VLCD1" }, { "pin": "PB13", @@ -1134,7 +1134,7 @@ }, { "pin": "PB2", - "signal": "VLCD1" + "signal": "VLCD2" }, { "pin": "PB3", diff --git a/data/chips/STM32L053C8.json b/data/chips/STM32L053C8.json index a3becda..6f1b6a4 100644 --- a/data/chips/STM32L053C8.json +++ b/data/chips/STM32L053C8.json @@ -1115,7 +1115,7 @@ }, { "pin": "PB12", - "signal": "VLCD2" + "signal": "VLCD1" }, { "pin": "PB13", @@ -1134,7 +1134,7 @@ }, { "pin": "PB2", - "signal": "VLCD1" + "signal": "VLCD2" }, { "pin": "PB3", diff --git a/data/chips/STM32L053R6.json b/data/chips/STM32L053R6.json index e0ccd40..aa1ab4c 100644 --- a/data/chips/STM32L053R6.json +++ b/data/chips/STM32L053R6.json @@ -1139,7 +1139,7 @@ }, { "pin": "PB12", - "signal": "VLCD2" + "signal": "VLCD1" }, { "pin": "PB13", @@ -1158,7 +1158,7 @@ }, { "pin": "PB2", - "signal": "VLCD1" + "signal": "VLCD2" }, { "pin": "PB3", diff --git a/data/chips/STM32L053R8.json b/data/chips/STM32L053R8.json index 910d0b9..e3dbd1b 100644 --- a/data/chips/STM32L053R8.json +++ b/data/chips/STM32L053R8.json @@ -1139,7 +1139,7 @@ }, { "pin": "PB12", - "signal": "VLCD2" + "signal": "VLCD1" }, { "pin": "PB13", @@ -1158,7 +1158,7 @@ }, { "pin": "PB2", - "signal": "VLCD1" + "signal": "VLCD2" }, { "pin": "PB3", diff --git a/data/chips/STM32L063C8.json b/data/chips/STM32L063C8.json index 6169cd9..6ae68b7 100644 --- a/data/chips/STM32L063C8.json +++ b/data/chips/STM32L063C8.json @@ -1152,7 +1152,7 @@ }, { "pin": "PB12", - "signal": "VLCD2" + "signal": "VLCD1" }, { "pin": "PB13", @@ -1171,7 +1171,7 @@ }, { "pin": "PB2", - "signal": "VLCD1" + "signal": "VLCD2" }, { "pin": "PB3", diff --git a/data/chips/STM32L063R8.json b/data/chips/STM32L063R8.json index 5e2a1bb..8035ec2 100644 --- a/data/chips/STM32L063R8.json +++ b/data/chips/STM32L063R8.json @@ -1172,7 +1172,7 @@ }, { "pin": "PB12", - "signal": "VLCD2" + "signal": "VLCD1" }, { "pin": "PB13", @@ -1191,7 +1191,7 @@ }, { "pin": "PB2", - "signal": "VLCD1" + "signal": "VLCD2" }, { "pin": "PB3", diff --git a/data/chips/STM32U031C6.json b/data/chips/STM32U031C6.json new file mode 100644 index 0000000..124441e --- /dev/null +++ b/data/chips/STM32U031C6.json @@ -0,0 +1,2939 @@ +{ + "name": "STM32U031C6", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031C6Tx", + "package": "LQFP48" + }, + { + "name": "STM32U031C6Ux", + "package": "UFQFPN48" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 32768, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": 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"bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": 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"signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + 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"pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 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"dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + 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"kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + 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"interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031C8.json b/data/chips/STM32U031C8.json new file mode 100644 index 0000000..3a7695f --- /dev/null +++ b/data/chips/STM32U031C8.json @@ -0,0 +1,2939 @@ +{ + "name": "STM32U031C8", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031C8Tx", + "package": "LQFP48" + }, + { + "name": "STM32U031C8Ux", + "package": "UFQFPN48" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 8 + }, + { + "pin": "PB12", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB12", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB12", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB13", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB14", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB15", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { 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"TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", 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"kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": 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"signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031F4.json b/data/chips/STM32U031F4.json new file mode 100644 index 0000000..7a27e62 --- /dev/null +++ b/data/chips/STM32U031F4.json @@ -0,0 +1,2597 @@ +{ + "name": "STM32U031F4", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031F4Px", + "package": "TSSOP20" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 16384, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031F6.json b/data/chips/STM32U031F6.json new file mode 100644 index 0000000..40e4ff9 --- /dev/null +++ b/data/chips/STM32U031F6.json @@ -0,0 +1,2597 @@ +{ + "name": "STM32U031F6", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031F6Px", + "package": "TSSOP20" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 32768, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031F8.json b/data/chips/STM32U031F8.json new file mode 100644 index 0000000..ca5794a --- /dev/null +++ b/data/chips/STM32U031F8.json @@ -0,0 +1,2597 @@ +{ + "name": "STM32U031F8", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031F8Px", + "package": "TSSOP20" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + 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"field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": 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"OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + 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"request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, 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} + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031G6.json b/data/chips/STM32U031G6.json new file mode 100644 index 0000000..41fe1d1 --- /dev/null +++ b/data/chips/STM32U031G6.json @@ -0,0 +1,2512 @@ +{ + "name": "STM32U031G6", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031G6Yx", + "package": "WLCSP27" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 32768, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031G8.json b/data/chips/STM32U031G8.json new file mode 100644 index 0000000..16d7842 --- /dev/null +++ b/data/chips/STM32U031G8.json @@ -0,0 +1,2512 @@ +{ + "name": "STM32U031G8", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031G8Yx", + "package": "WLCSP27" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031K4.json b/data/chips/STM32U031K4.json new file mode 100644 index 0000000..f370dd7 --- /dev/null +++ b/data/chips/STM32U031K4.json @@ -0,0 +1,2627 @@ +{ + "name": "STM32U031K4", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031K4Ux", + "package": "UFQFPN32" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 16384, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031K6.json b/data/chips/STM32U031K6.json new file mode 100644 index 0000000..3239a3e --- /dev/null +++ b/data/chips/STM32U031K6.json @@ -0,0 +1,2627 @@ +{ + "name": "STM32U031K6", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031K6Ux", + "package": "UFQFPN32" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 32768, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031K8.json b/data/chips/STM32U031K8.json new file mode 100644 index 0000000..40fbaf2 --- /dev/null +++ b/data/chips/STM32U031K8.json @@ -0,0 +1,2627 @@ +{ + "name": "STM32U031K8", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031K8Ux", + "package": "UFQFPN32" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", 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"CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + 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"field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 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"register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031R6.json b/data/chips/STM32U031R6.json new file mode 100644 index 0000000..37c4a8d --- /dev/null +++ b/data/chips/STM32U031R6.json @@ -0,0 +1,3188 @@ +{ + "name": "STM32U031R6", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031R6Ix", + "package": "UFBGA64" + }, + { + "name": "STM32U031R6Tx", + "package": "LQFP64" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 32768, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PC1", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC2", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 8 + }, + { + "pin": "PB12", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB12", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC0", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC1", + "signal": "TX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + }, + { + "pin": "PC0", + "signal": "TX", + "af": 10 + }, + { + "pin": "PC1", + "signal": "RX", + "af": 10 + }, + { + "pin": "PC6", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC7", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PC13", + "signal": "WKUP2" + }, + { + "pin": "PC5", + "signal": "WKUP5" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PC2", + "signal": "MCO2", + "af": 0 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + 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"signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + }, + { + "pin": "PC5", + "signal": "IN4" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + 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+ "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + 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"af": 9 + }, + { + "pin": "PC9", + "signal": "G4_IO4", + "af": 9 + }, + { + "pin": "PD2", + "signal": "SYNC", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD2", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD2", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 8 + }, + { + "pin": "PC3", + "signal": "CK", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U031R8.json b/data/chips/STM32U031R8.json new file mode 100644 index 0000000..8973f1a --- /dev/null +++ b/data/chips/STM32U031R8.json @@ -0,0 +1,3188 @@ +{ + "name": "STM32U031R8", + "family": "STM32U0", + "line": "STM32U0x1", + "die": "DIE459", + "device_id": 1113, + "packages": [ + { + "name": "STM32U031R8Ix", + "package": "UFBGA64" + }, + { + "name": "STM32U031R8Tx", + "package": "LQFP64" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 12288 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", 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"request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + 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"signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": 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"kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15" + }, + { + "signal": "CC", + "interrupt": "TIM15" + }, + { + "signal": "COM", + "interrupt": "TIM15" + }, + { + "signal": "TRG", + "interrupt": "TIM15" + }, + { + "signal": "UP", + "interrupt": "TIM15" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": 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"signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536821328, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + 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"signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { 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+ { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4", + "number": 30 + }, + { + "name": "RNG", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073C8.json b/data/chips/STM32U073C8.json new file mode 100644 index 0000000..0beee34 --- /dev/null +++ b/data/chips/STM32U073C8.json @@ -0,0 +1,3714 @@ +{ + "name": "STM32U073C8", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073C8Tx", + "package": "LQFP48" + }, + { + "name": "STM32U073C8Ux", + "package": "UFQFPN48" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": 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"kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB13", + "signal": "IN1", + "af": 2 + }, + { + "pin": "PB14", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", 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"pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { 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+ "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PB14", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB15", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", 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"interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + "signal": "G1_IO1", + "af": 9 + }, + { + "pin": "PB13", + "signal": "G1_IO2", + "af": 9 + }, + { + "pin": "PB14", + "signal": "G1_IO3", + "af": 9 + }, + { + "pin": "PB15", + "signal": "G1_IO4", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": 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"pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073CB.json b/data/chips/STM32U073CB.json new file mode 100644 index 0000000..1609657 --- /dev/null +++ b/data/chips/STM32U073CB.json @@ -0,0 +1,3714 @@ +{ + "name": "STM32U073CB", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073CBTx", + "package": "LQFP48" + }, + { + "name": "STM32U073CBUx", + "package": "UFQFPN48" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 131072, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + 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"pin": "PB13", + "signal": "IN1", + "af": 2 + }, + { + "pin": "PB14", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 8 + }, + { + "pin": "PB12", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB12", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB12", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB13", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB14", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB15", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PB14", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB15", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + "signal": "G1_IO1", + "af": 9 + }, + { + "pin": "PB13", + "signal": "G1_IO2", + "af": 9 + }, + { + "pin": "PB14", + "signal": "G1_IO3", + "af": 9 + }, + { + "pin": "PB15", + "signal": "G1_IO4", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073CC.json b/data/chips/STM32U073CC.json new file mode 100644 index 0000000..1e3d8a1 --- /dev/null +++ b/data/chips/STM32U073CC.json @@ -0,0 +1,3714 @@ +{ + "name": "STM32U073CC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073CCTx", + "package": "LQFP48" + }, + { + "name": "STM32U073CCUx", + "package": "UFQFPN48" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + 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"af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, 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"af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": 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"signal": "CH2N", + "af": 1 + }, + { + "pin": "PB15", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + 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"signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + "signal": "G1_IO1", + "af": 9 + }, + { + "pin": "PB13", + "signal": "G1_IO2", + "af": 9 + }, + { + "pin": "PB14", + "signal": "G1_IO3", + "af": 9 + }, + { + "pin": "PB15", + "signal": "G1_IO4", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073H8.json b/data/chips/STM32U073H8.json new file mode 100644 index 0000000..2b8e23c --- /dev/null +++ b/data/chips/STM32U073H8.json @@ -0,0 +1,3462 @@ +{ + "name": "STM32U073H8", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073H8Yx", + "package": "WLCSP42" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": 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"interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + 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"pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + 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"SCK", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, 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"signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": 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"BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + 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"register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073HB.json b/data/chips/STM32U073HB.json new file mode 100644 index 0000000..e0f5ae2 --- /dev/null +++ b/data/chips/STM32U073HB.json @@ -0,0 +1,3462 @@ +{ + "name": "STM32U073HB", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073HBYx", + "package": "WLCSP42" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 131072, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073HC.json b/data/chips/STM32U073HC.json new file mode 100644 index 0000000..e996fd2 --- /dev/null +++ b/data/chips/STM32U073HC.json @@ -0,0 +1,3462 @@ +{ + "name": "STM32U073HC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073HCYx", + "package": "WLCSP42" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073K8.json b/data/chips/STM32U073K8.json new file mode 100644 index 0000000..cf03d77 --- /dev/null +++ b/data/chips/STM32U073K8.json @@ -0,0 +1,3317 @@ +{ + "name": "STM32U073K8", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073K8Ux", + "package": "UFQFPN32" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073KB.json b/data/chips/STM32U073KB.json new file mode 100644 index 0000000..f83bf2d --- /dev/null +++ b/data/chips/STM32U073KB.json @@ -0,0 +1,3317 @@ +{ + "name": "STM32U073KB", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073KBUx", + "package": "UFQFPN32" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 131072, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": 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"register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 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}, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073KC.json b/data/chips/STM32U073KC.json new file mode 100644 index 0000000..94c96ce --- /dev/null +++ b/data/chips/STM32U073KC.json @@ -0,0 +1,3317 @@ +{ + "name": "STM32U073KC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073KCUx", + "package": "UFQFPN32" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + } + ], + "interrupts": [ + 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"register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + 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"register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 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}, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", 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"field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073M8.json b/data/chips/STM32U073M8.json new file mode 100644 index 0000000..6ce7c9c --- /dev/null +++ b/data/chips/STM32U073M8.json @@ -0,0 +1,4437 @@ +{ + "name": "STM32U073M8", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073M8Ix", + "package": "UFBGA81" + }, + { + "name": "STM32U073M8Tx", + "package": "LQFP80" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + }, + { + "pin": "PD10", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 2 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 2 + }, + { + "pin": "PD12", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PD13", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + }, + { + "pin": "PC0", + "signal": "BIAS1", + "af": 12 + }, + { + "pin": "PC0", + "signal": "SEG18", + "af": 11 + }, + { + "pin": "PC1", + "signal": "BIAS2", + "af": 12 + }, + { + "pin": "PC1", + "signal": "SEG19", + "af": 11 + }, + { + "pin": "PC10", + "signal": "COM4", + "af": 11 + }, + { + "pin": "PC10", + "signal": "SEG28", + "af": 11 + }, + { + "pin": "PC10", + "signal": "SEG48", + "af": 11 + }, + { + "pin": "PC11", + "signal": "COM5", + "af": 11 + }, + { + "pin": "PC11", + "signal": "SEG29", + "af": 11 + }, + { + "pin": "PC11", + "signal": "SEG49", + "af": 11 + }, + { + "pin": "PC12", + "signal": "COM6", + "af": 11 + }, + { + "pin": "PC12", + "signal": "SEG30", + "af": 11 + }, + { + "pin": "PC12", + "signal": "SEG50", + "af": 11 + }, + { + "pin": "PC2", + "signal": "BIAS3", + "af": 12 + }, + { + "pin": "PC2", + "signal": "SEG20", + "af": 11 + }, + { + "pin": "PC4", + "signal": "SEG22", + "af": 11 + }, + { + "pin": "PC5", + "signal": "SEG23", + "af": 11 + }, + { + "pin": "PC6", + "signal": "SEG24", + "af": 11 + }, + { + "pin": "PC7", + "signal": "SEG25", + "af": 11 + }, + { + "pin": "PC8", + "signal": "SEG26", + "af": 11 + }, + { + "pin": "PC9", + "signal": "SEG27", + "af": 11 + }, + { + "pin": "PD0", + "signal": "SEG34", + "af": 11 + }, + { + "pin": "PD1", + "signal": "SEG35", + "af": 11 + }, + { + "pin": "PD10", + "signal": "SEG30", + "af": 11 + }, + { + "pin": "PD11", + "signal": "SEG31", + "af": 11 + }, + { + "pin": "PD12", + "signal": "SEG32", + "af": 11 + }, + { + "pin": "PD13", + "signal": "SEG33", + "af": 11 + }, + { + "pin": "PD2", + "signal": "COM7", + "af": 11 + }, + { + "pin": "PD2", + "signal": "SEG31", + "af": 11 + }, + { + "pin": "PD2", + "signal": "SEG51", + "af": 11 + }, + { + "pin": "PD3", + "signal": "SEG36", + "af": 11 + }, + { + "pin": "PD4", + "signal": "SEG37", + "af": 11 + }, + { + "pin": "PD5", + "signal": "SEG38", + "af": 11 + }, + { + "pin": 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1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD10", + "signal": "CK", + "af": 7 + }, + { + "pin": "PD11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PD12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD2", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD2", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PD9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 8 + }, + { + "pin": "PC3", + "signal": "CK", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + }, + { + "pin": "PC9", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073MB.json b/data/chips/STM32U073MB.json new file mode 100644 index 0000000..6a14049 --- /dev/null +++ b/data/chips/STM32U073MB.json @@ -0,0 +1,4437 @@ +{ + "name": "STM32U073MB", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073MBIx", + "package": "UFBGA81" + }, + { + "name": "STM32U073MBTx", + "package": "LQFP80" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 131072, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + }, + { + "pin": "PD10", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + 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"signal": "SDA", + "af": 2 + }, + { + "pin": "PD12", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PD13", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 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"CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PC1", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC2", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC3", + "signal": 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}, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PD10", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PD11", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PD12", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PD13", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB13", + "signal": "IN1", + "af": 2 + }, + { + "pin": "PB14", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PC10", + "signal": "ETR", + "af": 2 + }, + { + "pin": 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"pin": "PC1", + "signal": "TX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB6", 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+ "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PD11", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PD12", + "signal": "DE", + "af": 8 + }, + { + "pin": "PD12", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PD8", + "signal": "TX", + "af": 8 + }, + { + "pin": "PD9", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + }, + { + "pin": "PC5", + "signal": "WKUP5" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PC2", + "signal": "MCO2", + "af": 0 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB12", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB13", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB14", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB15", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PC2", + "signal": "MISO", + "af": 5 + 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"af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PC10", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PC11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PC12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + }, + { + "pin": "PC5", + "signal": "IN4" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": 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"CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + 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"pin": "PA13", + "signal": "NOE", + "af": 10 + }, + { + "pin": "PC9", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": 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"SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073MC.json b/data/chips/STM32U073MC.json new file mode 100644 index 0000000..f4560e5 --- /dev/null +++ b/data/chips/STM32U073MC.json @@ -0,0 +1,4437 @@ +{ + "name": "STM32U073MC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073MCIx", + "package": "UFBGA81" + }, + { + "name": "STM32U073MCTx", + "package": "LQFP80" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + }, + { + "pin": "PD10", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 2 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 2 + }, + { + "pin": "PD12", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PD13", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + }, + { + "pin": "PC0", + "signal": "BIAS1", + "af": 12 + }, + { + "pin": "PC0", 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"register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD10", + "signal": "CK", + "af": 7 + }, + { + "pin": "PD11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PD12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD2", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD2", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PD9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 8 + }, + { + "pin": "PC3", + "signal": "CK", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + }, + { + "pin": "PC9", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073R8.json b/data/chips/STM32U073R8.json new file mode 100644 index 0000000..958d797 --- /dev/null +++ b/data/chips/STM32U073R8.json @@ -0,0 +1,4163 @@ +{ + "name": "STM32U073R8", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073R8Ix", + "package": "UFBGA64" + }, + { + "name": "STM32U073R8Tx", + "package": "LQFP64" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 65536, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 2 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + }, + { + "pin": "PC0", + "signal": "BIAS1", + "af": 12 + }, + { + "pin": "PC0", + "signal": "SEG18", + "af": 11 + }, + { + "pin": "PC1", + "signal": "BIAS2", + "af": 12 + }, + { + "pin": "PC1", + "signal": "SEG19", + "af": 11 + }, + { + "pin": "PC10", + "signal": "COM4", + "af": 11 + }, + { + "pin": "PC10", + "signal": "SEG28", + "af": 11 + }, + { + "pin": "PC10", + "signal": "SEG48", + "af": 11 + }, + { + "pin": "PC11", + "signal": "COM5", + "af": 11 + }, + { + "pin": "PC11", + "signal": "SEG29", + "af": 11 + }, + { + "pin": "PC11", + "signal": "SEG49", + "af": 11 + }, + { + "pin": "PC12", + "signal": "COM6", + "af": 11 + }, + { + "pin": "PC12", + "signal": "SEG30", + "af": 11 + }, + { + "pin": "PC12", + "signal": "SEG50", + "af": 11 + }, + { + "pin": "PC2", + "signal": "BIAS3", + "af": 12 + }, + { + "pin": "PC2", + "signal": "SEG20", + "af": 11 + }, + { + "pin": "PC4", + "signal": "SEG22", + "af": 11 + }, + { + "pin": "PC5", + "signal": "SEG23", + "af": 11 + }, + { + "pin": "PC6", + "signal": "SEG24", + "af": 11 + }, + { + "pin": "PC7", + "signal": "SEG25", + "af": 11 + }, + { + "pin": "PC8", + "signal": "SEG26", + "af": 11 + }, + { + "pin": "PC9", + "signal": "SEG27", + "af": 11 + }, + { + "pin": "PD2", + "signal": "COM7", + "af": 11 + }, + { + "pin": "PD2", + "signal": "SEG31", + "af": 11 + }, + { + "pin": "PD2", + "signal": "SEG51", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PC1", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC2", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 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"IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 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}, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + }, + { + "pin": "PC0", + "signal": "TX", + "af": 10 + }, + { + "pin": "PC1", + "signal": "RX", + "af": 10 + }, + { + "pin": "PC6", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC7", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + }, + { + "pin": "PC5", + "signal": "WKUP5" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PC2", + "signal": "MCO2", + "af": 0 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB12", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB13", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB14", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB15", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PC2", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PC3", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PC10", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PC11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PC12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + }, + { + "pin": "PC5", + "signal": "IN4" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PB14", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB15", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PC6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PC8", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PD2", + "signal": "ETR", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + "signal": "G1_IO1", + "af": 9 + }, + { + "pin": "PB13", + "signal": "G1_IO2", + "af": 9 + }, + { + "pin": "PB14", + "signal": "G1_IO3", + "af": 9 + }, + { + "pin": "PB15", + "signal": "G1_IO4", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + }, + { + "pin": "PC10", + "signal": "G3_IO2", + "af": 9 + }, + { + "pin": "PC11", + "signal": "G3_IO3", + "af": 9 + }, + { + "pin": "PC6", + "signal": "G4_IO1", + "af": 9 + }, + { + "pin": "PC7", + "signal": "G4_IO2", + "af": 9 + }, + { + "pin": "PC8", + "signal": "G4_IO3", + "af": 9 + }, + { + "pin": "PC9", + "signal": "G4_IO4", + "af": 9 + }, + { + "pin": "PD2", + "signal": "SYNC", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD2", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD2", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 8 + }, + { + "pin": "PC3", + "signal": "CK", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + }, + { + "pin": "PC9", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073RB.json b/data/chips/STM32U073RB.json new file mode 100644 index 0000000..51d51ba --- /dev/null +++ b/data/chips/STM32U073RB.json @@ -0,0 +1,4163 @@ +{ + "name": "STM32U073RB", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073RBIx", + "package": "UFBGA64" + }, + { + "name": "STM32U073RBTx", + "package": "LQFP64" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 131072, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 2 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + }, + { + "pin": "PC0", + "signal": "BIAS1", + "af": 12 + }, + { + "pin": "PC0", + "signal": "SEG18", + "af": 11 + }, + { + "pin": "PC1", + "signal": "BIAS2", + "af": 12 + }, + { + "pin": "PC1", + "signal": "SEG19", + "af": 11 + }, + { + "pin": "PC10", + "signal": "COM4", + "af": 11 + }, + { + "pin": "PC10", + "signal": "SEG28", + "af": 11 + }, + { + "pin": "PC10", + "signal": "SEG48", + "af": 11 + }, + { + "pin": "PC11", + "signal": "COM5", + "af": 11 + }, + { + "pin": "PC11", + "signal": "SEG29", + "af": 11 + }, + { + "pin": "PC11", + "signal": "SEG49", + "af": 11 + }, + { + "pin": "PC12", + "signal": "COM6", + "af": 11 + }, + { + "pin": "PC12", + "signal": "SEG30", + "af": 11 + }, + { + "pin": "PC12", + "signal": "SEG50", + "af": 11 + }, + { + "pin": "PC2", + "signal": "BIAS3", + "af": 12 + }, + { + "pin": "PC2", + "signal": "SEG20", + "af": 11 + }, + { + "pin": "PC4", + "signal": "SEG22", + "af": 11 + }, + { + "pin": "PC5", + "signal": "SEG23", + "af": 11 + }, + { + "pin": "PC6", + "signal": "SEG24", + "af": 11 + }, + { + "pin": "PC7", + "signal": "SEG25", + "af": 11 + }, + { + "pin": "PC8", + "signal": "SEG26", + "af": 11 + }, + { + "pin": "PC9", + "signal": "SEG27", + "af": 11 + }, + { + "pin": "PD2", + "signal": "COM7", + "af": 11 + }, + { + "pin": "PD2", + "signal": "SEG31", + "af": 11 + }, + { + "pin": "PD2", + "signal": "SEG51", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PC1", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC2", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB13", + "signal": "IN1", + "af": 2 + }, + { + "pin": "PB14", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PC10", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PC11", + "signal": "IN1", + "af": 2 + }, + { + "pin": "PC12", + "signal": "CH3", + "af": 4 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 4 + }, + { + "pin": "PC3", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PC5", + "signal": "CH3", + "af": 4 + }, + { + "pin": "PC7", + "signal": "CH4", + "af": 4 + }, + { + "pin": "PC8", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PC9", + "signal": "CH2", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 8 + }, + { + "pin": "PB12", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB12", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC0", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC1", + "signal": "TX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + }, + { + "pin": "PC0", + "signal": "TX", + "af": 10 + }, + { + "pin": "PC1", + "signal": "RX", + "af": 10 + }, + { + "pin": "PC6", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC7", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + }, + { + "pin": "PC5", + "signal": "WKUP5" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { 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"PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": 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"pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB12", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB13", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB14", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB15", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PC2", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PC3", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PC10", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PC11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PC12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + }, + { + "pin": "PC5", + "signal": "IN4" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": 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"request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", 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"version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 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"rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": 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"field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 8 + }, + { + "pin": "PC3", + "signal": "CK", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + }, + { + "pin": "PC9", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U073RC.json b/data/chips/STM32U073RC.json new file mode 100644 index 0000000..5b6a8de --- /dev/null +++ b/data/chips/STM32U073RC.json @@ -0,0 +1,4163 @@ +{ + "name": "STM32U073RC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U073RCIx", + "package": "UFBGA64" + }, + { + "name": "STM32U073RCTx", + "package": "LQFP64" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 2 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": 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"pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PC2", + "signal": "MCO2", + "af": 0 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + 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"SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB12", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB13", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB14", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB15", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PC2", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PC3", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PC10", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PC11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PC12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + }, + { + "pin": "PC5", + "signal": "IN4" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PB14", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB15", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PC6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PC8", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PD2", + "signal": "ETR", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + "signal": "G1_IO1", + "af": 9 + }, + { + "pin": "PB13", + "signal": "G1_IO2", + "af": 9 + }, + { + "pin": "PB14", + "signal": "G1_IO3", + "af": 9 + }, + { + "pin": "PB15", + "signal": "G1_IO4", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + }, + { + "pin": "PC10", + "signal": "G3_IO2", + "af": 9 + }, + { + "pin": "PC11", + "signal": "G3_IO3", + "af": 9 + }, + { + "pin": "PC6", + "signal": "G4_IO1", + "af": 9 + }, + { + "pin": "PC7", + "signal": "G4_IO2", + "af": 9 + }, + { + "pin": "PC8", + "signal": "G4_IO3", + "af": 9 + }, + { + "pin": "PC9", + "signal": "G4_IO4", + "af": 9 + }, + { + "pin": "PD2", + "signal": "SYNC", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, 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"signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD2", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD2", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 8 + }, + { + "pin": "PC3", + "signal": "CK", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + }, + { + "pin": "PC9", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U083CC.json b/data/chips/STM32U083CC.json new file mode 100644 index 0000000..e711825 --- /dev/null +++ b/data/chips/STM32U083CC.json @@ -0,0 +1,3742 @@ +{ + "name": "STM32U083CC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U083CCTx", + "package": "LQFP48" + }, + { + "name": "STM32U083CCUx", + "package": "UFQFPN48" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "AES", + "address": 1073897472, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "AESEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "AESRST" + } + }, + "dma_channels": [ + { + "signal": "IN", + "dmamux": "DMAMUX1", + "request": 6 + }, + { + "signal": "OUT", + "dmamux": "DMAMUX1", + "request": 7 + } + ] + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB13", + "signal": "IN1", + "af": 2 + }, + { + "pin": "PB14", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 8 + }, + { + "pin": "PB12", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB12", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB12", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB13", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB14", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB15", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PB14", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB15", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + "signal": "G1_IO1", + "af": 9 + }, + { + "pin": "PB13", + "signal": "G1_IO2", + "af": 9 + }, + { + "pin": "PB14", + "signal": "G1_IO3", + "af": 9 + }, + { + "pin": "PB15", + "signal": "G1_IO4", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U083HC.json b/data/chips/STM32U083HC.json new file mode 100644 index 0000000..74bdd0a --- /dev/null +++ b/data/chips/STM32U083HC.json @@ -0,0 +1,3490 @@ +{ + "name": "STM32U083HC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U083HCYx", + "package": "WLCSP42" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "AES", + "address": 1073897472, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "AESEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "AESRST" + } + }, + "dma_channels": [ + { + "signal": "IN", + "dmamux": "DMAMUX1", + "request": 6 + }, + { + "signal": "OUT", + "dmamux": "DMAMUX1", + "request": 7 + } + ] + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 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"register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PC13", + "signal": "IN1" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { 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"request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U083KC.json b/data/chips/STM32U083KC.json new file mode 100644 index 0000000..6233ca4 --- /dev/null +++ b/data/chips/STM32U083KC.json @@ -0,0 +1,3345 @@ +{ + "name": "STM32U083KC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U083KCUx", + "package": "UFQFPN32" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "AES", + "address": 1073897472, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "AESEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "AESRST" + } + }, + "dma_channels": [ + { + "signal": "IN", + "dmamux": "DMAMUX1", + "request": 6 + }, + { + "signal": "OUT", + "dmamux": "DMAMUX1", + "request": 7 + } + ] + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + 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"signal": "BKIN", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + 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+ "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", 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"RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U083MC.json b/data/chips/STM32U083MC.json new file mode 100644 index 0000000..39c078a --- /dev/null +++ b/data/chips/STM32U083MC.json @@ -0,0 +1,4465 @@ +{ + "name": "STM32U083MC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U083MCIx", + "package": "UFBGA81" + }, + { + "name": "STM32U083MCTx", + "package": "LQFP80" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "AES", + "address": 1073897472, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "AESEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "AESRST" + } + }, + "dma_channels": [ + { + "signal": "IN", + "dmamux": "DMAMUX1", + "request": 6 + }, + { + "signal": "OUT", + "dmamux": "DMAMUX1", + "request": 7 + } + ] + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + }, + { + "pin": "PD10", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 2 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 2 + }, + { + "pin": "PD12", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PD13", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": 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{ + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { 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"RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PC10", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PC11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PC12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + }, + { + "pin": "PC5", + "signal": "IN4" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PB14", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB15", + "signal": "CH3N", + "af": 1 + }, + { + "pin": "PE7", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PE8", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PE9", + "signal": "CH1", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", 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"signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PC6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PC8", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PD2", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PE3", + "signal": "CH1", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + "signal": "G1_IO1", + "af": 9 + }, + { + "pin": "PB13", + "signal": "G1_IO2", + "af": 9 + }, + { + "pin": "PB14", + "signal": "G1_IO3", + "af": 9 + }, + { + "pin": "PB15", + "signal": "G1_IO4", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + }, + { + "pin": "PC10", + "signal": "G3_IO2", + "af": 9 + }, + { + "pin": "PC11", + "signal": "G3_IO3", + "af": 9 + }, + { + "pin": "PC6", + "signal": "G4_IO1", + "af": 9 + }, + { + "pin": "PC7", + "signal": "G4_IO2", + "af": 9 + }, + { + "pin": "PC8", + "signal": "G4_IO3", + "af": 9 + }, + { + "pin": "PC9", + "signal": "G4_IO4", + "af": 9 + }, + { + "pin": "PD10", + "signal": "G6_IO1", + "af": 9 + }, + { + "pin": "PD11", + "signal": "G6_IO2", + "af": 9 + }, + { + "pin": "PD12", + "signal": "G6_IO3", + "af": 9 + }, + { + "pin": "PD13", + "signal": "G6_IO4", + "af": 9 + }, + { + "pin": "PD2", + "signal": "SYNC", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + }, + { + "pin": "PD3", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PD4", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD4", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PD6", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD10", + "signal": "CK", + "af": 7 + }, + { + "pin": "PD11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PD12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD2", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD2", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PD9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 8 + }, + { + "pin": "PC3", + "signal": "CK", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + }, + { + "pin": "PC9", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U083RC.json b/data/chips/STM32U083RC.json new file mode 100644 index 0000000..d6f2e54 --- /dev/null +++ b/data/chips/STM32U083RC.json @@ -0,0 +1,4191 @@ +{ + "name": "STM32U083RC", + "family": "STM32U0", + "line": "STM32U0x3", + "die": "DIE489", + "device_id": 1161, + "packages": [ + { + "name": "STM32U083RCIx", + "package": "UFBGA64" + }, + { + "name": "STM32U083RCTx", + "package": "LQFP64" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 262144, + "settings": { + "erase_size": 2048, + "write_size": 8, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 40960 + } + ], + "docs": [], + "cores": [ + { + "name": "cm0p", + "peripherals": [ + { + "name": "ADC1", + "address": 1073816576, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "ADCSEL" + }, + "enable": { + "register": "APBENR2", + "field": "ADCEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "ADCRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN4" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PA2", + "signal": "IN6" + }, + { + "pin": "PA3", + "signal": "IN7" + }, + { + "pin": "PA4", + "signal": "IN8" + }, + { + "pin": "PA5", + "signal": "IN9" + }, + { + "pin": "PA6", + "signal": "IN10" + }, + { + "pin": "PA7", + "signal": "IN14" + }, + { + "pin": "PB0", + "signal": "IN17" + }, + { + "pin": "PB1", + "signal": "IN18" + }, + { + "pin": "PC0", + "signal": "IN0" + }, + { + "pin": "PC1", + "signal": "IN1" + }, + { + "pin": "PC2", + "signal": "IN2" + }, + { + "pin": "PC3", + "signal": "IN3" + }, + { + "pin": "PC4", + "signal": "IN15" + }, + { + "pin": "PC5", + "signal": "IN16" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC_COMP1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dmamux": "DMAMUX1", + "request": 5 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1073817352 + }, + { + "name": "AES", + "address": 1073897472, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "AESEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "AESRST" + } + }, + "dma_channels": [ + { + "signal": "IN", + "dmamux": "DMAMUX1", + "request": 6 + }, + { + "signal": "OUT", + "dmamux": "DMAMUX1", + "request": 7 + } + ] + }, + { + "name": "COMP1", + "address": 1073807872, + "pins": [ + { + "pin": "PA0", + "signal": "INM" + }, + { + "pin": "PA0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA1", + "signal": "INP" + }, + { + "pin": "PA11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA6", + "signal": "OUT", + "af": 6 + }, + { + "pin": "PA9", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + }, + { + "pin": "PC6", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "COMP2", + "address": 1073807876, + "pins": [ + { + "pin": "PA2", + "signal": "INM" + }, + { + "pin": "PA2", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PA3", + "signal": "INP" + }, + { + "pin": "PA4", + "signal": "INM" + }, + { + "pin": "PA5", + "signal": "INM" + }, + { + "pin": "PA7", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "ADC_COMP1_2" + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073769472, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1073771520, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "DAC1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 8 + } + ] + }, + { + "name": "DBGMCU", + "address": 1073829888 + }, + { + "name": "DMA1", + "address": 1073872896, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA1EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Channel2_3" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH6", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH7", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMA2", + "address": 1073873920, + "registers": { + "kind": "bdma", + "version": "v1", + "block": "DMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "DMA2EN" + }, + "reset": { + "register": "AHBRSTR", + "field": "DMA2RST" + } + }, + "interrupts": [ + { + "signal": "CH1", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH2", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH3", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH4", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + }, + { + "signal": "CH5", + "interrupt": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR" + } + ] + }, + { + "name": "DMAMUX1", + "address": 1073874944, + "registers": { + "kind": "dmamux", + "version": "v1", + "block": "DMAMUX" + } + }, + { + "name": "EXTI", + "address": 1073879040, + "registers": { + "kind": "exti", + "version": "u0", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI0_1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI2_3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI4_15" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI4_15" + } + ] + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u0", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "FLASHEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "FLASHRST" + } + } + }, + { + "name": "GPIOA", + "address": 1342177280, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOAEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1342178304, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOBEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1342179328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOCEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1342180352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIODEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1342181376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOEEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1342182400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "GPIO", + "kernel_clock": "GPIO", + "enable": { + "register": "GPIOENR", + "field": "GPIOFEN" + }, + "reset": { + "register": "GPIORSTR", + "field": "GPIOFRST" + } + } + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1" + }, + { + "signal": "EV", + "interrupt": "I2C1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 9 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 10 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C2RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PA6", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PA9", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB13", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB14", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 11 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 12 + } + ] + }, + { + "name": "I2C3", + "address": 1073776640, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "I2C3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "I2C3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 13 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 14 + } + ] + }, + { + "name": "I2C4", + "address": 1073782784, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "I2C4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 2 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C2_3_4" + }, + { + "signal": "EV", + "interrupt": "I2C2_3_4" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 15 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 16 + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + }, + { + "name": "LCD", + "address": 1073751040, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "LCDEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LCDRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "SEG42", + "af": 11 + }, + { + "pin": "PA1", + "signal": "SEG0", + "af": 11 + }, + { + "pin": "PA10", + "signal": "COM2", + "af": 11 + }, + { + "pin": "PA13", + "signal": "SEG40", + "af": 11 + }, + { + "pin": "PA14", + "signal": "SEG41", + "af": 11 + }, + { + "pin": "PA15", + "signal": "SEG17", + "af": 11 + }, + { + "pin": "PA2", + "signal": "SEG1", + "af": 11 + }, + { + "pin": "PA3", + "signal": "SEG2", + "af": 11 + }, + { + "pin": "PA4", + "signal": "SEG43", + "af": 11 + }, + { + "pin": "PA5", + "signal": "SEG44", + "af": 11 + }, + { + "pin": "PA6", + "signal": "SEG3", + "af": 11 + }, + { + "pin": "PA7", + "signal": "SEG4", + "af": 11 + }, + { + "pin": "PA8", + "signal": "COM0", + "af": 11 + }, + { + "pin": "PA9", + "signal": "COM1", + "af": 11 + }, + { + "pin": "PB0", + "signal": "SEG5", + "af": 11 + }, + { + "pin": "PB1", + "signal": "SEG6", + "af": 11 + }, + { + "pin": "PB10", + "signal": "SEG10", + "af": 11 + }, + { + "pin": "PB11", + "signal": "SEG11", + "af": 11 + }, + { + "pin": "PB12", + "signal": "SEG12", + "af": 11 + }, + { + "pin": "PB13", + "signal": "SEG13", + "af": 11 + }, + { + "pin": "PB14", + "signal": "SEG14", + "af": 11 + }, + { + "pin": "PB15", + "signal": "SEG15", + "af": 11 + }, + { + "pin": "PB3", + "signal": "SEG7", + "af": 11 + }, + { + "pin": "PB4", + "signal": "SEG8", + "af": 11 + }, + { + "pin": "PB5", + "signal": "SEG9", + "af": 11 + }, + { + "pin": "PB7", + "signal": "SEG21", + "af": 11 + }, + { + "pin": "PB8", + "signal": "SEG16", + "af": 11 + }, + { + "pin": "PB9", + "signal": "COM3", + "af": 11 + }, + { + "pin": "PC0", + "signal": "BIAS1", + "af": 12 + }, + { + "pin": "PC0", + "signal": "SEG18", + "af": 11 + }, + { + "pin": "PC1", + "signal": "BIAS2", + "af": 12 + }, + { + "pin": "PC1", + "signal": "SEG19", + "af": 11 + }, + { + "pin": "PC10", + "signal": "COM4", + "af": 11 + }, + { + "pin": "PC10", + "signal": "SEG28", + "af": 11 + }, + { + "pin": "PC10", + "signal": "SEG48", + "af": 11 + }, + { + "pin": "PC11", + "signal": "COM5", + "af": 11 + }, + { + "pin": "PC11", + "signal": "SEG29", + "af": 11 + }, + { + "pin": "PC11", + "signal": "SEG49", + "af": 11 + }, + { + "pin": "PC12", + "signal": "COM6", + "af": 11 + }, + { + "pin": "PC12", + "signal": "SEG30", + "af": 11 + }, + { + "pin": "PC12", + "signal": "SEG50", + "af": 11 + }, + { + "pin": "PC2", + "signal": "BIAS3", + "af": 12 + }, + { + "pin": "PC2", + "signal": "SEG20", + "af": 11 + }, + { + "pin": "PC4", + "signal": "SEG22", + "af": 11 + }, + { + "pin": "PC5", + "signal": "SEG23", + "af": 11 + }, + { + "pin": "PC6", + "signal": "SEG24", + "af": 11 + }, + { + "pin": "PC7", + "signal": "SEG25", + "af": 11 + }, + { + "pin": "PC8", + "signal": "SEG26", + "af": 11 + }, + { + "pin": "PC9", + "signal": "SEG27", + "af": 11 + }, + { + "pin": "PD2", + "signal": "COM7", + "af": 11 + }, + { + "pin": "PD2", + "signal": "SEG31", + "af": 11 + }, + { + "pin": "PD2", + "signal": "SEG51", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "LCD" + } + ] + }, + { + "name": "LPTIM1", + "address": 1073773568, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA14", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB2", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB5", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PB6", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PB7", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 1 + }, + { + "pin": "PC1", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC2", + "signal": "IN2", + "af": 1 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 17 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 18 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 19 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 20 + }, + { + "signal": "UE4", + "dmamux": "DMAMUX1", + "request": 21 + } + ] + }, + { + "name": "LPTIM2", + "address": 1073779712, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB1", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC0", + "signal": "IN1", + "af": 14 + }, + { + "pin": "PC3", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 22 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 23 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 24 + } + ] + }, + { + "name": "LPTIM3", + "address": 1073778688, + "registers": { + "kind": "lptim", + "version": "v1", + "block": "LPTIM" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPTIM3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPTIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPTIM3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA15", + "signal": "CH3", + "af": 14 + }, + { + "pin": "PA15", + "signal": "IN2", + "af": 4 + }, + { + "pin": "PB0", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PB1", + "signal": "CH2", + "af": 4 + }, + { + "pin": "PB10", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB13", + "signal": "IN1", + "af": 2 + }, + { + "pin": "PB14", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB8", + "signal": "IN2", + "af": 2 + }, + { + "pin": "PB9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PC10", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PC11", + "signal": "IN1", + "af": 2 + }, + { + "pin": "PC12", + "signal": "CH3", + "af": 4 + }, + { + "pin": "PC13", + "signal": "CH3", + "af": 4 + }, + { + "pin": "PC3", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PC5", + "signal": "CH3", + "af": 4 + }, + { + "pin": "PC7", + "signal": "CH4", + "af": 4 + }, + { + "pin": "PC8", + "signal": "CH1", + "af": 4 + }, + { + "pin": "PC9", + "signal": "CH2", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "IC1", + "dmamux": "DMAMUX1", + "request": 25 + }, + { + "signal": "IC2", + "dmamux": "DMAMUX1", + "request": 26 + }, + { + "signal": "IC3", + "dmamux": "DMAMUX1", + "request": 27 + }, + { + "signal": "IC4", + "dmamux": "DMAMUX1", + "request": 28 + }, + { + "signal": "UE", + "dmamux": "DMAMUX1", + "request": 29 + } + ] + }, + { + "name": "LPUART1", + "address": 1073774592, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART1SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART1EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART1RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA2", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 8 + }, + { + "pin": "PB12", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB12", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC0", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC1", + "signal": "TX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 30 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 31 + } + ] + }, + { + "name": "LPUART2", + "address": 1073775616, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART2RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PB0", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 10 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 10 + }, + { + "pin": "PB10", + "signal": "RX", + "af": 10 + }, + { + "pin": "PB11", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 10 + }, + { + "pin": "PC0", + "signal": "TX", + "af": 10 + }, + { + "pin": "PC1", + "signal": "RX", + "af": 10 + }, + { + "pin": "PC6", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC7", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 32 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 33 + } + ] + }, + { + "name": "LPUART3", + "address": 1073777664, + "registers": { + "kind": "usart", + "version": "v4", + "block": "LPUART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "LPUART3SEL" + }, + "enable": { + "register": "APBENR1", + "field": "LPUART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "LPUART3RST" + }, + "stop_mode": "Stop2" + }, + "pins": [ + { + "pin": "PA4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 8 + }, + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 6 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 6 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 34 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 35 + } + ] + }, + { + "name": "OPAMP1", + "address": 1073772544, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "OPAMPEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "OPAMPRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "VINP" + }, + { + "pin": "PA1", + "signal": "VINM" + }, + { + "pin": "PA3", + "signal": "VOUT" + } + ] + }, + { + "name": "PWR", + "address": 1073770496, + "registers": { + "kind": "pwr", + "version": "u0", + "block": "PWR" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "PWREN" + }, + "reset": { + "register": "APBRSTR1", + "field": "PWRRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PB15", + "signal": "WKUP7" + }, + { + "pin": "PB7", + "signal": "PVD_IN" + }, + { + "pin": "PC13", + "signal": "WKUP2" + }, + { + "pin": "PC5", + "signal": "WKUP5" + } + ] + }, + { + "name": "RCC", + "address": 1073876992, + "registers": { + "kind": "rcc", + "version": "u0", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA10", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PA8", + "signal": "MCO2", + "af": 3 + }, + { + "pin": "PA9", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_EN", + "af": 0 + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PC15", + "signal": "OSC_EN", + "af": 1 + }, + { + "pin": "PC2", + "signal": "MCO2", + "af": 0 + }, + { + "pin": "PF0", + "signal": "OSC_IN" + }, + { + "pin": "PF1", + "signal": "OSC_EN", + "af": 0 + }, + { + "pin": "PF1", + "signal": "OSC_OUT" + }, + { + "pin": "PF2", + "signal": "MCO", + "af": 0 + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "RCC_CRS" + }, + { + "signal": "RCC", + "interrupt": "RCC_CRS" + } + ] + }, + { + "name": "RNG", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "RNGEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG_CRYP" + } + ] + }, + { + "name": "RTC", + "address": 1073752064, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2", + "af": 0 + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "TAMP", + "interrupt": "RTC_TAMP" + } + ] + }, + { + "name": "SPI1", + "address": 1073819648, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SPI1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SPI1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PA15", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PA5", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PA6", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PA7", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB0", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 36 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 37 + } + ] + }, + { + "name": "SPI2", + "address": 1073756160, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI2RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PA10", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PA12", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PB10", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB12", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PB13", + "signal": "SCK", + "af": 5 + }, + { + "pin": "PB14", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PB15", + "signal": "MOSI", + "af": 5 + }, + { + "pin": "PB9", + "signal": "NSS", + "af": 5 + }, + { + "pin": "PC2", + "signal": "MISO", + "af": 5 + }, + { + "pin": "PC3", + "signal": "MOSI", + "af": 5 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 38 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 39 + } + ] + }, + { + "name": "SPI3", + "address": 1073757184, + "registers": { + "kind": "spi", + "version": "v2", + "block": "SPI" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "SPI3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "SPI3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PA4", + "signal": "NSS", + "af": 6 + }, + { + "pin": "PB3", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PB4", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PB5", + "signal": "MOSI", + "af": 6 + }, + { + "pin": "PC10", + "signal": "SCK", + "af": 6 + }, + { + "pin": "PC11", + "signal": "MISO", + "af": 6 + }, + { + "pin": "PC12", + "signal": "MOSI", + "af": 6 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SPI2_3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 40 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 41 + } + ] + }, + { + "name": "SYSCFG", + "address": 1073807360, + "registers": { + "kind": "syscfg", + "version": "u0", + "block": "SYSCFG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR2", + "field": "SYSCFGEN" + }, + "reset": { + "register": "APBRSTR2", + "field": "SYSCFGRST" + } + } + }, + { + "name": "TAMP", + "address": 1073786880, + "pins": [ + { + "pin": "PA0", + "signal": "IN2" + }, + { + "pin": "PA1", + "signal": "IN5" + }, + { + "pin": "PB15", + "signal": "IN3" + }, + { + "pin": "PC13", + "signal": "IN1" + }, + { + "pin": "PC5", + "signal": "IN4" + } + ] + }, + { + "name": "TIM1", + "address": 1073818624, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA11", + "signal": "BKIN2", + "af": 2 + }, + { + "pin": "PA11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA12", + "signal": "ETR", + "af": 1 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PA8", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA9", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB1", + "signal": "CH3N", + "af": 1 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 1 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 1 + }, + { + "pin": "PB14", + "signal": "CH2N", + "af": 1 + }, + { + "pin": "PB15", + "signal": "CH3N", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "CC", + "interrupt": "TIM1_CC" + }, + { + "signal": "COM", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "TRG", + "interrupt": "TIM1_BRK_UP_TRG_COM" + }, + { + "signal": "UP", + "interrupt": "TIM1_BRK_UP_TRG_COM" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 42 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 43 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 44 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 45 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 46 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 47 + } + ] + }, + { + "name": "TIM15", + "address": 1073823744, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_2CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "TIM15SEL" + }, + "enable": { + "register": "APBENR2", + "field": "TIM15EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM15RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PA2", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PA3", + "signal": "CH2", + "af": 14 + }, + { + "pin": "PA9", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB12", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB13", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB14", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB15", + "signal": "CH2", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "CC", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "COM", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM15_LPTIM3" + }, + { + "signal": "UP", + "interrupt": "TIM15_LPTIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 62 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 63 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 64 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 65 + } + ] + }, + { + "name": "TIM16", + "address": 1073824768, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_1CH_CMP" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR2", + "field": "TIM16EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "TIM16RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 14 + }, + { + "pin": "PB5", + "signal": "BKIN", + "af": 14 + }, + { + "pin": "PB6", + "signal": "CH1N", + "af": 14 + }, + { + "pin": "PB8", + "signal": "CH1", + "af": 14 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM16" + }, + { + "signal": "CC", + "interrupt": "TIM16" + }, + { + "signal": "COM", + "interrupt": "TIM16" + }, + { + "signal": "TRG", + "interrupt": "TIM16" + }, + { + "signal": "UP", + "interrupt": "TIM16" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 66 + }, + { + "signal": "COM", + "dmamux": "DMAMUX1", + "request": 67 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 68 + } + ] + }, + { + "name": "TIM2", + "address": 1073741824, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP32" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA0", + "signal": "ETR", + "af": 14 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 1 + }, + { + "pin": "PA15", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA15", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PA5", + "signal": "CH1", + "af": 1 + }, + { + "pin": "PA5", + "signal": "ETR", + "af": 2 + }, + { + "pin": "PB10", + "signal": "CH3", + "af": 1 + }, + { + "pin": "PB11", + "signal": "CH4", + "af": 1 + }, + { + "pin": "PB3", + "signal": "CH2", + "af": 1 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM2" + }, + { + "signal": "CC", + "interrupt": "TIM2" + }, + { + "signal": "COM", + "interrupt": "TIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM2" + }, + { + "signal": "UP", + "interrupt": "TIM2" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 48 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 49 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 50 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 51 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 52 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 53 + } + ] + }, + { + "name": "TIM3", + "address": 1073742848, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_GP16" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM3RST" + } + }, + "pins": [ + { + "pin": "PA6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PB0", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PB1", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PB4", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PB5", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PC6", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PC7", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PC8", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PC9", + "signal": "CH4", + "af": 2 + }, + { + "pin": "PD2", + "signal": "ETR", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM3" + }, + { + "signal": "CC", + "interrupt": "TIM3" + }, + { + "signal": "COM", + "interrupt": "TIM3" + }, + { + "signal": "TRG", + "interrupt": "TIM3" + }, + { + "signal": "UP", + "interrupt": "TIM3" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dmamux": "DMAMUX1", + "request": 54 + }, + { + "signal": "CH2", + "dmamux": "DMAMUX1", + "request": 55 + }, + { + "signal": "CH3", + "dmamux": "DMAMUX1", + "request": 56 + }, + { + "signal": "CH4", + "dmamux": "DMAMUX1", + "request": 57 + }, + { + "signal": "TRIG", + "dmamux": "DMAMUX1", + "request": 58 + }, + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 59 + } + ] + }, + { + "name": "TIM6", + "address": 1073745920, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM6EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM6RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "CC", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "COM", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "TRG", + "interrupt": "TIM6_DAC_LPTIM1" + }, + { + "signal": "UP", + "interrupt": "TIM6_DAC_LPTIM1" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 60 + } + ] + }, + { + "name": "TIM7", + "address": 1073746944, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_BASIC" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1_TIM", + "enable": { + "register": "APBENR1", + "field": "TIM7EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "CC", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "COM", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "TRG", + "interrupt": "TIM7_LPTIM2" + }, + { + "signal": "UP", + "interrupt": "TIM7_LPTIM2" + } + ], + "dma_channels": [ + { + "signal": "UP", + "dmamux": "DMAMUX1", + "request": 61 + } + ] + }, + { + "name": "TSC", + "address": 1073889280, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHBENR", + "field": "TSCEN" + }, + "reset": { + "register": "AHBRSTR", + "field": "TSCRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "G7_IO3", + "af": 9 + }, + { + "pin": "PA13", + "signal": "G7_IO4", + "af": 9 + }, + { + "pin": "PA14", + "signal": "G3_IO4", + "af": 9 + }, + { + "pin": "PA15", + "signal": "G3_IO1", + "af": 9 + }, + { + "pin": "PA6", + "signal": "G5_IO1", + "af": 9 + }, + { + "pin": "PA8", + "signal": "G7_IO1", + "af": 9 + }, + { + "pin": "PA9", + "signal": "G7_IO2", + "af": 9 + }, + { + "pin": "PB0", + "signal": "G5_IO2", + "af": 9 + }, + { + "pin": "PB1", + "signal": "SYNC", + "af": 9 + }, + { + "pin": "PB10", + "signal": "G5_IO3", + "af": 9 + }, + { + "pin": "PB11", + "signal": "G5_IO4", + "af": 9 + }, + { + "pin": "PB12", + "signal": "G1_IO1", + "af": 9 + }, + { + "pin": "PB13", + "signal": "G1_IO2", + "af": 9 + }, + { + "pin": "PB14", + "signal": "G1_IO3", + "af": 9 + }, + { + "pin": "PB15", + "signal": "G1_IO4", + "af": 9 + }, + { + "pin": "PB4", + "signal": "G2_IO1", + "af": 9 + }, + { + "pin": "PB5", + "signal": "G2_IO2", + "af": 9 + }, + { + "pin": "PB6", + "signal": "G2_IO3", + "af": 9 + }, + { + "pin": "PB7", + "signal": "G2_IO4", + "af": 9 + }, + { + "pin": "PC10", + "signal": "G3_IO2", + "af": 9 + }, + { + "pin": "PC11", + "signal": "G3_IO3", + "af": 9 + }, + { + "pin": "PC6", + "signal": "G4_IO1", + "af": 9 + }, + { + "pin": "PC7", + "signal": "G4_IO2", + "af": 9 + }, + { + "pin": "PC8", + "signal": "G4_IO3", + "af": 9 + }, + { + "pin": "PC9", + "signal": "G4_IO4", + "af": 9 + }, + { + "pin": "PD2", + "signal": "SYNC", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "TSC" + } + ] + }, + { + "name": "UID", + "address": 536833616, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART1SEL" + }, + "enable": { + "register": "APBENR2", + "field": "USART1EN" + }, + "reset": { + "register": "APBRSTR2", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 69 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 70 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "USART2SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2_LPUART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 71 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 72 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB9", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD2", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD2", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3_LPUART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 73 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 74 + } + ] + }, + { + "name": "USART4", + "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "USART4EN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USART4RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "TX", + "af": 8 + }, + { + "pin": "PA1", + "signal": "RX", + "af": 8 + }, + { + "pin": "PA15", + "signal": "DE", + "af": 8 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB7", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 8 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 8 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 8 + }, + { + "pin": "PC3", + "signal": "CK", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART4_LPUART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dmamux": "DMAMUX1", + "request": 75 + }, + { + "signal": "TX", + "dmamux": "DMAMUX1", + "request": 76 + } + ] + }, + { + "name": "USB", + "address": 1073765376, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR", + "field": "CLK48SEL" + }, + "enable": { + "register": "APBENR1", + "field": "USBEN" + }, + "reset": { + "register": "APBRSTR1", + "field": "USBRST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA13", + "signal": "NOE", + "af": 10 + }, + { + "pin": "PC9", + "signal": "NOE", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "HP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "LP", + "interrupt": "USB_DRD_FS" + }, + { + "signal": "WKUP", + "interrupt": "USB_DRD_FS" + } + ] + }, + { + "name": "USBRAM", + "address": 1073780736 + }, + { + "name": "VREFBUF", + "address": 1073807408 + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APBENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG_IWDG" + } + ] + } + ], + "nvic_priority_bits": 2, + "interrupts": [ + { + "name": "WWDG_IWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC_TAMP", + "number": 2 + }, + { + "name": "FLASH_ECC", + "number": 3 + }, + { + "name": "RCC_CRS", + "number": 4 + }, + { + "name": "EXTI0_1", + "number": 5 + }, + { + "name": "EXTI2_3", + "number": 6 + }, + { + "name": "EXTI4_15", + "number": 7 + }, + { + "name": "USB_DRD_FS", + "number": 8 + }, + { + "name": "DMA1_Channel1", + "number": 9 + }, + { + "name": "DMA1_Channel2_3", + "number": 10 + }, + { + "name": "DMA1_Ch4_7_DMA2_Ch1_5_DMAMUX_OVR", + "number": 11 + }, + { + "name": "ADC_COMP1_2", + "number": 12 + }, + { + "name": "TIM1_BRK_UP_TRG_COM", + "number": 13 + }, + { + "name": "TIM1_CC", + "number": 14 + }, + { + "name": "TIM2", + "number": 15 + }, + { + "name": "TIM3", + "number": 16 + }, + { + "name": "TIM6_DAC_LPTIM1", + "number": 17 + }, + { + "name": "TIM7_LPTIM2", + "number": 18 + }, + { + "name": "TIM15_LPTIM3", + "number": 19 + }, + { + "name": "TIM16", + "number": 20 + }, + { + "name": "TSC", + "number": 21 + }, + { + "name": "LCD", + "number": 22 + }, + { + "name": "I2C1", + "number": 23 + }, + { + "name": "I2C2_3_4", + "number": 24 + }, + { + "name": "SPI1", + "number": 25 + }, + { + "name": "SPI2_3", + "number": 26 + }, + { + "name": "USART1", + "number": 27 + }, + { + "name": "USART2_LPUART2", + "number": 28 + }, + { + "name": "USART3_LPUART1", + "number": 29 + }, + { + "name": "USART4_LPUART3", + "number": 30 + }, + { + "name": "RNG_CRYP", + "number": 31 + } + ], + "dma_channels": [ + { + "name": "DMA1_CH1", + "dma": "DMA1", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 0 + }, + { + "name": "DMA1_CH2", + "dma": "DMA1", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 1 + }, + { + "name": "DMA1_CH3", + "dma": "DMA1", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 2 + }, + { + "name": "DMA1_CH4", + "dma": "DMA1", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 3 + }, + { + "name": "DMA1_CH5", + "dma": "DMA1", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 4 + }, + { + "name": "DMA1_CH6", + "dma": "DMA1", + "channel": 5, + "dmamux": "DMAMUX1", + "dmamux_channel": 5 + }, + { + "name": "DMA1_CH7", + "dma": "DMA1", + "channel": 6, + "dmamux": "DMAMUX1", + "dmamux_channel": 6 + }, + { + "name": "DMA2_CH1", + "dma": "DMA2", + "channel": 0, + "dmamux": "DMAMUX1", + "dmamux_channel": 7 + }, + { + "name": "DMA2_CH2", + "dma": "DMA2", + "channel": 1, + "dmamux": "DMAMUX1", + "dmamux_channel": 8 + }, + { + "name": "DMA2_CH3", + "dma": "DMA2", + "channel": 2, + "dmamux": "DMAMUX1", + "dmamux_channel": 9 + }, + { + "name": "DMA2_CH4", + "dma": "DMA2", + "channel": 3, + "dmamux": "DMAMUX1", + "dmamux_channel": 10 + }, + { + "name": "DMA2_CH5", + "dma": "DMA2", + "channel": 4, + "dmamux": "DMAMUX1", + "dmamux_channel": 11 + } + ] + } + ] +} \ No newline at end of file diff --git a/data/chips/STM32U535CB.json b/data/chips/STM32U535CB.json index 6e25f50..e5cf669 100644 --- a/data/chips/STM32U535CB.json +++ b/data/chips/STM32U535CB.json @@ -4110,13 +4110,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535CC.json b/data/chips/STM32U535CC.json index 124753b..7be787d 100644 --- a/data/chips/STM32U535CC.json +++ b/data/chips/STM32U535CC.json @@ -4110,13 +4110,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535CE.json b/data/chips/STM32U535CE.json index 99ce80e..0bb9aca 100644 --- a/data/chips/STM32U535CE.json +++ b/data/chips/STM32U535CE.json @@ -4110,13 +4110,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535JE.json b/data/chips/STM32U535JE.json index 513efb5..a58bb64 100644 --- a/data/chips/STM32U535JE.json +++ b/data/chips/STM32U535JE.json @@ -4335,13 +4335,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535NC.json b/data/chips/STM32U535NC.json index 640231c..73d7008 100644 --- a/data/chips/STM32U535NC.json +++ b/data/chips/STM32U535NC.json @@ -4190,13 +4190,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535NE.json b/data/chips/STM32U535NE.json index 5e80ffe..104e8b2 100644 --- a/data/chips/STM32U535NE.json +++ b/data/chips/STM32U535NE.json @@ -4190,13 +4190,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535RB.json b/data/chips/STM32U535RB.json index 71d0b3b..1f79016 100644 --- a/data/chips/STM32U535RB.json +++ b/data/chips/STM32U535RB.json @@ -4696,13 +4696,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535RC.json b/data/chips/STM32U535RC.json index 2342264..4ccff52 100644 --- a/data/chips/STM32U535RC.json +++ b/data/chips/STM32U535RC.json @@ -4696,13 +4696,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535RE.json b/data/chips/STM32U535RE.json index 4af70c3..a40e182 100644 --- a/data/chips/STM32U535RE.json +++ b/data/chips/STM32U535RE.json @@ -4696,13 +4696,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535VC.json b/data/chips/STM32U535VC.json index f1ae1f5..f132ab3 100644 --- a/data/chips/STM32U535VC.json +++ b/data/chips/STM32U535VC.json @@ -5663,13 +5663,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U535VE.json b/data/chips/STM32U535VE.json index f9cb1ff..9512ed8 100644 --- a/data/chips/STM32U535VE.json +++ b/data/chips/STM32U535VE.json @@ -5663,13 +5663,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U545CE.json b/data/chips/STM32U545CE.json index 3df935f..7d2d446 100644 --- a/data/chips/STM32U545CE.json +++ b/data/chips/STM32U545CE.json @@ -4245,13 +4245,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U545JE.json b/data/chips/STM32U545JE.json index bed63a4..c415279 100644 --- a/data/chips/STM32U545JE.json +++ b/data/chips/STM32U545JE.json @@ -4470,13 +4470,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U545NE.json b/data/chips/STM32U545NE.json index 8e2e08d..017f858 100644 --- a/data/chips/STM32U545NE.json +++ b/data/chips/STM32U545NE.json @@ -4325,13 +4325,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U545RE.json b/data/chips/STM32U545RE.json index e62883a..17f4386 100644 --- a/data/chips/STM32U545RE.json +++ b/data/chips/STM32U545RE.json @@ -4831,13 +4831,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U545VE.json b/data/chips/STM32U545VE.json index 1f3a22c..4745609 100644 --- a/data/chips/STM32U545VE.json +++ b/data/chips/STM32U545VE.json @@ -5798,13 +5798,11 @@ "pins": [ { "pin": "PA11", - "signal": "DM", - "af": 10 + "signal": "DM" }, { "pin": "PA12", - "signal": "DP", - "af": 10 + "signal": "DP" }, { "pin": "PA13", diff --git a/data/chips/STM32U5A5QI.json b/data/chips/STM32U5A5QI.json new file mode 100644 index 0000000..b7e0884 --- /dev/null +++ b/data/chips/STM32U5A5QI.json @@ -0,0 +1,8396 @@ +{ + "name": "STM32U5A5QI", + "family": "STM32U5", + "line": "STM32U5x5", + "die": "DIE481", + "device_id": 1153, + "packages": [ + { + "name": "STM32U5A5QIIxQ", + "package": "UFBGA132" + } + ], + "memory": [ + { + "name": "BANK_1", + "kind": "flash", + "address": 134217728, + "size": 1048576, + "settings": { + "erase_size": 16384, + "write_size": 16, + "erase_value": 255 + } + }, + { + "name": "BANK_2", + "kind": "flash", + "address": 135266304, + "size": 1048576, + "settings": { + "erase_size": 16384, + "write_size": 16, + "erase_value": 255 + } + }, + { + "name": "SRAM", + "kind": "ram", + "address": 536870912, + "size": 786432 + }, + { + "name": "SRAM2", + "kind": "ram", + "address": 537657344, + "size": 65536 + }, + { + "name": "SRAM3", + "kind": "ram", + "address": 537722880, + "size": 851968 + }, + { + "name": "SRAM5", + "kind": "ram", + "address": 538574848, + "size": 851968 + } + ], + "docs": [], + "cores": [ + { + "name": "cm33", + "peripherals": [ + { + "name": "ADC1", + "address": 1107460096, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": { + "register": "CCIPR3", + "field": "ADCDACSEL" + }, + "enable": { + "register": "AHB2ENR1", + "field": "ADC12EN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "ADC12RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN5" + }, + { + "pin": "PA1", + "signal": "IN6" + }, + { + "pin": "PA2", + "signal": "IN7" + }, + { + "pin": "PA3", + "signal": "IN8" + }, + { + "pin": "PA4", + "signal": "IN9" + }, + { + "pin": "PA5", + "signal": "IN10" + }, + { + "pin": "PA6", + "signal": "IN11" + }, + { + "pin": "PA7", + "signal": "IN12" + }, + { + "pin": "PB0", + "signal": "IN15" + }, + { + "pin": "PB1", + "signal": "IN16" + }, + { + "pin": "PB2", + "signal": "IN17" + }, + { + "pin": "PC0", + "signal": "IN1" + }, + { + "pin": "PC1", + "signal": "IN2" + }, + { + "pin": "PC2", + "signal": "IN3" + }, + { + "pin": "PC3", + "signal": "IN4" + }, + { + "pin": "PC4", + "signal": "IN13" + }, + { + "pin": "PC5", + "signal": "IN14" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC1_2" + } + ], + "dma_channels": [ + { + "signal": "ADC1", + "dma": "GPDMA1", + "request": 0 + } + ] + }, + { + "name": "ADC2", + "address": 1107460352, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": { + "register": "CCIPR3", + "field": "ADCDACSEL" + }, + "enable": { + "register": "AHB2ENR1", + "field": "ADC12EN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "ADC12RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "IN5" + }, + { + "pin": "PA1", + "signal": "IN6" + }, + { + "pin": "PA2", + "signal": "IN7" + }, + { + "pin": "PA3", + "signal": "IN8" + }, + { + "pin": "PA4", + "signal": "IN9" + }, + { + "pin": "PA5", + "signal": "IN10" + }, + { + "pin": "PA6", + "signal": "IN11" + }, + { + "pin": "PA7", + "signal": "IN12" + }, + { + "pin": "PB0", + "signal": "IN15" + }, + { + "pin": "PB1", + "signal": "IN16" + }, + { + "pin": "PB2", + "signal": "IN17" + }, + { + "pin": "PC0", + "signal": "IN1" + }, + { + "pin": "PC1", + "signal": "IN2" + }, + { + "pin": "PC2", + "signal": "IN3" + }, + { + "pin": "PC3", + "signal": "IN4" + }, + { + "pin": "PC4", + "signal": "IN13" + }, + { + "pin": "PC5", + "signal": "IN14" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC1_2" + } + ] + }, + { + "name": "ADC4", + "address": 1174540288, + "rcc": { + "bus_clock": "HCLK3", + "kernel_clock": { + "register": "CCIPR3", + "field": "ADCDACSEL" + }, + "enable": { + "register": "AHB3ENR", + "field": "ADC4EN" + }, + "reset": { + "register": "AHB3RSTR", + "field": "ADC4RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "IN9" + }, + { + "pin": "PA5", + "signal": "IN10" + }, + { + "pin": "PA6", + "signal": "IN11" + }, + { + "pin": "PA7", + "signal": "IN20" + }, + { + "pin": "PB0", + "signal": "IN18" + }, + { + "pin": "PB1", + "signal": "IN19" + }, + { + "pin": "PC0", + "signal": "IN1" + }, + { + "pin": "PC1", + "signal": "IN2" + }, + { + "pin": "PC2", + "signal": "IN3" + }, + { + "pin": "PC3", + "signal": "IN4" + }, + { + "pin": "PC4", + "signal": "IN22" + }, + { + "pin": "PC5", + "signal": "IN23" + }, + { + "pin": "PD11", + "signal": "IN15" + }, + { + "pin": "PD12", + "signal": "IN16" + }, + { + "pin": "PD13", + "signal": "IN17" + }, + { + "pin": "PF14", + "signal": "IN5" + }, + { + "pin": "PF15", + "signal": "IN6" + }, + { + "pin": "PG0", + "signal": "IN7" + }, + { + "pin": "PG1", + "signal": "IN8" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADC4" + } + ], + "dma_channels": [ + { + "signal": "ADC4", + "dma": "GPDMA1", + "request": 1 + } + ] + }, + { + "name": "ADC_COMMON", + "address": 1107460864 + }, + { + "name": "ADF1", + "address": 1174552576, + "registers": { + "kind": "adf", + "version": "v1", + "block": "ADF" + }, + "rcc": { + "bus_clock": "HCLK3", + "kernel_clock": { + "register": "CCIPR3", + "field": "ADF1SEL" + }, + "enable": { + "register": "AHB3ENR", + "field": "ADF1EN" + }, + "reset": { + "register": "AHB3RSTR", + "field": "ADF1RST" + } + }, + "pins": [ + { + "pin": "PB3", + "signal": "CCK0", + "af": 3 + }, + { + "pin": "PB4", + "signal": "SDI0", + "af": 3 + }, + { + "pin": "PC10", + "signal": "CCK1", + "af": 3 + }, + { + "pin": "PC11", + "signal": "SDI0", + "af": 3 + }, + { + "pin": "PE10", + "signal": "SDI0", + "af": 3 + }, + { + "pin": "PE9", + "signal": "CCK0", + "af": 3 + }, + { + "pin": "PF3", + "signal": "CCK0", + "af": 3 + }, + { + "pin": "PF4", + "signal": "SDI0", + "af": 3 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ADF1" + } + ], + "dma_channels": [ + { + "signal": "FLT0", + "dma": "GPDMA1", + "request": 98 + } + ] + }, + { + "name": "AES", + "address": 1108082688, + "registers": { + "kind": "aes", + "version": "v3a", + "block": "AES" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "AESEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "AESRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "AES" + } + ], + "dma_channels": [ + { + "signal": "IN", + "dma": "GPDMA1", + "request": 87 + }, + { + "signal": "OUT", + "dma": "GPDMA1", + "request": 88 + } + ] + }, + { + "name": "COMP1", + "address": 1174426624, + "rcc": { + "bus_clock": "PCLK3", + "kernel_clock": "PCLK3", + "enable": { + "register": "APB3ENR", + "field": "COMPEN" + }, + "reset": { + "register": "APB3RSTR", + "field": "COMPRST" + } + }, + "pins": [ + { + "pin": "PA2", + "signal": "INP" + }, + { + "pin": "PB0", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB1", + "signal": "INM" + }, + { + "pin": "PB10", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB2", + "signal": "INP" + }, + { + "pin": "PC4", + "signal": "INM" + }, + { + "pin": "PC5", + "signal": "INP" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "COMP" + } + ] + }, + { + "name": "COMP2", + "address": 1174426628, + "rcc": { + "bus_clock": "PCLK3", + "kernel_clock": "PCLK3", + "enable": { + "register": "APB3ENR", + "field": "COMPEN" + }, + "reset": { + "register": "APB3RSTR", + "field": "COMPRST" + } + }, + "pins": [ + { + "pin": "PB11", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB3", + "signal": "INM" + }, + { + "pin": "PB4", + "signal": "INP" + }, + { + "pin": "PB5", + "signal": "OUT", + "af": 12 + }, + { + "pin": "PB6", + "signal": "INP" + }, + { + "pin": "PB7", + "signal": "INM" + } + ], + "interrupts": [ + { + "signal": "WKUP", + "interrupt": "COMP" + } + ] + }, + { + "name": "CORDIC", + "address": 1073876992, + "registers": { + "kind": "cordic", + "version": "v1", + "block": "CORDIC" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHB1ENR", + "field": "CORDICEN" + }, + "reset": { + "register": "AHB1RSTR", + "field": "CORDICRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "CORDIC" + } + ], + "dma_channels": [ + { + "signal": "READ", + "dma": "GPDMA1", + "request": 101 + }, + { + "signal": "WRITE", + "dma": "GPDMA1", + "request": 102 + } + ] + }, + { + "name": "CRC", + "address": 1073885184, + "registers": { + "kind": "crc", + "version": "v3", + "block": "CRC" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHB1ENR", + "field": "CRCEN" + }, + "reset": { + "register": "AHB1RSTR", + "field": "CRCRST" + } + } + }, + { + "name": "CRS", + "address": 1073766400, + "registers": { + "kind": "crs", + "version": "v1", + "block": "CRS" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APB1ENR1", + "field": "CRSEN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "CRSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "SYNC", + "af": 0 + }, + { + "pin": "PB3", + "signal": "SYNC", + "af": 10 + } + ] + }, + { + "name": "DAC1", + "address": 1174542336, + "registers": { + "kind": "dac", + "version": "v6", + "block": "DAC" + }, + "rcc": { + "bus_clock": "HCLK3", + "kernel_clock": { + "register": "CCIPR3", + "field": "DAC1SEL" + }, + "enable": { + "register": "AHB3ENR", + "field": "DAC1EN" + }, + "reset": { + "register": "AHB3RSTR", + "field": "DAC1RST" + } + }, + "pins": [ + { + "pin": "PA4", + "signal": "OUT1" + }, + { + "pin": "PA5", + "signal": "OUT2" + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "DAC1" + } + ], + "dma_channels": [ + { + "signal": "CH1", + "dma": "GPDMA1", + "request": 2 + }, + { + "signal": "CH2", + "dma": "GPDMA1", + "request": 3 + } + ] + }, + { + "name": "DBGMCU", + "address": 3758374912, + "registers": { + "kind": "dbgmcu", + "version": "u5", + "block": "DBGMCU" + } + }, + { + "name": "DCACHE1", + "address": 1073943552, + "registers": { + "kind": "dcache", + "version": "v1", + "block": "DCACHE" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHB1ENR", + "field": "DCACHE1EN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "DCACHE1" + } + ] + }, + { + "name": "DCMI", + "address": 1107476480, + "registers": { + "kind": "dcmi", + "version": "v1", + "block": "DCMI" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "DCMIEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "DCMIRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "D1", + "af": 5 + }, + { + "pin": "PA4", + "signal": "HSYNC", + "af": 10 + }, + { + "pin": "PA6", + "signal": "PIXCLK", + "af": 4 + }, + { + "pin": "PA9", + "signal": "D0", + "af": 5 + }, + { + "pin": "PB4", + "signal": "D12", + "af": 10 + }, + { + "pin": "PB5", + "signal": "D10", + "af": 10 + }, + { + "pin": "PB6", + "signal": "D5", + "af": 10 + }, + { + "pin": "PB7", + "signal": "VSYNC", + "af": 10 + }, + { + "pin": "PB8", + "signal": "D6", + "af": 10 + }, + { + "pin": "PB9", + "signal": "D7", + "af": 10 + }, + { + "pin": "PC10", + "signal": "D8", + "af": 10 + }, + { + "pin": "PC11", + "signal": "D2", + "af": 4 + }, + { + "pin": "PC11", + "signal": "D4", + "af": 10 + }, + { + "pin": "PC12", + "signal": "D9", + "af": 10 + }, + { + "pin": "PC6", + "signal": "D0", + "af": 10 + }, + { + "pin": "PC7", + "signal": "D1", + "af": 10 + }, + { + "pin": "PC8", + "signal": "D2", + "af": 10 + }, + { + "pin": "PC9", + "signal": "D3", + "af": 4 + }, + { + "pin": "PD2", + "signal": "D11", + "af": 10 + }, + { + "pin": "PD3", + "signal": "D5", + "af": 4 + }, + { + "pin": "PD6", + "signal": "D10", + "af": 4 + }, + { + "pin": "PD8", + "signal": "HSYNC", + "af": 10 + }, + { + "pin": "PD9", + "signal": "PIXCLK", + "af": 10 + }, + { + "pin": "PE0", + "signal": "D2", + "af": 10 + }, + { + "pin": "PE1", + "signal": "D3", + "af": 10 + }, + { + "pin": "PE4", + "signal": "D4", + "af": 10 + }, + { + "pin": "PE5", + "signal": "D6", + "af": 10 + }, + { + "pin": "PE6", + "signal": "D7", + "af": 10 + }, + { + "pin": "PF11", + "signal": "D12", + "af": 10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "DCMI_PSSI" + } + ], + "dma_channels": [ + { + "signal": "DCMI", + "dma": "GPDMA1", + "request": 86 + } + ] + }, + { + "name": "DMA2D", + "address": 1073917952, + "registers": { + "kind": "dma2d", + "version": "v1", + "block": "DMA2D" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHB1ENR", + "field": "DMA2DEN" + }, + "reset": { + "register": "AHB1RSTR", + "field": "DMA2DRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "DMA2D" + } + ] + }, + { + "name": "EXTI", + "address": 1174544384, + "registers": { + "kind": "exti", + "version": "u5", + "block": "EXTI" + }, + "interrupts": [ + { + "signal": "EXTI0", + "interrupt": "EXTI0" + }, + { + "signal": "EXTI1", + "interrupt": "EXTI1" + }, + { + "signal": "EXTI10", + "interrupt": "EXTI10" + }, + { + "signal": "EXTI11", + "interrupt": "EXTI11" + }, + { + "signal": "EXTI12", + "interrupt": "EXTI12" + }, + { + "signal": "EXTI13", + "interrupt": "EXTI13" + }, + { + "signal": "EXTI14", + "interrupt": "EXTI14" + }, + { + "signal": "EXTI15", + "interrupt": "EXTI15" + }, + { + "signal": "EXTI2", + "interrupt": "EXTI2" + }, + { + "signal": "EXTI3", + "interrupt": "EXTI3" + }, + { + "signal": "EXTI4", + "interrupt": "EXTI4" + }, + { + "signal": "EXTI5", + "interrupt": "EXTI5" + }, + { + "signal": "EXTI6", + "interrupt": "EXTI6" + }, + { + "signal": "EXTI7", + "interrupt": "EXTI7" + }, + { + "signal": "EXTI8", + "interrupt": "EXTI8" + }, + { + "signal": "EXTI9", + "interrupt": "EXTI9" + } + ] + }, + { + "name": "FDCAN1", + "address": 1073783808, + "registers": { + "kind": "can", + "version": "fdcan_v1", + "block": "FDCAN" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR1", + "field": "FDCAN1SEL" + }, + "enable": { + "register": "APB1ENR2", + "field": "FDCAN1EN" + }, + "reset": { + "register": "APB1RSTR2", + "field": "FDCAN1RST" + } + }, + "pins": [ + { + "pin": "PA11", + "signal": "RX", + "af": 9 + }, + { + "pin": "PA12", + "signal": "TX", + "af": 9 + }, + { + "pin": "PB8", + "signal": "RX", + "af": 9 + }, + { + "pin": "PB9", + "signal": "TX", + "af": 9 + }, + { + "pin": "PD0", + "signal": "RX", + "af": 9 + }, + { + "pin": "PD1", + "signal": "TX", + "af": 9 + } + ], + "interrupts": [ + { + "signal": "IT0", + "interrupt": "FDCAN1_IT0" + }, + { + "signal": "IT1", + "interrupt": "FDCAN1_IT1" + } + ] + }, + { + "name": "FDCANRAM1", + "address": 1073785856, + "registers": { + "kind": "fdcanram", + "version": "v1", + "block": "FDCANRAM" + } + }, + { + "name": "FLASH", + "address": 1073881088, + "registers": { + "kind": "flash", + "version": "u5", + "block": "FLASH" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHB1ENR", + "field": "FLASHEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "FLASH" + } + ] + }, + { + "name": "FMAC", + "address": 1073878016, + "registers": { + "kind": "fmac", + "version": "v1", + "block": "FMAC" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHB1ENR", + "field": "FMACEN" + }, + "reset": { + "register": "AHB1RSTR", + "field": "FMACRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "FMAC" + } + ], + "dma_channels": [ + { + "signal": "READ", + "dma": "GPDMA1", + "request": 99 + }, + { + "signal": "WRITE", + "dma": "GPDMA1", + "request": 100 + } + ] + }, + { + "name": "FMC", + "address": 1610612736, + "pins": [ + { + "pin": "PB15", + "signal": "NBL1", + "af": 11 + }, + { + "pin": "PB7", + "signal": "NL", + "af": 12 + }, + { + "pin": "PD0", + "signal": "D2", + "af": 12 + }, + { + "pin": "PD0", + "signal": "DA2", + "af": 12 + }, + { + "pin": "PD1", + "signal": "D3", + "af": 12 + }, + { + "pin": "PD1", + "signal": "DA3", + "af": 12 + }, + { + "pin": "PD10", + "signal": "D15", + "af": 12 + }, + { + "pin": "PD10", + "signal": "DA15", + "af": 12 + }, + { + "pin": "PD11", + "signal": "A16", + "af": 12 + }, + { + "pin": "PD11", + "signal": "CLE", + "af": 12 + }, + { + "pin": "PD12", + "signal": "A17", + "af": 12 + }, + { + "pin": "PD12", + "signal": "ALE", + "af": 12 + }, + { + "pin": "PD13", + "signal": "A18", + "af": 12 + }, + { + "pin": "PD14", + "signal": "D0", + "af": 12 + }, + { + "pin": "PD14", + "signal": "DA0", + "af": 12 + }, + { + "pin": "PD15", + "signal": "D1", + "af": 12 + }, + { + "pin": "PD15", + "signal": "DA1", + "af": 12 + }, + { + "pin": "PD3", + "signal": "CLK", + "af": 12 + }, + { + "pin": "PD4", + "signal": "NOE", + "af": 12 + }, + { + "pin": "PD5", + "signal": "NWE", + "af": 12 + }, + { + "pin": "PD6", + "signal": "NWAIT", + "af": 12 + }, + { + "pin": "PD7", + "signal": "NCE", + "af": 12 + }, + { + "pin": "PD7", + "signal": "NE1", + "af": 12 + }, + { + "pin": "PD8", + "signal": "D13", + "af": 12 + }, + { + "pin": "PD8", + "signal": "DA13", + "af": 12 + }, + { + "pin": "PD9", + "signal": "D14", + "af": 12 + }, + { + "pin": "PD9", + "signal": "DA14", + "af": 12 + }, + { + "pin": "PE0", + "signal": "NBL0", + "af": 12 + }, + { + "pin": "PE1", + "signal": "NBL1", + "af": 12 + }, + { + "pin": "PE10", + "signal": "D7", + "af": 12 + }, + { + "pin": "PE10", + "signal": "DA7", + "af": 12 + }, + { + "pin": "PE11", + "signal": "D8", + "af": 12 + }, + { + "pin": "PE11", + "signal": "DA8", + "af": 12 + }, + { + "pin": "PE12", + "signal": "D9", + "af": 12 + }, + { + "pin": "PE12", + "signal": "DA9", + "af": 12 + }, + { + "pin": "PE13", + "signal": "D10", + "af": 12 + }, + { + "pin": "PE13", + "signal": "DA10", + "af": 12 + }, + { + "pin": "PE14", + "signal": "D11", + "af": 12 + }, + { + "pin": "PE14", + "signal": "DA11", + "af": 12 + }, + { + "pin": "PE15", + "signal": "D12", + "af": 12 + }, + { + "pin": "PE15", + "signal": "DA12", + "af": 12 + }, + { + "pin": "PE2", + "signal": "A23", + "af": 12 + }, + { + "pin": "PE3", + "signal": "A19", + "af": 12 + }, + { + "pin": "PE4", + "signal": "A20", + "af": 12 + }, + { + "pin": "PE5", + "signal": "A21", + "af": 12 + }, + { + "pin": "PE6", + "signal": "A22", + "af": 12 + }, + { + "pin": "PE7", + "signal": "D4", + "af": 12 + }, + { + "pin": "PE7", + "signal": "DA4", + "af": 12 + }, + { + "pin": "PE8", + "signal": "D5", + "af": 12 + }, + { + "pin": "PE8", + "signal": "DA5", + "af": 12 + }, + { + "pin": "PE9", + "signal": "D6", + "af": 12 + }, + { + "pin": "PE9", + "signal": "DA6", + "af": 12 + }, + { + "pin": "PF0", + "signal": "A0", + "af": 12 + }, + { + "pin": "PF1", + "signal": "A1", + "af": 12 + }, + { + "pin": "PF12", + "signal": "A6", + "af": 12 + }, + { + "pin": "PF13", + "signal": "A7", + "af": 12 + }, + { + "pin": "PF14", + "signal": "A8", + "af": 12 + }, + { + "pin": "PF15", + "signal": "A9", + "af": 12 + }, + { + "pin": "PF2", + "signal": "A2", + "af": 12 + }, + { + "pin": "PF3", + "signal": "A3", + "af": 12 + }, + { + "pin": "PF4", + "signal": "A4", + "af": 12 + }, + { + "pin": "PF5", + "signal": "A5", + "af": 12 + }, + { + "pin": "PG0", + "signal": "A10", + "af": 12 + }, + { + "pin": "PG1", + "signal": "A11", + "af": 12 + }, + { + "pin": "PG10", + "signal": "NE3", + "af": 12 + }, + { + "pin": "PG12", + "signal": "NE4", + "af": 12 + }, + { + "pin": "PG2", + "signal": "A12", + "af": 12 + }, + { + "pin": "PG3", + "signal": "A13", + "af": 12 + }, + { + "pin": "PG4", + "signal": "A14", + "af": 12 + }, + { + "pin": "PG5", + "signal": "A15", + "af": 12 + }, + { + "pin": "PG7", + "signal": "INT", + "af": 12 + }, + { + "pin": "PG9", + "signal": "NCE", + "af": 12 + }, + { + "pin": "PG9", + "signal": "NE2", + "af": 12 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "FMC" + } + ] + }, + { + "name": "GPDMA1", + "address": 1073872896, + "registers": { + "kind": "gpdma", + "version": "v1", + "block": "GPDMA" + }, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": "HCLK1", + "enable": { + "register": "AHB1ENR", + "field": "GPDMA1EN" + }, + "reset": { + "register": "AHB1RSTR", + "field": "GPDMA1RST" + } + }, + "interrupts": [ + { + "signal": "CH0", + "interrupt": "GPDMA1_Channel0" + }, + { + "signal": "CH1", + "interrupt": "GPDMA1_Channel1" + }, + { + "signal": "CH10", + "interrupt": "GPDMA1_Channel10" + }, + { + "signal": "CH11", + "interrupt": "GPDMA1_Channel11" + }, + { + "signal": "CH12", + "interrupt": "GPDMA1_Channel12" + }, + { + "signal": "CH13", + "interrupt": "GPDMA1_Channel13" + }, + { + "signal": "CH14", + "interrupt": "GPDMA1_Channel14" + }, + { + "signal": "CH15", + "interrupt": "GPDMA1_Channel15" + }, + { + "signal": "CH2", + "interrupt": "GPDMA1_Channel2" + }, + { + "signal": "CH3", + "interrupt": "GPDMA1_Channel3" + }, + { + "signal": "CH4", + "interrupt": "GPDMA1_Channel4" + }, + { + "signal": "CH5", + "interrupt": "GPDMA1_Channel5" + }, + { + "signal": "CH6", + "interrupt": "GPDMA1_Channel6" + }, + { + "signal": "CH7", + "interrupt": "GPDMA1_Channel7" + }, + { + "signal": "CH8", + "interrupt": "GPDMA1_Channel8" + }, + { + "signal": "CH9", + "interrupt": "GPDMA1_Channel9" + } + ] + }, + { + "name": "GPIOA", + "address": 1107427328, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOAEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOARST" + } + } + }, + { + "name": "GPIOB", + "address": 1107428352, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOBEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOBRST" + } + } + }, + { + "name": "GPIOC", + "address": 1107429376, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOCEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOCRST" + } + } + }, + { + "name": "GPIOD", + "address": 1107430400, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIODEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIODRST" + } + } + }, + { + "name": "GPIOE", + "address": 1107431424, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOEEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOERST" + } + } + }, + { + "name": "GPIOF", + "address": 1107432448, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOFEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOFRST" + } + } + }, + { + "name": "GPIOG", + "address": 1107433472, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOGEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOGRST" + } + } + }, + { + "name": "GPIOH", + "address": 1107434496, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOHEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOHRST" + } + } + }, + { + "name": "GPIOI", + "address": 1107435520, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOIEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOIRST" + } + } + }, + { + "name": "GPIOJ", + "address": 1107436544, + "registers": { + "kind": "gpio", + "version": "v2", + "block": "GPIO" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "GPIOJEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "GPIOJRST" + } + } + }, + { + "name": "HASH", + "address": 1108083712, + "registers": { + "kind": "hash", + "version": "v4", + "block": "HASH" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "HASHEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "HASHRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "HASH" + } + ], + "dma_channels": [ + { + "signal": "IN", + "dma": "GPDMA1", + "request": 89 + } + ] + }, + { + "name": "I2C1", + "address": 1073763328, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR1", + "field": "I2C1SEL" + }, + "enable": { + "register": "APB1ENR1", + "field": "I2C1EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "I2C1RST" + } + }, + "pins": [ + { + "pin": "PA1", + "signal": "SMBA", + "af": 4 + }, + { + "pin": "PA14", + "signal": "SMBA", + "af": 4 + }, + { + "pin": "PB3", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB5", + "signal": "SMBA", + "af": 4 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PB8", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB9", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C1_ER" + }, + { + "signal": "EV", + "interrupt": "I2C1_EV" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dma": "GPDMA1", + "request": 12 + }, + { + "signal": "TX", + "dma": "GPDMA1", + "request": 13 + }, + { + "signal": "EVC", + "dma": "GPDMA1", + "request": 14 + } + ] + }, + { + "name": "I2C2", + "address": 1073764352, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR1", + "field": "I2C2SEL" + }, + "enable": { + "register": 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"v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK3", + "kernel_clock": { + "register": "CCIPR3", + "field": "I2C3SEL" + }, + "enable": { + "register": "APB3ENR", + "field": "I2C3EN" + }, + "reset": { + "register": "APB3RSTR", + "field": "I2C3RST" + } + }, + "pins": [ + { + "pin": "PA7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PB2", + "signal": "SMBA", + "af": 4 + }, + { + "pin": "PB4", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PC0", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PC1", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PG6", + "signal": "SMBA", + "af": 4 + }, + { + "pin": "PG7", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PG8", + "signal": "SDA", + "af": 4 + } + ], + "interrupts": [ + { + "signal": "ER", + "interrupt": "I2C3_ER" + }, + { + "signal": "EV", + "interrupt": "I2C3_EV" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dma": "GPDMA1", + "request": 18 + }, + { + "signal": "TX", + "dma": "GPDMA1", + "request": 19 + }, + { + "signal": "EVC", + "dma": "GPDMA1", + "request": 20 + } + ] + }, + { + "name": "I2C4", + "address": 1073775616, + "registers": { + "kind": "i2c", + "version": "v2", + "block": "I2C" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR1", + "field": "I2C4SEL" + }, + "enable": { + "register": "APB1ENR2", + "field": "I2C4EN" + }, + "reset": { + "register": "APB1RSTR2", + "field": "I2C4RST" + } + }, + "pins": [ + { + "pin": "PA14", + "signal": "SMBA", + "af": 5 + }, + { + "pin": "PB10", + "signal": "SCL", + "af": 3 + }, + { + "pin": "PB11", + "signal": "SDA", + "af": 3 + }, + { + "pin": "PB6", + "signal": "SCL", + "af": 5 + }, + { + "pin": "PB7", + "signal": "SDA", + "af": 5 + }, + { + "pin": "PD11", + "signal": "SMBA", + "af": 4 + }, + { + "pin": "PD12", + "signal": "SCL", + "af": 4 + }, + { + "pin": "PD13", + "signal": "SDA", + "af": 4 + }, + { + "pin": "PF13", + "signal": "SMBA", + "af": 4 + }, + { + "pin": "PF14", + "signal": "SCL", + "af": 4 + }, + { + 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"I2C6_EV" + } + ] + }, + { + "name": "ICACHE", + "address": 1073939456, + "registers": { + "kind": "icache", + "version": "v1_3crr", + "block": "ICACHE" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "ICACHE" + } + ] + }, + { + "name": "IWDG", + "address": 1073754112, + "registers": { + "kind": "iwdg", + "version": "v3", + "block": "IWDG" + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "IWDG" + } + ] + }, + { + "name": "LPDMA1", + "address": 1174556672, + "rcc": { + "bus_clock": "HCLK3", + "kernel_clock": "HCLK3", + "enable": { + "register": "AHB3ENR", + "field": "LPDMA1EN" + }, + "reset": { + "register": "AHB3RSTR", + "field": "LPDMA1RST" + }, + "stop_mode": "Stop2" + }, + "interrupts": [ + { + "signal": "CH0", + "interrupt": "LPDMA1_Channel0" + }, + { + "signal": "CH1", + "interrupt": "LPDMA1_Channel1" + }, + { + "signal": "CH2", + "interrupt": "LPDMA1_Channel2" + }, + { + "signal": "CH3", + "interrupt": "LPDMA1_Channel3" + } + ] + }, + { + "name": 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"request": 35 + } + ] + }, + { + "name": "MDF1", + "address": 1073893376, + "rcc": { + "bus_clock": "HCLK1", + "kernel_clock": { + "register": "CCIPR2", + "field": "MDF1SEL" + }, + "enable": { + "register": "AHB1ENR", + "field": "MDF1EN" + }, + "reset": { + "register": "AHB1RSTR", + "field": "MDF1RST" + } + }, + "pins": [ + { + "pin": "PB1", + "signal": "SDI0", + "af": 6 + }, + { + "pin": "PB12", + "signal": "SDI1", + "af": 6 + }, + { + "pin": "PB13", + "signal": "CKI1", + "af": 6 + }, + { + "pin": "PB14", + "signal": "SDI2", + "af": 6 + }, + { + "pin": "PB15", + "signal": "CKI2", + "af": 6 + }, + { + "pin": "PB2", + "signal": "CKI0", + "af": 6 + }, + { + "pin": "PB6", + "signal": "SDI5", + "af": 6 + }, + { + "pin": "PB7", + "signal": "CKI5", + "af": 6 + }, + { + "pin": "PB8", + "signal": "CCK0", + "af": 5 + }, + { + "pin": "PC0", + "signal": "SDI4", + "af": 6 + }, + { + "pin": "PC1", + "signal": "CKI4", + "af": 6 + }, + { + "pin": "PC2", + "signal": "CCK1", + "af": 6 + }, + { + "pin": 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"register": "CCIPR2", + "field": "OCTOSPISEL" + }, + "enable": { + "register": "AHB2ENR2", + "field": "OCTOSPI1EN" + }, + "reset": { + "register": "AHB2RSTR2", + "field": "OCTOSPI1RST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "OCTOSPI1" + } + ], + "dma_channels": [ + { + "signal": "OCTOSPI1", + "dma": "GPDMA1", + "request": 40 + } + ] + }, + { + "name": "OCTOSPI2", + "address": 1108157440, + "registers": { + "kind": "octospi", + "version": "v1", + "block": "OCTOSPI" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": { + "register": "CCIPR2", + "field": "OCTOSPISEL" + }, + "enable": { + "register": "AHB2ENR2", + "field": "OCTOSPI2EN" + }, + "reset": { + "register": "AHB2RSTR2", + "field": "OCTOSPI2RST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "OCTOSPI2" + } + ], + "dma_channels": [ + { + "signal": "OCTOSPI2", + "dma": "GPDMA1", + "request": 41 + } + ] + }, + { + "name": "OCTOSPIM", + "address": 1108099072, + "registers": { + "kind": "octospim", + "version": "v1", + "block": "OCTOSPIM" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "OCTOSPIMEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "OCTOSPIMRST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "P2_NCS", + "af": 10 + }, + { + "pin": "PA1", + "signal": "P1_DQS", + "af": 10 + }, + { + "pin": "PA12", + "signal": "P2_NCS", + "af": 6 + }, + { + "pin": "PA2", + "signal": "P1_NCS", + "af": 10 + }, + { + "pin": "PA3", + "signal": "P1_CLK", + "af": 10 + }, + { + "pin": "PA4", + "signal": "P1_NCS", + "af": 3 + }, + { + "pin": "PA6", + "signal": "P1_IO3", + "af": 10 + }, + { + "pin": "PA7", + "signal": "P1_IO2", + "af": 10 + }, + { + "pin": "PB0", + "signal": "P1_IO1", + "af": 10 + }, + { + "pin": "PB1", + "signal": "P1_IO0", + "af": 10 + }, + { + "pin": "PB10", + "signal": "P1_CLK", + "af": 10 + }, + { + "pin": "PB11", + "signal": "P1_NCS", + "af": 10 + }, + { + "pin": "PB12", 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"registers": { + "kind": "otfdec", + "version": "v1", + "block": "OTFDEC" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "OTFDEC1EN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "OTFDEC1RST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "OTFDEC1" + } + ] + }, + { + "name": "OTFDEC2", + "address": 1108104192, + "registers": { + "kind": "otfdec", + "version": "v1", + "block": "OTFDEC" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "OTFDEC2EN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "OTFDEC2RST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "OTFDEC2" + } + ] + }, + { + "name": "PKA", + "address": 1108090880, + "registers": { + "kind": "pka", + "version": "v1b", + "block": "PKA" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": "HCLK2", + "enable": { + "register": "AHB2ENR1", + "field": "PKAEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "PKARST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "PKA" + } + ] + }, + { + "name": "PSSI", + "address": 1107477504, + "registers": { + "kind": "pssi", + "version": "v1", + "block": "PSSI" + }, + "pins": [ + { + "pin": "PA10", + "signal": "D1", + "af": 5 + }, + { + "pin": "PA4", + "signal": "DE", + "af": 10 + }, + { + "pin": "PA5", + "signal": "D14", + "af": 4 + }, + { + "pin": "PA6", + "signal": "PDCK", + "af": 4 + }, + { + "pin": "PA9", + "signal": "D0", + "af": 5 + }, + { + "pin": "PB4", + "signal": "D12", + "af": 10 + }, + { + "pin": "PB5", + "signal": "D10", + "af": 10 + }, + { + "pin": "PB6", + "signal": "D5", + "af": 10 + }, + { + "pin": "PB7", + "signal": "RDY", + "af": 10 + }, + { + "pin": "PB8", + "signal": "D6", + "af": 10 + }, + { + "pin": "PB9", + "signal": "D7", + "af": 10 + }, + { + "pin": "PC10", + "signal": "D8", + "af": 10 + }, + { + "pin": "PC11", + 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10 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "DCMI_PSSI" + } + ] + }, + { + "name": "PWR", + "address": 1174538240, + "registers": { + "kind": "pwr", + "version": "u5", + "block": "PWR" + }, + "rcc": { + "bus_clock": "HCLK3", + "kernel_clock": "HCLK3", + "enable": { + "register": "AHB3ENR", + "field": "PWREN" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "WKUP1" + }, + { + "pin": "PA1", + "signal": "WKUP3" + }, + { + "pin": "PA2", + "signal": "WKUP4" + }, + { + "pin": "PA3", + "signal": "WKUP5" + }, + { + "pin": "PA4", + "signal": "WKUP2" + }, + { + "pin": "PA5", + "signal": "CSLEEP", + "af": 0 + }, + { + "pin": "PA5", + "signal": "WKUP6" + }, + { + "pin": "PA6", + "signal": "CDSTOP", + "af": 0 + }, + { + "pin": "PA6", + "signal": "WKUP7" + }, + { + "pin": "PA7", + "signal": "SRDSTOP", + "af": 0 + }, + { + "pin": "PA7", + "signal": "WKUP8" + }, + { + "pin": "PB1", + "signal": "WKUP4" + }, + { + "pin": "PB10", + "signal": "WKUP8" + }, + { + "pin": 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"rcc", + "version": "u5", + "block": "RCC" + }, + "pins": [ + { + "pin": "PA2", + "signal": "LSCO" + }, + { + "pin": "PA8", + "signal": "MCO", + "af": 0 + }, + { + "pin": "PC14", + "signal": "OSC32_IN" + }, + { + "pin": "PC15", + "signal": "OSC32_OUT" + }, + { + "pin": "PH0", + "signal": "OSC_IN" + }, + { + "pin": "PH1", + "signal": "OSC_OUT" + } + ], + "interrupts": [ + { + "signal": "CRS", + "interrupt": "CRS" + }, + { + "signal": "GLOBAL", + "interrupt": "RCC" + } + ] + }, + { + "name": "RNG", + "address": 1108084736, + "registers": { + "kind": "rng", + "version": "v3", + "block": "RNG" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": { + "register": "CCIPR2", + "field": "RNGSEL" + }, + "enable": { + "register": "AHB2ENR1", + "field": "RNGEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "RNGRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "RNG" + } + ] + }, + { + "name": "RTC", + "address": 1174435840, + "registers": { + "kind": "rtc", + "version": "v3u5", + "block": "RTC" + }, + "rcc": { + "bus_clock": "PCLK3", + "kernel_clock": "PCLK3", + "enable": { + "register": "APB3ENR", + "field": "RTCAPBEN" + }, + "stop_mode": "Standby" + }, + "pins": [ + { + "pin": "PB15", + "signal": "REFIN", + "af": 0 + }, + { + "pin": "PB2", + "signal": "OUT2" + }, + { + "pin": "PC13", + "signal": "OUT1" + }, + { + "pin": "PC13", + "signal": "TS" + } + ], + "interrupts": [ + { + "signal": "ALARM", + "interrupt": "RTC" + }, + { + "signal": "SSRU", + "interrupt": "RTC" + }, + { + "signal": "STAMP", + "interrupt": "RTC" + }, + { + "signal": "TAMP", + "interrupt": "RTC" + }, + { + "signal": "WKUP", + "interrupt": "RTC" + } + ] + }, + { + "name": "SAES", + "address": 1108085760, + "registers": { + "kind": "saes", + "version": "v1b", + "block": "SAES" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": { + "register": "CCIPR2", + "field": "SAESSEL" + }, + "enable": { + "register": "AHB2ENR1", + "field": "SAESEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "SAESRST" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "SAES" + } + ], + "dma_channels": [ + { + "signal": "IN", + "dma": "GPDMA1", + "request": 103 + }, + { + "signal": "OUT", + "dma": "GPDMA1", + "request": 104 + } + ] + }, + { + "name": "SAI1", + "address": 1073828864, + "registers": { + "kind": "sai", + "version": "v4_2pdm", + "block": "SAI" + }, + "rcc": { + "bus_clock": "PCLK2", + "kernel_clock": { + "register": "CCIPR2", + "field": "SAI1SEL" + }, + "enable": { + "register": "APB2ENR", + "field": "SAI1EN" + }, + "reset": { + "register": "APB2RSTR", + "field": "SAI1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "D1", + "af": 3 + }, + { + "pin": "PA10", + "signal": "SD_A", + "af": 13 + }, + { + "pin": "PA13", + "signal": "SD_B", + "af": 13 + }, + { + "pin": "PA14", + "signal": "FS_B", + "af": 13 + }, + { + "pin": "PA3", + "signal": "CK1", + "af": 3 + }, + { + "pin": "PA3", + "signal": "MCLK_A", + "af": 13 + }, + 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"field": "TIM5EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "TIM5RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CH1", + "af": 2 + }, + { + "pin": "PA1", + "signal": "CH2", + "af": 2 + }, + { + "pin": "PA2", + "signal": "CH3", + "af": 2 + }, + { + "pin": "PA3", + "signal": "CH4", + "af": 2 + } + ], + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM5" + }, + { + "signal": "CC", + "interrupt": "TIM5" + }, + { + "signal": "COM", + "interrupt": "TIM5" + }, + { + "signal": "TRG", + "interrupt": "TIM5" + }, + { + "signal": "UP", + "interrupt": "TIM5" + } + ], + "dma_channels": [ + { + "signal": "CC1", + "dma": "GPDMA1", + "request": 72 + }, + { + "signal": "CC2", + "dma": "GPDMA1", + "request": 73 + }, + { + "signal": "CC3", + "dma": "GPDMA1", + "request": 74 + }, + { + "signal": "CC4", + "dma": "GPDMA1", + "request": 75 + }, + { + "signal": "UPD", + "dma": "GPDMA1", + "request": 76 + }, + { + "signal": "TRG", + "dma": "GPDMA1", + "request": 77 + } + ] + }, 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"field": "TIM7RST" + } + }, + "interrupts": [ + { + "signal": "BRK", + "interrupt": "TIM7" + }, + { + "signal": "CC", + "interrupt": "TIM7" + }, + { + "signal": "COM", + "interrupt": "TIM7" + }, + { + "signal": "TRG", + "interrupt": "TIM7" + }, + { + "signal": "UP", + "interrupt": "TIM7" + } + ], + "dma_channels": [ + { + "signal": "UPD", + "dma": "GPDMA1", + "request": 5 + } + ] + }, + { + "name": "TIM8", + "address": 1073820672, + "registers": { + "kind": "timer", + "version": "v2", + "block": "TIM_ADV" + }, + "rcc": { + "bus_clock": "PCLK2", + "kernel_clock": "PCLK2_TIM", + "enable": { + "register": "APB2ENR", + "field": "TIM8EN" + }, + "reset": { + "register": "APB2RSTR", + "field": "TIM8RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "ETR", + "af": 3 + }, + { + "pin": "PA5", + "signal": "CH1N", + "af": 3 + }, + { + "pin": "PA6", + "signal": "BKIN", + "af": 3 + }, + { + "pin": "PA7", + "signal": "CH1N", + "af": 3 + }, + { + "pin": "PB0", + "signal": "CH2N", + "af": 3 + }, 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"register": "APB1RSTR1", + "field": "UART5RST" + } + }, + "pins": [ + { + "pin": "PB4", + "signal": "DE", + "af": 8 + }, + { + "pin": "PB4", + "signal": "RTS", + "af": 8 + }, + { + "pin": "PB5", + "signal": "CTS", + "af": 8 + }, + { + "pin": "PC12", + "signal": "TX", + "af": 8 + }, + { + "pin": "PD2", + "signal": "RX", + "af": 8 + }, + { + "pin": "PF3", + "signal": "TX", + "af": 8 + }, + { + "pin": "PF4", + "signal": "RX", + "af": 8 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "UART5" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dma": "GPDMA1", + "request": 32 + }, + { + "signal": "TX", + "dma": "GPDMA1", + "request": 33 + } + ] + }, + { + "name": "UCPD1", + "address": 1073798144, + "registers": { + "kind": "ucpd", + "version": "v1", + "block": "UCPD" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APB1ENR2", + "field": "UCPD1EN" + }, + "reset": { + "register": "APB1RSTR2", + "field": "UCPD1RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "CC1" + }, + { + "pin": "PA2", + "signal": "FRSTX1", + "af": 11 + }, + { + "pin": "PB14", + "signal": "DBCC2" + }, + { + "pin": "PB15", + "signal": "CC2" + }, + { + "pin": "PB2", + "signal": "FRSTX1", + "af": 11 + }, + { + "pin": "PB5", + "signal": "DBCC1" + }, + { + "pin": "PC11", + "signal": "FRSTX2", + "af": 11 + }, + { + "pin": "PF13", + "signal": "FRSTX2", + "af": 11 + }, + { + "pin": "PG6", + "signal": "FRSTX1", + "af": 11 + }, + { + "pin": "PG7", + "signal": "FRSTX2", + "af": 11 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "UCPD1" + } + ], + "dma_channels": [ + { + "signal": "TX", + "dma": "GPDMA1", + "request": 90 + }, + { + "signal": "RX", + "dma": "GPDMA1", + "request": 91 + } + ] + }, + { + "name": "UID", + "address": 200935168, + "registers": { + "kind": "uid", + "version": "v1", + "block": "UID" + } + }, + { + "name": "USART1", + "address": 1073821696, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK2", + "kernel_clock": { + "register": "CCIPR1", + "field": "USART1SEL" + }, + "enable": { + "register": "APB2ENR", + "field": "USART1EN" + }, + "reset": { + "register": "APB2RSTR", + "field": "USART1RST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA8", + "signal": "CK", + "af": 7 + }, + { + "pin": "PA9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB3", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB3", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB4", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB5", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB6", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB7", + "signal": "RX", + "af": 7 + }, + { + "pin": "PG10", + "signal": "RX", + "af": 7 + }, + { + "pin": "PG12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PG12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PG9", + "signal": "TX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART1" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dma": "GPDMA1", + "request": 24 + }, + { + "signal": "TX", + "dma": "GPDMA1", + "request": 25 + } + ] + }, + { + "name": "USART2", + "address": 1073759232, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR1", + "field": "USART2SEL" + }, + "enable": { + "register": "APB1ENR1", + "field": "USART2EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "USART2RST" + } + }, + "pins": [ + { + "pin": "PA0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RX", + "af": 3 + }, + { + "pin": "PA2", + "signal": "TX", + "af": 7 + }, + { + "pin": "PA3", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA4", + "signal": "CK", + "af": 7 + }, + { + "pin": "PD3", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PD4", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD4", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD5", + "signal": "TX", + "af": 7 + }, + { + "pin": "PD6", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD7", + "signal": "CK", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART2" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dma": "GPDMA1", + "request": 26 + }, + { + "signal": "TX", + "dma": "GPDMA1", + "request": 27 + } + ] + }, + { + "name": "USART3", + "address": 1073760256, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR1", + "field": "USART3SEL" + }, + "enable": { + "register": "APB1ENR1", + "field": "USART3EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "USART3RST" + } + }, + "pins": [ + { + "pin": "PA15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PA15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PA5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PA6", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PA7", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB0", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB1", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB1", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PB10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PB11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PB12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PB13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PB14", + "signal": "DE", + "af": 7 + }, + { + "pin": "PB14", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PC10", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC11", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC12", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC4", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC5", + "signal": "RX", + "af": 7 + }, + { + "pin": "PD10", + "signal": "CK", + "af": 7 + }, + { + "pin": "PD11", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PD12", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD12", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD2", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD2", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PD8", + "signal": "TX", + "af": 7 + }, + { + "pin": "PD9", + "signal": "RX", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART3" + } + ], + "dma_channels": [ + { + "signal": "RX", + "dma": "GPDMA1", + "request": 28 + }, + { + "signal": "TX", + "dma": "GPDMA1", + "request": 29 + } + ] + }, + { + "name": "USART6", + "address": 1073767424, + "registers": { + "kind": "usart", + "version": "v4", + "block": "USART" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": { + "register": "CCIPR2", + "field": "USART6SEL" + }, + "enable": { + "register": "APB1ENR1", + "field": "USART6EN" + }, + "reset": { + "register": "APB1RSTR1", + "field": "USART6RST" + } + }, + "pins": [ + { + "pin": "PC0", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PC1", + "signal": "CK", + "af": 7 + }, + { + "pin": "PC2", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC3", + "signal": "TX", + "af": 7 + }, + { + "pin": "PC8", + "signal": "RX", + "af": 7 + }, + { + "pin": "PC9", + "signal": "TX", + "af": 7 + }, + { + "pin": "PD13", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PD14", + "signal": "CK", + "af": 7 + }, + { + "pin": "PD15", + "signal": "DE", + "af": 7 + }, + { + "pin": "PD15", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PE0", + "signal": "RX", + "af": 7 + }, + { + "pin": "PE1", + "signal": "TX", + "af": 7 + }, + { + "pin": "PE2", + "signal": "CK", + "af": 7 + }, + { + "pin": "PE3", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PE4", + "signal": "DE", + "af": 7 + }, + { + "pin": "PE4", + "signal": "RTS", + "af": 7 + }, + { + "pin": "PF0", + "signal": "TX", + "af": 7 + }, + { + "pin": "PF1", + "signal": "RX", + "af": 7 + }, + { + "pin": "PF2", + "signal": "CK", + "af": 7 + }, + { + "pin": "PF3", + "signal": "CTS", + "af": 7 + }, + { + "pin": "PF4", + "signal": "DE", + "af": 7 + }, + { + "pin": "PF4", + "signal": "RTS", + "af": 7 + } + ], + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "USART6" + } + ] + }, + { + "name": "USB_OTG_HS", + "address": 1107558400, + "registers": { + "kind": "otg", + "version": "v1", + "block": "OTG" + }, + "rcc": { + "bus_clock": "HCLK2", + "kernel_clock": { + "register": "CCIPR1", + "field": "ICLKSEL" + }, + "enable": { + "register": "AHB2ENR1", + "field": "USB_OTG_HSEN" + }, + "reset": { + "register": "AHB2RSTR1", + "field": "USB_OTG_HSRST" + } + }, + "pins": [ + { + "pin": "PA10", + "signal": "ID", + "af": 10 + }, + { + "pin": "PA11", + "signal": "DM" + }, + { + "pin": "PA12", + "signal": "DP" + }, + { + "pin": "PA14", + "signal": "SOF", + "af": 10 + }, + { + "pin": "PA8", + "signal": "SOF", + "af": 10 + }, + { + "pin": "PA9", + "signal": "VBUS" + } + ], + "interrupts": [ + { + "signal": "EP1_IN", + "interrupt": "OTG_HS" + }, + { + "signal": "EP1_OUT", + "interrupt": "OTG_HS" + }, + { + "signal": "GLOBAL", + "interrupt": "OTG_HS" + }, + { + "signal": "WKUP", + "interrupt": "OTG_HS" + } + ] + }, + { + "name": "VREFBUF", + "address": 1174434816, + "registers": { + "kind": "vrefbuf", + "version": "v2a1", + "block": "VREFBUF" + } + }, + { + "name": "WWDG", + "address": 1073753088, + "registers": { + "kind": "wwdg", + "version": "v2", + "block": "WWDG" + }, + "rcc": { + "bus_clock": "PCLK1", + "kernel_clock": "PCLK1", + "enable": { + "register": "APB1ENR1", + "field": "WWDGEN" + } + }, + "interrupts": [ + { + "signal": "GLOBAL", + "interrupt": "WWDG" + }, + { + "signal": "RST", + "interrupt": "WWDG" + } + ] + } + ], + "nvic_priority_bits": 4, + "interrupts": [ + { + "name": "WWDG", + "number": 0 + }, + { + "name": "PVD_PVM", + "number": 1 + }, + { + "name": "RTC", + "number": 2 + }, + { + "name": "RTC_S", + "number": 3 + }, + { + "name": "TAMP", + "number": 4 + }, + { + "name": "RAMCFG", + "number": 5 + }, + { + "name": "FLASH", + "number": 6 + }, + { + "name": "FLASH_S", + "number": 7 + }, + { + "name": "GTZC", + "number": 8 + }, + { + "name": "RCC", + "number": 9 + }, + { + "name": "RCC_S", + "number": 10 + }, + { + "name": "EXTI0", + "number": 11 + }, + { + "name": "EXTI1", + "number": 12 + }, + { + "name": "EXTI2", + "number": 13 + }, + { + "name": "EXTI3", + "number": 14 + }, + { + "name": "EXTI4", + "number": 15 + }, + { + "name": "EXTI5", + "number": 16 + }, + { + "name": "EXTI6", + "number": 17 + }, + { + "name": "EXTI7", + "number": 18 + }, + { + "name": "EXTI8", + "number": 19 + }, + { + "name": "EXTI9", + "number": 20 + }, + { + "name": "EXTI10", + "number": 21 + }, + { + "name": "EXTI11", + "number": 22 + }, + { + "name": "EXTI12", + "number": 23 + }, + { + "name": "EXTI13", + "number": 24 + }, + { + "name": "EXTI14", + "number": 25 + }, + { + "name": "EXTI15", + "number": 26 + }, + { + "name": "IWDG", + "number": 27 + }, + { + "name": "SAES", + "number": 28 + }, + { + "name": "GPDMA1_Channel0", + "number": 29 + }, + { + "name": "GPDMA1_Channel1", + "number": 30 + }, + { + "name": "GPDMA1_Channel2", + "number": 31 + }, + { + "name": "GPDMA1_Channel3", + "number": 32 + }, + { + "name": "GPDMA1_Channel4", + "number": 33 + }, + { + "name": "GPDMA1_Channel5", + "number": 34 + }, + { + "name": "GPDMA1_Channel6", + "number": 35 + }, + { + "name": "GPDMA1_Channel7", + "number": 36 + }, + { + "name": "ADC1_2", + "number": 37 + }, + { + "name": "DAC1", + "number": 38 + }, + { + "name": "FDCAN1_IT0", + "number": 39 + }, + { + "name": "FDCAN1_IT1", + "number": 40 + }, + { + "name": "TIM1_BRK", + "number": 41 + }, + { + "name": "TIM1_UP", + "number": 42 + }, + { + "name": "TIM1_TRG_COM", + "number": 43 + }, + { + "name": "TIM1_CC", + "number": 44 + }, + { + "name": "TIM2", + "number": 45 + }, + { + "name": "TIM3", + "number": 46 + }, + { + "name": "TIM4", + "number": 47 + }, + { + "name": "TIM5", + "number": 48 + }, + { + "name": "TIM6", + "number": 49 + }, + { + "name": "TIM7", + "number": 50 + }, + { + "name": "TIM8_BRK", + "number": 51 + }, + { + "name": "TIM8_UP", + "number": 52 + }, + { + "name": "TIM8_TRG_COM", + "number": 53 + }, + { + "name": "TIM8_CC", + "number": 54 + }, + { + "name": "I2C1_EV", + "number": 55 + }, + { + "name": "I2C1_ER", + "number": 56 + }, + { + "name": "I2C2_EV", + "number": 57 + }, + { + "name": "I2C2_ER", + "number": 58 + }, + { + "name": "SPI1", + "number": 59 + }, + { + "name": "SPI2", + "number": 60 + }, + { + "name": "USART1", + "number": 61 + }, + { + "name": "USART2", + "number": 62 + }, + { + "name": "USART3", + "number": 63 + }, + { + "name": "UART4", + "number": 64 + }, + { + "name": "UART5", + "number": 65 + }, + { + "name": "LPUART1", + "number": 66 + }, + { + "name": "LPTIM1", + "number": 67 + }, + { + "name": "LPTIM2", + "number": 68 + }, + { + "name": "TIM15", + "number": 69 + }, + { + "name": "TIM16", + "number": 70 + }, + { + "name": "TIM17", + "number": 71 + }, + { + "name": "COMP", + "number": 72 + }, + { + "name": "OTG_HS", + "number": 73 + }, + { + "name": "CRS", + "number": 74 + }, + { + "name": "FMC", + "number": 75 + }, + { + "name": "OCTOSPI1", + "number": 76 + }, + { + "name": "PWR_S3WU", + "number": 77 + }, + { + "name": "SDMMC1", + "number": 78 + }, + { + "name": "SDMMC2", + "number": 79 + }, + { + "name": "GPDMA1_Channel8", + "number": 80 + }, + { + "name": "GPDMA1_Channel9", + "number": 81 + }, + { + "name": "GPDMA1_Channel10", + "number": 82 + }, + { + "name": "GPDMA1_Channel11", + "number": 83 + }, + { + "name": "GPDMA1_Channel12", + "number": 84 + }, + { + "name": "GPDMA1_Channel13", + "number": 85 + }, + { + "name": "GPDMA1_Channel14", + "number": 86 + }, + { + "name": "GPDMA1_Channel15", + "number": 87 + }, + { + "name": "I2C3_EV", + "number": 88 + }, + { + "name": "I2C3_ER", + "number": 89 + }, + { + "name": "SAI1", + "number": 90 + }, + { + "name": "SAI2", + "number": 91 + }, + { + "name": "TSC", + "number": 92 + }, + { + "name": "AES", + "number": 93 + }, + { + "name": "RNG", + "number": 94 + }, + { + "name": "FPU", + "number": 95 + }, + { + "name": "HASH", + "number": 96 + }, + { + "name": "PKA", + "number": 97 + }, + { + "name": "LPTIM3", + "number": 98 + }, + { + "name": "SPI3", + "number": 99 + }, + { + "name": "I2C4_ER", + "number": 100 + }, + { + "name": "I2C4_EV", + "number": 101 + }, + { + "name": "MDF1_FLT0", + "number": 102 + }, + { + "name": "MDF1_FLT1", + "number": 103 + }, + { + "name": "MDF1_FLT2", + "number": 104 + }, + { + "name": "MDF1_FLT3", + "number": 105 + }, + { + "name": "UCPD1", + "number": 106 + }, + { + "name": "ICACHE", + "number": 107 + }, + { + "name": "OTFDEC1", + "number": 108 + }, + { + "name": "OTFDEC2", + "number": 109 + }, + { + "name": "LPTIM4", + "number": 110 + }, + { + "name": "DCACHE1", + "number": 111 + }, + { + "name": "ADF1", + "number": 112 + }, + { + "name": "ADC4", + "number": 113 + }, + { + "name": "LPDMA1_Channel0", + "number": 114 + }, + { + "name": "LPDMA1_Channel1", + "number": 115 + }, + { + "name": "LPDMA1_Channel2", + "number": 116 + }, + { + "name": "LPDMA1_Channel3", + "number": 117 + }, + { + "name": "DMA2D", + "number": 118 + }, + { + "name": "DCMI_PSSI", + "number": 119 + }, + { + "name": "OCTOSPI2", + "number": 120 + }, + { + "name": "MDF1_FLT4", + "number": 121 + }, + { + "name": "MDF1_FLT5", + "number": 122 + }, + { + "name": "CORDIC", + "number": 123 + }, + { + "name": "FMAC", + "number": 124 + }, + { + "name": "LSECSSD", + "number": 125 + }, + { + "name": "USART6", + "number": 126 + }, + { + "name": "I2C5_ER", + "number": 127 + }, + { + "name": "I2C5_EV", + "number": 128 + }, + { + "name": "I2C6_ER", + "number": 129 + }, + { + "name": "I2C6_EV", + "number": 130 + }, + { + "name": "HSPI1", + "number": 131 + } + ], + "dma_channels": [ + { + "name": "GPDMA1_CH0", + "dma": "GPDMA1", + "channel": 0, + "supports_2d": false + }, + { + "name": "GPDMA1_CH1", + "dma": "GPDMA1", + "channel": 1, + "supports_2d": false + }, + { + "name": "GPDMA1_CH2", + "dma": "GPDMA1", + "channel": 2, + "supports_2d": false + }, + { + "name": "GPDMA1_CH3", + "dma": "GPDMA1", + "channel": 3, + "supports_2d": false + }, + { + "name": "GPDMA1_CH4", + "dma": "GPDMA1", + "channel": 4, + "supports_2d": false + }, + { + "name": "GPDMA1_CH5", + "dma": "GPDMA1", + "channel": 5, + "supports_2d": false + }, + { + "name": "GPDMA1_CH6", + "dma": "GPDMA1", + "channel": 6, + "supports_2d": false + }, + { + "name": "GPDMA1_CH7", + "dma": "GPDMA1", + "channel": 7, + "supports_2d": false + }, + { + "name": "GPDMA1_CH8", + "dma": "GPDMA1", + "channel": 8, + "supports_2d": false + }, + { + "name": "GPDMA1_CH9", + "dma": "GPDMA1", + "channel": 9, + "supports_2d": false + }, + { + "name": "GPDMA1_CH10", + "dma": "GPDMA1", + "channel": 10, + "supports_2d": false + }, + { + "name": "GPDMA1_CH11", + "dma": "GPDMA1", + "channel": 11, + "supports_2d": false + }, + { + "name": "GPDMA1_CH12", + "dma": "GPDMA1", + "channel": 12, + "supports_2d": true + }, + { + "name": "GPDMA1_CH13", + "dma": "GPDMA1", + "channel": 13, + "supports_2d": true + }, + { + "name": "GPDMA1_CH14", + "dma": "GPDMA1", + "channel": 14, + "supports_2d": true + }, + { + "name": "GPDMA1_CH15", + "dma": "GPDMA1", + "channel": 15, + "supports_2d": true + } + ] + } + ] +} \ No newline at end of file diff --git a/data/registers/exti_u0.json b/data/registers/exti_u0.json new file mode 100644 index 0000000..645b18b --- /dev/null +++ b/data/registers/exti_u0.json @@ -0,0 +1,117 @@ +{ + "block/EXTI": { + "description": "External interrupt/event controller", + "items": [ + { + "name": "RTSR", + "description": "Rising Trigger selection register", + "array": { + "len": 1, + "stride": 40 + }, + "byte_offset": 0, + "fieldset": "LINES" + }, + { + "name": "FTSR", + "description": "Falling Trigger selection register", + "array": { + "len": 1, + "stride": 40 + }, + "byte_offset": 4, + "fieldset": "LINES" + }, + { + "name": "SWIER", + "description": "Software interrupt event register", + "array": { + "len": 1, + "stride": 40 + }, + "byte_offset": 8, + "fieldset": "LINES" + }, + { + "name": "RPR", + "description": "Rising pending register", + "array": { + "len": 1, + "stride": 40 + }, + "byte_offset": 12, + "fieldset": "LINES" + }, + { + "name": "FPR", + "description": "Falling pending register", + "array": { + "len": 1, + "stride": 40 + }, + "byte_offset": 16, + "fieldset": "LINES" + }, + { + "name": "EXTICR", + "description": "Configuration register", + "array": { + "len": 4, + "stride": 4 + }, + "byte_offset": 96, + "fieldset": "EXTICR" + }, + { + "name": "IMR", + "description": "Interrupt mask register", + "array": { + "len": 2, + "stride": 16 + }, + "byte_offset": 128, + "fieldset": "LINES" + }, + { + "name": "EMR", + "description": "Event mask register", + "array": { + "len": 2, + "stride": 16 + }, + "byte_offset": 132, + "fieldset": "LINES" + } + ] + }, + "fieldset/EXTICR": { + "description": "external interrupt configuration register 1", + "fields": [ + { + "name": "EXTI", + "description": "EXTI configuration bits", + "bit_offset": 0, + "bit_size": 8, + "array": { + "len": 4, + "stride": 8 + } + } + ] + }, + "fieldset/LINES": { + "description": "EXTI lines register, 1 bit per line", + "fields": [ + { + "name": "LINE", + "description": "EXTI line", + "bit_offset": 0, + "bit_size": 1, + "array": { + "len": 32, + "stride": 1 + } + } + ] + } +} \ No newline at end of file diff --git a/data/registers/flash_u0.json b/data/registers/flash_u0.json new file mode 100644 index 0000000..0a08cb4 --- /dev/null +++ b/data/registers/flash_u0.json @@ -0,0 +1,564 @@ +{ + "block/FLASH": { + "description": "Mamba FLASH register block", + "items": [ + { + "name": "ACR", + "description": "FLASH access control register", + "byte_offset": 0, + "fieldset": "ACR" + }, + { + "name": "KEYR", + "description": "FLASH key register", + "byte_offset": 8, + "fieldset": "KEYR" + }, + { + "name": "OPTKEYR", + "description": "FLASH option key register", + "byte_offset": 12, + "fieldset": "OPTKEYR" + }, + { + "name": "SR", + "description": "FLASH status register", + "byte_offset": 16, + "fieldset": "SR" + }, + { + "name": "CR", + "description": "FLASH control register", + "byte_offset": 20, + "fieldset": "CR" + }, + { + "name": "ECCR", + "description": "FLASH ECC register", + "byte_offset": 24, + "fieldset": "ECCR" + }, + { + "name": "OPTR", + "description": "FLASH option register", + "byte_offset": 32, + "fieldset": "OPTR" + }, + { + "name": "WRP1AR", + "description": "FLASH WRP area A address register", + "byte_offset": 44, + "fieldset": "WRP1AR" + }, + { + "name": "WRP1BR", + "description": "FLASH WRP area B address register", + "byte_offset": 48, + "fieldset": "WRP1BR" + }, + { + "name": "SECR", + "description": "FLASH security register", + "byte_offset": 128, + "fieldset": "SECR" + } + ] + }, + "fieldset/ACR": { + "description": "FLASH access control register", + "fields": [ + { + "name": "LATENCY", + "description": "Flash memory access latency The value in this bitfield represents the number of CPU wait states when accessing the flash memory. Other: Reserved A new write into the bitfield becomes effective when it returns the same value upon read.", + "bit_offset": 0, + "bit_size": 3 + }, + { + "name": "PRFTEN", + "description": "CPU Prefetch enable", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "ICEN", + "description": "CPU Instruction cache enable", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "ICRST", + "description": "CPU Instruction cache reset This bit can be written only when the instruction cache is disabled.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "EMPTY", + "description": "Main flash memory area empty This bit indicates whether the first location of the main flash memory area is erased or has a programmed value. The bit can be set and reset by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "DBG_SWEN", + "description": "Debug access software enable Software may use this bit to enable/disable the debugger read access.", + "bit_offset": 18, + "bit_size": 1 + } + ] + }, + "fieldset/CR": { + "description": "FLASH control register", + "fields": [ + { + "name": "PG", + "description": "Flash memory programming enable", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PER", + "description": "Page erase enable", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "MER1", + "description": "Mass erase When set, this bit triggers the mass erase, that is, all user pages.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PNB", + "description": "Page number selection These bits select the page to erase: ... Note: Values corresponding to addresses outside the main memory are not allowed.", + "bit_offset": 3, + "bit_size": 7 + }, + { + "name": "STRT", + "description": "Start erase operation This bit triggers an erase operation when set. This bit is possible to set only by software and to clear only by hardware. The hardware clears it when one of BSY1 and BSY2 flags in the FLASH_SR register transits to zero.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "OPTSTRT", + "description": "Start of modification of option bytes This bit triggers an options operation when set. This bit is set only by software, and is cleared when the BSY1 bit is cleared in FLASH_SR.", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "FSTPG", + "description": "Fast programming enable", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "EOPIE", + "description": "End-of-operation interrupt enable This bit enables the interrupt generation upon setting the EOP flag in the FLASH_SR register.", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "ERRIE", + "description": "Error interrupt enable This bit enables the interrupt generation upon setting the OPERR flag in the FLASH_SR register.", + "bit_offset": 25, + "bit_size": 1 + }, + { + "name": "RDERRIE", + "description": "PCROP read error interrupt enable This bit enables the interrupt generation upon setting the RDERR flag in the FLASH_SR register.", + "bit_offset": 26, + "bit_size": 1 + }, + { + "name": "OBL_LAUNCH", + "description": "Option byte load launch When set, this bit triggers the load of option bytes into option registers. It is automatically cleared upon the completion of the load. The high state of the bit indicates pending option byte load. The bit cannot be cleared by software. It cannot be written as long as OPTLOCK is set.", + "bit_offset": 27, + "bit_size": 1 + }, + { + "name": "SEC_PROT", + "description": "Securable memory area protection enable This bit enables the protection on securable area, provided that a non-null securable memory area size (SEC_SIZE[4:0]) is defined in option bytes. This bit is possible to set only by software and to clear only through a system reset.", + "bit_offset": 28, + "bit_size": 1 + }, + { + "name": "OPTLOCK", + "description": "Options Lock This bit is set only. When set, all bits concerning user option in FLASH_CR register and so option page are locked. This bit is cleared by hardware after detecting the unlock sequence. The LOCK bit must be cleared before doing the unlock sequence for OPTLOCK bit. In case of an unsuccessful unlock operation, this bit remains set until the next reset.", + "bit_offset": 30, + "bit_size": 1 + }, + { + "name": "LOCK", + "description": "FLASH_CR Lock This bit is set only. When set, the FLASH_CR register is locked. It is cleared by hardware after detecting the unlock sequence. In case of an unsuccessful unlock operation, this bit remains set until the next system reset.", + "bit_offset": 31, + "bit_size": 1 + } + ] + }, + "fieldset/ECCR": { + "description": "FLASH ECC register", + "fields": [ + { + "name": "ADDR_ECC", + "description": "ECC fail double-word address offset In case of ECC error or ECC correction detected, this bitfield contains double-word offset (multiple of 64 bits) to main Flash memory.", + "bit_offset": 0, + "bit_size": 14 + }, + { + "name": "SYSF_ECC", + "description": "System Flash memory ECC fail This bit indicates that the ECC error correction or double ECC error detection is located in the system Flash memory.", + "bit_offset": 20, + "bit_size": 1 + }, + { + "name": "ECCCIE", + "description": "ECC correction interrupt enable", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "ECCC", + "description": "ECC correction Set by hardware when one ECC error has been detected and corrected. An interrupt is generated if ECCIE is set. Cleared by writing 1.", + "bit_offset": 30, + "bit_size": 1 + }, + { + "name": "ECCD", + "description": "ECC detection Set by hardware when two ECC errors have been detected. When this bit is set, a NMI is generated. Cleared by writing 1.", + "bit_offset": 31, + "bit_size": 1 + } + ] + }, + "fieldset/KEYR": { + "description": "FLASH key register", + "fields": [ + { + "name": "KEY", + "description": "FLASH key The following values must be written consecutively to unlock the FLASH control register (FLASH_CR), thus enabling programming/erasing operations: KEY1: 0x4567 0123 KEY2: 0xCDEF 89AB", + "bit_offset": 0, + "bit_size": 32 + } + ] + }, + "fieldset/OPTKEYR": { + "description": "FLASH option key register", + "fields": [ + { + "name": "OPTKEY", + "description": "Option byte key The following values must be written consecutively to unlock the flash memory option registers, enabling option byte programming/erasing operations: KEY1: 0x0819 2A3B KEY2: 0x4C5D 6E7F", + "bit_offset": 0, + "bit_size": 32 + } + ] + }, + "fieldset/OPTR": { + "description": "FLASH option register", + "fields": [ + { + "name": "RDP", + "description": "Read protection level Other: Level 1, memories read protection active", + "bit_offset": 0, + "bit_size": 8, + "enum": "RDP" + }, + { + "name": "BORR_LEV", + "description": "BOR reset level", + "bit_offset": 8, + "bit_size": 3, + "enum": "BORR_LEV" + }, + { + "name": "NRST_STOP", + "description": "Reset generated when entering Stop mode", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "NRST_STDBY", + "description": "Reset generated when entering Standby mode", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "NRST_SHDW", + "description": "Reset generated when entering Shutdown mode", + "bit_offset": 15, + "bit_size": 1 + }, + { + "name": "IWDG_SW", + "description": "Independent watchdog selection", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "IWDG_STOP", + "description": "Independent watchdog counter freeze in Stop mode", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "IWDG_STDBY", + "description": "Independent watchdog counter freeze in Standby mode", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "WWDG_SW", + "description": "Window watchdog selection", + "bit_offset": 19, + "bit_size": 1 + }, + { + "name": "BDRST", + "description": "Backup domain reset", + "bit_offset": 21, + "bit_size": 1 + }, + { + "name": "RAM_PARITY_CHECK", + "description": "SRAM parity check control enable/disable", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "BKPSRAM_HW_ERASE_DISABLE", + "description": "Backup SRAM erase prevention", + "bit_offset": 23, + "bit_size": 1 + }, + { + "name": "NBOOT_SEL", + "description": "BOOT0 signal source selection This option bit defines the source of the BOOT0 signal.", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "NBOOT1", + "description": "Boot configuration Together with the BOOT0 pin or option bit NBOOT0 (depending on NBOOT_SEL option bit configuration), this bit selects boot mode from the main flash memory, SRAM or the system memory. Refer to Section12.5: Boot configuration.", + "bit_offset": 25, + "bit_size": 1 + }, + { + "name": "NBOOT0", + "description": "NBOOT0 option bit", + "bit_offset": 26, + "bit_size": 1 + }, + { + "name": "NRST_MODE", + "description": "NRST pin configuration", + "bit_offset": 27, + "bit_size": 2, + "enum": "NRST_MODE" + }, + { + "name": "IRHEN", + "description": "Internal reset holder enable bit", + "bit_offset": 29, + "bit_size": 1 + } + ] + }, + "fieldset/SECR": { + "description": "FLASH security register", + "fields": [ + { + "name": "HDP1_PEND", + "description": "Last page of the first hide protection area", + "bit_offset": 0, + "bit_size": 7 + }, + { + "name": "BOOT_LOCK", + "description": "used to force boot from user area If the bit is set in association with RDP level 1, the debug capabilities are disabled, except in the case of a bad OBL (mismatch).", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "HDP1EN", + "description": "Hide protection area enable", + "bit_offset": 24, + "bit_size": 8 + } + ] + }, + "fieldset/SR": { + "description": "FLASH status register", + "fields": [ + { + "name": "EOP", + "description": "End of operation Set by hardware when one or more flash memory operation (programming / erase) has been completed successfully. This bit is set only if the end of operation interrupts are enabled (EOPIE=1). Cleared by writing 1.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "OPERR", + "description": "Operation error Set by hardware when a flash memory operation (program / erase) completes unsuccessfully. This bit is set only if error interrupts are enabled (ERRIE=1). Cleared by writing 1.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PROGERR", + "description": "Programming error Set by hardware when a double-word address to be programmed contains a value different from '0xFFFF FFFF' before programming, except if the data to write is '0x0000 0000'. Cleared by writing 1.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "WRPERR", + "description": "Write protection error Set by hardware when an address to be erased/programmed belongs to a write-protected part (by WRP, PCROP or RDP Level 1) of the flash memory. Cleared by writing 1.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PGAERR", + "description": "Programming alignment error Set by hardware when the data to program cannot be contained in the same double word (64-bit) flash memory in case of standard programming, or if there is a change of page during fast programming. Cleared by writing 1.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "SIZERR", + "description": "Size error Set by hardware when the size of the access is a byte or half-word during a program or a fast program sequence. Only double word programming is allowed (consequently: word access). Cleared by writing 1.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PGSERR", + "description": "Programming sequence error Set by hardware when a write access to the flash memory is performed by the code while PG or FSTPG have not been set previously. Set also by hardware when PROGERR, SIZERR, PGAERR, WRPERR, MISSERR or FASTERR is set due to a previous programming error. Cleared by writing 1.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "MISSERR", + "description": "Fast programming data miss error In Fast programming mode, 16 double words (128 bytes) must be sent to flash memory successively, and the new data must be sent to the logic control before the current data is fully programmed. MISSERR is set by hardware when the new data is not present in time. Cleared by writing 1.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "FASTERR", + "description": "Fast programming error Set by hardware when a fast programming sequence (activated by FSTPG) is interrupted due to an error (alignment, size, write protection or data miss). The corresponding status bit (PGAERR, SIZERR, WRPERR or MISSERR) is set at the same time. Cleared by writing 1.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "RDERR", + "description": "PCROP read error Set by hardware when an address to be read belongs to a read protected area of the flash memory (PCROP protection). An interrupt is generated if RDERRIE is set in FLASH_CR. Cleared by writing 1.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "OPTVERR", + "description": "Option and Engineering bits loading validity error", + "bit_offset": 15, + "bit_size": 1 + }, + { + "name": "BSY1", + "description": "Busy This flag indicates that a flash memory operation requested by FLASH control register (FLASH_CR) is in progress. This bit is set at the beginning of the flash memory operation, and cleared when the operation finishes or when an error occurs.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "CFGBSY", + "description": "Programming or erase configuration busy. This flag is set and cleared by hardware. It is set when the first word is sent for program or when setting the STRT bit of FLASH control register (FLASH_CR) for erase. It is cleared when the flash memory program or erase operation completes or ends with an error. When set, launching any other operation through the FLASH control register (FLASH_CR) is impossible, and must be postponed (a programming or erase operation is ongoing). When cleared, the program and erase settings in the FLASH control register (FLASH_CR) can be modified.", + "bit_offset": 18, + "bit_size": 1 + } + ] + }, + "fieldset/WRP1AR": { + "description": "FLASH WRP area A address register", + "fields": [ + { + "name": "WRP1A_STRT", + "description": "WRP area A start offset This bitfield contains the offset of the first page of the WRP area A. Note: The number of effective bits depends on the size of the flash memory in the device.", + "bit_offset": 0, + "bit_size": 7 + }, + { + "name": "WRP1A_END", + "description": "WRP area A end offset This bitfield contains the offset of the last page of the WRP area A. Note: The number of effective bits depends on the size of the flash memory in the device.", + "bit_offset": 16, + "bit_size": 7 + } + ] + }, + "fieldset/WRP1BR": { + "description": "FLASH WRP area B address register", + "fields": [ + { + "name": "WRP1B_STRT", + "description": "WRP area B start offset This bitfield contains the offset of the first page of the WRP area B. Note: The number of effective bits depends on the size of the flash memory in the device.", + "bit_offset": 0, + "bit_size": 7 + }, + { + "name": "WRP1B_END", + "description": "WRP area B end offset This bitfield contains the offset of the last page of the WRP area B. Note: The number of effective bits depends on the size of the flash memory in the device.", + "bit_offset": 16, + "bit_size": 7 + } + ] + }, + "enum/BORR_LEV": { + "bit_size": 3, + "variants": [ + { + "name": "Level1", + "description": "BOR rising level 1 with threshold around 2.1 V", + "value": 0 + }, + { + "name": "Level2", + "description": "BOR rising level 2 with threshold around 2.3 V", + "value": 1 + }, + { + "name": "Level3", + "description": "BOR rising level 3 with threshold around 2.6 V", + "value": 2 + }, + { + "name": "Level4", + "description": "BOR rising level 4 with threshold around 2.9 V", + "value": 3 + } + ] + }, + "enum/NRST_MODE": { + "bit_size": 2, + "variants": [ + { + "name": "OnlyInput", + "description": "Reset input only: a low level on the NRST pin generates system reset; internal RESET is not propagated to the NRST pin.", + "value": 1 + }, + { + "name": "OnlyInternal", + "description": "Standard GPIO: only internal RESET is possible", + "value": 2 + }, + { + "name": "Bidirectional", + "description": "Bidirectional reset: the NRST pin is configured in reset input/output (legacy) mode", + "value": 3 + } + ] + }, + "enum/RDP": { + "bit_size": 8, + "variants": [ + { + "name": "Level0", + "description": "Level 0, read protection not active", + "value": 170 + }, + { + "name": "Level2", + "description": "Level 2, chip read protection active", + "value": 204 + } + ] + } +} \ No newline at end of file diff --git a/data/registers/pwr_u0.json b/data/registers/pwr_u0.json new file mode 100644 index 0000000..505cc2e --- /dev/null +++ b/data/registers/pwr_u0.json @@ -0,0 +1,1488 @@ +{ + "block/PWR": { + "description": "PWR register block", + "items": [ + { + "name": "CR1", + "description": "Power control register 1", + "byte_offset": 0, + "fieldset": "CR1" + }, + { + "name": "CR2", + "description": "Power control register 2", + "byte_offset": 4, + "fieldset": "CR2" + }, + { + "name": "CR3", + "description": "Power control register 3", + "byte_offset": 8, + "fieldset": "CR3" + }, + { + "name": "CR4", + "description": "Power control register 4", + "byte_offset": 12, + "fieldset": "CR4" + }, + { + "name": "SR1", + "description": "Power status register 1", + "byte_offset": 16, + "fieldset": "SR1" + }, + { + "name": "SR2", + "description": "Power status register 2", + "byte_offset": 20, + "fieldset": "SR2" + }, + { + "name": "SCR", + "description": "Power status clear register", + "byte_offset": 24, + "fieldset": "SCR" + }, + { + "name": "PUCRA", + "description": "Power Port A pull-up control register", + "byte_offset": 32, + "fieldset": "PUCRA" + }, + { + "name": "PDCRA", + "description": "Power Port A pull-down control register", + "byte_offset": 36, + "fieldset": "PDCRA" + }, + { + "name": "PUCRB", + "description": "Power Port B pull-up control register", + "byte_offset": 40, + "fieldset": "PUCRB" + }, + { + "name": "PDCRB", + "description": "Power Port B pull-down control register", + "byte_offset": 44, + "fieldset": "PDCRB" + }, + { + "name": "PUCRC", + "description": "Power Port C pull-up control register", + "byte_offset": 48, + "fieldset": "PUCRC" + }, + { + "name": "PDCRC", + "description": "Power Port C pull-down control register", + "byte_offset": 52, + "fieldset": "PDCRC" + }, + { + "name": "PUCRD", + "description": "Power Port D pull-up control register", + "byte_offset": 56, + "fieldset": "PUCRD" + }, + { + "name": "PDCRD", + "description": "Power Port D pull-down control register", + "byte_offset": 60, + "fieldset": "PDCRD" + }, + { + "name": "PUCRE", + "description": "Power Port E pull-up control register", + "byte_offset": 64, + "fieldset": "PUCRE" + }, + { + "name": "PDCRE", + "description": "Power Port E pull-down control register", + "byte_offset": 68, + "fieldset": "PDCRE" + }, + { + "name": "PUCRF", + "description": "Power Port F pull-up control register", + "byte_offset": 72, + "fieldset": "PUCRF" + }, + { + "name": "PDCRF", + "description": "Power Port F pull-down control register", + "byte_offset": 76, + "fieldset": "PDCRF" + } + ] + }, + "fieldset/CR1": { + "description": "Power control register 1", + "fields": [ + { + "name": "LPMS", + "description": "Low-power mode selection These bits select the low-power mode entered when CPU enters the deepsleep mode. 1xx: Shutdown mode Note: If LPR bit is set, Stop 2 mode cannot be selected and Stop 1 mode shall be entered instead of Stop 2. Note: In Standby mode, SRAM2 can be preserved or not, depending on RRS bit configuration in PWR_CR3.", + "bit_offset": 0, + "bit_size": 3, + "enum": "LPMS" + }, + { + "name": "FPD_STOP", + "description": "Flash memory powered down during Stop mode. This bit determines whether the flash memory is put in power-down mode or remains in idle mode when the device enters Stop mode.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "FPD_LPRUN", + "description": "Flash memory powered down during Low-power run mode. This bit determines whether the flash memory is put in power-down mode or remains in idle mode when the device enters Low-power sleep mode.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "FPD_LPSLP", + "description": "Flash memory powered down during Low-power sleep mode. This bit determines whether the flash memory is put in power-down mode or remains in idle mode when the device enters Low-power sleep mode.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "DBP", + "description": "Disable backup domain write protection In reset state, the RTC and backup registers are protected against parasitic write access. This bit must be set to enable write access to these registers.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "VOS", + "description": "Voltage scaling range selection", + "bit_offset": 9, + "bit_size": 2, + "enum": "VOS" + }, + { + "name": "LPR", + "description": "Low-power run When this bit is set, the regulator is switched from main mode (MR) to low-power mode (LPR). Note: Stop 2 mode cannot be entered when LPR bit is set. Stop 1 is entered instead.", + "bit_offset": 14, + "bit_size": 1 + } + ] + }, + "fieldset/CR2": { + "description": "Power control register 2", + "fields": [ + { + "name": "PVDE", + "description": "Programmable voltage detector enable Note: This bit is write-protected when the bit PVDL (PVD Lock) is set in the SYSCFG_CBR register. Note: This bit is reset only by a system reset.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PLS", + "description": "Programmable voltage detector level selection. These bits select the voltage threshold detected by the programmable voltage detector: Note: These bits are write-protected when the bit PVDL (PVD Lock) is set in the SYSCFG_CBR register. Note: These bits are reset only by a system reset.", + "bit_offset": 1, + "bit_size": 3, + "enum": "PLS" + }, + { + "name": "PVME1", + "description": "Peripheral voltage monitoring 1 enable: V<sub>DDUSB</sub> vs. 1.21V", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PVME3", + "description": "Peripheral voltage monitoring 3 enable: V<sub>DDA</sub> vs. 1.621V", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PVME4", + "description": "Peripheral voltage monitoring 4 enable: V<sub>DDA</sub> vs. 1.861V", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "USV", + "description": "V<sub>DDUSB</sub> USB supply valid This bit is used to validate the V<sub>DDUSB</sub> supply for electrical and logical isolation purpose. Setting this bit is mandatory to use the USB FS peripheral. If V<sub>DDUSB</sub> is not always present in the application, the PVM can be used to determine whether this supply is ready or not.", + "bit_offset": 10, + "bit_size": 1 + } + ] + }, + "fieldset/CR3": { + "description": "Power control register 3", + "fields": [ + { + "name": "EWUP1", + "description": "Enable Wake-up pin WKUP1 When this bit is set, the external wake-up pin WKUP1 is enabled and triggers a wake-up from Standby or Shutdown event when a rising or a falling edge occurs. The active edge is configured via the WP1 bit in the PWR_CR4 register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "EWUP2", + "description": "Enable Wake-up pin WKUP2 When this bit is set, the external wake-up pin WKUP2 is enabled and triggers a wake-up from Standby or Shutdown event when a rising or a falling edge occurs. The active edge is configured via the WP2 bit in the PWR_CR4 register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "EWUP3", + "description": "Enable Wake-up pin WKUP3 When this bit is set, the external wake-up pin WKUP3 is enabled and triggers a wake-up from Standby or Shutdown event when a rising or a falling edge occurs. The active edge is configured via the WP3 bit in the PWR_CR4 register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "EWUP4", + "description": "Enable Wake-up pin WKUP4 When this bit is set, the external wake-up pin WKUP4 is enabled and triggers a wake-up from Standby or Shutdown event when a rising or a falling edge occurs. The active edge is configured via the WP4 bit in the PWR_CR4 register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "EWUP5", + "description": "Enable Wake-up pin WKUP5 When this bit is set, the external wake-up pin WKUP5 is enabled and triggers a wake-up from Standby or Shutdown event when a rising or a falling edge occurs.The active edge is configured via the WP5 bit in the PWR_CR4 register.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "EWUP7", + "description": "Enable Wake-up pin WKUP7. When this bit is set, the external wake-up pin WKUP7 is enabled and triggers a wake-up from Standby or Shutdown event when a rising or a falling edge occurs.The active edge is configured via the WP7 bit in the PWR_CR4 register.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "RRS", + "description": "SRAM2 retention in Standby mode", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "ENULP", + "description": "Enable ULP sampling When this bit is set, the BORL, BORH and PVD are periodically sampled instead continuous monitoring to reduce power consumption. Fast supply drop between two sample/compare phases is not detected in this mode. This bit has impact only on STOP2, Standby and shutdown low power modes.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "APC", + "description": "Apply pull-up and pull-down configuration When this bit is set, the I/O pull-up and pull-down configurations defined in the PWR_PUCRx and PWR_PDCRx registers are applied. When this bit is cleared, the PWR_PUCRx and PWR_PDCRx registers are not applied to the I/Os, instead the I/Os are in floating mode during Standby or configured according GPIO controller GPIOx_PUPDR register during RUN mode.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "EIWUL", + "description": "Enable internal wake-up line", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "fieldset/CR4": { + "description": "Power control register 4", + "fields": [ + { + "name": "WP1", + "description": "Wake-up pin WKUP1 polarity This bit defines the polarity used for an event detection on external wake-up pin, WKUP1", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "WP2", + "description": "Wake-up pin WKUP2 polarity This bit defines the polarity used for an event detection on external wake-up pin, WKUP2", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "WP3", + "description": "Wake-up pin WKUP3 polarity This bit defines the polarity used for an event detection on external wake-up pin, WKUP3", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "WP4", + "description": "Wake-up pin WKUP4 polarity This bit defines the polarity used for an event detection on external wake-up pin, WKUP4", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "WP5", + "description": "Wake-up pin WKUP5 polarity This bit defines the polarity used for an event detection on external wake-up pin, WKUP5", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "WP7", + "description": "Wake-up pin WKUP7 polarity This bit defines the polarity used for an event detection on external wake-up pin, WKUP7", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "VBE", + "description": "V<sub>BAT</sub> battery charging enable", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "VBRS", + "description": "V<sub>BAT</sub> battery charging resistor selection", + "bit_offset": 9, + "bit_size": 1 + } + ] + }, + "fieldset/PDCRA": { + "description": "Power Port A pull-down control register", + "fields": [ + { + "name": "PD0", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PD1", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PD2", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PD3", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PD4", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PD5", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PD6", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PD7", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "PD8", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PD9", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "PD10", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PD11", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PD12", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PD13", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "PD14", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "PD15", + "description": "Port A pull-down bit y When set, this bit activates the pull-down on PA[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "fieldset/PDCRB": { + "description": "Power Port B pull-down control register", + "fields": [ + { + "name": "PD0", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PD1", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PD2", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PD3", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PD4", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PD5", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PD6", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PD7", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "PD8", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PD9", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "PD10", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PD11", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PD12", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PD13", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "PD14", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "PD15", + "description": "Port B pull-down bit y When set, this bit activates the pull-down on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "fieldset/PDCRC": { + "description": "Power Port C pull-down control register", + "fields": [ + { + "name": "PD0", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PD1", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PD2", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PD3", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PD4", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PD5", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PD6", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PD7", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "PD8", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PD9", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "PD10", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PD11", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PD12", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PD13", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "PD14", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "PD15", + "description": "Port C pull-down bit y When set, this bit activates the pull-down on PC[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "fieldset/PDCRD": { + "description": "Power Port D pull-down control register", + "fields": [ + { + "name": "PD0", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PD1", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PD2", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PD3", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PD4", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PD5", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PD6", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PD8", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PD9", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "PD10", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PD11", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PD12", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PD13", + "description": "Port D pull-down bit y When set, this bit activates the pull-down on PD[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 13, + "bit_size": 1 + } + ] + }, + "fieldset/PDCRE": { + "description": "Power Port E pull-down control register", + "fields": [ + { + "name": "PD3", + "description": "Port E pull-down bit 3 When set, this bit activates the pull-down on PE[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PD7", + "description": "Port E pull-down bit y When set, this bit activates the pull-down on PE[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "PD8", + "description": "Port E pull-down bit y When set, this bit activates the pull-down on PE[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PD9", + "description": "Port E pull-down bit y When set, this bit activates the pull-down on PE[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 9, + "bit_size": 1 + } + ] + }, + "fieldset/PDCRF": { + "description": "Power Port F pull-down control register", + "fields": [ + { + "name": "PD0", + "description": "Port F pull-down bit y When set, this bit activates the pull-down on PH[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PD1", + "description": "Port F pull-down bit y When set, this bit activates the pull-down on PH[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PD2", + "description": "Port F pull-down bit y When set, this bit activates the pull-down on PH[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PD3", + "description": "Port F pull-down bit y When set, this bit activates the pull-down on PH[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 3, + "bit_size": 1 + } + ] + }, + "fieldset/PUCRA": { + "description": "Power Port A pull-up control register", + "fields": [ + { + "name": "PU0", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PU1", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PU2", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PU3", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PU4", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PU5", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PU6", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PU7", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "PU8", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PU9", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "PU10", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PU11", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PU12", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PU13", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "PU14", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "PU15", + "description": "Port A pull-up bit y (y1=115 to 0) When set, this bit activates the pull-up on PA[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "fieldset/PUCRB": { + "description": "Power Port B pull-up control register", + "fields": [ + { + "name": "PU0", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PU1", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PU2", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PU3", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PU4", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PU5", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PU6", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PU7", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "PU8", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PU9", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "PU10", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PU11", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PU12", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PU13", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "PU14", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "PU15", + "description": "Port B pull-up bit y When set, this bit activates the pull-up on PB[y] when APC bit is set in PWR_CR3 register.", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "fieldset/PUCRC": { + "description": "Power Port C pull-up control register", + "fields": [ + { + "name": "PU0", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PU1", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PU2", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PU3", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PU4", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PU5", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PU6", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PU7", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "PU8", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PU9", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "PU10", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PU11", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PU12", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PU13", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "PU14", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "PU15", + "description": "Port C pull-up bit y When set, this bit activates the pull-up on PC[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "fieldset/PUCRD": { + "description": "Power Port D pull-up control register", + "fields": [ + { + "name": "PU0", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PU1", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PU2", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PU3", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PU4", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PU5", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "PU6", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "PU8", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PU9", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "PU10", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PU11", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PU12", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PU13", + "description": "Port D pull-up bit y When set, this bit activates the pull-up on PD[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 13, + "bit_size": 1 + } + ] + }, + "fieldset/PUCRE": { + "description": "Power Port E pull-up control register", + "fields": [ + { + "name": "PU3", + "description": "Port E pull-up bit 3 When set, this bit activates the pull-up on PE[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PU7", + "description": "Port E pull-up bit y When set, this bit activates the pull-up on PE[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "PU8", + "description": "Port E pull-up bit y When set, this bit activates the pull-up on PE[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "PU9", + "description": "Port E pull-up bit y When set, this bit activates the pull-up on PE[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 9, + "bit_size": 1 + } + ] + }, + "fieldset/PUCRF": { + "description": "Power Port F pull-up control register", + "fields": [ + { + "name": "PU0", + "description": "Port F pull-up bit y When set, this bit activates the pull-up on PH[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PU1", + "description": "Port F pull-up bit y When set, this bit activates the pull-up on PH[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PU2", + "description": "Port F pull-up bit y When set, this bit activates the pull-up on PH[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PU3", + "description": "Port F pull-up bit y When set, this bit activates the pull-up on PH[y] when APC bit is set in PWR_CR3 register. If the corresponding PDy bit is also set, the pull-up is not activated and the pull-down is activated instead with highest priority.", + "bit_offset": 3, + "bit_size": 1 + } + ] + }, + "fieldset/SCR": { + "description": "Power status clear register", + "fields": [ + { + "name": "CWUF1", + "description": "Clear wake-up flag 1 Setting this bit clears the WUF1 flag in the PWR_SR1 register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "CWUF2", + "description": "Clear wake-up flag 2 Setting this bit clears the WUF2 flag in the PWR_SR1 register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "CWUF3", + "description": "Clear wake-up flag 3 Setting this bit clears the WUF3 flag in the PWR_SR1 register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "CWUF4", + "description": "Clear wake-up flag 4 Setting this bit clears the WUF4 flag in the PWR_SR1 register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "CWUF5", + "description": "Clear wake-up flag 5 Setting this bit clears the WUF5 flag in the PWR_SR1 register.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "CWUF7", + "description": "Clear wake-up flag 7 Setting this bit clears the WUF7 flag in the PWR_SR1 register.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "CSBF", + "description": "Clear standby flag Setting this bit clears the SBF flag in the PWR_SR1 register.", + "bit_offset": 8, + "bit_size": 1 + } + ] + }, + "fieldset/SR1": { + "description": "Power status register 1", + "fields": [ + { + "name": "WUF1", + "description": "Wake-up flag 1 This bit is set when a wake-up event is detected on wake-up pin, WKUP1. It is cleared by writing 1 in the CWUF1 bit of the PWR_SCR register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "WUF2", + "description": "Wake-up flag 2 This bit is set when a wake-up event is detected on wake-up pin, WKUP2. It is cleared by writing 1 in the CWUF2 bit of the PWR_SCR register.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "WUF3", + "description": "Wake-up flag 3 This bit is set when a wake-up event is detected on wake-up pin, WKUP3. It is cleared by writing 1 in the CWUF3 bit of the PWR_SCR register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "WUF4", + "description": "Wake-up flag 4 This bit is set when a wake-up event is detected on wake-up pin,WKUP4. It is cleared by writing 1 in the CWUF4 bit of the PWR_SCR register.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "WUF5", + "description": "Wake-up flag 5 This bit is set when a wake-up event is detected on wake-up pin, WKUP5. It is cleared by writing 1 in the CWUF5 bit of the PWR_SCR register.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "WUF7", + "description": "Wake-up flag 7 This bit is set when a wake-up event is detected on wake-up pin, WKUP7. It is cleared by writing 1 in the CWUF7 bit of the PWR_SCR register.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "SBF", + "description": "Standby flag This bit is set by hardware when the device enters the Standby mode and is cleared by setting the CSBF bit in the PWR_SCR register, or by a power-on reset. It is not cleared by the system reset.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "STOPF", + "description": "Stop Flags These bits are set by hardware when the device enters any stop mode and are cleared by setting the CSBF bit in the PWR_SCR register, or by a power-on reset. It is not cleared by the system reset.", + "bit_offset": 9, + "bit_size": 3, + "enum": "STOPF" + }, + { + "name": "WUFI", + "description": "Wake-up flag internal This bit is set when a wake-up is detected on the internal wake-up line. It is cleared when all internal wake-up sources are cleared.", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "fieldset/SR2": { + "description": "Power status register 2", + "fields": [ + { + "name": "FLASH_RDY", + "description": "Flash ready flag This bit is set by hardware to indicate when the flash memory is readey to be accessed after wake-up from power-down. To place the flash memory in power-down, set either FPD_LPRUN, FPD_LPSLP or FPD_STP bits. Note : If the system boots from SRAM, the user application must wait until the FLASH_RDY bit is set, prior to jumping to flash memory.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "REGLPS", + "description": "Low-power regulator started This bit provides the information whether the low-power regulator is ready after a power-on reset or a Standby/Shutdown. If the Standby mode is entered while REGLPS bit is still cleared, the wake-up from Standby mode time may be increased.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "REGLPF", + "description": "Low-power regulator flag This bit is set by hardware when the MCU is in Low-power run mode. When the MCU exits from the Low-power run mode, this bit remains at 1 until the regulator is ready in main mode. A polling on this bit must be done before increasing the product frequency. This bit is cleared by hardware when the regulator is ready.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "VOSF", + "description": "Voltage scaling flag A delay is required for the internal regulator to be ready after the voltage scaling has been changed. VOSF indicates that the regulator reached the voltage level defined with VOS bits of the PWR_CR1 register.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "PVDO", + "description": "Programmable voltage detector output", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "PVMO1", + "description": "Peripheral voltage monitoring output: V<sub>DDUSB</sub> vs. 1.2 V Note: PVMO1 is cleared when PVM1 is disabled (PVME1 = 0). After enabling PVM1, the PVM1 output is valid after the PVM1 wake-up time.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "PVMO3", + "description": "Peripheral voltage monitoring output: V<sub>DDA</sub> vs. 1.621V Note: PVMO3 is cleared when PVM3 is disabled (PVME3 = 0). After enabling PVM3, the PVM3 output is valid after the PVM3 wake-up time.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "PVMO4", + "description": "Peripheral voltage monitoring output: V<sub>DDA</sub> vs. 2.21V Note: PVMO4 is cleared when PVM4 is disabled (PVME4 = 0). After enabling PVM4, the PVM4 output is valid after the PVM4 wake-up time.", + "bit_offset": 15, + "bit_size": 1 + } + ] + }, + "enum/LPMS": { + "bit_size": 3, + "variants": [ + { + "name": "Stop0", + "description": "Stop 0 mode", + "value": 0 + }, + { + "name": "Stop1", + "description": "Stop 1 mode", + "value": 1 + }, + { + "name": "Stop2", + "description": "Stop 2 mode", + "value": 2 + }, + { + "name": "Standby", + "description": "Standby mode", + "value": 3 + } + ] + }, + "enum/PLS": { + "bit_size": 3, + "variants": [ + { + "name": "B_0x0", + "description": "V<sub>PVD0</sub> around 2.01V", + "value": 0 + }, + { + "name": "B_0x1", + "description": "V<sub>PVD1</sub> around 2.21V", + "value": 1 + }, + { + "name": "B_0x2", + "description": "V<sub>PVD2</sub> around 2.41V", + "value": 2 + }, + { + "name": "B_0x3", + "description": "V<sub>PVD3</sub> around 2.51V", + "value": 3 + }, + { + "name": "B_0x4", + "description": "V<sub>PVD4</sub> around 2.61V", + "value": 4 + }, + { + "name": "B_0x5", + "description": "V<sub>PVD5</sub> around 2.81V", + "value": 5 + }, + { + "name": "B_0x6", + "description": "V<sub>PVD6</sub> around 2.91V", + "value": 6 + }, + { + "name": "B_0x7", + "description": "External input analog voltage PVD_IN (compared internally to VREFINT)", + "value": 7 + } + ] + }, + "enum/STOPF": { + "bit_size": 3, + "variants": [ + { + "name": "None", + "description": "The device did not enter any Stop mode.", + "value": 0 + }, + { + "name": "Stop0", + "description": "The device entered in Stop 0 mode.", + "value": 4 + }, + { + "name": "Stop1", + "description": "The device entered in Stop 1 mode.", + "value": 5 + }, + { + "name": "Stop2", + "description": "The device entered in Stop 2 mode.", + "value": 6 + } + ] + }, + "enum/VOS": { + "bit_size": 2, + "variants": [ + { + "name": "Range1", + "description": "Range 1", + "value": 1 + }, + { + "name": "Range2", + "description": "Range 2", + "value": 2 + } + ] + } +} \ No newline at end of file diff --git a/data/registers/rcc_u0.json b/data/registers/rcc_u0.json new file mode 100644 index 0000000..699451a --- /dev/null +++ b/data/registers/rcc_u0.json @@ -0,0 +1,3167 @@ +{ + "block/RCC": { + "description": "RCC address block description.", + "items": [ + { + "name": "CR", + "description": "Clock control register.", + "byte_offset": 0, + "fieldset": "CR" + }, + { + "name": "ICSCR", + "description": "Internal clock sources calibration register.", + "byte_offset": 4, + "fieldset": "ICSCR" + }, + { + "name": "CFGR", + "description": "Clock configuration register.", + "byte_offset": 8, + "fieldset": "CFGR" + }, + { + "name": "PLLCFGR", + "description": "PLL configuration register.", + "byte_offset": 12, + "fieldset": "PLLCFGR" + }, + { + "name": "CIER", + "description": "Clock interrupt enable register.", + "byte_offset": 24, + "fieldset": "CIER" + }, + { + "name": "CIFR", + "description": "Clock interrupt flag register.", + "byte_offset": 28, + "fieldset": "CIFR" + }, + { + "name": "CICR", + "description": "Clock interrupt clear register.", + "byte_offset": 32, + "fieldset": "CICR" + }, + { + "name": "AHBRSTR", + "description": "AHB peripheral reset register.", + "byte_offset": 40, + "fieldset": "AHBRSTR" + }, + { + "name": "GPIORSTR", + "description": "I/O port reset register.", + "byte_offset": 44, + "fieldset": "GPIORSTR" + }, + { + "name": "APBRSTR1", + "description": "APB peripheral reset register 1.", + "byte_offset": 56, + "fieldset": "APBRSTR1" + }, + { + "name": "APBRSTR2", + "description": "APB peripheral reset register 2.", + "byte_offset": 64, + "fieldset": "APBRSTR2" + }, + { + "name": "AHBENR", + "description": "AHB peripheral clock enable register.", + "byte_offset": 72, + "fieldset": "AHBENR" + }, + { + "name": "GPIOENR", + "description": "I/O port clock enable register.", + "byte_offset": 76, + "fieldset": "GPIOENR" + }, + { + "name": "DBGCFGR", + "description": "Debug configuration register.", + "byte_offset": 80, + "fieldset": "DBGCFGR" + }, + { + "name": "APBENR1", + "description": "APB peripheral clock enable register 1.", + "byte_offset": 88, + "fieldset": "APBENR1" + }, + { + "name": "APBENR2", + "description": "APB peripheral clock enable register 2.", + "byte_offset": 96, + "fieldset": "APBENR2" + }, + { + "name": "AHBSMENR", + "description": "AHB peripheral clock enable in Sleep/Stop mode register.", + "byte_offset": 104, + "fieldset": "AHBSMENR" + }, + { + "name": "GPIOSMENR", + "description": "I/O port in Sleep mode clock enable register.", + "byte_offset": 108, + "fieldset": "GPIOSMENR" + }, + { + "name": "APBSMENR1", + "description": "APB peripheral clock enable in Sleep/Stop mode register 1.", + "byte_offset": 120, + "fieldset": "APBSMENR1" + }, + { + "name": "APBSMENR2", + "description": "APB peripheral clock enable in Sleep/Stop mode register 2.", + "byte_offset": 128, + "fieldset": "APBSMENR2" + }, + { + "name": "CCIPR", + "description": "Peripherals independent clock configuration register.", + "byte_offset": 136, + "fieldset": "CCIPR" + }, + { + "name": "BDCR", + "description": "RTC domain control register.", + "byte_offset": 144, + "fieldset": "BDCR" + }, + { + "name": "CSR", + "description": "Control/status register.", + "byte_offset": 148, + "fieldset": "CSR" + }, + { + "name": "CRRCR", + "description": "RCC clock recovery RC register.", + "byte_offset": 152, + "fieldset": "CRRCR" + } + ] + }, + "fieldset/AHBENR": { + "description": "AHB peripheral clock enable register.", + "fields": [ + { + "name": "DMA1EN", + "description": "DMA1 and DMAMUX clock enable Set and cleared by software. DMAMUX is enabled as long as at least one DMA peripheral is enabled.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "DMA2EN", + "description": "DMA2 and DMAMUX clock enable Set and cleared by software. DMAMUX is enabled as long as at least one DMA peripheral is enabled.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "FLASHEN", + "description": "Flash memory interface clock enable Set and cleared by software. This bit can only be cleared when the flash memory is in power down mode.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "CRCEN", + "description": "CRC clock enable Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "AESEN", + "description": "AES hardware accelerator Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "RNGEN", + "description": "Random number generator clock enable Set and cleared by software.", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "TSCEN", + "description": "Touch sensing controller clock enable Set and cleared by software.", + "bit_offset": 24, + "bit_size": 1 + } + ] + }, + "fieldset/AHBRSTR": { + "description": "AHB peripheral reset register.", + "fields": [ + { + "name": "DMA1RST", + "description": "DMA1 and DMAMUX reset Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "DMA2RST", + "description": "DMA2 and DMAMUX reset Set and cleared by software.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "FLASHRST", + "description": "Flash memory interface reset Set and cleared by software. This bit can only be set when the flash memory is in power down mode.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "CRCRST", + "description": "CRC reset Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "AESRST", + "description": "AES hardware accelerator reset Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "RNGRST", + "description": "Random number generator reset Set and cleared by software.", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "TSCRST", + "description": "Touch sensing controller reset Set and cleared by software.", + "bit_offset": 24, + "bit_size": 1 + } + ] + }, + "fieldset/AHBSMENR": { + "description": "AHB peripheral clock enable in Sleep/Stop mode register.", + "fields": [ + { + "name": "DMA1SMEN", + "description": "DMA1 and DMAMUX clock enable during Sleep mode Set and cleared by software. Clock to DMAMUX during Sleep mode is enabled as long as the clock in Sleep mode is enabled to at least one DMA peripheral.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "DMA2SMEN", + "description": "DMA2 and DMAMUX clock enable during Sleep mode Set and cleared by software. Clock to DMAMUX during Sleep mode is enabled as long as the clock in Sleep mode is enabled to at least one DMA peripheral.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "FLASHSMEN", + "description": "Flash memory interface clock enable during Sleep mode Set and cleared by software. This bit can be activated only when the flash memory is in power down mode.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "SRAMSMEN", + "description": "SRAM clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "CRCSMEN", + "description": "CRC clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "AESSMEN", + "description": "AES hardware accelerator clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "RNGSMEN", + "description": "RNG clock enable during Sleep and Stop mode Set and cleared by software.", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "TSCSMEN", + "description": "TSC clock enable during Sleep and Stop mode Set and cleared by software.", + "bit_offset": 24, + "bit_size": 1 + } + ] + }, + "fieldset/APBENR1": { + "description": "APB peripheral clock enable register 1.", + "fields": [ + { + "name": "TIM2EN", + "description": "TIM2 timer clock enable Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TIM3EN", + "description": "TIM3 timer clock enable Set and cleared by software.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "TIM6EN", + "description": "TIM6 timer clock enable Set and cleared by software.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "TIM7EN", + "description": "TIM7 timer clock enable Set and cleared by software.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "LPUART2EN", + "description": "LPUART2 clock enable Set and cleared by software.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "LCDEN", + "description": "LCD clock enable<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "RTCAPBEN", + "description": "RTC APB clock enable Set and cleared by software.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "WWDGEN", + "description": "WWDG clock enable Set by software to enable the window watchdog clock. Cleared by hardware system reset This bit can also be set by hardware if the WWDG_SW option bit is 0.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "LPUART3EN", + "description": "LPUART3 clock enable Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "USBEN", + "description": "USB clock enable<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "SPI2EN", + "description": "SPI2 clock enable Set and cleared by software.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "SPI3EN", + "description": "SPI3 clock enable<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 15, + "bit_size": 1 + }, + { + "name": "CRSEN", + "description": "CRS clock enable<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "USART2EN", + "description": "USART2 clock enable Set and cleared by software.", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "USART3EN", + "description": "USART3 clock enable Set and cleared by software.", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "USART4EN", + "description": "USART4 clock enable Set and cleared by software.", + "bit_offset": 19, + "bit_size": 1 + }, + { + "name": "LPUART1EN", + "description": "LPUART1 clock enable Set and cleared by software.", + "bit_offset": 20, + "bit_size": 1 + }, + { + "name": "I2C1EN", + "description": "I2C1 clock enable Set and cleared by software.", + "bit_offset": 21, + "bit_size": 1 + }, + { + "name": "I2C2EN", + "description": "I2C2 clock enable Set and cleared by software.", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "I2C3EN", + "description": "I2C3 clock enable Set and cleared by software.", + "bit_offset": 23, + "bit_size": 1 + }, + { + "name": "OPAMPEN", + "description": "OPAMP clock enable Set and cleared by software.", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "I2C4EN", + "description": "I2C4EN clock enable<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 25, + "bit_size": 1 + }, + { + "name": "LPTIM3EN", + "description": "LPTIM3 clock enable Set and cleared by software.", + "bit_offset": 26, + "bit_size": 1 + }, + { + "name": "PWREN", + "description": "Power interface clock enable Set and cleared by software.", + "bit_offset": 28, + "bit_size": 1 + }, + { + "name": "DAC1EN", + "description": "DAC1 interface clock enable Set and cleared by software.", + "bit_offset": 29, + "bit_size": 1 + }, + { + "name": "LPTIM2EN", + "description": "LPTIM2 clock enable Set and cleared by software.", + "bit_offset": 30, + "bit_size": 1 + }, + { + "name": "LPTIM1EN", + "description": "LPTIM1 clock enable Set and cleared by software.", + "bit_offset": 31, + "bit_size": 1 + } + ] + }, + "fieldset/APBENR2": { + "description": "APB peripheral clock enable register 2.", + "fields": [ + { + "name": "SYSCFGEN", + "description": "SYSCFG, COMP and VREFBUF clock enable Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TIM1EN", + "description": "TIM1 timer clock enable Set and cleared by software.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "SPI1EN", + "description": "SPI1 clock enable Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "USART1EN", + "description": "USART1 clock enable Set and cleared by software.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "TIM15EN", + "description": "TIM15 timer clock enable Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "TIM16EN", + "description": "TIM16 timer clock enable Set and cleared by software.", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "ADCEN", + "description": "ADC clock enable Set and cleared by software.", + "bit_offset": 20, + "bit_size": 1 + } + ] + }, + "fieldset/APBRSTR1": { + "description": "APB peripheral reset register 1.", + "fields": [ + { + "name": "TIM2RST", + "description": "TIM2 timer reset Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TIM3RST", + "description": "TIM3 timer reset Set and cleared by software.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "TIM6RST", + "description": "TIM6 timer reset Set and cleared by software.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "TIM7RST", + "description": "TIM7 timer reset Set and cleared by software.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "LPUART2RST", + "description": "LPUART2 reset Set and cleared by software.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "LCDRST", + "description": "LCD reset<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "LPUART3RST", + "description": "LPUART3 reset<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "USBRST", + "description": "USB reset<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "SPI2RST", + "description": "SPI2 reset Set and cleared by software.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "SPI3RST", + "description": "SPI3 reset<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 15, + "bit_size": 1 + }, + { + "name": "CRSRST", + "description": "CRS reset<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "USART2RST", + "description": "USART2 reset Set and cleared by software.", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "USART3RST", + "description": "USART3 reset Set and cleared by software.", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "USART4RST", + "description": "USART4 reset Set and cleared by software.", + "bit_offset": 19, + "bit_size": 1 + }, + { + "name": "LPUART1RST", + "description": "LPUART1 reset Set and cleared by software.", + "bit_offset": 20, + "bit_size": 1 + }, + { + "name": "I2C1RST", + "description": "I2C1 reset Set and cleared by software.", + "bit_offset": 21, + "bit_size": 1 + }, + { + "name": "I2C2RST", + "description": "I2C2 reset Set and cleared by software.", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "I2C3RST", + "description": "I2C3 reset Set and cleared by software.", + "bit_offset": 23, + "bit_size": 1 + }, + { + "name": "OPAMPRST", + "description": "OPAMP reset Set and cleared by software.", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "I2C4RST", + "description": "I2C4 reset<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 25, + "bit_size": 1 + }, + { + "name": "LPTIM3RST", + "description": "LPTIM3 reset Set and cleared by software.", + "bit_offset": 26, + "bit_size": 1 + }, + { + "name": "PWRRST", + "description": "Power interface reset Set and cleared by software.", + "bit_offset": 28, + "bit_size": 1 + }, + { + "name": "DAC1RST", + "description": "DAC1 interface reset Set and cleared by software.", + "bit_offset": 29, + "bit_size": 1 + }, + { + "name": "LPTIM2RST", + "description": "Low Power Timer 2 reset Set and cleared by software.", + "bit_offset": 30, + "bit_size": 1 + }, + { + "name": "LPTIM1RST", + "description": "Low Power Timer 1 reset Set and cleared by software.", + "bit_offset": 31, + "bit_size": 1 + } + ] + }, + "fieldset/APBRSTR2": { + "description": "APB peripheral reset register 2.", + "fields": [ + { + "name": "SYSCFGRST", + "description": "SYSCFG, COMP and VREFBUF reset Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TIM1RST", + "description": "TIM1 timer reset Set and cleared by software.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "SPI1RST", + "description": "SPI1 reset Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "USART1RST", + "description": "USART1 reset Set and cleared by software.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "TIM15RST", + "description": "TIM15 timer reset Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "TIM16RST", + "description": "TIM16 timer reset Set and cleared by software.", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "ADCRST", + "description": "ADC reset Set and cleared by software.", + "bit_offset": 20, + "bit_size": 1 + } + ] + }, + "fieldset/APBSMENR1": { + "description": "APB peripheral clock enable in Sleep/Stop mode register 1.", + "fields": [ + { + "name": "TIM2SMEN", + "description": "TIM2 timer clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TIM3SMEN", + "description": "TIM3 timer clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "TIM6SMEN", + "description": "TIM6 timer clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "TIM7SMEN", + "description": "TIM7 timer clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "LPUART2SMEN", + "description": "LPUART2 clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "LCDSMEN", + "description": "LCD clock enable during Sleep mode<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "RTCAPBSMEN", + "description": "RTC APB clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "WWDGSMEN", + "description": "WWDG clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "LPUART3SMEN", + "description": "LPUART3 clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "USBSMEN", + "description": "USB clock enable during Sleep mode<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 13, + "bit_size": 1 + }, + { + "name": "SPI2SMEN", + "description": "SPI2 clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "SPI3SMEN", + "description": "SPI3 clock enable during Sleep mode<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 15, + "bit_size": 1 + }, + { + "name": "CRSSMEN", + "description": "CRS clock enable during Sleep and Stop modes<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "USART2SMEN", + "description": "USART2 clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "USART3SMEN", + "description": "USART3 clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "USART4SMEN", + "description": "USART4 clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 19, + "bit_size": 1 + }, + { + "name": "LPUART1SMEN", + "description": "LPUART1 clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 20, + "bit_size": 1 + }, + { + "name": "I2C1SMEN", + "description": "I2C1 clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 21, + "bit_size": 1 + }, + { + "name": "I2C2SMEN", + "description": "I2C2 clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "I2C3SMEN", + "description": "I2C3 clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 23, + "bit_size": 1 + }, + { + "name": "OPAMPSMEN", + "description": "OPAMP clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "I2C4SMEN", + "description": "I2C4 clock enable during Sleep mode<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 25, + "bit_size": 1 + }, + { + "name": "LPTIM3SMEN", + "description": "Low power timer 3 clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 26, + "bit_size": 1 + }, + { + "name": "PWRSMEN", + "description": "Power interface clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 28, + "bit_size": 1 + }, + { + "name": "DAC1SMEN", + "description": "DAC1 interface clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 29, + "bit_size": 1 + }, + { + "name": "LPTIM2SMEN", + "description": "Low Power Timer 2 clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 30, + "bit_size": 1 + }, + { + "name": "LPTIM1SMEN", + "description": "Low Power Timer 1 clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 31, + "bit_size": 1 + } + ] + }, + "fieldset/APBSMENR2": { + "description": "APB peripheral clock enable in Sleep/Stop mode register 2.", + "fields": [ + { + "name": "SYSCFGSMEN", + "description": "SYSCFG, COMP and VREFBUF clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TIM1SMEN", + "description": "TIM1 timer clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "SPI1SMEN", + "description": "SPI1 clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 12, + "bit_size": 1 + }, + { + "name": "USART1SMEN", + "description": "USART1 clock enable during Sleep and Stop modes Set and cleared by software.", + "bit_offset": 14, + "bit_size": 1 + }, + { + "name": "TIM15SMEN", + "description": "TIM15 timer clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "TIM16SMEN", + "description": "TIM16 timer clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "ADCSMEN", + "description": "ADC clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 20, + "bit_size": 1 + } + ] + }, + "fieldset/BDCR": { + "description": "RTC domain control register.", + "fields": [ + { + "name": "LSEON", + "description": "LSE oscillator enable Set and cleared by software to enable LSE oscillator:.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LSERDY", + "description": "LSE oscillator ready Set and cleared by hardware to indicate when the external 321kHz oscillator is ready (stable): After the LSEON bit is cleared, LSERDY goes low after 6 external low-speed oscillator clock cycles.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "LSEBYP", + "description": "LSE oscillator bypass Set and cleared by software to bypass the LSE oscillator (in debug mode). This bit can be written only when the external 321kHz oscillator is disabled (LSEON=0 and LSERDY=0).", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "LSEDRV", + "description": "LSE oscillator drive capability Set by software to select the LSE oscillator drive capability as follows: Applicable when the LSE oscillator is in Xtal mode, as opposed to bypass mode.", + "bit_offset": 3, + "bit_size": 2, + "enum": "LSEDRV" + }, + { + "name": "LSECSSON", + "description": "CSS on LSE enable Set by software to enable the clock security system on LSE (321kHz) oscillator as follows: LSECSSON must be enabled after the LSE oscillator is enabled (LSEON bit enabled) and ready (LSERDY flag set by hardware), and after the RTCSEL bit is selected. Once enabled, this bit cannot be disabled, except after a LSE failure detection (LSECSSD =1). In that case the software must disable the LSECSSON bit.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "LSECSSD", + "description": "CSS on LSE failure Detection Set by hardware to indicate when a failure is detected by the clock security system on the external 321kHz oscillator (LSE):.", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "LSESYSEN", + "description": "LSE clock enable for system usage This bit must be set by software to enable the LSE clock for a system usage.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "RTCSEL", + "description": "RTC clock source selection Set by software to select the clock source for the RTC as follows: Once the RTC clock source is selected, it cannot be changed anymore unless the RTC domain is reset, or unless a failure is detected on LSE (LSECSSD is set). The BDRST bit can be used to reset this bitfield to 00.", + "bit_offset": 8, + "bit_size": 2, + "enum": "RTCSEL" + }, + { + "name": "LSESYSRDY", + "description": "LSE clock ready for system usage This flag is set by hardware to indicate that the LSE clock is ready for being used by the system (see LSESYSEN bit). This flag is set when LSE clock is ready (LSEON1=11 and LSERDY1=11) and two LSE clock cycles after that LSESYSEN is set. Cleared by hardware to indicate that the LSE clock is not ready to be used by the system.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "RTCEN", + "description": "RTC clock enable Set and cleared by software. The bit enables clock to RTC and TAMP.", + "bit_offset": 15, + "bit_size": 1 + }, + { + "name": "BDRST", + "description": "RTC domain software reset Set and cleared by software to reset the RTC domain:.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "LSCOEN", + "description": "Low-speed clock output (LSCO) enable Set and cleared by software.", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "LSCOSEL", + "description": "Low-speed clock output selection Set and cleared by software to select the low-speed output clock:.", + "bit_offset": 25, + "bit_size": 1, + "enum": "LSCOSEL" + } + ] + }, + "fieldset/CCIPR": { + "description": "Peripherals independent clock configuration register.", + "fields": [ + { + "name": "USART1SEL", + "description": "USART1 clock source selection This bitfield is controlled by software to select USART1 clock source as follows:.", + "bit_offset": 0, + "bit_size": 2, + "enum": "USART1SEL" + }, + { + "name": "USART2SEL", + "description": "USART2 clock source selection This bitfield is controlled by software to select USART2 clock source as follows:.", + "bit_offset": 2, + "bit_size": 2, + "enum": "USART2SEL" + }, + { + "name": "LPUART3SEL", + "description": "LPUART3 clock source selection<sup>(1)</sup> This bitfield is controlled by software to select LPUART3 clock source as follows:.", + "bit_offset": 6, + "bit_size": 2, + "enum": "LPUART3SEL" + }, + { + "name": "LPUART2SEL", + "description": "LPUART2 clock source selection This bitfield is controlled by software to select LPUART2 clock source as follows:.", + "bit_offset": 8, + "bit_size": 2, + "enum": "LPUART2SEL" + }, + { + "name": "LPUART1SEL", + "description": "LPUART1 clock source selection This bitfield is controlled by software to select LPUART1 clock source as follows:.", + "bit_offset": 10, + "bit_size": 2, + "enum": "LPUART1SEL" + }, + { + "name": "I2C1SEL", + "description": "I2C1 clock source selection This bitfield is controlled by software to select I2C1 clock source as follows:.", + "bit_offset": 12, + "bit_size": 2, + "enum": "I2C1SEL" + }, + { + "name": "I2C3SEL", + "description": "I2C3 clock source selection This bitfield is controlled by software to select I2C3 clock source as follows:.", + "bit_offset": 16, + "bit_size": 2, + "enum": "I2C3SEL" + }, + { + "name": "LPTIM1SEL", + "description": "LPTIM1 clock source selection This bitfield is controlled by software to select LPTIM1 clock source as follows:.", + "bit_offset": 18, + "bit_size": 2, + "enum": "LPTIM1SEL" + }, + { + "name": "LPTIM2SEL", + "description": "LPTIM2 clock source selection This bitfield is controlled by software to select LPTIM2 clock source as follows:.", + "bit_offset": 20, + "bit_size": 2, + "enum": "LPTIM2SEL" + }, + { + "name": "LPTIM3SEL", + "description": "LPTIM3 clock source selection This bitfield is controlled by software to select LPTIM3 clock source as follows:.", + "bit_offset": 22, + "bit_size": 2, + "enum": "LPTIM3SEL" + }, + { + "name": "TIM1SEL", + "description": "TIM1 clock source selection This bit is set and cleared by software. It selects TIM1 clock source as follows:.", + "bit_offset": 24, + "bit_size": 1, + "enum": "TIM1SEL" + }, + { + "name": "TIM15SEL", + "description": "TIM15 clock source selection This bit is set and cleared by software. It selects TIM15 clock source as follows:.", + "bit_offset": 25, + "bit_size": 1, + "enum": "TIM15SEL" + }, + { + "name": "CLK48SEL", + "description": "481MHz clock source selection This bitfield is controlled by software to select the 481MHz clock source used by the USB FS and the RNG:.", + "bit_offset": 26, + "bit_size": 2, + "enum": "CLK48SEL" + }, + { + "name": "ADCSEL", + "description": "ADCs clock source selection This bitfield is controlled by software to select the clock source for ADC:.", + "bit_offset": 28, + "bit_size": 2, + "enum": "ADCSEL" + } + ] + }, + "fieldset/CFGR": { + "description": "Clock configuration register.", + "fields": [ + { + "name": "SW", + "description": "System clock switch This bitfield is controlled by software and hardware. The bitfield selects the clock for SYSCLK as follows: Others: Reserved The setting is forced by hardware to 000 (HSISYS selected) when the MCU exits Stop, Standby, or Shutdown mode, or when the setting is 001 (HSE selected) and HSE oscillator failure is detected.", + "bit_offset": 0, + "bit_size": 3, + "enum": "SW" + }, + { + "name": "SWS", + "description": "System clock switch status This bitfield is controlled by hardware to indicate the clock source used as system clock: Others: Reserved.", + "bit_offset": 3, + "bit_size": 3, + "enum": "SW" + }, + { + "name": "HPRE", + "description": "AHB prescaler This bitfield is controlled by software. To produce HCLK clock, it sets the division factor of SYSCLK clock as follows: 0xxx: 1 Caution: Depending on the device voltage range, the software has to set correctly these bits to ensure that the system frequency does not exceed the maximum allowed frequency (for more details, refer to Section14.1.4: Dynamic voltage scaling management). After a write operation to these bits and before decreasing the voltage range, this register must be read to be sure that the new value has been taken into account.", + "bit_offset": 8, + "bit_size": 4, + "enum": "HPRE" + }, + { + "name": "PPRE", + "description": "APB prescaler This bitfield is controlled by software. To produce PCLK clock, it sets the division factor of HCLK clock as follows: 0xx: 1.", + "bit_offset": 12, + "bit_size": 3, + "enum": "PPRE" + }, + { + "name": "STOPWUCK", + "description": "Wake-up from Stop and CSS backup clock selection Set and cleared by software to select the system clock used when exiting Stop mode. The selected clock is also used as emergency clock for the Clock Security System on HSE. Warning: STOPWUCK must not be modified when the Clock Security System is enabled by HSECSSON in RCC_CR register and the system clock is HSE (SWS=10) or a switch on HSE is requested (SW=10).", + "bit_offset": 15, + "bit_size": 1 + }, + { + "name": "MCO2SEL", + "description": "Microcontroller clock output 2 clock selector This bitfield is controlled by software. It sets the clock selector for MCO2 output as follows: Others: Reserved Note: This clock output may have some truncated cycles at startup or during MCO2 clock source switching.", + "bit_offset": 16, + "bit_size": 4, + "enum": "MCOSEL" + }, + { + "name": "MCO2PRE", + "description": "Microcontroller clock output 2 prescaler This bitfield is controlled by software. It sets the division factor of the clock sent to the MCO2 output as follows: ... Others: reserved It is highly recommended to set this field before the MCO2 output is enabled.", + "bit_offset": 20, + "bit_size": 4, + "enum": "MCOPRE" + }, + { + "name": "MCOSEL", + "description": "Microcontroller clock output clock selector This bitfield is controlled by software. It sets the clock selector for MCO output as follows: Others: Reserved Note: This clock output may have some truncated cycles at startup or during MCO clock source switching.", + "bit_offset": 24, + "bit_size": 4, + "enum": "MCOSEL" + }, + { + "name": "MCOPRE", + "description": "Microcontroller clock output prescaler This bitfield is controlled by software. It sets the division factor of the clock sent to the MCO output as follows: ... Others: reserved It is highly recommended to set this field before the MCO output is enabled.", + "bit_offset": 28, + "bit_size": 4, + "enum": "MCOPRE" + } + ] + }, + "fieldset/CICR": { + "description": "Clock interrupt clear register.", + "fields": [ + { + "name": "LSIRDYC", + "description": "LSI ready interrupt clear This bit is set by software to clear the LSIRDYF flag.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LSERDYC", + "description": "LSE ready interrupt clear This bit is set by software to clear the LSERDYF flag.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "MSIRDYC", + "description": "MSI ready interrupt clear This bit is set by software to clear the MSIRDYF flag.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "HSIRDYC", + "description": "HSI ready interrupt clear This bit is set software to clear the HSIRDYF flag.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "HSERDYC", + "description": "HSE ready interrupt clear This bit is set by software to clear the HSERDYF flag.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PLLRDYC", + "description": "PLL ready interrupt clear This bit is set by software to clear the PLLRDYF flag.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "CSSC", + "description": "Clock security system interrupt clear This bit is set by software to clear the HSECSSF flag.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "LSECSSC", + "description": "LSE Clock security system interrupt clear This bit is set by software to clear the LSECSSF flag.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "HSI48RDYC", + "description": "HSI48 oscillator ready interrupt clear This bit is set by software to clear the HSI48RDYF flag.", + "bit_offset": 10, + "bit_size": 1 + } + ] + }, + "fieldset/CIER": { + "description": "Clock interrupt enable register.", + "fields": [ + { + "name": "LSIRDYIE", + "description": "LSI ready interrupt enable Set and cleared by software to enable/disable interrupt caused by the LSI oscillator stabilization:.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LSERDYIE", + "description": "LSE ready interrupt enable Set and cleared by software to enable/disable interrupt caused by the LSE oscillator stabilization:.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "MSIRDYIE", + "description": "MSI ready interrupt enable Set and cleared by software to enable/disable interrupt caused by the MSI oscillator stabilization.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "HSIRDYIE", + "description": "HSI ready interrupt enable Set and cleared by software to enable/disable interrupt caused by the HSI oscillator stabilization:.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "HSERDYIE", + "description": "HSE ready interrupt enable Set and cleared by software to enable/disable interrupt caused by the HSE oscillator stabilization:.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PLLRDYIE", + "description": "PLL ready interrupt enable Set and cleared by software to enable/disable interrupt caused by PLL lock:.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "LSECSSIE", + "description": "LSE clock security system interrupt enable Set and cleared by software to enable/disable interrupt caused by the clock security system on LSE.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "HSI48RDYIE", + "description": "HSI48 ready interrupt enable Set and cleared by software to enable/disable interrupt caused by the internal HSI48 oscillator.", + "bit_offset": 10, + "bit_size": 1 + } + ] + }, + "fieldset/CIFR": { + "description": "Clock interrupt flag register.", + "fields": [ + { + "name": "LSIRDYF", + "description": "LSI ready interrupt flag Set by hardware when the LSI clock becomes stable and LSIRDYDIE is set. Cleared by software setting the LSIRDYC bit.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LSERDYF", + "description": "LSE ready interrupt flag Set by hardware when the LSE clock becomes stable and LSERDYDIE is set. Cleared by software setting the LSERDYC bit.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "MSIRDYF", + "description": "MSI ready interrupt flag Set by hardware when the MSI clock becomes stable and MSIRDYDIE is set. Cleared by software setting the MSIRDYC bit.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "HSIRDYF", + "description": "HSI ready interrupt flag Set by hardware when the HSI clock becomes stable and HSIRDYIE is set in a response to setting the HSION (refer to Clock control register (RCC_CR)). When HSION is not set but the HSI oscillator is enabled by the peripheral through a clock request, this bit is not set and no interrupt is generated. Cleared by software setting the HSIRDYC bit.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "HSERDYF", + "description": "HSE ready interrupt flag Set by hardware when the HSE clock becomes stable and HSERDYIE is set. Cleared by software setting the HSERDYC bit.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "PLLRDYF", + "description": "PLL ready interrupt flag Set by hardware when the PLL locks and PLLRDYIE is set. Cleared by software setting the PLLRDYC bit.", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "CSSF", + "description": "HSE clock security system interrupt flag Set by hardware when a failure is detected in the HSE oscillator. Cleared by software setting the CSSC bit.", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "LSECSSF", + "description": "LSE clock security system interrupt flag Set by hardware when a failure is detected in the LSE oscillator. Cleared by software by setting the LSECSSC bit.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "HSI48RDYF", + "description": "HSI48 ready interrupt flag Set by hardware when the HSI48 clock becomes stable and HSI48RDYIE is set in a response to setting the HSI48ON (refer to RCC clock recovery RC register (RCC_CRRCR)). Cleared by software setting the HSI48RDYC bit.", + "bit_offset": 10, + "bit_size": 1 + } + ] + }, + "fieldset/CR": { + "description": "Clock control register.", + "fields": [ + { + "name": "MSION", + "description": "MSI clock enable This bit is set and cleared by software. Cleared by hardware to stop the MSI oscillator when entering Stop, Standby or Shutdown mode. Set by hardware to force the MSI oscillator ON when exiting Standby or Shutdown mode. Set by hardware to force the MSI oscillator ON when STOPWUCK=0 when exiting from Stop modes, or in case of a failure of the HSE oscillator Set by hardware when used directly or indirectly as system clock.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "MSIRDY", + "description": "MSI clock ready flag This bit is set by hardware to indicate that the MSI oscillator is stable. Note: Once the MSION bit is cleared, MSIRDY goes low after 6 MSI clock cycles.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "MSIPLLEN", + "description": "MSI clock PLL enable Set and cleared by software to enable/ disable the PLL part of the MSI clock source. MSIPLLEN must be enabled after LSE is enabled (LSEON enabled) and ready (LSERDY set by hardware).There is a hardware protection to avoid enabling MSIPLLEN if LSE is not ready. This bit is cleared by hardware when LSE is disabled (LSEON = 0) or when the Clock Security System on LSE detects a LSE failure (refer to RCC_CSR register).", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "MSIRGSEL", + "description": "MSI clock range selection Set by software to select the MSI clock range with MSIRANGE[3:0]. Write 0 has no effect. After a standby or a reset MSIRGSEL is at 0 and the MSI range value is provided by MSISRANGE in CSR register.", + "bit_offset": 3, + "bit_size": 1, + "enum": "MSIRGSEL" + }, + { + "name": "MSIRANGE", + "description": "MSI clock ranges These bits are configured by software to choose the frequency range of MSI when MSIRGSEL is set.12 frequency ranges are available: others: not allowed (hardware write protection) Note: Warning: MSIRANGE can be modified when MSI is OFF (MSION=0) or when MSI is ready (MSIRDY=1). MSIRANGE must NOT be modified when MSI is ON and NOT ready (MSION=1 and MSIRDY=0).", + "bit_offset": 4, + "bit_size": 4, + "enum": "MSIRANGE" + }, + { + "name": "HSION", + "description": "HSI clock enable Set and cleared by software. Cleared by hardware to stop the HSI oscillator when entering Stop, Standby, or Shutdown mode. Forced by hardware to keep the HSI oscillator ON when it is used directly or indirectly as system clock (also when leaving Stop, Standby, or Shutdown modes, or in case of failure of the HSE oscillator used for system clock).", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "HSIKERON", + "description": "HSI always enable for peripheral kernels. Set and cleared by software to force HSI ON even in Stop modes. The HSI can only feed USART1, USART2, CEC and I2C1 peripherals configured with HSI as kernel clock. Keeping the HSI ON in Stop mode allows avoiding to slow down the communication speed because of the HSI startup time. This bit has no effect on HSION value.", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "HSIRDY", + "description": "HSI clock ready flag Set by hardware to indicate that HSI oscillator is stable. This bit is set only when HSI is enabled by software by setting HSION. Note: Once the HSION bit is cleared, HSIRDY goes low after 6 HSI clock cycles.", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "HSIASFS", + "description": "HSI automatic start from Stop Set and cleared by software. When the system wake-up clock is MSI, this bit is used to wake up the HSI is parallel of the system wake-up.", + "bit_offset": 11, + "bit_size": 1 + }, + { + "name": "HSEON", + "description": "HSE clock enable Set and cleared by software. Cleared by hardware to stop the HSE oscillator when entering Stop, Standby, or Shutdown mode. This bit cannot be reset if the HSE oscillator is used directly or indirectly as the system clock.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "HSERDY", + "description": "HSE clock ready flag Set by hardware to indicate that the HSE oscillator is stable. Note: Once the HSEON bit is cleared, HSERDY goes low after 6 HSE clock cycles.", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "HSEBYP", + "description": "HSE crystal oscillator bypass Set and cleared by software to bypass the oscillator with an external clock. The external clock must be enabled with the HSEON bit set, to be used by the device. The HSEBYP bit can be written only if the HSE oscillator is disabled.", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "CSSON", + "description": "Clock security system enable Set by software to enable the clock security system. When CSSON is set, the clock detector is enabled by hardware when the HSE oscillator is ready, and disabled by hardware if a HSE clock failure is detected. This bit is set only and is cleared by reset.", + "bit_offset": 19, + "bit_size": 1 + }, + { + "name": "PLLON", + "description": "PLL enable Set and cleared by software to enable the PLL. Cleared by hardware when entering Stop, Standby or Shutdown mode. This bit cannot be reset if the PLL clock is used as the system clock.", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "PLLRDY", + "description": "PLL clock ready flag Set by hardware to indicate that the PLL is locked.", + "bit_offset": 25, + "bit_size": 1 + } + ] + }, + "fieldset/CRRCR": { + "description": "RCC clock recovery RC register.", + "fields": [ + { + "name": "HSI48ON", + "description": "HSI48 RC oscillator enable<sup>(1)</sup>.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "HSI48RDY", + "description": "HSI48 clock ready flag<sup>(1)</sup> The flag is set when the HSI48 clock is ready for use.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "HSI48CAL", + "description": "HSI48 clock calibration These bits are initialized at startup with the factory-programmed HSI48 calibration trim value.", + "bit_offset": 7, + "bit_size": 9 + } + ] + }, + "fieldset/CSR": { + "description": "Control/status register.", + "fields": [ + { + "name": "LSION", + "description": "LSI oscillator enable Set and cleared by software to enable/disable the LSI oscillator:.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LSIRDY", + "description": "LSI oscillator ready Set and cleared by hardware to indicate when the LSI oscillator is ready (stable): After the LSION bit is cleared, LSIRDY goes low after 3 LSI oscillator clock cycles. This bit can be set even if LSION = 0 if the LSI is requested by the Clock Security System on LSE, by the Independent Watchdog or by the RTC.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "LSIPREDIV", + "description": "Internal low-speed oscillator pre-divided by 128 Set and reset by hardware to indicate when the low-speed internal RC oscillator has to be divided by 128. The software has to switch off the LSI before changing this bit.", + "bit_offset": 2, + "bit_size": 1, + "enum": "LSIPREDIV" + }, + { + "name": "MSISRANGE", + "description": "MSI range after Standby mode Set by software to chose the MSI frequency at startup. This range is used after exiting Standby mode until MSIRGSEL is set. After a pad or a power-on reset, the range is always 41MHz. MSISRANGE[3:0] can be written only when MSIRGSEL1=11. Others: Reserved Note: Changing the MSISRANGE[3:0] does not change the current MSI frequency.", + "bit_offset": 8, + "bit_size": 4, + "enum": "MSISRANGE" + }, + { + "name": "RMVF", + "description": "Remove reset flags Set by software to clear the reset flags.", + "bit_offset": 23, + "bit_size": 1 + }, + { + "name": "OBLRSTF", + "description": "Option byte loader reset flag Set by hardware when a reset from the Option byte loading occurs. Cleared by setting the RMVF bit.", + "bit_offset": 25, + "bit_size": 1 + }, + { + "name": "PINRSTF", + "description": "Pin reset flag Set by hardware when a reset from the NRST pin occurs. Cleared by setting the RMVF bit.", + "bit_offset": 26, + "bit_size": 1 + }, + { + "name": "PWRRSTF", + "description": "BOR or POR/PDR flag Set by hardware when a BOR or POR/PDR occurs. Cleared by setting the RMVF bit.", + "bit_offset": 27, + "bit_size": 1 + }, + { + "name": "SFTRSTF", + "description": "Software reset flag Set by hardware when a software reset occurs. Cleared by setting the RMVF bit.", + "bit_offset": 28, + "bit_size": 1 + }, + { + "name": "IWDGRSTF", + "description": "Independent window watchdog reset flag Set by hardware when an independent watchdog reset domain occurs. Cleared by setting the RMVF bit.", + "bit_offset": 29, + "bit_size": 1 + }, + { + "name": "WWDGRSTF", + "description": "Window watchdog reset flag Set by hardware when a window watchdog reset occurs. Cleared by setting the RMVF bit.", + "bit_offset": 30, + "bit_size": 1 + }, + { + "name": "LPWRRSTF", + "description": "Low-power reset flag Set by hardware when a reset occurs due to illegal Stop, Standby, or Shutdown mode entry. Cleared by setting the RMVF bit. This operates only if nRST_STOP, nRST_STDBY or nRST_SHDW option bits are cleared.", + "bit_offset": 31, + "bit_size": 1 + } + ] + }, + "fieldset/DBGCFGR": { + "description": "Debug configuration register.", + "fields": [ + { + "name": "DBGEN", + "description": "Debug support clock enable Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "DBGRST", + "description": "Debug support reset Set and cleared by software.", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/GPIOENR": { + "description": "I/O port clock enable register.", + "fields": [ + { + "name": "GPIOAEN", + "description": "I/O port A clock enable This bit is set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "GPIOBEN", + "description": "I/O port B clock enable This bit is set and cleared by software.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "GPIOCEN", + "description": "I/O port C clock enable This bit is set and cleared by software.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "GPIODEN", + "description": "I/O port D clock enable This bit is set and cleared by software.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "GPIOEEN", + "description": "I/O port E clock enable<sup>(1)</sup> This bit is set and cleared by software.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "GPIOFEN", + "description": "I/O port F clock enable This bit is set and cleared by software.", + "bit_offset": 5, + "bit_size": 1 + } + ] + }, + "fieldset/GPIORSTR": { + "description": "I/O port reset register.", + "fields": [ + { + "name": "GPIOARST", + "description": "I/O port A reset This bit is set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "GPIOBRST", + "description": "I/O port B reset This bit is set and cleared by software.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "GPIOCRST", + "description": "I/O port C reset This bit is set and cleared by software.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "GPIODRST", + "description": "I/O port D reset This bit is set and cleared by software.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "GPIOERST", + "description": "I/O port E reset This bit is set and cleared by software.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "GPIOFRST", + "description": "I/O port F reset This bit is set and cleared by software.", + "bit_offset": 5, + "bit_size": 1 + } + ] + }, + "fieldset/GPIOSMENR": { + "description": "I/O port in Sleep mode clock enable register.", + "fields": [ + { + "name": "GPIOASMEN", + "description": "I/O port A clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "GPIOBSMEN", + "description": "I/O port B clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "GPIOCSMEN", + "description": "I/O port C clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "GPIODSMEN", + "description": "I/O port D clock enable during Sleep mode<sup>(1)</sup> Set and cleared by software.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "GPIOESMEN", + "description": "I/O port E clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "GPIOFSMEN", + "description": "I/O port F clock enable during Sleep mode Set and cleared by software.", + "bit_offset": 5, + "bit_size": 1 + } + ] + }, + "fieldset/ICSCR": { + "description": "Internal clock sources calibration register.", + "fields": [ + { + "name": "MSICAL", + "description": "MSI clock calibration These bits are initialized at startup with the factory-programmed MSI calibration trim value. When MSITRIM is written, MSICAL is updated with the sum of MSITRIM and the factory trim value.", + "bit_offset": 0, + "bit_size": 8 + }, + { + "name": "MSITRIM", + "description": "MSI clock trimming These bits provide an additional user-programmable trimming value that is added to the MSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the MSI.", + "bit_offset": 8, + "bit_size": 8 + }, + { + "name": "HSICAL", + "description": "HSI clock calibration These bits are initialized at startup with the factory-programmed HSI calibration trim value. When HSITRIM is written, HSICAL is updated with the sum of HSITRIM and the factory trim value.", + "bit_offset": 16, + "bit_size": 8 + }, + { + "name": "HSITRIM", + "description": "HSI clock trimming These bits provide an additional user-programmable trimming value that is added to the HSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the HSI. The default value is 64 when added to the HSICAL value, trim the HSI to 161MHz 1 11%.", + "bit_offset": 24, + "bit_size": 7 + } + ] + }, + "fieldset/PLLCFGR": { + "description": "PLL configuration register.", + "fields": [ + { + "name": "PLLSRC", + "description": "PLL input clock source This bit is controlled by software to select PLL clock source, as follows: The bitfield can be written only when the PLL is disabled. When the PLL is not used, selecting 00 allows saving power.", + "bit_offset": 0, + "bit_size": 2, + "enum": "PLLSRC" + }, + { + "name": "PLLM", + "description": "Division factor M of the PLL input clock divider This bit is controlled by software to divide the PLL input clock before the actual phase-locked loop, as follows: The bitfield can be written only when the PLL is disabled. Caution: The software must set these bits so that the PLL input frequency after the /M divider is between 2.66 and 161MHz.", + "bit_offset": 4, + "bit_size": 3, + "enum": "PLLM" + }, + { + "name": "PLLN", + "description": "PLL frequency multiplication factor N This bit is controlled by software to set the division factor of the f<sub>VCO</sub> feedback divider (that determines the PLL multiplication ratio) as follows: ... ... The bitfield can be written only when the PLL is disabled. Caution: The software must set these bits so that the VCO output frequency is between 96 and 3441MHz.", + "bit_offset": 8, + "bit_size": 7, + "enum": "PLLN" + }, + { + "name": "PLLPEN", + "description": "PLLPCLK clock output enable This bit is controlled by software to enable/disable the PLLPCLK clock output of the PLL: Disabling the PLLPCLK clock output, when not used, allows saving power.", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "PLLP", + "description": "PLL VCO division factor P for PLLPCLK clock output This bitfield is controlled by software. It sets the PLL VCO division factor P as follows: ... The bitfield can be written only when the PLL is disabled. Caution: The software must set this bitfield so as not to exceed 541MHz on this clock.", + "bit_offset": 17, + "bit_size": 5, + "enum": "PLLP" + }, + { + "name": "PLLQEN", + "description": "PLLQCLK clock output enable This bit is controlled by software to enable/disable the PLLQCLK clock output of the PLL: Disabling the PLLQCLK clock output, when not used, allows saving power.", + "bit_offset": 24, + "bit_size": 1 + }, + { + "name": "PLLQ", + "description": "PLL VCO division factor Q for PLLQCLK clock output This bitfield is controlled by software. It sets the PLL VCO division factor Q as follows: The bitfield can be written only when the PLL is disabled. Caution: The software must set this bitfield so as not to exceed 541MHz on this clock.", + "bit_offset": 25, + "bit_size": 3, + "enum": "PLLQ" + }, + { + "name": "PLLREN", + "description": "PLLRCLK clock output enable This bit is controlled by software to enable/disable the PLLRCLK clock output of the PLL: This bit cannot be written when PLLRCLK output of the PLL is selected for system clock. Disabling the PLLRCLK clock output, when not used, allows saving power.", + "bit_offset": 28, + "bit_size": 1 + }, + { + "name": "PLLR", + "description": "PLL VCO division factor R for PLLRCLK clock output This bitfield is controlled by software. It sets the PLL VCO division factor R as follows: The bitfield can be written only when the PLL is disabled. The PLLRCLK clock can be selected as system clock. Caution: The software must set this bitfield so as not to exceed 122MHz on this clock.", + "bit_offset": 29, + "bit_size": 3, + "enum": "PLLR" + } + ] + }, + "enum/ADCSEL": { + "bit_size": 2, + "variants": [ + { + "name": "SYS", + "value": 0 + }, + { + "name": "PLL1_P", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + } + ] + }, + "enum/CLK48SEL": { + "bit_size": 2, + "variants": [ + { + "name": "DISABLE", + "value": 0 + }, + { + "name": "MSI", + "value": 1 + }, + { + "name": "PLL1_Q", + "value": 2 + }, + { + "name": "HSI48", + "value": 3 + } + ] + }, + "enum/HPRE": { + "bit_size": 4, + "variants": [ + { + "name": "Div1", + "value": 0 + }, + { + "name": "Div2", + "value": 8 + }, + { + "name": "Div4", + "value": 9 + }, + { + "name": "Div8", + "value": 10 + }, + { + "name": "Div16", + "value": 11 + }, + { + "name": "Div64", + "value": 12 + }, + { + "name": "Div128", + "value": 13 + }, + { + "name": "Div256", + "value": 14 + }, + { + "name": "Div512", + "value": 15 + } + ] + }, + "enum/I2C1SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "SYS", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + } + ] + }, + "enum/I2C3SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "SYS", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + } + ] + }, + "enum/LPTIM1SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "LSI", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "LSE", + "value": 3 + } + ] + }, + "enum/LPTIM2SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "LSI", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "LSE", + "value": 3 + } + ] + }, + "enum/LPTIM3SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "LSI", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "LSE", + "value": 3 + } + ] + }, + "enum/LPUART1SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "SYS", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "LSE", + "value": 3 + } + ] + }, + "enum/LPUART2SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "SYS", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "LSE", + "value": 3 + } + ] + }, + "enum/LPUART3SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "SYS", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "LSE", + "value": 3 + } + ] + }, + "enum/LSCOSEL": { + "bit_size": 1, + "variants": [ + { + "name": "LSI", + "value": 0 + }, + { + "name": "LSE", + "value": 1 + } + ] + }, + "enum/LSEDRV": { + "bit_size": 2, + "variants": [ + { + "name": "Low", + "description": "Low driving capability", + "value": 0 + }, + { + "name": "MediumLow", + "description": "Medium low driving capability", + "value": 1 + }, + { + "name": "MediumHigh", + "description": "Medium high driving capability", + "value": 2 + }, + { + "name": "High", + "description": "High driving capability", + "value": 3 + } + ] + }, + "enum/LSIPREDIV": { + "bit_size": 1, + "variants": [ + { + "name": "Div1", + "value": 0 + }, + { + "name": "Div128", + "value": 1 + } + ] + }, + "enum/MCOPRE": { + "bit_size": 4, + "variants": [ + { + "name": "Div1", + "value": 0 + }, + { + "name": "Div2", + "value": 1 + }, + { + "name": "Div4", + "value": 2 + }, + { + "name": "Div8", + "value": 3 + }, + { + "name": "Div16", + "value": 4 + }, + { + "name": "Div32", + "value": 5 + }, + { + "name": "Div64", + "value": 6 + }, + { + "name": "Div128", + "value": 7 + }, + { + "name": "Div256", + "value": 8 + }, + { + "name": "Div512", + "value": 9 + }, + { + "name": "Div1024", + "value": 10 + } + ] + }, + "enum/MCOSEL": { + "bit_size": 4, + "variants": [ + { + "name": "DISABLE", + "value": 0 + }, + { + "name": "SYS", + "value": 1 + }, + { + "name": "MSI", + "value": 2 + }, + { + "name": "HSI", + "value": 3 + }, + { + "name": "HSE", + "value": 4 + }, + { + "name": "PLL1_R", + "value": 5 + }, + { + "name": "LSI", + "value": 6 + }, + { + "name": "LSE", + "value": 7 + }, + { + "name": "HSI48", + "value": 8 + }, + { + "name": "RTC", + "value": 9 + }, + { + "name": "RTC_WKUP", + "value": 10 + } + ] + }, + "enum/MSIRANGE": { + "bit_size": 4, + "variants": [ + { + "name": "Range100K", + "description": "range 0 around 100 kHz", + "value": 0 + }, + { + "name": "Range200K", + "description": "range 1 around 200 kHz", + "value": 1 + }, + { + "name": "Range400K", + "description": "range 2 around 400 kHz", + "value": 2 + }, + { + "name": "Range800K", + "description": "range 3 around 800 kHz", + "value": 3 + }, + { + "name": "Range1M", + "description": "range 4 around 1 MHz", + "value": 4 + }, + { + "name": "Range2M", + "description": "range 5 around 2 MHz", + "value": 5 + }, + { + "name": "Range4M", + "description": "range 6 around 4 MHz", + "value": 6 + }, + { + "name": "Range8M", + "description": "range 7 around 8 MHz", + "value": 7 + }, + { + "name": "Range16M", + "description": "range 8 around 16 MHz", + "value": 8 + }, + { + "name": "Range24M", + "description": "range 9 around 24 MHz", + "value": 9 + }, + { + "name": "Range32M", + "description": "range 10 around 32 MHz", + "value": 10 + }, + { + "name": "Range48M", + "description": "range 11 around 48 MHz", + "value": 11 + } + ] + }, + "enum/MSIRGSEL": { + "bit_size": 1, + "variants": [ + { + "name": "CSR", + "description": "MSI Range is provided by MSISRANGE[3:0] in RCC_CSR register", + "value": 0 + }, + { + "name": "CR", + "description": "MSI Range is provided by MSIRANGE[3:0] in the RCC_CR register", + "value": 1 + } + ] + }, + "enum/MSISRANGE": { + "bit_size": 4, + "variants": [ + { + "name": "RANGE_81MHz", + "value": 4 + } + ] + }, + "enum/PLLM": { + "bit_size": 3, + "variants": [ + { + "name": "Div1", + "value": 0 + }, + { + "name": "Div2", + "value": 1 + }, + { + "name": "Div3", + "value": 2 + }, + { + "name": "Div4", + "value": 3 + }, + { + "name": "Div5", + "value": 4 + }, + { + "name": "Div6", + "value": 5 + }, + { + "name": "Div7", + "value": 6 + }, + { + "name": "Div8", + "value": 7 + } + ] + }, + "enum/PLLN": { + "bit_size": 7, + "variants": [ + { + "name": "Mul4", + "value": 4 + }, + { + "name": "Mul5", + "value": 5 + }, + { + "name": "Mul6", + "value": 6 + }, + { + "name": "Mul7", + "value": 7 + }, + { + "name": "Mul8", + "value": 8 + }, + { + "name": "Mul9", + "value": 9 + }, + { + "name": "Mul10", + "value": 10 + }, + { + "name": "Mul11", + "value": 11 + }, + { + "name": "Mul12", + "value": 12 + }, + { + "name": "Mul13", + "value": 13 + }, + { + "name": "Mul14", + "value": 14 + }, + { + "name": "Mul15", + "value": 15 + }, + { + "name": "Mul16", + "value": 16 + }, + { + "name": "Mul17", + "value": 17 + }, + { + "name": "Mul18", + "value": 18 + }, + { + "name": "Mul19", + "value": 19 + }, + { + "name": "Mul20", + "value": 20 + }, + { + "name": "Mul21", + "value": 21 + }, + { + "name": "Mul22", + "value": 22 + }, + { + "name": "Mul23", + "value": 23 + }, + { + "name": "Mul24", + "value": 24 + }, + { + "name": "Mul25", + "value": 25 + }, + { + "name": "Mul26", + "value": 26 + }, + { + "name": "Mul27", + "value": 27 + }, + { + "name": "Mul28", + "value": 28 + }, + { + "name": "Mul29", + "value": 29 + }, + { + "name": "Mul30", + "value": 30 + }, + { + "name": "Mul31", + "value": 31 + }, + { + "name": "Mul32", + "value": 32 + }, + { + "name": "Mul33", + "value": 33 + }, + { + "name": "Mul34", + "value": 34 + }, + { + "name": "Mul35", + "value": 35 + }, + { + "name": "Mul36", + "value": 36 + }, + { + "name": "Mul37", + "value": 37 + }, + { + "name": "Mul38", + "value": 38 + }, + { + "name": "Mul39", + "value": 39 + }, + { + "name": "Mul40", + "value": 40 + }, + { + "name": "Mul41", + "value": 41 + }, + { + "name": "Mul42", + "value": 42 + }, + { + "name": "Mul43", + "value": 43 + }, + { + "name": "Mul44", + "value": 44 + }, + { + "name": "Mul45", + "value": 45 + }, + { + "name": "Mul46", + "value": 46 + }, + { + "name": "Mul47", + "value": 47 + }, + { + "name": "Mul48", + "value": 48 + }, + { + "name": "Mul49", + "value": 49 + }, + { + "name": "Mul50", + "value": 50 + }, + { + "name": "Mul51", + "value": 51 + }, + { + "name": "Mul52", + "value": 52 + }, + { + "name": "Mul53", + "value": 53 + }, + { + "name": "Mul54", + "value": 54 + }, + { + "name": "Mul55", + "value": 55 + }, + { + "name": "Mul56", + "value": 56 + }, + { + "name": "Mul57", + "value": 57 + }, + { + "name": "Mul58", + "value": 58 + }, + { + "name": "Mul59", + "value": 59 + }, + { + "name": "Mul60", + "value": 60 + }, + { + "name": "Mul61", + "value": 61 + }, + { + "name": "Mul62", + "value": 62 + }, + { + "name": "Mul63", + "value": 63 + }, + { + "name": "Mul64", + "value": 64 + }, + { + "name": "Mul65", + "value": 65 + }, + { + "name": "Mul66", + "value": 66 + }, + { + "name": "Mul67", + "value": 67 + }, + { + "name": "Mul68", + "value": 68 + }, + { + "name": "Mul69", + "value": 69 + }, + { + "name": "Mul70", + "value": 70 + }, + { + "name": "Mul71", + "value": 71 + }, + { + "name": "Mul72", + "value": 72 + }, + { + "name": "Mul73", + "value": 73 + }, + { + "name": "Mul74", + "value": 74 + }, + { + "name": "Mul75", + "value": 75 + }, + { + "name": "Mul76", + "value": 76 + }, + { + "name": "Mul77", + "value": 77 + }, + { + "name": "Mul78", + "value": 78 + }, + { + "name": "Mul79", + "value": 79 + }, + { + "name": "Mul80", + "value": 80 + }, + { + "name": "Mul81", + "value": 81 + }, + { + "name": "Mul82", + "value": 82 + }, + { + "name": "Mul83", + "value": 83 + }, + { + "name": "Mul84", + "value": 84 + }, + { + "name": "Mul85", + "value": 85 + }, + { + "name": "Mul86", + "value": 86 + }, + { + "name": "Mul87", + "value": 87 + }, + { + "name": "Mul88", + "value": 88 + }, + { + "name": "Mul89", + "value": 89 + }, + { + "name": "Mul90", + "value": 90 + }, + { + "name": "Mul91", + "value": 91 + }, + { + "name": "Mul92", + "value": 92 + }, + { + "name": "Mul93", + "value": 93 + }, + { + "name": "Mul94", + "value": 94 + }, + { + "name": "Mul95", + "value": 95 + }, + { + "name": "Mul96", + "value": 96 + }, + { + "name": "Mul97", + "value": 97 + }, + { + "name": "Mul98", + "value": 98 + }, + { + "name": "Mul99", + "value": 99 + }, + { + "name": "Mul100", + "value": 100 + }, + { + "name": "Mul101", + "value": 101 + }, + { + "name": "Mul102", + "value": 102 + }, + { + "name": "Mul103", + "value": 103 + }, + { + "name": "Mul104", + "value": 104 + }, + { + "name": "Mul105", + "value": 105 + }, + { + "name": "Mul106", + "value": 106 + }, + { + "name": "Mul107", + "value": 107 + }, + { + "name": "Mul108", + "value": 108 + }, + { + "name": "Mul109", + "value": 109 + }, + { + "name": "Mul110", + "value": 110 + }, + { + "name": "Mul111", + "value": 111 + }, + { + "name": "Mul112", + "value": 112 + }, + { + "name": "Mul113", + "value": 113 + }, + { + "name": "Mul114", + "value": 114 + }, + { + "name": "Mul115", + "value": 115 + }, + { + "name": "Mul116", + "value": 116 + }, + { + "name": "Mul117", + "value": 117 + }, + { + "name": "Mul118", + "value": 118 + }, + { + "name": "Mul119", + "value": 119 + }, + { + "name": "Mul120", + "value": 120 + }, + { + "name": "Mul121", + "value": 121 + }, + { + "name": "Mul122", + "value": 122 + }, + { + "name": "Mul123", + "value": 123 + }, + { + "name": "Mul124", + "value": 124 + }, + { + "name": "Mul125", + "value": 125 + }, + { + "name": "Mul126", + "value": 126 + }, + { + "name": "Mul127", + "value": 127 + } + ] + }, + "enum/PLLP": { + "bit_size": 5, + "variants": [ + { + "name": "Div2", + "value": 1 + }, + { + "name": "Div3", + "value": 2 + }, + { + "name": "Div4", + "value": 3 + }, + { + "name": "Div5", + "value": 4 + }, + { + "name": "Div6", + "value": 5 + }, + { + "name": "Div7", + "value": 6 + }, + { + "name": "Div8", + "value": 7 + }, + { + "name": "Div9", + "value": 8 + }, + { + "name": "Div10", + "value": 9 + }, + { + "name": "Div11", + "value": 10 + }, + { + "name": "Div12", + "value": 11 + }, + { + "name": "Div13", + "value": 12 + }, + { + "name": "Div14", + "value": 13 + }, + { + "name": "Div15", + "value": 14 + }, + { + "name": "Div16", + "value": 15 + }, + { + "name": "Div17", + "value": 16 + }, + { + "name": "Div18", + "value": 17 + }, + { + "name": "Div19", + "value": 18 + }, + { + "name": "Div20", + "value": 19 + }, + { + "name": "Div21", + "value": 20 + }, + { + "name": "Div22", + "value": 21 + }, + { + "name": "Div23", + "value": 22 + }, + { + "name": "Div24", + "value": 23 + }, + { + "name": "Div25", + "value": 24 + }, + { + "name": "Div26", + "value": 25 + }, + { + "name": "Div27", + "value": 26 + }, + { + "name": "Div28", + "value": 27 + }, + { + "name": "Div29", + "value": 28 + }, + { + "name": "Div30", + "value": 29 + }, + { + "name": "Div31", + "value": 30 + }, + { + "name": "Div32", + "value": 31 + } + ] + }, + "enum/PLLQ": { + "bit_size": 3, + "variants": [ + { + "name": "Div2", + "value": 1 + }, + { + "name": "Div3", + "value": 2 + }, + { + "name": "Div4", + "value": 3 + }, + { + "name": "Div5", + "value": 4 + }, + { + "name": "Div6", + "value": 5 + }, + { + "name": "Div7", + "value": 6 + }, + { + "name": "Div8", + "value": 7 + } + ] + }, + "enum/PLLR": { + "bit_size": 3, + "variants": [ + { + "name": "Div2", + "value": 1 + }, + { + "name": "Div3", + "value": 2 + }, + { + "name": "Div4", + "value": 3 + }, + { + "name": "Div5", + "value": 4 + }, + { + "name": "Div6", + "value": 5 + }, + { + "name": "Div7", + "value": 6 + }, + { + "name": "Div8", + "value": 7 + } + ] + }, + "enum/PLLSRC": { + "bit_size": 2, + "variants": [ + { + "name": "DISABLE", + "value": 0 + }, + { + "name": "MSI", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "HSE", + "value": 3 + } + ] + }, + "enum/PPRE": { + "bit_size": 3, + "variants": [ + { + "name": "Div1", + "description": "HCLK not divided", + "value": 0 + }, + { + "name": "Div2", + "description": "HCLK divided by 2", + "value": 4 + }, + { + "name": "Div4", + "description": "HCLK divided by 4", + "value": 5 + }, + { + "name": "Div8", + "description": "HCLK divided by 8", + "value": 6 + }, + { + "name": "Div16", + "description": "HCLK divided by 16", + "value": 7 + } + ] + }, + "enum/RTCSEL": { + "bit_size": 2, + "variants": [ + { + "name": "DISABLE", + "value": 0 + }, + { + "name": "LSE", + "value": 1 + }, + { + "name": "LSI", + "value": 2 + }, + { + "name": "HSE", + "value": 3 + } + ] + }, + "enum/SW": { + "bit_size": 3, + "variants": [ + { + "name": "MSI", + "value": 0 + }, + { + "name": "HSI", + "value": 1 + }, + { + "name": "HSE", + "value": 2 + }, + { + "name": "PLL1_R", + "value": 3 + }, + { + "name": "LSI", + "value": 4 + }, + { + "name": "LSE", + "value": 5 + } + ] + }, + "enum/TIM15SEL": { + "bit_size": 1, + "variants": [ + { + "name": "PCLK1_TIM", + "value": 0 + }, + { + "name": "PLL1_Q", + "value": 1 + } + ] + }, + "enum/TIM1SEL": { + "bit_size": 1, + "variants": [ + { + "name": "PCLK1_TIM", + "value": 0 + }, + { + "name": "PLL1_Q", + "value": 1 + } + ] + }, + "enum/USART1SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "SYS", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "LSE", + "value": 3 + } + ] + }, + "enum/USART2SEL": { + "bit_size": 2, + "variants": [ + { + "name": "PCLK1", + "value": 0 + }, + { + "name": "SYS", + "value": 1 + }, + { + "name": "HSI", + "value": 2 + }, + { + "name": "LSE", + "value": 3 + } + ] + } +} \ No newline at end of file diff --git a/data/registers/syscfg_u0.json b/data/registers/syscfg_u0.json new file mode 100644 index 0000000..379326e --- /dev/null +++ b/data/registers/syscfg_u0.json @@ -0,0 +1,1111 @@ +{ + "block/SYSCFG": { + "description": "SYSCFG register block", + "items": [ + { + "name": "CFGR1", + "description": "SYSCFG configuration register 1", + "byte_offset": 0, + "fieldset": "CFGR1" + }, + { + "name": "CFGR2", + "description": "SYSCFG configuration register 2", + "byte_offset": 24, + "fieldset": "CFGR2" + }, + { + "name": "SCSR", + "description": "SYSCFG SRAM2 control and status register", + "byte_offset": 28, + "fieldset": "SCSR" + }, + { + "name": "SKR", + "description": "SYSCFG SRAM2 key register", + "byte_offset": 32, + "fieldset": "SKR" + }, + { + "name": "TSCCR", + "description": "SYSCFG TSC comparator register", + "byte_offset": 36, + "fieldset": "TSCCR" + }, + { + "name": "ITLINE0", + "description": "SYSCFG interrupt line 0 status register", + "byte_offset": 128, + "fieldset": "ITLINE0" + }, + { + "name": "ITLINE1", + "description": "SYSCFG interrupt line 1 status register", + "byte_offset": 132, + "fieldset": "ITLINE1" + }, + { + "name": "ITLINE2", + "description": "SYSCFG interrupt line 2 status register", + "byte_offset": 136, + "fieldset": "ITLINE2" + }, + { + "name": "ITLINE3", + "description": "SYSCFG interrupt line 3 status register", + "byte_offset": 140, + "fieldset": "ITLINE3" + }, + { + "name": "ITLINE4", + "description": "SYSCFG interrupt line 4 status register", + "byte_offset": 144, + "fieldset": "ITLINE4" + }, + { + "name": "ITLINE5", + "description": "SYSCFG interrupt line 5 status register", + "byte_offset": 148, + "fieldset": "ITLINE5" + }, + { + "name": "ITLINE6", + "description": "SYSCFG interrupt line 6 status register", + "byte_offset": 152, + "fieldset": "ITLINE6" + }, + { + "name": "ITLINE7", + "description": "SYSCFG interrupt line 7 status register", + "byte_offset": 156, + "fieldset": "ITLINE7" + }, + { + "name": "ITLINE8", + "description": "SYSCFG interrupt line 8 status register", + "byte_offset": 160, + "fieldset": "ITLINE8" + }, + { + "name": "ITLINE9", + "description": "SYSCFG interrupt line 9 status register", + "byte_offset": 164, + "fieldset": "ITLINE9" + }, + { + "name": "ITLINE10", + "description": "SYSCFG interrupt line 10 status register", + "byte_offset": 168, + "fieldset": "ITLINE10" + }, + { + "name": "ITLINE11", + "description": "SYSCFG interrupt line 11 status register", + "byte_offset": 172, + "fieldset": "ITLINE11" + }, + { + "name": "ITLINE12", + "description": "SYSCFG interrupt line 12 status register", + "byte_offset": 176, + "fieldset": "ITLINE12" + }, + { + "name": "ITLINE13", + "description": "SYSCFG interrupt line 13 status register", + "byte_offset": 180, + "fieldset": "ITLINE13" + }, + { + "name": "ITLINE14", + "description": "SYSCFG interrupt line 14 status register", + "byte_offset": 184, + "fieldset": "ITLINE14" + }, + { + "name": "ITLINE15", + "description": "SYSCFG interrupt line 15 status register", + "byte_offset": 188, + "fieldset": "ITLINE15" + }, + { + "name": "ITLINE16", + "description": "SYSCFG interrupt line 16 status register", + "byte_offset": 192, + "fieldset": "ITLINE16" + }, + { + "name": "ITLINE17", + "description": "SYSCFG interrupt line 17 status register", + "byte_offset": 196, + "fieldset": "ITLINE17" + }, + { + "name": "ITLINE18", + "description": "SYSCFG interrupt line 18 status register", + "byte_offset": 200, + "fieldset": "ITLINE18" + }, + { + "name": "ITLINE19", + "description": "SYSCFG interrupt line 19 status register", + "byte_offset": 204, + "fieldset": "ITLINE19" + }, + { + "name": "ITLINE20", + "description": "SYSCFG interrupt line 20 status register", + "byte_offset": 208, + "fieldset": "ITLINE20" + }, + { + "name": "ITLINE21", + "description": "SYSCFG interrupt line 21 status register", + "byte_offset": 212, + "fieldset": "ITLINE21" + }, + { + "name": "ITLINE22", + "description": "SYSCFG interrupt line 22 status register", + "byte_offset": 216, + "fieldset": "ITLINE22" + }, + { + "name": "ITLINE23", + "description": "SYSCFG interrupt line 23 status register", + "byte_offset": 220, + "fieldset": "ITLINE23" + }, + { + "name": "ITLINE24", + "description": "SYSCFG interrupt line 24 status register", + "byte_offset": 224, + "fieldset": "ITLINE24" + }, + { + "name": "ITLINE25", + "description": "SYSCFG interrupt line 25 status register", + "byte_offset": 228, + "fieldset": "ITLINE25" + }, + { + "name": "ITLINE26", + "description": "SYSCFG interrupt line 26 status register", + "byte_offset": 232, + "fieldset": "ITLINE26" + }, + { + "name": "ITLINE27", + "description": "SYSCFG interrupt line 27 status register", + "byte_offset": 236, + "fieldset": "ITLINE27" + }, + { + "name": "ITLINE28", + "description": "SYSCFG interrupt line 28 status register", + "byte_offset": 240, + "fieldset": "ITLINE28" + }, + { + "name": "ITLINE29", + "description": "SYSCFG interrupt line 29 status register", + "byte_offset": 244, + "fieldset": "ITLINE29" + }, + { + "name": "ITLINE30", + "description": "SYSCFG interrupt line 30 status register", + "byte_offset": 248, + "fieldset": "ITLINE30" + }, + { + "name": "ITLINE31", + "description": "SYSCFG interrupt line 31 status register", + "byte_offset": 252, + "fieldset": "ITLINE31" + } + ] + }, + "fieldset/CFGR1": { + "description": "SYSCFG configuration register 1", + "fields": [ + { + "name": "MEM_MODE", + "description": "Memory mapping selection bits These bits are set and cleared by software. They control the memory internal mapping at address 0x000010000. After reset these bits take on the value selected by the actual boot mode configuration. Refer to Section12.5: Boot configuration for more details. X0: Main flash memory mapped at 0x000010000", + "bit_offset": 0, + "bit_size": 2, + "enum": "MEM_MODE" + }, + { + "name": "PA11_RMP", + "description": "PA11 pin remapping This bit is set and cleared by software. When set, it remaps the PA11 pin to operate as PA9 GPIO port, instead as PA11 GPIO port.\n0: No remap (PA11)\n1: Remap (PA9)", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "PA12_RMP", + "description": "PA12 pin remapping This bit is set and cleared by software. When set, it remaps the PA12 pin to operate as PA10 GPIO port, instead as PA12 GPIO port.\n0: No remap (PA12)\n1: Remap (PA10)", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "IR_POL", + "description": "IR output polarity selection", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "IR_MOD", + "description": "IR Modulation Envelope signal selection This bitfield selects the signal for IR modulation envelope:", + "bit_offset": 6, + "bit_size": 2, + "enum": "IR_MOD" + }, + { + "name": "BOOSTEN", + "description": "I/O analog switch voltage booster enable This bit selects the way of supplying I/O analog switches: When using the analog inputs , setting to 0 is recommended for high V<sub>DD</sub>, setting to 1 for low V<sub>DD</sub> (less than 2.4 V).", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "I2C_PB6_FMP", + "description": "Fast Mode Plus (FM+) enable for PB6 This bit is set and cleared by software. It enables I<sup>2</sup>C FM+ driving capability on PB6 I/O port. With this bit in disable state, the I<sup>2</sup>C FM+ driving capability on this I/O port can be enabled through one of I2Cx_FMP bits. When I<sup>2</sup>C FM+ is enabled, the speed control is ignored. Note: This control bit is kept for legacy reasons. It is recommended to use the FMP bit of the I2Cx_CR1 register instead.\n0: Disable\n1: Enable", + "bit_offset": 16, + "bit_size": 1 + }, + { + "name": "I2C_PB7_FMP", + "description": "Fast Mode Plus (FM+) enable for PB7 This bit is set and cleared by software. It enables I<sup>2</sup>C FM+ driving capability on PB7 I/O port. With this bit in disable state, the I<sup>2</sup>C FM+ driving capability on this I/O port can be enabled through one of I2Cx_FMP bits. When I<sup>2</sup>C FM+ is enabled, the speed control is ignored. Note: This control bit is kept for legacy reasons. It is recommended to use the FMP bit of the I2Cx_CR1 register instead.\n0: Disable\n1: Enable", + "bit_offset": 17, + "bit_size": 1 + }, + { + "name": "I2C_PB8_FMP", + "description": "Fast Mode Plus (FM+) enable for PB8 This bit is set and cleared by software. It enables I<sup>2</sup>C FM+ driving capability on PB8 I/O port. With this bit in disable state, the I<sup>2</sup>C FM+ driving capability on this I/O port can be enabled through one of I2Cx_FMP bits. When I<sup>2</sup>C FM+ is enabled, the speed control is ignored. Note: This control bit is kept for legacy reasons. It is recommended to use the FMP bit of the I2Cx_CR1 register instead.\n0: Disable\n1: Enable", + "bit_offset": 18, + "bit_size": 1 + }, + { + "name": "I2C_PB9_FMP", + "description": "Fast Mode Plus (FM+) enable for PB9 This bit is set and cleared by software. It enables I<sup>2</sup>C FM+ driving capability on PB9 I/O port. With this bit in disable state, the I<sup>2</sup>C FM+ driving capability on this I/O port can be enabled through one of I2Cx_FMP bits. When I<sup>2</sup>C FM+ is enabled, the speed control is ignored. Note: This control bit is kept for legacy reasons. It is recommended to use the FMP bit of the I2Cx_CR1 register instead.\n0: Disable\n1: Enable", + "bit_offset": 19, + "bit_size": 1 + }, + { + "name": "I2C_PA9_FMP", + "description": "Fast Mode Plus (FM+) enable for PA9 This bit is set and cleared by software. It enables I<sup>2</sup>C FM+ driving capability on PA9 I/O port. With this bit in disable state, the I<sup>2</sup>C FM+ driving capability on this I/O port can be enabled through one of I2Cx_FMP bits. When I<sup>2</sup>C FM+ is enabled, the speed control is ignored. Note: This control bit is kept for legacy reasons. It is recommended to use the FMP bit of the I2Cx_CR1 register instead.\n0: Disable\n1: Enable", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "I2C_PA10_FMP", + "description": "Fast Mode Plus (FM+) enable for PA10 This bit is set and cleared by software. It enables I<sup>2</sup>C FM+ driving capability on PA10 I/O port. With this bit in disable state, the I<sup>2</sup>C FM+ driving capability on this I/O port can be enabled through one of I2Cx_FMP bits. When I<sup>2</sup>C FM+ is enabled, the speed control is ignored. Note: This control bit is kept for legacy reasons. It is recommended to use the FMP bit of the I2Cx_CR1 register instead.\n0: Disable\n1: Enable", + "bit_offset": 23, + "bit_size": 1 + }, + { + "name": "I2C3_FMP", + "description": "Fast Mode Plus (FM+) enable for I2C3 This bit is set and cleared by software. It enables I<sup>2</sup>C FM+ driving capability on I/O ports configured as I2C3 through GPIOx_AFR registers. With this bit in disable state, the I<sup>2</sup>C FM+ driving capability on I/O ports configured as I2C3 can be enabled through their corresponding I2Cx_FMP bit. When I<sup>2</sup>C FM+ is enabled, the speed control is ignored. Note: This control bit is kept for legacy reasons. It is recommended to use the FMP bit of the I2Cx_CR1 register instead.\n0: Disable\n1: Enable", + "bit_offset": 24, + "bit_size": 1 + } + ] + }, + "fieldset/CFGR2": { + "description": "SYSCFG configuration register 2", + "fields": [ + { + "name": "CCL", + "description": "Cortex<Superscript>1<Default 1 Font>-M0+ LOCKUP bit enable bit This bit is set by software and cleared by a system reset. It can be use to enable and lock the connection of Cortex<Superscript>1<Default 1 Font>-M0+ LOCKUP (Hardfault) output to TIM1/15/16 Break input.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "SPL", + "description": "SRAM1 parity lock bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the SRAM1 parity error signal connection to TIM1/15/16 Break input.", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PVDL", + "description": "PVD lock enable bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the PVD connection to TIM1/15/16 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR register.", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "ECCL", + "description": "ECC error lock bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the flash ECC 2-bit error detection signal connection to TIM1/15/16 Break input.", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "BKPL", + "description": "Backup SRAM2 parity lock This bit is set by software and cleared by a system reset. It can be used to enable and lock the SRAM2 parity error signal connection to TIM1/15/16 Break input.", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "BKPF", + "description": "Backup SRAM2 parity error flag This bit is set by hardware when an SRAM2 parity error is detected. It is cleared by software by writing 1.", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "SPF", + "description": "SRAM1 parity error flag This bit is set by hardware when an SRAM1 parity error is detected. It is cleared by software by writing 1.", + "bit_offset": 8, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE0": { + "description": "SYSCFG interrupt line 0 status register", + "fields": [ + { + "name": "WWDG", + "description": "Window watchdog interrupt pending flag", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE1": { + "description": "SYSCFG interrupt line 1 status register", + "fields": [ + { + "name": "PVDOUT", + "description": "PVD supply monitoring interrupt request pending (EXTI line 16).", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "PVMOUT1", + "description": "V<sub>DDUSB</sub> supply monitoring interrupt request pending (EXTI line 19)", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "PVMOUT3", + "description": "ADC supply monitoring interrupt request pending (EXTI line 20)", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "PVMOUT4", + "description": "DAC supply monitoring interrupt request pending (EXTI line 21)", + "bit_offset": 3, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE10": { + "description": "SYSCFG interrupt line 10 status register", + "fields": [ + { + "name": "DMA1_CH2", + "description": "DMA1 channel 2 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "DMA1_CH3", + "description": "DMA1 channel 3 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE11": { + "description": "SYSCFG interrupt line 11 status register", + "fields": [ + { + "name": "DMAMUX", + "description": "DMAMUX interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "DMA1_CH4", + "description": "DMA1 channel 4 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "DMA1_CH5", + "description": "DMA1 channel 5 interrupt request pending", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "DMA1_CH6", + "description": "DMA1 channel 6 interrupt request pending", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "DMA1_CH7", + "description": "DMA1 channel 7 interrupt request pending", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "DMA2_CH1", + "description": "DMA2 channel 1 interrupt request pending", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "DMA2_CH2", + "description": "DMA2 channel 2 interrupt request pending", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "DMA2_CH3", + "description": "DMA2 channel 3 interrupt request pending", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "DMA2_CH4", + "description": "DMA2 channel 4 interrupt request pending", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "DMA2_CH5", + "description": "DMA2 channel 5 interrupt request pending", + "bit_offset": 9, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE12": { + "description": "SYSCFG interrupt line 12 status register", + "fields": [ + { + "name": "ADC", + "description": "ADC interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "COMP1", + "description": "Comparator 1 interrupt request pending (EXTI line 17)", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "COMP2", + "description": "Comparator 2 interrupt request pending (EXTI line 18)", + "bit_offset": 2, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE13": { + "description": "SYSCFG interrupt line 13 status register", + "fields": [ + { + "name": "TIM1_CCU", + "description": "Timer 1 commutation interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TIM1_TRG", + "description": "Timer 1 trigger interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "TIM1_UPD", + "description": "Timer 1 update interrupt request pending", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "TIM1_BRK", + "description": "Timer 1 break interrupt request pending", + "bit_offset": 3, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE14": { + "description": "SYSCFG interrupt line 14 status register", + "fields": [ + { + "name": "TIM1_CC1", + "description": "Timer 1 capture compare 1 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TIM1_CC2", + "description": "Timer 1 capture compare 2 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "TIM1_CC3", + "description": "Timer 1 capture compare 3 interrupt request pending", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "TIM1_CC4", + "description": "Timer 1 capture compare 4 interrupt request pending", + "bit_offset": 3, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE15": { + "description": "SYSCFG interrupt line 15 status register", + "fields": [ + { + "name": "TIM2", + "description": "Timer 2 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE16": { + "description": "SYSCFG interrupt line 16 status register", + "fields": [ + { + "name": "TIM3", + "description": "Timer 3 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE17": { + "description": "SYSCFG interrupt line 17 status register", + "fields": [ + { + "name": "TIM6", + "description": "Timer 6 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "DAC", + "description": "DAC underrun interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "LPTIM1", + "description": "Low-power timer 1 interrupt request pending (EXTI line 29)", + "bit_offset": 2, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE18": { + "description": "SYSCFG interrupt line 18 status register", + "fields": [ + { + "name": "TIM7", + "description": "Timer 7 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LPTIM2", + "description": "Low-power timer 2 interrupt request pending (EXTI line 30)", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE19": { + "description": "SYSCFG interrupt line 19 status register", + "fields": [ + { + "name": "TIM15", + "description": "Timer 15 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LPTIM3", + "description": "Low-power timer 3 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE2": { + "description": "SYSCFG interrupt line 2 status register", + "fields": [ + { + "name": "TAMP", + "description": "Tamper interrupt request pending (EXTI line 21)", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "RTC", + "description": "RTC interrupt request pending (EXTI line 19)", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE20": { + "description": "SYSCFG interrupt line 20 status register", + "fields": [ + { + "name": "TIM16", + "description": "Timer 16 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE21": { + "description": "SYSCFG interrupt line 21 status register", + "fields": [ + { + "name": "TSC_MCE", + "description": "TSC max count error interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "TSC_EOA", + "description": "TSC end of acquisition interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE22": { + "description": "SYSCFG interrupt line 22 status register", + "fields": [ + { + "name": "LCD", + "description": "LCD interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE23": { + "description": "SYSCFG interrupt line 23 status register", + "fields": [ + { + "name": "I2C1", + "description": "I2C1 interrupt request pending (EXTI line 33)", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE24": { + "description": "SYSCFG interrupt line 24 status register", + "fields": [ + { + "name": "I2C2", + "description": "I2C2 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "I2C4", + "description": "I2C4 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "I2C3", + "description": "I2C3 interrupt request pending (EXTI line 23)", + "bit_offset": 2, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE25": { + "description": "SYSCFG interrupt line 25 status register", + "fields": [ + { + "name": "SPI1", + "description": "SPI1 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE26": { + "description": "SYSCFG interrupt line 26 status register", + "fields": [ + { + "name": "SPI2", + "description": "SPI2 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "SPI3", + "description": "SPI3 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE27": { + "description": "SYSCFG interrupt line 27 status register", + "fields": [ + { + "name": "USART1", + "description": "USART1 interrupt request pending, combined with EXTI line 25", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE28": { + "description": "SYSCFG interrupt line 28 status register", + "fields": [ + { + "name": "USART2", + "description": "USART2 interrupt request pending (EXTI line 35)", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LPUART2", + "description": "LPUART2 interrupt request pending (EXTI line 31)", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE29": { + "description": "SYSCFG interrupt line 29 status register", + "fields": [ + { + "name": "USART3", + "description": "USART3 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LPUART1", + "description": "LPUART1 interrupt request pending (EXTI line 30)", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE3": { + "description": "SYSCFG interrupt line 3 status register", + "fields": [ + { + "name": "FLASH_ITF", + "description": "Flash interface interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "FLASH_ECC", + "description": "Flash interface ECC interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE30": { + "description": "SYSCFG interrupt line 30 status register", + "fields": [ + { + "name": "USART4", + "description": "USART4 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "LPUART3", + "description": "LPUART3 interrupt request pending (EXTI line 32)", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE31": { + "description": "SYSCFG interrupt line 31 status register", + "fields": [ + { + "name": "RNG", + "description": "RNG interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "AES", + "description": "AES interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE4": { + "description": "SYSCFG interrupt line 4 status register", + "fields": [ + { + "name": "RCC", + "description": "Reset and clock control interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "CRS", + "description": "CRS interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE5": { + "description": "SYSCFG interrupt line 5 status register", + "fields": [ + { + "name": "EXTI0", + "description": "EXTI line 0 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "EXTI1", + "description": "EXTI line 1 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE6": { + "description": "SYSCFG interrupt line 6 status register", + "fields": [ + { + "name": "EXTI2", + "description": "EXTI line 2 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "EXTI3", + "description": "EXTI line 3 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE7": { + "description": "SYSCFG interrupt line 7 status register", + "fields": [ + { + "name": "EXTI4", + "description": "EXTI line 4 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "EXTI5", + "description": "EXTI line 5 interrupt request pending", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "EXTI6", + "description": "EXTI line 6 interrupt request pending", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "EXTI7", + "description": "EXTI line 7 interrupt request pending", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "EXTI8", + "description": "EXTI line 8 interrupt request pending", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "EXTI9", + "description": "EXTI line 9 interrupt request pending", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "EXTI10", + "description": "EXTI line 10 interrupt request pending", + "bit_offset": 6, + "bit_size": 1 + }, + { + "name": "EXTI11", + "description": "EXTI line 11 interrupt request pending", + "bit_offset": 7, + "bit_size": 1 + }, + { + "name": "EXTI12", + "description": "EXTI line 12 interrupt request pending", + "bit_offset": 8, + "bit_size": 1 + }, + { + "name": "EXTI13", + "description": "EXTI line 13 interrupt request pending", + "bit_offset": 9, + "bit_size": 1 + }, + { + "name": "EXTI14", + "description": "EXTI line 14 interrupt request pending", + "bit_offset": 10, + "bit_size": 1 + }, + { + "name": "EXTI15", + "description": "EXTI line 15 interrupt request pending", + "bit_offset": 11, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE8": { + "description": "SYSCFG interrupt line 8 status register", + "fields": [ + { + "name": "USB", + "description": "USB interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/ITLINE9": { + "description": "SYSCFG interrupt line 9 status register", + "fields": [ + { + "name": "DMA1_CH1", + "description": "DMA1 channel 1 interrupt request pending", + "bit_offset": 0, + "bit_size": 1 + } + ] + }, + "fieldset/SCSR": { + "description": "SYSCFG SRAM2 control and status register", + "fields": [ + { + "name": "SRAM2ER", + "description": "SRAM2 erase Setting this bit starts a hardware SRAM2 erase operation. This bit is automatically cleared at the end of the SRAM2 erase operation. Note: This bit is write-protected: setting this bit is possible only after the correct key sequence is written in the SYSCFG_SKR register.", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "SRAM2BSY", + "description": "SRAM2 busy by erase operation", + "bit_offset": 1, + "bit_size": 1 + } + ] + }, + "fieldset/SKR": { + "description": "SYSCFG SRAM2 key register", + "fields": [ + { + "name": "KEY", + "description": "SRAM2 write protection key for software erase The following steps are required to unlock the write protection of the SRAM2ER bit in the SYSCFG_CFGR2 register: Write 0xCA into KEY[7:0] Write 0x53 into KEY[7:0] Writing a wrong key reactivates the write protection.", + "bit_offset": 0, + "bit_size": 8 + } + ] + }, + "fieldset/TSCCR": { + "description": "SYSCFG TSC comparator register", + "fields": [ + { + "name": "G2_IO1", + "description": "Comparator mode for group 2 on I/O 1", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "G2_IO3", + "description": "Comparator mode for group 2 on I/O 3", + "bit_offset": 1, + "bit_size": 1 + }, + { + "name": "G4_IO3", + "description": "Comparator mode for group 4 on I/O 3", + "bit_offset": 2, + "bit_size": 1 + }, + { + "name": "G6_IO1", + "description": "Comparator mode for group 6 on I/O 1", + "bit_offset": 3, + "bit_size": 1 + }, + { + "name": "G7_IO1", + "description": "Comparator mode for group 7 on I/O 1", + "bit_offset": 4, + "bit_size": 1 + }, + { + "name": "TSC_IOCTRL", + "description": "I/O control in comparator mode The I/O control in comparator mode can be overwritten by hardware.", + "bit_offset": 5, + "bit_size": 1 + } + ] + }, + "enum/IR_MOD": { + "bit_size": 2, + "variants": [ + { + "name": "TIM16", + "description": "TIM16", + "value": 0 + }, + { + "name": "USART1", + "description": "USART1", + "value": 1 + }, + { + "name": "USART2", + "description": "USART2", + "value": 2 + } + ] + }, + "enum/MEM_MODE": { + "bit_size": 2, + "variants": [ + { + "name": "System_Flash", + "description": "System flash memory mapped at 0x000010000", + "value": 1 + }, + { + "name": "SRAM", + "description": "Embedded SRAM mapped at 0x000010000", + "value": 3 + } + ] + } +} \ No newline at end of file