diff --git a/data/chips/STM32C011D6.json b/data/chips/STM32C011D6.json index b9ba37b..872798b 100644 --- a/data/chips/STM32C011D6.json +++ b/data/chips/STM32C011D6.json @@ -932,7 +932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1199,7 +1199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1291,7 +1291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011F4.json b/data/chips/STM32C011F4.json index 452993b..38ea52d 100644 --- a/data/chips/STM32C011F4.json +++ b/data/chips/STM32C011F4.json @@ -1100,7 +1100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1367,7 +1367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1459,7 +1459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1556,7 +1556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011F6.json b/data/chips/STM32C011F6.json index ce2318c..aaf905a 100644 --- a/data/chips/STM32C011F6.json +++ b/data/chips/STM32C011F6.json @@ -1100,7 +1100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1367,7 +1367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1459,7 +1459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1556,7 +1556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011J4.json b/data/chips/STM32C011J4.json index 2e75fa0..a347285 100644 --- a/data/chips/STM32C011J4.json +++ b/data/chips/STM32C011J4.json @@ -835,7 +835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1057,7 +1057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1144,7 +1144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1231,7 +1231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011J6.json b/data/chips/STM32C011J6.json index d7ea1e5..bf8663a 100644 --- a/data/chips/STM32C011J6.json +++ b/data/chips/STM32C011J6.json @@ -835,7 +835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1057,7 +1057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1144,7 +1144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1231,7 +1231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031C4.json b/data/chips/STM32C031C4.json index 31ac038..e890edd 100644 --- a/data/chips/STM32C031C4.json +++ b/data/chips/STM32C031C4.json @@ -1577,7 +1577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1924,7 +1924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2143,7 +2143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031C6.json b/data/chips/STM32C031C6.json index 8c18596..f478775 100644 --- a/data/chips/STM32C031C6.json +++ b/data/chips/STM32C031C6.json @@ -1577,7 +1577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1924,7 +1924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2143,7 +2143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031F4.json b/data/chips/STM32C031F4.json index c55e100..c3afd10 100644 --- a/data/chips/STM32C031F4.json +++ b/data/chips/STM32C031F4.json @@ -993,7 +993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1260,7 +1260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1352,7 +1352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1449,7 +1449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031F6.json b/data/chips/STM32C031F6.json index 4abefed..56a67c0 100644 --- a/data/chips/STM32C031F6.json +++ b/data/chips/STM32C031F6.json @@ -993,7 +993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1260,7 +1260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1352,7 +1352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1449,7 +1449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031G4.json b/data/chips/STM32C031G4.json index 458eb30..9eda196 100644 --- a/data/chips/STM32C031G4.json +++ b/data/chips/STM32C031G4.json @@ -1118,7 +1118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1415,7 +1415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1517,7 +1517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1619,7 +1619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031G6.json b/data/chips/STM32C031G6.json index 24101b1..d56291f 100644 --- a/data/chips/STM32C031G6.json +++ b/data/chips/STM32C031G6.json @@ -1118,7 +1118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1415,7 +1415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1517,7 +1517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1619,7 +1619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031K4.json b/data/chips/STM32C031K4.json index 1d4beca..4d7e33e 100644 --- a/data/chips/STM32C031K4.json +++ b/data/chips/STM32C031K4.json @@ -1356,7 +1356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1653,7 +1653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1755,7 +1755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031K6.json b/data/chips/STM32C031K6.json index cb352c9..78aa777 100644 --- a/data/chips/STM32C031K6.json +++ b/data/chips/STM32C031K6.json @@ -1356,7 +1356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1653,7 +1653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1755,7 +1755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051C6.json b/data/chips/STM32C051C6.json index 0dd00c4..e54e6a0 100644 --- a/data/chips/STM32C051C6.json +++ b/data/chips/STM32C051C6.json @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2168,7 +2168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2275,7 +2275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2387,7 +2387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2502,7 +2502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051C8.json b/data/chips/STM32C051C8.json index a39871b..3a6d112 100644 --- a/data/chips/STM32C051C8.json +++ b/data/chips/STM32C051C8.json @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2168,7 +2168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2275,7 +2275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2387,7 +2387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2502,7 +2502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051D8.json b/data/chips/STM32C051D8.json index b088da8..9ea5bd0 100644 --- a/data/chips/STM32C051D8.json +++ b/data/chips/STM32C051D8.json @@ -1191,7 +1191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1478,7 +1478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1580,7 +1580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1682,7 +1682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1777,7 +1777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051F6.json b/data/chips/STM32C051F6.json index 5847e2e..fd3f043 100644 --- a/data/chips/STM32C051F6.json +++ b/data/chips/STM32C051F6.json @@ -1216,7 +1216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1503,7 +1503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1605,7 +1605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1707,7 +1707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1802,7 +1802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051F8.json b/data/chips/STM32C051F8.json index 18e72c7..2f2dba6 100644 --- a/data/chips/STM32C051F8.json +++ b/data/chips/STM32C051F8.json @@ -1216,7 +1216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1503,7 +1503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1605,7 +1605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1707,7 +1707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1802,7 +1802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051G6.json b/data/chips/STM32C051G6.json index dbd01ed..af15434 100644 --- a/data/chips/STM32C051G6.json +++ b/data/chips/STM32C051G6.json @@ -1277,7 +1277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1584,7 +1584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1686,7 +1686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1788,7 +1788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1888,7 +1888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051G8.json b/data/chips/STM32C051G8.json index b866309..1df0b0e 100644 --- a/data/chips/STM32C051G8.json +++ b/data/chips/STM32C051G8.json @@ -1277,7 +1277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1584,7 +1584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1686,7 +1686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1788,7 +1788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1888,7 +1888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051K6.json b/data/chips/STM32C051K6.json index 2a83a6e..b6c1fa0 100644 --- a/data/chips/STM32C051K6.json +++ b/data/chips/STM32C051K6.json @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1832,7 +1832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2141,7 +2141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C051K8.json b/data/chips/STM32C051K8.json index d573d7f..50bcdc0 100644 --- a/data/chips/STM32C051K8.json +++ b/data/chips/STM32C051K8.json @@ -1325,7 +1325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1632,7 +1632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1734,7 +1734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1841,7 +1841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1941,7 +1941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071C8.json b/data/chips/STM32C071C8.json index 51f17aa..157e71d 100644 --- a/data/chips/STM32C071C8.json +++ b/data/chips/STM32C071C8.json @@ -2438,7 +2438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2785,7 +2785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3004,7 +3004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071CB.json b/data/chips/STM32C071CB.json index b6342b2..782a58b 100644 --- a/data/chips/STM32C071CB.json +++ b/data/chips/STM32C071CB.json @@ -2438,7 +2438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2785,7 +2785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3004,7 +3004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071F8.json b/data/chips/STM32C071F8.json index 40a4f60..51a8a0c 100644 --- a/data/chips/STM32C071F8.json +++ b/data/chips/STM32C071F8.json @@ -1379,7 +1379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1656,7 +1656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1860,7 +1860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1955,7 +1955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071FB.json b/data/chips/STM32C071FB.json index a095012..758abc4 100644 --- a/data/chips/STM32C071FB.json +++ b/data/chips/STM32C071FB.json @@ -1507,7 +1507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1784,7 +1784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2083,7 +2083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071G8.json b/data/chips/STM32C071G8.json index 5316ca8..9e75f97 100644 --- a/data/chips/STM32C071G8.json +++ b/data/chips/STM32C071G8.json @@ -1483,7 +1483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1780,7 +1780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1984,7 +1984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2084,7 +2084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071GB.json b/data/chips/STM32C071GB.json index c54c897..49fd4be 100644 --- a/data/chips/STM32C071GB.json +++ b/data/chips/STM32C071GB.json @@ -1483,7 +1483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1780,7 +1780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1984,7 +1984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2084,7 +2084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071K8.json b/data/chips/STM32C071K8.json index 2ada5da..54e7bc3 100644 --- a/data/chips/STM32C071K8.json +++ b/data/chips/STM32C071K8.json @@ -1955,7 +1955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2252,7 +2252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2354,7 +2354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2461,7 +2461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2561,7 +2561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071KB.json b/data/chips/STM32C071KB.json index a3ee756..a9a4892 100644 --- a/data/chips/STM32C071KB.json +++ b/data/chips/STM32C071KB.json @@ -1955,7 +1955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2252,7 +2252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2354,7 +2354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2461,7 +2461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2561,7 +2561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071R8.json b/data/chips/STM32C071R8.json index 4e8d203..ff945a5 100644 --- a/data/chips/STM32C071R8.json +++ b/data/chips/STM32C071R8.json @@ -2105,7 +2105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2492,7 +2492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2599,7 +2599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2711,7 +2711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2841,7 +2841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C071RB.json b/data/chips/STM32C071RB.json index 9c063e1..e3c99be 100644 --- a/data/chips/STM32C071RB.json +++ b/data/chips/STM32C071RB.json @@ -2497,7 +2497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2884,7 +2884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2991,7 +2991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3103,7 +3103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3233,7 +3233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091CB.json b/data/chips/STM32C091CB.json index 992e9e9..c196e61 100644 --- a/data/chips/STM32C091CB.json +++ b/data/chips/STM32C091CB.json @@ -1817,7 +1817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2164,7 +2164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -2257,7 +2257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2364,7 +2364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2471,7 +2471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091CC.json b/data/chips/STM32C091CC.json index bf9b2b2..32458c1 100644 --- a/data/chips/STM32C091CC.json +++ b/data/chips/STM32C091CC.json @@ -1817,7 +1817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2164,7 +2164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -2257,7 +2257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2364,7 +2364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2471,7 +2471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091EC.json b/data/chips/STM32C091EC.json index 9a7fa23..a302b45 100644 --- a/data/chips/STM32C091EC.json +++ b/data/chips/STM32C091EC.json @@ -1277,7 +1277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1574,7 +1574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1739,7 +1739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1836,7 +1836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1931,7 +1931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091FB.json b/data/chips/STM32C091FB.json index 37a62b3..0b3fdb1 100644 --- a/data/chips/STM32C091FB.json +++ b/data/chips/STM32C091FB.json @@ -1257,7 +1257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1554,7 +1554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1617,7 +1617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1719,7 +1719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1816,7 +1816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1911,7 +1911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091FC.json b/data/chips/STM32C091FC.json index d8a95b5..ed68733 100644 --- a/data/chips/STM32C091FC.json +++ b/data/chips/STM32C091FC.json @@ -1257,7 +1257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1554,7 +1554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1617,7 +1617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1719,7 +1719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1816,7 +1816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1911,7 +1911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091GB.json b/data/chips/STM32C091GB.json index 9733991..ee6dc21 100644 --- a/data/chips/STM32C091GB.json +++ b/data/chips/STM32C091GB.json @@ -1283,7 +1283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1580,7 +1580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1643,7 +1643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1745,7 +1745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1942,7 +1942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091GC.json b/data/chips/STM32C091GC.json index 54a0f83..f1c49e8 100644 --- a/data/chips/STM32C091GC.json +++ b/data/chips/STM32C091GC.json @@ -1283,7 +1283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1580,7 +1580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1643,7 +1643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1745,7 +1745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1942,7 +1942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091KB.json b/data/chips/STM32C091KB.json index f662241..03075a6 100644 --- a/data/chips/STM32C091KB.json +++ b/data/chips/STM32C091KB.json @@ -1531,7 +1531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1993,7 +1993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2095,7 +2095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091KC.json b/data/chips/STM32C091KC.json index 90b9b74..ee727e2 100644 --- a/data/chips/STM32C091KC.json +++ b/data/chips/STM32C091KC.json @@ -1531,7 +1531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1993,7 +1993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2095,7 +2095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091RB.json b/data/chips/STM32C091RB.json index 9fef614..19cd761 100644 --- a/data/chips/STM32C091RB.json +++ b/data/chips/STM32C091RB.json @@ -1684,7 +1684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -2174,7 +2174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2281,7 +2281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2388,7 +2388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2518,7 +2518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C091RC.json b/data/chips/STM32C091RC.json index e8c9836..72872a2 100644 --- a/data/chips/STM32C091RC.json +++ b/data/chips/STM32C091RC.json @@ -2076,7 +2076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2463,7 +2463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -2566,7 +2566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2673,7 +2673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2780,7 +2780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2910,7 +2910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092CB.json b/data/chips/STM32C092CB.json index 75af477..e9cfbcf 100644 --- a/data/chips/STM32C092CB.json +++ b/data/chips/STM32C092CB.json @@ -2095,7 +2095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -2585,7 +2585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2692,7 +2692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2799,7 +2799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2929,7 +2929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092CC.json b/data/chips/STM32C092CC.json index ab19737..ebcdd3e 100644 --- a/data/chips/STM32C092CC.json +++ b/data/chips/STM32C092CC.json @@ -1912,7 +1912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2259,7 +2259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2459,7 +2459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2566,7 +2566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2681,7 +2681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092EC.json b/data/chips/STM32C092EC.json index 88777ef..0cfdd13 100644 --- a/data/chips/STM32C092EC.json +++ b/data/chips/STM32C092EC.json @@ -1347,7 +1347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1644,7 +1644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1707,7 +1707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1809,7 +1809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1906,7 +1906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092FB.json b/data/chips/STM32C092FB.json index 015a2d2..93e8d61 100644 --- a/data/chips/STM32C092FB.json +++ b/data/chips/STM32C092FB.json @@ -1327,7 +1327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1624,7 +1624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1687,7 +1687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1789,7 +1789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1981,7 +1981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092FC.json b/data/chips/STM32C092FC.json index 50e74ec..0f26621 100644 --- a/data/chips/STM32C092FC.json +++ b/data/chips/STM32C092FC.json @@ -1327,7 +1327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1624,7 +1624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1687,7 +1687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1789,7 +1789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1981,7 +1981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092GB.json b/data/chips/STM32C092GB.json index 69e3bf0..6ec88e3 100644 --- a/data/chips/STM32C092GB.json +++ b/data/chips/STM32C092GB.json @@ -1353,7 +1353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1650,7 +1650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1713,7 +1713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1815,7 +1815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1912,7 +1912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2012,7 +2012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092GC.json b/data/chips/STM32C092GC.json index f70b638..aa8427b 100644 --- a/data/chips/STM32C092GC.json +++ b/data/chips/STM32C092GC.json @@ -1353,7 +1353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1650,7 +1650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1713,7 +1713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1815,7 +1815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1912,7 +1912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2012,7 +2012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092KB.json b/data/chips/STM32C092KB.json index 0bd7440..ea9e61d 100644 --- a/data/chips/STM32C092KB.json +++ b/data/chips/STM32C092KB.json @@ -1606,7 +1606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1903,7 +1903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1966,7 +1966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2068,7 +2068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2170,7 +2170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2270,7 +2270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092KC.json b/data/chips/STM32C092KC.json index 73dea3f..f16955d 100644 --- a/data/chips/STM32C092KC.json +++ b/data/chips/STM32C092KC.json @@ -1606,7 +1606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1903,7 +1903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -1966,7 +1966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2068,7 +2068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2170,7 +2170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2270,7 +2270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092RB.json b/data/chips/STM32C092RB.json index ed6c85e..e603d98 100644 --- a/data/chips/STM32C092RB.json +++ b/data/chips/STM32C092RB.json @@ -1799,7 +1799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -2289,7 +2289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2633,7 +2633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C092RC.json b/data/chips/STM32C092RC.json index 2fcf4ea..2dd95f0 100644 --- a/data/chips/STM32C092RC.json +++ b/data/chips/STM32C092RC.json @@ -2191,7 +2191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2578,7 +2578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "pins": [ { @@ -2681,7 +2681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2788,7 +2788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3025,7 +3025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030C6.json b/data/chips/STM32F030C6.json index 4b80a9c..167b8a4 100644 --- a/data/chips/STM32F030C6.json +++ b/data/chips/STM32F030C6.json @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1496,7 +1496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1579,7 +1579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1662,7 +1662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030C8.json b/data/chips/STM32F030C8.json index 5fd5462..90f5a7b 100644 --- a/data/chips/STM32F030C8.json +++ b/data/chips/STM32F030C8.json @@ -1366,7 +1366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1566,7 +1566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1659,7 +1659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1825,7 +1825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030CC.json b/data/chips/STM32F030CC.json index a40a69b..bb0ae0a 100644 --- a/data/chips/STM32F030CC.json +++ b/data/chips/STM32F030CC.json @@ -1421,7 +1421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1633,7 +1633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1740,7 +1740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1827,7 +1827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1919,7 +1919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030F4.json b/data/chips/STM32F030F4.json index bc65ddb..2856156 100644 --- a/data/chips/STM32F030F4.json +++ b/data/chips/STM32F030F4.json @@ -1005,7 +1005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1165,7 +1165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1233,7 +1233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1306,7 +1306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030K6.json b/data/chips/STM32F030K6.json index f28c71e..5fae835 100644 --- a/data/chips/STM32F030K6.json +++ b/data/chips/STM32F030K6.json @@ -1121,7 +1121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1301,7 +1301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1379,7 +1379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1457,7 +1457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030R8.json b/data/chips/STM32F030R8.json index 0667838..888deb8 100644 --- a/data/chips/STM32F030R8.json +++ b/data/chips/STM32F030R8.json @@ -1486,7 +1486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1686,7 +1686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1779,7 +1779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1945,7 +1945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030RC.json b/data/chips/STM32F030RC.json index 4db46b3..0d09f46 100644 --- a/data/chips/STM32F030RC.json +++ b/data/chips/STM32F030RC.json @@ -1551,7 +1551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1763,7 +1763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1870,7 +1870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1957,7 +1957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031C4.json b/data/chips/STM32F031C4.json index 29b8cb9..d263883 100644 --- a/data/chips/STM32F031C4.json +++ b/data/chips/STM32F031C4.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1598,7 +1598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1681,7 +1681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1808,7 +1808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031C6.json b/data/chips/STM32F031C6.json index 299f45a..bddc738 100644 --- a/data/chips/STM32F031C6.json +++ b/data/chips/STM32F031C6.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1598,7 +1598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1681,7 +1681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1808,7 +1808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031E6.json b/data/chips/STM32F031E6.json index 68e7503..c066db7 100644 --- a/data/chips/STM32F031E6.json +++ b/data/chips/STM32F031E6.json @@ -1062,7 +1062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1232,7 +1232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1310,7 +1310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1490,7 +1490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031F4.json b/data/chips/STM32F031F4.json index eb2ec97..64c3767 100644 --- a/data/chips/STM32F031F4.json +++ b/data/chips/STM32F031F4.json @@ -1004,7 +1004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1164,7 +1164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1232,7 +1232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1305,7 +1305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1407,7 +1407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031F6.json b/data/chips/STM32F031F6.json index 0b225a9..c6614df 100644 --- a/data/chips/STM32F031F6.json +++ b/data/chips/STM32F031F6.json @@ -1004,7 +1004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1164,7 +1164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1232,7 +1232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1305,7 +1305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1407,7 +1407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031G4.json b/data/chips/STM32F031G4.json index cb46ed7..5e40670 100644 --- a/data/chips/STM32F031G4.json +++ b/data/chips/STM32F031G4.json @@ -1116,7 +1116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1286,7 +1286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1364,7 +1364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1442,7 +1442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1559,7 +1559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031G6.json b/data/chips/STM32F031G6.json index 4349556..b1269d2 100644 --- a/data/chips/STM32F031G6.json +++ b/data/chips/STM32F031G6.json @@ -1116,7 +1116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1286,7 +1286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1364,7 +1364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1442,7 +1442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1559,7 +1559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031K4.json b/data/chips/STM32F031K4.json index ae599da..48e37bd 100644 --- a/data/chips/STM32F031K4.json +++ b/data/chips/STM32F031K4.json @@ -1145,7 +1145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1325,7 +1325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1408,7 +1408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1486,7 +1486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1603,7 +1603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031K6.json b/data/chips/STM32F031K6.json index 67db38e..d68fa51 100644 --- a/data/chips/STM32F031K6.json +++ b/data/chips/STM32F031K6.json @@ -1343,7 +1343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1523,7 +1523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1606,7 +1606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1684,7 +1684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1801,7 +1801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038C6.json b/data/chips/STM32F038C6.json index 13b6c17..4ee5f95 100644 --- a/data/chips/STM32F038C6.json +++ b/data/chips/STM32F038C6.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1598,7 +1598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1681,7 +1681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1808,7 +1808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038E6.json b/data/chips/STM32F038E6.json index f660588..50f250b 100644 --- a/data/chips/STM32F038E6.json +++ b/data/chips/STM32F038E6.json @@ -1062,7 +1062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1232,7 +1232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1310,7 +1310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1490,7 +1490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038F6.json b/data/chips/STM32F038F6.json index ecdf002..e8d5d37 100644 --- a/data/chips/STM32F038F6.json +++ b/data/chips/STM32F038F6.json @@ -1000,7 +1000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1150,7 +1150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1218,7 +1218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1291,7 +1291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1393,7 +1393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038G6.json b/data/chips/STM32F038G6.json index 29ad32d..28d4226 100644 --- a/data/chips/STM32F038G6.json +++ b/data/chips/STM32F038G6.json @@ -1112,7 +1112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1272,7 +1272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1350,7 +1350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1428,7 +1428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1545,7 +1545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038K6.json b/data/chips/STM32F038K6.json index 1580af8..1aab6ce 100644 --- a/data/chips/STM32F038K6.json +++ b/data/chips/STM32F038K6.json @@ -1145,7 +1145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1325,7 +1325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1408,7 +1408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1486,7 +1486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1603,7 +1603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042C4.json b/data/chips/STM32F042C4.json index 3dda44a..dd200c5 100644 --- a/data/chips/STM32F042C4.json +++ b/data/chips/STM32F042C4.json @@ -1816,7 +1816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2016,7 +2016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2099,7 +2099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042C6.json b/data/chips/STM32F042C6.json index b30871a..31a5c16 100644 --- a/data/chips/STM32F042C6.json +++ b/data/chips/STM32F042C6.json @@ -1816,7 +1816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2016,7 +2016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2099,7 +2099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042F4.json b/data/chips/STM32F042F4.json index bd1a713..556ae2f 100644 --- a/data/chips/STM32F042F4.json +++ b/data/chips/STM32F042F4.json @@ -1155,7 +1155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1325,7 +1325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1398,7 +1398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1471,7 +1471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1573,7 +1573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042F6.json b/data/chips/STM32F042F6.json index d7a1410..80c1ff1 100644 --- a/data/chips/STM32F042F6.json +++ b/data/chips/STM32F042F6.json @@ -1155,7 +1155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1325,7 +1325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1398,7 +1398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1471,7 +1471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1573,7 +1573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042G4.json b/data/chips/STM32F042G4.json index 073d6b4..c118adc 100644 --- a/data/chips/STM32F042G4.json +++ b/data/chips/STM32F042G4.json @@ -1262,7 +1262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1437,7 +1437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1520,7 +1520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1603,7 +1603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1720,7 +1720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042G6.json b/data/chips/STM32F042G6.json index 02ed3d4..8d95315 100644 --- a/data/chips/STM32F042G6.json +++ b/data/chips/STM32F042G6.json @@ -1262,7 +1262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1437,7 +1437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1520,7 +1520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1603,7 +1603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1720,7 +1720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042K4.json b/data/chips/STM32F042K4.json index ef1e3d1..20fa773 100644 --- a/data/chips/STM32F042K4.json +++ b/data/chips/STM32F042K4.json @@ -1497,7 +1497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1677,7 +1677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1760,7 +1760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1843,7 +1843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1960,7 +1960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042K6.json b/data/chips/STM32F042K6.json index e200e33..cca6689 100644 --- a/data/chips/STM32F042K6.json +++ b/data/chips/STM32F042K6.json @@ -1497,7 +1497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1677,7 +1677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1760,7 +1760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1843,7 +1843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1960,7 +1960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042T6.json b/data/chips/STM32F042T6.json index 340bddc..4e4f66d 100644 --- a/data/chips/STM32F042T6.json +++ b/data/chips/STM32F042T6.json @@ -1347,7 +1347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1610,7 +1610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1693,7 +1693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1810,7 +1810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048C6.json b/data/chips/STM32F048C6.json index 2862f75..0b89ae4 100644 --- a/data/chips/STM32F048C6.json +++ b/data/chips/STM32F048C6.json @@ -1455,7 +1455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1655,7 +1655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1738,7 +1738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1953,7 +1953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048G6.json b/data/chips/STM32F048G6.json index bd78fcc..1b04697 100644 --- a/data/chips/STM32F048G6.json +++ b/data/chips/STM32F048G6.json @@ -1196,7 +1196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1361,7 +1361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1444,7 +1444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1644,7 +1644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048T6.json b/data/chips/STM32F048T6.json index e1a9ce5..a25e219 100644 --- a/data/chips/STM32F048T6.json +++ b/data/chips/STM32F048T6.json @@ -1285,7 +1285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1465,7 +1465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1548,7 +1548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1631,7 +1631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1748,7 +1748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C4.json b/data/chips/STM32F051C4.json index 0f82ba9..5fdce67 100644 --- a/data/chips/STM32F051C4.json +++ b/data/chips/STM32F051C4.json @@ -1743,7 +1743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1943,7 +1943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2036,7 +2036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2329,7 +2329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C6.json b/data/chips/STM32F051C6.json index d708296..243698b 100644 --- a/data/chips/STM32F051C6.json +++ b/data/chips/STM32F051C6.json @@ -1743,7 +1743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1943,7 +1943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2036,7 +2036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2329,7 +2329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C8.json b/data/chips/STM32F051C8.json index 2eff56e..c7a5d6f 100644 --- a/data/chips/STM32F051C8.json +++ b/data/chips/STM32F051C8.json @@ -1863,7 +1863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2239,7 +2239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2449,7 +2449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K4.json b/data/chips/STM32F051K4.json index 964057b..ecfcc20 100644 --- a/data/chips/STM32F051K4.json +++ b/data/chips/STM32F051K4.json @@ -1517,7 +1517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1697,7 +1697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1775,7 +1775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1858,7 +1858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1936,7 +1936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2053,7 +2053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K6.json b/data/chips/STM32F051K6.json index 06a16f5..46250e5 100644 --- a/data/chips/STM32F051K6.json +++ b/data/chips/STM32F051K6.json @@ -1517,7 +1517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1697,7 +1697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1775,7 +1775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1858,7 +1858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1936,7 +1936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2053,7 +2053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K8.json b/data/chips/STM32F051K8.json index 904b6b0..f38a39c 100644 --- a/data/chips/STM32F051K8.json +++ b/data/chips/STM32F051K8.json @@ -1517,7 +1517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1697,7 +1697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1775,7 +1775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1858,7 +1858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1936,7 +1936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2053,7 +2053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R4.json b/data/chips/STM32F051R4.json index f7221c1..638f66d 100644 --- a/data/chips/STM32F051R4.json +++ b/data/chips/STM32F051R4.json @@ -1628,7 +1628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1921,7 +1921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2004,7 +2004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R6.json b/data/chips/STM32F051R6.json index 8ad3b4c..6079851 100644 --- a/data/chips/STM32F051R6.json +++ b/data/chips/STM32F051R6.json @@ -1628,7 +1628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1921,7 +1921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2004,7 +2004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R8.json b/data/chips/STM32F051R8.json index aee3a16..8d4bc26 100644 --- a/data/chips/STM32F051R8.json +++ b/data/chips/STM32F051R8.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2279,7 +2279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2372,7 +2372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2455,7 +2455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2538,7 +2538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2665,7 +2665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051T8.json b/data/chips/STM32F051T8.json index 7b0742d..2b5c6bc 100644 --- a/data/chips/STM32F051T8.json +++ b/data/chips/STM32F051T8.json @@ -1356,7 +1356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1536,7 +1536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1614,7 +1614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1692,7 +1692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1770,7 +1770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1887,7 +1887,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058C8.json b/data/chips/STM32F058C8.json index e7dc521..fd98ae6 100644 --- a/data/chips/STM32F058C8.json +++ b/data/chips/STM32F058C8.json @@ -1569,7 +1569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1769,7 +1769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1945,7 +1945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2028,7 +2028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2155,7 +2155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058R8.json b/data/chips/STM32F058R8.json index c3d30e3..3d006b3 100644 --- a/data/chips/STM32F058R8.json +++ b/data/chips/STM32F058R8.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2279,7 +2279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2372,7 +2372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2455,7 +2455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2538,7 +2538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2665,7 +2665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058T8.json b/data/chips/STM32F058T8.json index 150cd9b..178f460 100644 --- a/data/chips/STM32F058T8.json +++ b/data/chips/STM32F058T8.json @@ -1356,7 +1356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1536,7 +1536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1614,7 +1614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1692,7 +1692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1770,7 +1770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1887,7 +1887,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070C6.json b/data/chips/STM32F070C6.json index 76458b2..dca5de3 100644 --- a/data/chips/STM32F070C6.json +++ b/data/chips/STM32F070C6.json @@ -1270,7 +1270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1470,7 +1470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1553,7 +1553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1641,7 +1641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070CB.json b/data/chips/STM32F070CB.json index 2ae85d7..1d80e0f 100644 --- a/data/chips/STM32F070CB.json +++ b/data/chips/STM32F070CB.json @@ -1382,7 +1382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1586,7 +1586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1689,7 +1689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1772,7 +1772,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1860,7 +1860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070F6.json b/data/chips/STM32F070F6.json index 340862c..6a2d9df 100644 --- a/data/chips/STM32F070F6.json +++ b/data/chips/STM32F070F6.json @@ -1027,7 +1027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1197,7 +1197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1265,7 +1265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1338,7 +1338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070RB.json b/data/chips/STM32F070RB.json index 8b3afd3..e0ceb13 100644 --- a/data/chips/STM32F070RB.json +++ b/data/chips/STM32F070RB.json @@ -1512,7 +1512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1716,7 +1716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1819,7 +1819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1990,7 +1990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071C8.json b/data/chips/STM32F071C8.json index 13c15fa..eeda6c2 100644 --- a/data/chips/STM32F071C8.json +++ b/data/chips/STM32F071C8.json @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2189,7 +2189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2292,7 +2292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2479,7 +2479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2614,7 +2614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071CB.json b/data/chips/STM32F071CB.json index 1a14369..7c45958 100644 --- a/data/chips/STM32F071CB.json +++ b/data/chips/STM32F071CB.json @@ -2283,7 +2283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2499,7 +2499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2789,7 +2789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2924,7 +2924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071RB.json b/data/chips/STM32F071RB.json index 86ad71d..a9cec81 100644 --- a/data/chips/STM32F071RB.json +++ b/data/chips/STM32F071RB.json @@ -1831,7 +1831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2047,7 +2047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2150,7 +2150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2337,7 +2337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2472,7 +2472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071V8.json b/data/chips/STM32F071V8.json index 4ee4c8b..70da5e2 100644 --- a/data/chips/STM32F071V8.json +++ b/data/chips/STM32F071V8.json @@ -2734,7 +2734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2995,7 +2995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3108,7 +3108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3305,7 +3305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3440,7 +3440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071VB.json b/data/chips/STM32F071VB.json index 4ff44b3..095e27c 100644 --- a/data/chips/STM32F071VB.json +++ b/data/chips/STM32F071VB.json @@ -2740,7 +2740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3001,7 +3001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3114,7 +3114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3210,7 +3210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3311,7 +3311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3446,7 +3446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072C8.json b/data/chips/STM32F072C8.json index 9307b90..a731f13 100644 --- a/data/chips/STM32F072C8.json +++ b/data/chips/STM32F072C8.json @@ -2058,7 +2058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2274,7 +2274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2468,7 +2468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2564,7 +2564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2699,7 +2699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072CB.json b/data/chips/STM32F072CB.json index e821f93..0030bb0 100644 --- a/data/chips/STM32F072CB.json +++ b/data/chips/STM32F072CB.json @@ -2356,7 +2356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2572,7 +2572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2675,7 +2675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2766,7 +2766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2862,7 +2862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2997,7 +2997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072R8.json b/data/chips/STM32F072R8.json index d524bfb..0881482 100644 --- a/data/chips/STM32F072R8.json +++ b/data/chips/STM32F072R8.json @@ -1904,7 +1904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2120,7 +2120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2223,7 +2223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2410,7 +2410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2545,7 +2545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072RB.json b/data/chips/STM32F072RB.json index 06594c1..02d9d68 100644 --- a/data/chips/STM32F072RB.json +++ b/data/chips/STM32F072RB.json @@ -2684,7 +2684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2900,7 +2900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3003,7 +3003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3094,7 +3094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3190,7 +3190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072V8.json b/data/chips/STM32F072V8.json index feb1e14..a49bf19 100644 --- a/data/chips/STM32F072V8.json +++ b/data/chips/STM32F072V8.json @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3293,7 +3293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3529,7 +3529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072VB.json b/data/chips/STM32F072VB.json index dc81302..acbeb14 100644 --- a/data/chips/STM32F072VB.json +++ b/data/chips/STM32F072VB.json @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3293,7 +3293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3529,7 +3529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078CB.json b/data/chips/STM32F078CB.json index 573dcab..794cfb3 100644 --- a/data/chips/STM32F078CB.json +++ b/data/chips/STM32F078CB.json @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2511,7 +2511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2614,7 +2614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2801,7 +2801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078RB.json b/data/chips/STM32F078RB.json index a2e5b51..e6bf13d 100644 --- a/data/chips/STM32F078RB.json +++ b/data/chips/STM32F078RB.json @@ -2233,7 +2233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2449,7 +2449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2552,7 +2552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2643,7 +2643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2739,7 +2739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2874,7 +2874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078VB.json b/data/chips/STM32F078VB.json index 057aa9b..e83c3e9 100644 --- a/data/chips/STM32F078VB.json +++ b/data/chips/STM32F078VB.json @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3013,7 +3013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3126,7 +3126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3323,7 +3323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3458,7 +3458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091CB.json b/data/chips/STM32F091CB.json index 60758f0..966e9a7 100644 --- a/data/chips/STM32F091CB.json +++ b/data/chips/STM32F091CB.json @@ -2171,7 +2171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2505,7 +2505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2704,7 +2704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2846,7 +2846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091CC.json b/data/chips/STM32F091CC.json index 28e5486..490ca37 100644 --- a/data/chips/STM32F091CC.json +++ b/data/chips/STM32F091CC.json @@ -2171,7 +2171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2505,7 +2505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2704,7 +2704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2846,7 +2846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091RB.json b/data/chips/STM32F091RB.json index a3ca7e2..708029b 100644 --- a/data/chips/STM32F091RB.json +++ b/data/chips/STM32F091RB.json @@ -2017,7 +2017,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2351,7 +2351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2448,7 +2448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2550,7 +2550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2692,7 +2692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091RC.json b/data/chips/STM32F091RC.json index b9571d1..3a8a389 100644 --- a/data/chips/STM32F091RC.json +++ b/data/chips/STM32F091RC.json @@ -2797,7 +2797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3024,7 +3024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3131,7 +3131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3228,7 +3228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3330,7 +3330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091VB.json b/data/chips/STM32F091VB.json index 07c2c4d..ec44dc7 100644 --- a/data/chips/STM32F091VB.json +++ b/data/chips/STM32F091VB.json @@ -2332,7 +2332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2604,7 +2604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2721,7 +2721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2930,7 +2930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3072,7 +3072,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091VC.json b/data/chips/STM32F091VC.json index 9dd0b50..f174ef4 100644 --- a/data/chips/STM32F091VC.json +++ b/data/chips/STM32F091VC.json @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3427,7 +3427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098CC.json b/data/chips/STM32F098CC.json index 2267460..9dea7ff 100644 --- a/data/chips/STM32F098CC.json +++ b/data/chips/STM32F098CC.json @@ -2171,7 +2171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2505,7 +2505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2704,7 +2704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2846,7 +2846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098RC.json b/data/chips/STM32F098RC.json index b9d26fc..4bb2c2f 100644 --- a/data/chips/STM32F098RC.json +++ b/data/chips/STM32F098RC.json @@ -2797,7 +2797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3024,7 +3024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3131,7 +3131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3228,7 +3228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3330,7 +3330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098VC.json b/data/chips/STM32F098VC.json index d292649..8c548b6 100644 --- a/data/chips/STM32F098VC.json +++ b/data/chips/STM32F098VC.json @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3427,7 +3427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C4.json b/data/chips/STM32F100C4.json index 2c10843..d50ea14 100644 --- a/data/chips/STM32F100C4.json +++ b/data/chips/STM32F100C4.json @@ -1280,7 +1280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1506,7 +1506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1577,7 +1577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1648,7 +1648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1755,7 +1755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C6.json b/data/chips/STM32F100C6.json index ea83381..337499f 100644 --- a/data/chips/STM32F100C6.json +++ b/data/chips/STM32F100C6.json @@ -1280,7 +1280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1506,7 +1506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1577,7 +1577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1648,7 +1648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1755,7 +1755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C8.json b/data/chips/STM32F100C8.json index 00864e2..579730b 100644 --- a/data/chips/STM32F100C8.json +++ b/data/chips/STM32F100C8.json @@ -1390,7 +1390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1529,7 +1529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1616,7 +1616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1687,7 +1687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1865,7 +1865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1956,7 +1956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100CB.json b/data/chips/STM32F100CB.json index c1918bb..6b1d8a3 100644 --- a/data/chips/STM32F100CB.json +++ b/data/chips/STM32F100CB.json @@ -1390,7 +1390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1529,7 +1529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1616,7 +1616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1687,7 +1687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1865,7 +1865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1956,7 +1956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R4.json b/data/chips/STM32F100R4.json index f1d894d..df57311 100644 --- a/data/chips/STM32F100R4.json +++ b/data/chips/STM32F100R4.json @@ -1790,7 +1790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1929,7 +1929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2016,7 +2016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2158,7 +2158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2265,7 +2265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R6.json b/data/chips/STM32F100R6.json index a597f65..10a19ba 100644 --- a/data/chips/STM32F100R6.json +++ b/data/chips/STM32F100R6.json @@ -1790,7 +1790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1929,7 +1929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2016,7 +2016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2158,7 +2158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2265,7 +2265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R8.json b/data/chips/STM32F100R8.json index 7a9334d..6af2346 100644 --- a/data/chips/STM32F100R8.json +++ b/data/chips/STM32F100R8.json @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2126,7 +2126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2197,7 +2197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2375,7 +2375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2486,7 +2486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RB.json b/data/chips/STM32F100RB.json index c7d3f5a..17276af 100644 --- a/data/chips/STM32F100RB.json +++ b/data/chips/STM32F100RB.json @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2126,7 +2126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2197,7 +2197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2375,7 +2375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2486,7 +2486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RC.json b/data/chips/STM32F100RC.json index 03c4ec3..bd9e5eb 100644 --- a/data/chips/STM32F100RC.json +++ b/data/chips/STM32F100RC.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1960,7 +1960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2047,7 +2047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2189,7 +2189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2296,7 +2296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2407,7 +2407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2486,7 +2486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RD.json b/data/chips/STM32F100RD.json index 5abfd27..ff20201 100644 --- a/data/chips/STM32F100RD.json +++ b/data/chips/STM32F100RD.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1960,7 +1960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2047,7 +2047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2189,7 +2189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2296,7 +2296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2407,7 +2407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2486,7 +2486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RE.json b/data/chips/STM32F100RE.json index d7ba487..8464672 100644 --- a/data/chips/STM32F100RE.json +++ b/data/chips/STM32F100RE.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1960,7 +1960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2047,7 +2047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2189,7 +2189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2296,7 +2296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2407,7 +2407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2486,7 +2486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100V8.json b/data/chips/STM32F100V8.json index cc4dae9..9ef83a9 100644 --- a/data/chips/STM32F100V8.json +++ b/data/chips/STM32F100V8.json @@ -1716,7 +1716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1978,7 +1978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2120,7 +2120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2227,7 +2227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2338,7 +2338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VB.json b/data/chips/STM32F100VB.json index d6b5255..a5b8760 100644 --- a/data/chips/STM32F100VB.json +++ b/data/chips/STM32F100VB.json @@ -1716,7 +1716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1978,7 +1978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2120,7 +2120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2227,7 +2227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2338,7 +2338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VC.json b/data/chips/STM32F100VC.json index 26f7657..e6044d9 100644 --- a/data/chips/STM32F100VC.json +++ b/data/chips/STM32F100VC.json @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2500,7 +2500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2571,7 +2571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2642,7 +2642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VD.json b/data/chips/STM32F100VD.json index f878939..d9b5bc1 100644 --- a/data/chips/STM32F100VD.json +++ b/data/chips/STM32F100VD.json @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2500,7 +2500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2571,7 +2571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2642,7 +2642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VE.json b/data/chips/STM32F100VE.json index 6d4d163..30f1e2d 100644 --- a/data/chips/STM32F100VE.json +++ b/data/chips/STM32F100VE.json @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2500,7 +2500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2571,7 +2571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2642,7 +2642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZC.json b/data/chips/STM32F100ZC.json index 5f21c21..e58cf83 100644 --- a/data/chips/STM32F100ZC.json +++ b/data/chips/STM32F100ZC.json @@ -2419,7 +2419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2848,7 +2848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2919,7 +2919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZD.json b/data/chips/STM32F100ZD.json index 218cfe0..8491c17 100644 --- a/data/chips/STM32F100ZD.json +++ b/data/chips/STM32F100ZD.json @@ -2419,7 +2419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2848,7 +2848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2919,7 +2919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZE.json b/data/chips/STM32F100ZE.json index cddc5cd..cf3681a 100644 --- a/data/chips/STM32F100ZE.json +++ b/data/chips/STM32F100ZE.json @@ -2419,7 +2419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2848,7 +2848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2919,7 +2919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C4.json b/data/chips/STM32F101C4.json index e3931c7..87bbce5 100644 --- a/data/chips/STM32F101C4.json +++ b/data/chips/STM32F101C4.json @@ -1191,7 +1191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1298,7 +1298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C6.json b/data/chips/STM32F101C6.json index 7137ae7..1feaf88 100644 --- a/data/chips/STM32F101C6.json +++ b/data/chips/STM32F101C6.json @@ -1197,7 +1197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1304,7 +1304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C8.json b/data/chips/STM32F101C8.json index f2067af..46af904 100644 --- a/data/chips/STM32F101C8.json +++ b/data/chips/STM32F101C8.json @@ -1622,7 +1622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1729,7 +1729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1820,7 +1820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101CB.json b/data/chips/STM32F101CB.json index e198538..6632154 100644 --- a/data/chips/STM32F101CB.json +++ b/data/chips/STM32F101CB.json @@ -1616,7 +1616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1723,7 +1723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R4.json b/data/chips/STM32F101R4.json index b6b9cc6..a8d1fb8 100644 --- a/data/chips/STM32F101R4.json +++ b/data/chips/STM32F101R4.json @@ -1317,7 +1317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1424,7 +1424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R6.json b/data/chips/STM32F101R6.json index 410da38..e6c690e 100644 --- a/data/chips/STM32F101R6.json +++ b/data/chips/STM32F101R6.json @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1430,7 +1430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R8.json b/data/chips/STM32F101R8.json index 62f6aa2..c904528 100644 --- a/data/chips/STM32F101R8.json +++ b/data/chips/STM32F101R8.json @@ -1454,7 +1454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1561,7 +1561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1672,7 +1672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RB.json b/data/chips/STM32F101RB.json index 18eabe8..0b274f8 100644 --- a/data/chips/STM32F101RB.json +++ b/data/chips/STM32F101RB.json @@ -1844,7 +1844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1951,7 +1951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2062,7 +2062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RC.json b/data/chips/STM32F101RC.json index f5d910b..676c748 100644 --- a/data/chips/STM32F101RC.json +++ b/data/chips/STM32F101RC.json @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1744,7 +1744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RD.json b/data/chips/STM32F101RD.json index 570a9ac..aa5a755 100644 --- a/data/chips/STM32F101RD.json +++ b/data/chips/STM32F101RD.json @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1744,7 +1744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RE.json b/data/chips/STM32F101RE.json index 5c0d390..63f1f48 100644 --- a/data/chips/STM32F101RE.json +++ b/data/chips/STM32F101RE.json @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1744,7 +1744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RF.json b/data/chips/STM32F101RF.json index 390a535..7d535c4 100644 --- a/data/chips/STM32F101RF.json +++ b/data/chips/STM32F101RF.json @@ -1903,7 +1903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2121,7 +2121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2200,7 +2200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RG.json b/data/chips/STM32F101RG.json index 50d3b64..1374f20 100644 --- a/data/chips/STM32F101RG.json +++ b/data/chips/STM32F101RG.json @@ -1885,7 +1885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2103,7 +2103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2182,7 +2182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T4.json b/data/chips/STM32F101T4.json index 2d3b308..23ca09e 100644 --- a/data/chips/STM32F101T4.json +++ b/data/chips/STM32F101T4.json @@ -1093,7 +1093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1192,7 +1192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T6.json b/data/chips/STM32F101T6.json index f775399..263eda6 100644 --- a/data/chips/STM32F101T6.json +++ b/data/chips/STM32F101T6.json @@ -1093,7 +1093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1192,7 +1192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T8.json b/data/chips/STM32F101T8.json index 945bf95..bc4f818 100644 --- a/data/chips/STM32F101T8.json +++ b/data/chips/STM32F101T8.json @@ -1120,7 +1120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1310,7 +1310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101TB.json b/data/chips/STM32F101TB.json index 51278a7..1fbd14e 100644 --- a/data/chips/STM32F101TB.json +++ b/data/chips/STM32F101TB.json @@ -1108,7 +1108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1207,7 +1207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1298,7 +1298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101V8.json b/data/chips/STM32F101V8.json index 1f4715b..97da698 100644 --- a/data/chips/STM32F101V8.json +++ b/data/chips/STM32F101V8.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1761,7 +1761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1872,7 +1872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VB.json b/data/chips/STM32F101VB.json index 249441e..58802be 100644 --- a/data/chips/STM32F101VB.json +++ b/data/chips/STM32F101VB.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1761,7 +1761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1872,7 +1872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VC.json b/data/chips/STM32F101VC.json index 3a8468b..c992a72 100644 --- a/data/chips/STM32F101VC.json +++ b/data/chips/STM32F101VC.json @@ -2066,7 +2066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2173,7 +2173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VD.json b/data/chips/STM32F101VD.json index 63211e2..39001be 100644 --- a/data/chips/STM32F101VD.json +++ b/data/chips/STM32F101VD.json @@ -2066,7 +2066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2173,7 +2173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VE.json b/data/chips/STM32F101VE.json index 24c1195..7844586 100644 --- a/data/chips/STM32F101VE.json +++ b/data/chips/STM32F101VE.json @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2167,7 +2167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VF.json b/data/chips/STM32F101VF.json index d02cc94..cf7fb4a 100644 --- a/data/chips/STM32F101VF.json +++ b/data/chips/STM32F101VF.json @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VG.json b/data/chips/STM32F101VG.json index 194fb07..5647769 100644 --- a/data/chips/STM32F101VG.json +++ b/data/chips/STM32F101VG.json @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZC.json b/data/chips/STM32F101ZC.json index 3b6cec9..e03cd26 100644 --- a/data/chips/STM32F101ZC.json +++ b/data/chips/STM32F101ZC.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZD.json b/data/chips/STM32F101ZD.json index 41c6bf9..a5f8dc0 100644 --- a/data/chips/STM32F101ZD.json +++ b/data/chips/STM32F101ZD.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZE.json b/data/chips/STM32F101ZE.json index 6768e72..eda2ac2 100644 --- a/data/chips/STM32F101ZE.json +++ b/data/chips/STM32F101ZE.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZF.json b/data/chips/STM32F101ZF.json index 906e4ab..7cb56fa 100644 --- a/data/chips/STM32F101ZF.json +++ b/data/chips/STM32F101ZF.json @@ -2698,7 +2698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2916,7 +2916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZG.json b/data/chips/STM32F101ZG.json index 788862f..04400d5 100644 --- a/data/chips/STM32F101ZG.json +++ b/data/chips/STM32F101ZG.json @@ -2722,7 +2722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2829,7 +2829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2940,7 +2940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3039,7 +3039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C4.json b/data/chips/STM32F102C4.json index c753585..c194018 100644 --- a/data/chips/STM32F102C4.json +++ b/data/chips/STM32F102C4.json @@ -1191,7 +1191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1298,7 +1298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C6.json b/data/chips/STM32F102C6.json index 9148317..1ca87d9 100644 --- a/data/chips/STM32F102C6.json +++ b/data/chips/STM32F102C6.json @@ -1191,7 +1191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1298,7 +1298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C8.json b/data/chips/STM32F102C8.json index 4a08e86..139ba36 100644 --- a/data/chips/STM32F102C8.json +++ b/data/chips/STM32F102C8.json @@ -1301,7 +1301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1408,7 +1408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1499,7 +1499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102CB.json b/data/chips/STM32F102CB.json index 42dd9c2..6b2794d 100644 --- a/data/chips/STM32F102CB.json +++ b/data/chips/STM32F102CB.json @@ -1301,7 +1301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1408,7 +1408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1499,7 +1499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R4.json b/data/chips/STM32F102R4.json index ed53f41..3b7d7bf 100644 --- a/data/chips/STM32F102R4.json +++ b/data/chips/STM32F102R4.json @@ -1311,7 +1311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1418,7 +1418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R6.json b/data/chips/STM32F102R6.json index 314c0fc..c1b85b4 100644 --- a/data/chips/STM32F102R6.json +++ b/data/chips/STM32F102R6.json @@ -1311,7 +1311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1418,7 +1418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R8.json b/data/chips/STM32F102R8.json index 2076d11..e5efd3c 100644 --- a/data/chips/STM32F102R8.json +++ b/data/chips/STM32F102R8.json @@ -1421,7 +1421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1528,7 +1528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1639,7 +1639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102RB.json b/data/chips/STM32F102RB.json index daa9292..d9fa9d9 100644 --- a/data/chips/STM32F102RB.json +++ b/data/chips/STM32F102RB.json @@ -1421,7 +1421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1528,7 +1528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1639,7 +1639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C4.json b/data/chips/STM32F103C4.json index 8abb114..be447c8 100644 --- a/data/chips/STM32F103C4.json +++ b/data/chips/STM32F103C4.json @@ -1317,7 +1317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1444,7 +1444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1551,7 +1551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C6.json b/data/chips/STM32F103C6.json index b348f90..89d32dc 100644 --- a/data/chips/STM32F103C6.json +++ b/data/chips/STM32F103C6.json @@ -1617,7 +1617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1744,7 +1744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1851,7 +1851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C8.json b/data/chips/STM32F103C8.json index 5e50d5a..44787b6 100644 --- a/data/chips/STM32F103C8.json +++ b/data/chips/STM32F103C8.json @@ -1454,7 +1454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1581,7 +1581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1688,7 +1688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1779,7 +1779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103CB.json b/data/chips/STM32F103CB.json index 8efc7c1..6d90d1d 100644 --- a/data/chips/STM32F103CB.json +++ b/data/chips/STM32F103CB.json @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1869,7 +1869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1976,7 +1976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R4.json b/data/chips/STM32F103R4.json index 8cbd6e1..27f2dbd 100644 --- a/data/chips/STM32F103R4.json +++ b/data/chips/STM32F103R4.json @@ -1851,7 +1851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1978,7 +1978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R6.json b/data/chips/STM32F103R6.json index dddf16d..c74defb 100644 --- a/data/chips/STM32F103R6.json +++ b/data/chips/STM32F103R6.json @@ -1857,7 +1857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1984,7 +1984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2091,7 +2091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R8.json b/data/chips/STM32F103R8.json index fd4f6a7..87610de 100644 --- a/data/chips/STM32F103R8.json +++ b/data/chips/STM32F103R8.json @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2115,7 +2115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2222,7 +2222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2333,7 +2333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103RB.json b/data/chips/STM32F103RB.json index 4fdfe62..182778a 100644 --- a/data/chips/STM32F103RB.json +++ b/data/chips/STM32F103RB.json @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2115,7 +2115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2222,7 +2222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2333,7 +2333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103RC.json b/data/chips/STM32F103RC.json index 5c9a127..0b9701f 100644 --- a/data/chips/STM32F103RC.json +++ b/data/chips/STM32F103RC.json @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2462,7 +2462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2569,7 +2569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2680,7 +2680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2759,7 +2759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2944,7 +2944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RD.json b/data/chips/STM32F103RD.json index ec5a723..59e105c 100644 --- a/data/chips/STM32F103RD.json +++ b/data/chips/STM32F103RD.json @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2462,7 +2462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2569,7 +2569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2680,7 +2680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2759,7 +2759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2944,7 +2944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RE.json b/data/chips/STM32F103RE.json index abc8f0b..e2ece05 100644 --- a/data/chips/STM32F103RE.json +++ b/data/chips/STM32F103RE.json @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2462,7 +2462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2569,7 +2569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2680,7 +2680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2759,7 +2759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2944,7 +2944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RF.json b/data/chips/STM32F103RF.json index 368f423..af0ff4b 100644 --- a/data/chips/STM32F103RF.json +++ b/data/chips/STM32F103RF.json @@ -1950,7 +1950,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2326,7 +2326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2433,7 +2433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2544,7 +2544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2623,7 +2623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RG.json b/data/chips/STM32F103RG.json index 04b1e24..658c036 100644 --- a/data/chips/STM32F103RG.json +++ b/data/chips/STM32F103RG.json @@ -1950,7 +1950,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2326,7 +2326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2433,7 +2433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2544,7 +2544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2623,7 +2623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103T4.json b/data/chips/STM32F103T4.json index 9a9ce20..3f96bb4 100644 --- a/data/chips/STM32F103T4.json +++ b/data/chips/STM32F103T4.json @@ -1211,7 +1211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1322,7 +1322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1421,7 +1421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103T6.json b/data/chips/STM32F103T6.json index efb0280..8f95a92 100644 --- a/data/chips/STM32F103T6.json +++ b/data/chips/STM32F103T6.json @@ -1211,7 +1211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1322,7 +1322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1421,7 +1421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103T8.json b/data/chips/STM32F103T8.json index 29f6acf..3237439 100644 --- a/data/chips/STM32F103T8.json +++ b/data/chips/STM32F103T8.json @@ -1232,7 +1232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1343,7 +1343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1442,7 +1442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1533,7 +1533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103TB.json b/data/chips/STM32F103TB.json index fdefc78..9650244 100644 --- a/data/chips/STM32F103TB.json +++ b/data/chips/STM32F103TB.json @@ -1226,7 +1226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1337,7 +1337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1436,7 +1436,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103V8.json b/data/chips/STM32F103V8.json index 0fb9bb5..89aa6f1 100644 --- a/data/chips/STM32F103V8.json +++ b/data/chips/STM32F103V8.json @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2579,7 +2579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2686,7 +2686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2797,7 +2797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103VB.json b/data/chips/STM32F103VB.json index e457184..7a46f9e 100644 --- a/data/chips/STM32F103VB.json +++ b/data/chips/STM32F103VB.json @@ -3020,7 +3020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3183,7 +3183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3290,7 +3290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103VC.json b/data/chips/STM32F103VC.json index b2420fc..fc449ec 100644 --- a/data/chips/STM32F103VC.json +++ b/data/chips/STM32F103VC.json @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3155,7 +3155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3373,7 +3373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3657,7 +3657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VD.json b/data/chips/STM32F103VD.json index 3fd61b9..98086a2 100644 --- a/data/chips/STM32F103VD.json +++ b/data/chips/STM32F103VD.json @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3155,7 +3155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3373,7 +3373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3657,7 +3657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VE.json b/data/chips/STM32F103VE.json index 8596aaa..91cbd9e 100644 --- a/data/chips/STM32F103VE.json +++ b/data/chips/STM32F103VE.json @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3155,7 +3155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3373,7 +3373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3657,7 +3657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VF.json b/data/chips/STM32F103VF.json index d0b971d..8ab047b 100644 --- a/data/chips/STM32F103VF.json +++ b/data/chips/STM32F103VF.json @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2912,7 +2912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3023,7 +3023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VG.json b/data/chips/STM32F103VG.json index 44d5db7..fb2e50b 100644 --- a/data/chips/STM32F103VG.json +++ b/data/chips/STM32F103VG.json @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2912,7 +2912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3023,7 +3023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZC.json b/data/chips/STM32F103ZC.json index e309a22..8df25b5 100644 --- a/data/chips/STM32F103ZC.json +++ b/data/chips/STM32F103ZC.json @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3831,7 +3831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4049,7 +4049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4148,7 +4148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZD.json b/data/chips/STM32F103ZD.json index 8316813..bd73969 100644 --- a/data/chips/STM32F103ZD.json +++ b/data/chips/STM32F103ZD.json @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3831,7 +3831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4049,7 +4049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4148,7 +4148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZE.json b/data/chips/STM32F103ZE.json index 521cb59..9025166 100644 --- a/data/chips/STM32F103ZE.json +++ b/data/chips/STM32F103ZE.json @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3831,7 +3831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4049,7 +4049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4148,7 +4148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZF.json b/data/chips/STM32F103ZF.json index e1a8ac4..fb67895 100644 --- a/data/chips/STM32F103ZF.json +++ b/data/chips/STM32F103ZF.json @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4208,7 +4208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4319,7 +4319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4418,7 +4418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZG.json b/data/chips/STM32F103ZG.json index a3fba6d..4e3afd2 100644 --- a/data/chips/STM32F103ZG.json +++ b/data/chips/STM32F103ZG.json @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4208,7 +4208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4319,7 +4319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4418,7 +4418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F105R8.json b/data/chips/STM32F105R8.json index e566a46..d5a4e5b 100644 --- a/data/chips/STM32F105R8.json +++ b/data/chips/STM32F105R8.json @@ -1844,7 +1844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2078,7 +2078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2189,7 +2189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105RB.json b/data/chips/STM32F105RB.json index 9e11f2f..38bcfd4 100644 --- a/data/chips/STM32F105RB.json +++ b/data/chips/STM32F105RB.json @@ -1844,7 +1844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2078,7 +2078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2189,7 +2189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105RC.json b/data/chips/STM32F105RC.json index f6ca42e..9a4dc57 100644 --- a/data/chips/STM32F105RC.json +++ b/data/chips/STM32F105RC.json @@ -1844,7 +1844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2078,7 +2078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2189,7 +2189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105V8.json b/data/chips/STM32F105V8.json index b01298b..73302d2 100644 --- a/data/chips/STM32F105V8.json +++ b/data/chips/STM32F105V8.json @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2932,7 +2932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3043,7 +3043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3142,7 +3142,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105VB.json b/data/chips/STM32F105VB.json index 2a58a4e..ee5b6d7 100644 --- a/data/chips/STM32F105VB.json +++ b/data/chips/STM32F105VB.json @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2932,7 +2932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3043,7 +3043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3142,7 +3142,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105VC.json b/data/chips/STM32F105VC.json index dba9efb..8e97094 100644 --- a/data/chips/STM32F105VC.json +++ b/data/chips/STM32F105VC.json @@ -2058,7 +2058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2439,7 +2439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2538,7 +2538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107RB.json b/data/chips/STM32F107RB.json index 466dcb7..093009d 100644 --- a/data/chips/STM32F107RB.json +++ b/data/chips/STM32F107RB.json @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2029,7 +2029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2136,7 +2136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2247,7 +2247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2326,7 +2326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107RC.json b/data/chips/STM32F107RC.json index 7929101..6b0ea91 100644 --- a/data/chips/STM32F107RC.json +++ b/data/chips/STM32F107RC.json @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2029,7 +2029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2136,7 +2136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2247,7 +2247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2326,7 +2326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107VB.json b/data/chips/STM32F107VB.json index 73d0c04..015082a 100644 --- a/data/chips/STM32F107VB.json +++ b/data/chips/STM32F107VB.json @@ -2140,7 +2140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2410,7 +2410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2620,7 +2620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107VC.json b/data/chips/STM32F107VC.json index 750ee3d..5726773 100644 --- a/data/chips/STM32F107VC.json +++ b/data/chips/STM32F107VC.json @@ -2744,7 +2744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2907,7 +2907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3014,7 +3014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3125,7 +3125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3224,7 +3224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F205RB.json b/data/chips/STM32F205RB.json index ac7cbaa..1567dda 100644 --- a/data/chips/STM32F205RB.json +++ b/data/chips/STM32F205RB.json @@ -2387,7 +2387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2814,7 +2814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2956,7 +2956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3088,7 +3088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3175,7 +3175,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3392,7 +3392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RC.json b/data/chips/STM32F205RC.json index 16e9a8c..8b115b0 100644 --- a/data/chips/STM32F205RC.json +++ b/data/chips/STM32F205RC.json @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2836,7 +2836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2978,7 +2978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3110,7 +3110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3414,7 +3414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RE.json b/data/chips/STM32F205RE.json index 0cede57..8fd87e2 100644 --- a/data/chips/STM32F205RE.json +++ b/data/chips/STM32F205RE.json @@ -2800,7 +2800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3227,7 +3227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3369,7 +3369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3501,7 +3501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3588,7 +3588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RF.json b/data/chips/STM32F205RF.json index 7f850c6..5f1b1f3 100644 --- a/data/chips/STM32F205RF.json +++ b/data/chips/STM32F205RF.json @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3099,7 +3099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3186,7 +3186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3403,7 +3403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RG.json b/data/chips/STM32F205RG.json index 9c073b5..0dbdc3e 100644 --- a/data/chips/STM32F205RG.json +++ b/data/chips/STM32F205RG.json @@ -3202,7 +3202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3629,7 +3629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3771,7 +3771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3903,7 +3903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3990,7 +3990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VB.json b/data/chips/STM32F205VB.json index 613539f..0b55650 100644 --- a/data/chips/STM32F205VB.json +++ b/data/chips/STM32F205VB.json @@ -2897,7 +2897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3369,7 +3369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3511,7 +3511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3643,7 +3643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3755,7 +3755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3972,7 +3972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VC.json b/data/chips/STM32F205VC.json index 02511bd..10996fe 100644 --- a/data/chips/STM32F205VC.json +++ b/data/chips/STM32F205VC.json @@ -2919,7 +2919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3391,7 +3391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3665,7 +3665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3777,7 +3777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3994,7 +3994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VE.json b/data/chips/STM32F205VE.json index 4cd6dc1..01609d2 100644 --- a/data/chips/STM32F205VE.json +++ b/data/chips/STM32F205VE.json @@ -2908,7 +2908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3380,7 +3380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3522,7 +3522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3654,7 +3654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3766,7 +3766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3983,7 +3983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VF.json b/data/chips/STM32F205VF.json index a43f31a..87ed81a 100644 --- a/data/chips/STM32F205VF.json +++ b/data/chips/STM32F205VF.json @@ -2908,7 +2908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3380,7 +3380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3522,7 +3522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3654,7 +3654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3766,7 +3766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3983,7 +3983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VG.json b/data/chips/STM32F205VG.json index 6045de7..2b1ad5b 100644 --- a/data/chips/STM32F205VG.json +++ b/data/chips/STM32F205VG.json @@ -2908,7 +2908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3380,7 +3380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3522,7 +3522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3654,7 +3654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3766,7 +3766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3983,7 +3983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZC.json b/data/chips/STM32F205ZC.json index 88a8fc5..cca801a 100644 --- a/data/chips/STM32F205ZC.json +++ b/data/chips/STM32F205ZC.json @@ -3385,7 +3385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3877,7 +3877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4019,7 +4019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4151,7 +4151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4480,7 +4480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZE.json b/data/chips/STM32F205ZE.json index 861a273..fc0d9d7 100644 --- a/data/chips/STM32F205ZE.json +++ b/data/chips/STM32F205ZE.json @@ -3374,7 +3374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3866,7 +3866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4008,7 +4008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4140,7 +4140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4469,7 +4469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZF.json b/data/chips/STM32F205ZF.json index 43e90f2..c032453 100644 --- a/data/chips/STM32F205ZF.json +++ b/data/chips/STM32F205ZF.json @@ -3374,7 +3374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3866,7 +3866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4008,7 +4008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4140,7 +4140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4469,7 +4469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZG.json b/data/chips/STM32F205ZG.json index 201b22a..b3163da 100644 --- a/data/chips/STM32F205ZG.json +++ b/data/chips/STM32F205ZG.json @@ -3374,7 +3374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3866,7 +3866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4008,7 +4008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4140,7 +4140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4469,7 +4469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IC.json b/data/chips/STM32F207IC.json index 1d6a9a5..2add8ef 100644 --- a/data/chips/STM32F207IC.json +++ b/data/chips/STM32F207IC.json @@ -5288,7 +5288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5790,7 +5790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5932,7 +5932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6064,7 +6064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6176,7 +6176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6413,7 +6413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IE.json b/data/chips/STM32F207IE.json index ce5d133..26a8158 100644 --- a/data/chips/STM32F207IE.json +++ b/data/chips/STM32F207IE.json @@ -5277,7 +5277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5779,7 +5779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5921,7 +5921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6053,7 +6053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6402,7 +6402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IF.json b/data/chips/STM32F207IF.json index c6db925..395765d 100644 --- a/data/chips/STM32F207IF.json +++ b/data/chips/STM32F207IF.json @@ -5277,7 +5277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5779,7 +5779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5921,7 +5921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6053,7 +6053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6402,7 +6402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IG.json b/data/chips/STM32F207IG.json index d207791..7186c5d 100644 --- a/data/chips/STM32F207IG.json +++ b/data/chips/STM32F207IG.json @@ -5277,7 +5277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5779,7 +5779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5921,7 +5921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6053,7 +6053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6402,7 +6402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VC.json b/data/chips/STM32F207VC.json index 4c0c845..79c58c0 100644 --- a/data/chips/STM32F207VC.json +++ b/data/chips/STM32F207VC.json @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3680,7 +3680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3822,7 +3822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3954,7 +3954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4066,7 +4066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VE.json b/data/chips/STM32F207VE.json index 6ac65e0..4e531b7 100644 --- a/data/chips/STM32F207VE.json +++ b/data/chips/STM32F207VE.json @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3669,7 +3669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3811,7 +3811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4055,7 +4055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4272,7 +4272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VF.json b/data/chips/STM32F207VF.json index d0c14c6..181877e 100644 --- a/data/chips/STM32F207VF.json +++ b/data/chips/STM32F207VF.json @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3669,7 +3669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3811,7 +3811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4055,7 +4055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4272,7 +4272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VG.json b/data/chips/STM32F207VG.json index 224f366..2c66822 100644 --- a/data/chips/STM32F207VG.json +++ b/data/chips/STM32F207VG.json @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3669,7 +3669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3811,7 +3811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4055,7 +4055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4272,7 +4272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZC.json b/data/chips/STM32F207ZC.json index 2b6f698..9b21e12 100644 --- a/data/chips/STM32F207ZC.json +++ b/data/chips/STM32F207ZC.json @@ -3704,7 +3704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4196,7 +4196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4338,7 +4338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4470,7 +4470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4799,7 +4799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZE.json b/data/chips/STM32F207ZE.json index 56bb6c8..54d1a87 100644 --- a/data/chips/STM32F207ZE.json +++ b/data/chips/STM32F207ZE.json @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4185,7 +4185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4327,7 +4327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4571,7 +4571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZF.json b/data/chips/STM32F207ZF.json index 5a42ef9..0485af1 100644 --- a/data/chips/STM32F207ZF.json +++ b/data/chips/STM32F207ZF.json @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4185,7 +4185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4327,7 +4327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4571,7 +4571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZG.json b/data/chips/STM32F207ZG.json index 9537255..8c799e4 100644 --- a/data/chips/STM32F207ZG.json +++ b/data/chips/STM32F207ZG.json @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4185,7 +4185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4327,7 +4327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4571,7 +4571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215RE.json b/data/chips/STM32F215RE.json index 9c3c333..6718031 100644 --- a/data/chips/STM32F215RE.json +++ b/data/chips/STM32F215RE.json @@ -2467,7 +2467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3036,7 +3036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3168,7 +3168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3255,7 +3255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215RG.json b/data/chips/STM32F215RG.json index 772f511..e17c82f 100644 --- a/data/chips/STM32F215RG.json +++ b/data/chips/STM32F215RG.json @@ -2467,7 +2467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3036,7 +3036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3168,7 +3168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3255,7 +3255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215VE.json b/data/chips/STM32F215VE.json index 982df3c..76f7d30 100644 --- a/data/chips/STM32F215VE.json +++ b/data/chips/STM32F215VE.json @@ -2977,7 +2977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3449,7 +3449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3591,7 +3591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3723,7 +3723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4052,7 +4052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215VG.json b/data/chips/STM32F215VG.json index 110e1e2..8361e4b 100644 --- a/data/chips/STM32F215VG.json +++ b/data/chips/STM32F215VG.json @@ -2977,7 +2977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3449,7 +3449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3591,7 +3591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3723,7 +3723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4052,7 +4052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215ZE.json b/data/chips/STM32F215ZE.json index 7649f7f..3374bf5 100644 --- a/data/chips/STM32F215ZE.json +++ b/data/chips/STM32F215ZE.json @@ -3443,7 +3443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3935,7 +3935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4077,7 +4077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4209,7 +4209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4538,7 +4538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215ZG.json b/data/chips/STM32F215ZG.json index 2de0088..ecb0fd5 100644 --- a/data/chips/STM32F215ZG.json +++ b/data/chips/STM32F215ZG.json @@ -3443,7 +3443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3935,7 +3935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4077,7 +4077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4209,7 +4209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4538,7 +4538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217IE.json b/data/chips/STM32F217IE.json index 4941565..74b314c 100644 --- a/data/chips/STM32F217IE.json +++ b/data/chips/STM32F217IE.json @@ -5346,7 +5346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5848,7 +5848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5990,7 +5990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6122,7 +6122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6234,7 +6234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6471,7 +6471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217IG.json b/data/chips/STM32F217IG.json index 320569d..5fa1fdc 100644 --- a/data/chips/STM32F217IG.json +++ b/data/chips/STM32F217IG.json @@ -5346,7 +5346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5848,7 +5848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5990,7 +5990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6122,7 +6122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6234,7 +6234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6471,7 +6471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217VE.json b/data/chips/STM32F217VE.json index 89e184a..f721397 100644 --- a/data/chips/STM32F217VE.json +++ b/data/chips/STM32F217VE.json @@ -3266,7 +3266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3738,7 +3738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4012,7 +4012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4124,7 +4124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4341,7 +4341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217VG.json b/data/chips/STM32F217VG.json index e3ba026..4c7c8ea 100644 --- a/data/chips/STM32F217VG.json +++ b/data/chips/STM32F217VG.json @@ -3266,7 +3266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3738,7 +3738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4012,7 +4012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4124,7 +4124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4341,7 +4341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217ZE.json b/data/chips/STM32F217ZE.json index fa713fc..a647938 100644 --- a/data/chips/STM32F217ZE.json +++ b/data/chips/STM32F217ZE.json @@ -3762,7 +3762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4396,7 +4396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4528,7 +4528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4640,7 +4640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4857,7 +4857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217ZG.json b/data/chips/STM32F217ZG.json index 55cbf17..28a4593 100644 --- a/data/chips/STM32F217ZG.json +++ b/data/chips/STM32F217ZG.json @@ -3762,7 +3762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4396,7 +4396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4528,7 +4528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4640,7 +4640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4857,7 +4857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F301C6.json b/data/chips/STM32F301C6.json index 9d1554d..104587a 100644 --- a/data/chips/STM32F301C6.json +++ b/data/chips/STM32F301C6.json @@ -1730,7 +1730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1913,7 +1913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2115,7 +2115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301C8.json b/data/chips/STM32F301C8.json index fb5a5ac..1dbf523 100644 --- a/data/chips/STM32F301C8.json +++ b/data/chips/STM32F301C8.json @@ -2034,7 +2034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2217,7 +2217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2318,7 +2318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2419,7 +2419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2515,7 +2515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301K6.json b/data/chips/STM32F301K6.json index 17ec480..95a5816 100644 --- a/data/chips/STM32F301K6.json +++ b/data/chips/STM32F301K6.json @@ -1690,7 +1690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1843,7 +1843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1929,7 +1929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2025,7 +2025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2116,7 +2116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301K8.json b/data/chips/STM32F301K8.json index 4f46f8c..14358cc 100644 --- a/data/chips/STM32F301K8.json +++ b/data/chips/STM32F301K8.json @@ -1696,7 +1696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1935,7 +1935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2122,7 +2122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301R6.json b/data/chips/STM32F301R6.json index 32526ba..c6a0648 100644 --- a/data/chips/STM32F301R6.json +++ b/data/chips/STM32F301R6.json @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2113,7 +2113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2320,7 +2320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301R8.json b/data/chips/STM32F301R8.json index 80a38dc..52f4791 100644 --- a/data/chips/STM32F301R8.json +++ b/data/chips/STM32F301R8.json @@ -1906,7 +1906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2225,7 +2225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2326,7 +2326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2422,7 +2422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302C6.json b/data/chips/STM32F302C6.json index 0609038..ffd09b3 100644 --- a/data/chips/STM32F302C6.json +++ b/data/chips/STM32F302C6.json @@ -1803,7 +1803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2188,7 +2188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302C8.json b/data/chips/STM32F302C8.json index 97d51a6..1604349 100644 --- a/data/chips/STM32F302C8.json +++ b/data/chips/STM32F302C8.json @@ -2101,7 +2101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2486,7 +2486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2582,7 +2582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302CB.json b/data/chips/STM32F302CB.json index fb672bd..1c8c88e 100644 --- a/data/chips/STM32F302CB.json +++ b/data/chips/STM32F302CB.json @@ -2036,7 +2036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2320,7 +2320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2517,7 +2517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302CC.json b/data/chips/STM32F302CC.json index 0d52691..d386244 100644 --- a/data/chips/STM32F302CC.json +++ b/data/chips/STM32F302CC.json @@ -2036,7 +2036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2320,7 +2320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2517,7 +2517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302K6.json b/data/chips/STM32F302K6.json index 6e65455..1a8d621 100644 --- a/data/chips/STM32F302K6.json +++ b/data/chips/STM32F302K6.json @@ -1546,7 +1546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1694,7 +1694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1780,7 +1780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1876,7 +1876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1967,7 +1967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302K8.json b/data/chips/STM32F302K8.json index c75b058..23c3c86 100644 --- a/data/chips/STM32F302K8.json +++ b/data/chips/STM32F302K8.json @@ -1546,7 +1546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1694,7 +1694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1780,7 +1780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1876,7 +1876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1967,7 +1967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302R6.json b/data/chips/STM32F302R6.json index a5af814..3f08486 100644 --- a/data/chips/STM32F302R6.json +++ b/data/chips/STM32F302R6.json @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2292,7 +2292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2489,7 +2489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302R8.json b/data/chips/STM32F302R8.json index bc80d49..3f587ed 100644 --- a/data/chips/STM32F302R8.json +++ b/data/chips/STM32F302R8.json @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2292,7 +2292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2489,7 +2489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RB.json b/data/chips/STM32F302RB.json index ffeb129..60d6311 100644 --- a/data/chips/STM32F302RB.json +++ b/data/chips/STM32F302RB.json @@ -2242,7 +2242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2430,7 +2430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2531,7 +2531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2632,7 +2632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2728,7 +2728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2868,7 +2868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3005,7 +3005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RC.json b/data/chips/STM32F302RC.json index d5f199c..ed51908 100644 --- a/data/chips/STM32F302RC.json +++ b/data/chips/STM32F302RC.json @@ -2242,7 +2242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2430,7 +2430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2531,7 +2531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2632,7 +2632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2728,7 +2728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2868,7 +2868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3005,7 +3005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RD.json b/data/chips/STM32F302RD.json index 8804c62..bf17255 100644 --- a/data/chips/STM32F302RD.json +++ b/data/chips/STM32F302RD.json @@ -2374,7 +2374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2587,7 +2587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2794,7 +2794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2890,7 +2890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3030,7 +3030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3167,7 +3167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RE.json b/data/chips/STM32F302RE.json index 7268424..c63dca5 100644 --- a/data/chips/STM32F302RE.json +++ b/data/chips/STM32F302RE.json @@ -2374,7 +2374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2587,7 +2587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2794,7 +2794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2890,7 +2890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3030,7 +3030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3167,7 +3167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VB.json b/data/chips/STM32F302VB.json index 5a08449..7c0fd83 100644 --- a/data/chips/STM32F302VB.json +++ b/data/chips/STM32F302VB.json @@ -2528,7 +2528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2766,7 +2766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2877,7 +2877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2983,7 +2983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3406,7 +3406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VC.json b/data/chips/STM32F302VC.json index 702d6cc..cd3cd99 100644 --- a/data/chips/STM32F302VC.json +++ b/data/chips/STM32F302VC.json @@ -3134,7 +3134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3483,7 +3483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3690,7 +3690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3855,7 +3855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4012,7 +4012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VD.json b/data/chips/STM32F302VD.json index f30533a..b4d0ac3 100644 --- a/data/chips/STM32F302VD.json +++ b/data/chips/STM32F302VD.json @@ -3623,7 +3623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3886,7 +3886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4002,7 +4002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4108,7 +4108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4209,7 +4209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4374,7 +4374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4531,7 +4531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VE.json b/data/chips/STM32F302VE.json index 4f249d8..1922c0e 100644 --- a/data/chips/STM32F302VE.json +++ b/data/chips/STM32F302VE.json @@ -3623,7 +3623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3886,7 +3886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4002,7 +4002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4108,7 +4108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4209,7 +4209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4374,7 +4374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4531,7 +4531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302ZD.json b/data/chips/STM32F302ZD.json index b304f4e..9605b6c 100644 --- a/data/chips/STM32F302ZD.json +++ b/data/chips/STM32F302ZD.json @@ -3425,7 +3425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3804,7 +3804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3910,7 +3910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4011,7 +4011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302ZE.json b/data/chips/STM32F302ZE.json index 32f9469..9e9fbd4 100644 --- a/data/chips/STM32F302ZE.json +++ b/data/chips/STM32F302ZE.json @@ -3425,7 +3425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3804,7 +3804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3910,7 +3910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4011,7 +4011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303C6.json b/data/chips/STM32F303C6.json index 7957e64..28f1c31 100644 --- a/data/chips/STM32F303C6.json +++ b/data/chips/STM32F303C6.json @@ -1701,7 +1701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1899,7 +1899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2005,7 +2005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2106,7 +2106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2342,7 +2342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303C8.json b/data/chips/STM32F303C8.json index 5756ec3..9722b0d 100644 --- a/data/chips/STM32F303C8.json +++ b/data/chips/STM32F303C8.json @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2199,7 +2199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2305,7 +2305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2406,7 +2406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2502,7 +2502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2642,7 +2642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303CB.json b/data/chips/STM32F303CB.json index c961155..595c9bc 100644 --- a/data/chips/STM32F303CB.json +++ b/data/chips/STM32F303CB.json @@ -2399,7 +2399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2582,7 +2582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2784,7 +2784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2880,7 +2880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3020,7 +3020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3132,7 +3132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3346,7 +3346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303CC.json b/data/chips/STM32F303CC.json index 56a500c..65ab0ce 100644 --- a/data/chips/STM32F303CC.json +++ b/data/chips/STM32F303CC.json @@ -2399,7 +2399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2582,7 +2582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2784,7 +2784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2880,7 +2880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3020,7 +3020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3132,7 +3132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3346,7 +3346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303K6.json b/data/chips/STM32F303K6.json index a454431..03c7dd1 100644 --- a/data/chips/STM32F303K6.json +++ b/data/chips/STM32F303K6.json @@ -1661,7 +1661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1996,7 +1996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2217,7 +2217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303K8.json b/data/chips/STM32F303K8.json index 6deace8..b23c3ee 100644 --- a/data/chips/STM32F303K8.json +++ b/data/chips/STM32F303K8.json @@ -1661,7 +1661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1996,7 +1996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2217,7 +2217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303R6.json b/data/chips/STM32F303R6.json index 88b6e26..d79a872 100644 --- a/data/chips/STM32F303R6.json +++ b/data/chips/STM32F303R6.json @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2145,7 +2145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2246,7 +2246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2342,7 +2342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303R8.json b/data/chips/STM32F303R8.json index 1f146ab..2308dbe 100644 --- a/data/chips/STM32F303R8.json +++ b/data/chips/STM32F303R8.json @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2145,7 +2145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2246,7 +2246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2342,7 +2342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303RB.json b/data/chips/STM32F303RB.json index 040c3aa..7675087 100644 --- a/data/chips/STM32F303RB.json +++ b/data/chips/STM32F303RB.json @@ -2628,7 +2628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2816,7 +2816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2917,7 +2917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3018,7 +3018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3114,7 +3114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3254,7 +3254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3391,7 +3391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3605,7 +3605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RC.json b/data/chips/STM32F303RC.json index 5117f51..c2872c7 100644 --- a/data/chips/STM32F303RC.json +++ b/data/chips/STM32F303RC.json @@ -2634,7 +2634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2923,7 +2923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3024,7 +3024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3120,7 +3120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3260,7 +3260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3397,7 +3397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RD.json b/data/chips/STM32F303RD.json index ebf1388..cf9857c 100644 --- a/data/chips/STM32F303RD.json +++ b/data/chips/STM32F303RD.json @@ -2756,7 +2756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2969,7 +2969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3075,7 +3075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3176,7 +3176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3272,7 +3272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3412,7 +3412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3549,7 +3549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3763,7 +3763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RE.json b/data/chips/STM32F303RE.json index 4e44fdb..bc6b38a 100644 --- a/data/chips/STM32F303RE.json +++ b/data/chips/STM32F303RE.json @@ -2756,7 +2756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2969,7 +2969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3075,7 +3075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3176,7 +3176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3272,7 +3272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3412,7 +3412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3549,7 +3549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3763,7 +3763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VB.json b/data/chips/STM32F303VB.json index 2cf524e..10391f9 100644 --- a/data/chips/STM32F303VB.json +++ b/data/chips/STM32F303VB.json @@ -3038,7 +3038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3276,7 +3276,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3387,7 +3387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3493,7 +3493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3594,7 +3594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3759,7 +3759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3916,7 +3916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4160,7 +4160,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VC.json b/data/chips/STM32F303VC.json index 52d7c54..e79c569 100644 --- a/data/chips/STM32F303VC.json +++ b/data/chips/STM32F303VC.json @@ -3644,7 +3644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3882,7 +3882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3993,7 +3993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4200,7 +4200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4365,7 +4365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4766,7 +4766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VD.json b/data/chips/STM32F303VD.json index 24fbb4c..0aad2e9 100644 --- a/data/chips/STM32F303VD.json +++ b/data/chips/STM32F303VD.json @@ -4121,7 +4121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4606,7 +4606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4707,7 +4707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4872,7 +4872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5000,7 +5000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5401,7 +5401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VE.json b/data/chips/STM32F303VE.json index 9a78057..2fd2809 100644 --- a/data/chips/STM32F303VE.json +++ b/data/chips/STM32F303VE.json @@ -4727,7 +4727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4990,7 +4990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5106,7 +5106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5212,7 +5212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5313,7 +5313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5478,7 +5478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5606,7 +5606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5763,7 +5763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6007,7 +6007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303ZD.json b/data/chips/STM32F303ZD.json index 9a0d285..0dd2597 100644 --- a/data/chips/STM32F303ZD.json +++ b/data/chips/STM32F303ZD.json @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4186,7 +4186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4302,7 +4302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4408,7 +4408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4509,7 +4509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4674,7 +4674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4892,7 +4892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5049,7 +5049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5293,7 +5293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303ZE.json b/data/chips/STM32F303ZE.json index 456d14e..7d13047 100644 --- a/data/chips/STM32F303ZE.json +++ b/data/chips/STM32F303ZE.json @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4186,7 +4186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4302,7 +4302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4408,7 +4408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4509,7 +4509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4674,7 +4674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4892,7 +4892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5049,7 +5049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5293,7 +5293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F318C8.json b/data/chips/STM32F318C8.json index 259fd17..603b7fa 100644 --- a/data/chips/STM32F318C8.json +++ b/data/chips/STM32F318C8.json @@ -2024,7 +2024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2207,7 +2207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2308,7 +2308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2505,7 +2505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F318K8.json b/data/chips/STM32F318K8.json index a3fd6f1..f9f8776 100644 --- a/data/chips/STM32F318K8.json +++ b/data/chips/STM32F318K8.json @@ -1478,7 +1478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1626,7 +1626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1712,7 +1712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1808,7 +1808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1894,7 +1894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F328C8.json b/data/chips/STM32F328C8.json index 63ebf62..bcfd96d 100644 --- a/data/chips/STM32F328C8.json +++ b/data/chips/STM32F328C8.json @@ -1645,7 +1645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1929,7 +1929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2030,7 +2030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2126,7 +2126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C4.json b/data/chips/STM32F334C4.json index 4949b87..0de2593 100644 --- a/data/chips/STM32F334C4.json +++ b/data/chips/STM32F334C4.json @@ -1908,7 +1908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2106,7 +2106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2212,7 +2212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2313,7 +2313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2549,7 +2549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C6.json b/data/chips/STM32F334C6.json index 48e09ac..1824f81 100644 --- a/data/chips/STM32F334C6.json +++ b/data/chips/STM32F334C6.json @@ -1908,7 +1908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2106,7 +2106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2212,7 +2212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2313,7 +2313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2549,7 +2549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C8.json b/data/chips/STM32F334C8.json index 1aff2b7..41f3637 100644 --- a/data/chips/STM32F334C8.json +++ b/data/chips/STM32F334C8.json @@ -2208,7 +2208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2406,7 +2406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2512,7 +2512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2613,7 +2613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2709,7 +2709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2849,7 +2849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K4.json b/data/chips/STM32F334K4.json index 2dde89e..3219245 100644 --- a/data/chips/STM32F334K4.json +++ b/data/chips/STM32F334K4.json @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2057,7 +2057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2153,7 +2153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2374,7 +2374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K6.json b/data/chips/STM32F334K6.json index 182488b..1dcca5a 100644 --- a/data/chips/STM32F334K6.json +++ b/data/chips/STM32F334K6.json @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2057,7 +2057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2153,7 +2153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2374,7 +2374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K8.json b/data/chips/STM32F334K8.json index a10f7c1..b3258f7 100644 --- a/data/chips/STM32F334K8.json +++ b/data/chips/STM32F334K8.json @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2057,7 +2057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2153,7 +2153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2374,7 +2374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334R6.json b/data/chips/STM32F334R6.json index f74e9e7..769d9e3 100644 --- a/data/chips/STM32F334R6.json +++ b/data/chips/STM32F334R6.json @@ -2058,7 +2058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2271,7 +2271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2478,7 +2478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2574,7 +2574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2714,7 +2714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334R8.json b/data/chips/STM32F334R8.json index ce2efe8..d08b0f9 100644 --- a/data/chips/STM32F334R8.json +++ b/data/chips/STM32F334R8.json @@ -2058,7 +2058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2271,7 +2271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2478,7 +2478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2574,7 +2574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2714,7 +2714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F358CC.json b/data/chips/STM32F358CC.json index a74d422..b825964 100644 --- a/data/chips/STM32F358CC.json +++ b/data/chips/STM32F358CC.json @@ -2347,7 +2347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2530,7 +2530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2732,7 +2732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2828,7 +2828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2968,7 +2968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3080,7 +3080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3294,7 +3294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F358RC.json b/data/chips/STM32F358RC.json index a42cada..99989d6 100644 --- a/data/chips/STM32F358RC.json +++ b/data/chips/STM32F358RC.json @@ -2576,7 +2576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2764,7 +2764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2865,7 +2865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2966,7 +2966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3062,7 +3062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3202,7 +3202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3339,7 +3339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3553,7 +3553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F358VC.json b/data/chips/STM32F358VC.json index 4e8dffd..23779d9 100644 --- a/data/chips/STM32F358VC.json +++ b/data/chips/STM32F358VC.json @@ -2986,7 +2986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3224,7 +3224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3335,7 +3335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3441,7 +3441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3542,7 +3542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3707,7 +3707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4108,7 +4108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F373C8.json b/data/chips/STM32F373C8.json index 5ddf7db..6ec1831 100644 --- a/data/chips/STM32F373C8.json +++ b/data/chips/STM32F373C8.json @@ -2379,7 +2379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2596,7 +2596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2748,7 +2748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3107,7 +3107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3220,7 +3220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373CB.json b/data/chips/STM32F373CB.json index 695924d..04bf8ff 100644 --- a/data/chips/STM32F373CB.json +++ b/data/chips/STM32F373CB.json @@ -2379,7 +2379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2596,7 +2596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2748,7 +2748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3107,7 +3107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3220,7 +3220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373CC.json b/data/chips/STM32F373CC.json index 1f5e88b..0864c57 100644 --- a/data/chips/STM32F373CC.json +++ b/data/chips/STM32F373CC.json @@ -2379,7 +2379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2596,7 +2596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2748,7 +2748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3107,7 +3107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3220,7 +3220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373R8.json b/data/chips/STM32F373R8.json index 25a598f..c5c7166 100644 --- a/data/chips/STM32F373R8.json +++ b/data/chips/STM32F373R8.json @@ -2618,7 +2618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2734,7 +2734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2835,7 +2835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373RB.json b/data/chips/STM32F373RB.json index 6324cf7..cbf79ec 100644 --- a/data/chips/STM32F373RB.json +++ b/data/chips/STM32F373RB.json @@ -2618,7 +2618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2734,7 +2734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2835,7 +2835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373RC.json b/data/chips/STM32F373RC.json index 831962b..495a166 100644 --- a/data/chips/STM32F373RC.json +++ b/data/chips/STM32F373RC.json @@ -2618,7 +2618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2734,7 +2734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2835,7 +2835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373V8.json b/data/chips/STM32F373V8.json index 03098d9..710236b 100644 --- a/data/chips/STM32F373V8.json +++ b/data/chips/STM32F373V8.json @@ -3617,7 +3617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3733,7 +3733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3834,7 +3834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4128,7 +4128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4548,7 +4548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373VB.json b/data/chips/STM32F373VB.json index 5d416ff..a18e7a4 100644 --- a/data/chips/STM32F373VB.json +++ b/data/chips/STM32F373VB.json @@ -3617,7 +3617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3733,7 +3733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3834,7 +3834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4128,7 +4128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4548,7 +4548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373VC.json b/data/chips/STM32F373VC.json index 3992acc..cd103f1 100644 --- a/data/chips/STM32F373VC.json +++ b/data/chips/STM32F373VC.json @@ -3617,7 +3617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3733,7 +3733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3834,7 +3834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4128,7 +4128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4548,7 +4548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378CC.json b/data/chips/STM32F378CC.json index 0e86b86..f730ebb 100644 --- a/data/chips/STM32F378CC.json +++ b/data/chips/STM32F378CC.json @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2444,7 +2444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2545,7 +2545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2697,7 +2697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2809,7 +2809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2939,7 +2939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3056,7 +3056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3169,7 +3169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378RC.json b/data/chips/STM32F378RC.json index 4ef9efa..bee73f7 100644 --- a/data/chips/STM32F378RC.json +++ b/data/chips/STM32F378RC.json @@ -2969,7 +2969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3085,7 +3085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3186,7 +3186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3343,7 +3343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3600,7 +3600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3747,7 +3747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3860,7 +3860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378VC.json b/data/chips/STM32F378VC.json index 26e2c81..6809ddc 100644 --- a/data/chips/STM32F378VC.json +++ b/data/chips/STM32F378VC.json @@ -3566,7 +3566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3682,7 +3682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3783,7 +3783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3940,7 +3940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4077,7 +4077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4212,7 +4212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4359,7 +4359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4497,7 +4497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F398VE.json b/data/chips/STM32F398VE.json index 590ce29..94740c2 100644 --- a/data/chips/STM32F398VE.json +++ b/data/chips/STM32F398VE.json @@ -3469,7 +3469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3732,7 +3732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3848,7 +3848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3954,7 +3954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4055,7 +4055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4220,7 +4220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4348,7 +4348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4505,7 +4505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4749,7 +4749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F401CB.json b/data/chips/STM32F401CB.json index 07b8b66..d5dfa6a 100644 --- a/data/chips/STM32F401CB.json +++ b/data/chips/STM32F401CB.json @@ -2008,7 +2008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2280,7 +2280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2417,7 +2417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2524,7 +2524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CC.json b/data/chips/STM32F401CC.json index ab1cb67..96445e1 100644 --- a/data/chips/STM32F401CC.json +++ b/data/chips/STM32F401CC.json @@ -2319,7 +2319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2591,7 +2591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2728,7 +2728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2835,7 +2835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2922,7 +2922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CD.json b/data/chips/STM32F401CD.json index 646b599..678e59c 100644 --- a/data/chips/STM32F401CD.json +++ b/data/chips/STM32F401CD.json @@ -2019,7 +2019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2291,7 +2291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2428,7 +2428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2535,7 +2535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2622,7 +2622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CE.json b/data/chips/STM32F401CE.json index 4af6d9a..c20909d 100644 --- a/data/chips/STM32F401CE.json +++ b/data/chips/STM32F401CE.json @@ -2019,7 +2019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2291,7 +2291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2428,7 +2428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2535,7 +2535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2622,7 +2622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RB.json b/data/chips/STM32F401RB.json index 64d12a3..8f8854b 100644 --- a/data/chips/STM32F401RB.json +++ b/data/chips/STM32F401RB.json @@ -2012,7 +2012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2553,7 +2553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2640,7 +2640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RC.json b/data/chips/STM32F401RC.json index d7faa02..e13235a 100644 --- a/data/chips/STM32F401RC.json +++ b/data/chips/STM32F401RC.json @@ -2023,7 +2023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2564,7 +2564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2651,7 +2651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RD.json b/data/chips/STM32F401RD.json index bd1cdc1..4dcfbfe 100644 --- a/data/chips/STM32F401RD.json +++ b/data/chips/STM32F401RD.json @@ -2023,7 +2023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2564,7 +2564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2651,7 +2651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RE.json b/data/chips/STM32F401RE.json index 6826472..1e6b520 100644 --- a/data/chips/STM32F401RE.json +++ b/data/chips/STM32F401RE.json @@ -2023,7 +2023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2564,7 +2564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2651,7 +2651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VB.json b/data/chips/STM32F401VB.json index 7f89ecf..c561bdd 100644 --- a/data/chips/STM32F401VB.json +++ b/data/chips/STM32F401VB.json @@ -2950,7 +2950,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3267,7 +3267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3409,7 +3409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3541,7 +3541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3653,7 +3653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VC.json b/data/chips/STM32F401VC.json index 11b5c7a..4901dda 100644 --- a/data/chips/STM32F401VC.json +++ b/data/chips/STM32F401VC.json @@ -2961,7 +2961,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3420,7 +3420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3552,7 +3552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3664,7 +3664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VD.json b/data/chips/STM32F401VD.json index 50d6ddf..fce4598 100644 --- a/data/chips/STM32F401VD.json +++ b/data/chips/STM32F401VD.json @@ -2961,7 +2961,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3420,7 +3420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3552,7 +3552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3664,7 +3664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VE.json b/data/chips/STM32F401VE.json index 7cb3dd7..e2fe062 100644 --- a/data/chips/STM32F401VE.json +++ b/data/chips/STM32F401VE.json @@ -2961,7 +2961,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3420,7 +3420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3552,7 +3552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3664,7 +3664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F405OE.json b/data/chips/STM32F405OE.json index 05e6661..1e104f8 100644 --- a/data/chips/STM32F405OE.json +++ b/data/chips/STM32F405OE.json @@ -2864,7 +2864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3336,7 +3336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3478,7 +3478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3610,7 +3610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3712,7 +3712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3934,7 +3934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405OG.json b/data/chips/STM32F405OG.json index e422089..2584b79 100644 --- a/data/chips/STM32F405OG.json +++ b/data/chips/STM32F405OG.json @@ -2864,7 +2864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3336,7 +3336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3478,7 +3478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3610,7 +3610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3712,7 +3712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3934,7 +3934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405RG.json b/data/chips/STM32F405RG.json index 77e6255..7bfac48 100644 --- a/data/chips/STM32F405RG.json +++ b/data/chips/STM32F405RG.json @@ -2467,7 +2467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3036,7 +3036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3168,7 +3168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3255,7 +3255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405VG.json b/data/chips/STM32F405VG.json index f83642e..838d2d2 100644 --- a/data/chips/STM32F405VG.json +++ b/data/chips/STM32F405VG.json @@ -2977,7 +2977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3449,7 +3449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3591,7 +3591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3723,7 +3723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4052,7 +4052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405ZG.json b/data/chips/STM32F405ZG.json index 98c917f..c748b17 100644 --- a/data/chips/STM32F405ZG.json +++ b/data/chips/STM32F405ZG.json @@ -3443,7 +3443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3935,7 +3935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4077,7 +4077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4209,7 +4209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4538,7 +4538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407IE.json b/data/chips/STM32F407IE.json index 8b62ecf..5334321 100644 --- a/data/chips/STM32F407IE.json +++ b/data/chips/STM32F407IE.json @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5865,7 +5865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6007,7 +6007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6139,7 +6139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6251,7 +6251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6488,7 +6488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407IG.json b/data/chips/STM32F407IG.json index b0dac9f..efb76f8 100644 --- a/data/chips/STM32F407IG.json +++ b/data/chips/STM32F407IG.json @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5865,7 +5865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6007,7 +6007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6139,7 +6139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6251,7 +6251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6488,7 +6488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407VE.json b/data/chips/STM32F407VE.json index df9fabf..065b1d9 100644 --- a/data/chips/STM32F407VE.json +++ b/data/chips/STM32F407VE.json @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3750,7 +3750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4024,7 +4024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4136,7 +4136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4353,7 +4353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407VG.json b/data/chips/STM32F407VG.json index 0f87831..683cc74 100644 --- a/data/chips/STM32F407VG.json +++ b/data/chips/STM32F407VG.json @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3750,7 +3750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4024,7 +4024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4136,7 +4136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4353,7 +4353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407ZE.json b/data/chips/STM32F407ZE.json index 698751e..d175164 100644 --- a/data/chips/STM32F407ZE.json +++ b/data/chips/STM32F407ZE.json @@ -3774,7 +3774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4266,7 +4266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4408,7 +4408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4540,7 +4540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4652,7 +4652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4869,7 +4869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407ZG.json b/data/chips/STM32F407ZG.json index 4deeb7b..9511f09 100644 --- a/data/chips/STM32F407ZG.json +++ b/data/chips/STM32F407ZG.json @@ -3774,7 +3774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4266,7 +4266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4408,7 +4408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4540,7 +4540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4652,7 +4652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4869,7 +4869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F410C8.json b/data/chips/STM32F410C8.json index 265b2b3..0235235 100644 --- a/data/chips/STM32F410C8.json +++ b/data/chips/STM32F410C8.json @@ -2129,7 +2129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2351,7 +2351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410CB.json b/data/chips/STM32F410CB.json index 722a05a..b0f27dc 100644 --- a/data/chips/STM32F410CB.json +++ b/data/chips/STM32F410CB.json @@ -2140,7 +2140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2362,7 +2362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410R8.json b/data/chips/STM32F410R8.json index 2f889df..3d5e899 100644 --- a/data/chips/STM32F410R8.json +++ b/data/chips/STM32F410R8.json @@ -2430,7 +2430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410RB.json b/data/chips/STM32F410RB.json index 8aa3197..58b75c0 100644 --- a/data/chips/STM32F410RB.json +++ b/data/chips/STM32F410RB.json @@ -2441,7 +2441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2668,7 +2668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410T8.json b/data/chips/STM32F410T8.json index 2a64b56..1683992 100644 --- a/data/chips/STM32F410T8.json +++ b/data/chips/STM32F410T8.json @@ -1477,7 +1477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1642,7 +1642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410TB.json b/data/chips/STM32F410TB.json index 45eb2a6..287b048 100644 --- a/data/chips/STM32F410TB.json +++ b/data/chips/STM32F410TB.json @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1653,7 +1653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411CC.json b/data/chips/STM32F411CC.json index 02bdf70..f4e7ca7 100644 --- a/data/chips/STM32F411CC.json +++ b/data/chips/STM32F411CC.json @@ -2399,7 +2399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2671,7 +2671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2915,7 +2915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3002,7 +3002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411CE.json b/data/chips/STM32F411CE.json index 29b7443..9f5c7ae 100644 --- a/data/chips/STM32F411CE.json +++ b/data/chips/STM32F411CE.json @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2677,7 +2677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2814,7 +2814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2921,7 +2921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3008,7 +3008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411RC.json b/data/chips/STM32F411RC.json index 533149b..71b8026 100644 --- a/data/chips/STM32F411RC.json +++ b/data/chips/STM32F411RC.json @@ -2339,7 +2339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2748,7 +2748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2880,7 +2880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411RE.json b/data/chips/STM32F411RE.json index 1d57c63..6ee8750 100644 --- a/data/chips/STM32F411RE.json +++ b/data/chips/STM32F411RE.json @@ -2345,7 +2345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2617,7 +2617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2754,7 +2754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2886,7 +2886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2973,7 +2973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411VC.json b/data/chips/STM32F411VC.json index 2eba0a8..0769f88 100644 --- a/data/chips/STM32F411VC.json +++ b/data/chips/STM32F411VC.json @@ -3326,7 +3326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3643,7 +3643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3785,7 +3785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4029,7 +4029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411VE.json b/data/chips/STM32F411VE.json index 85e29ae..df64759 100644 --- a/data/chips/STM32F411VE.json +++ b/data/chips/STM32F411VE.json @@ -3332,7 +3332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3649,7 +3649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3791,7 +3791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4035,7 +4035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F412CE.json b/data/chips/STM32F412CE.json index 1a3550b..f7a2584 100644 --- a/data/chips/STM32F412CE.json +++ b/data/chips/STM32F412CE.json @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2812,7 +2812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2949,7 +2949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3056,7 +3056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3143,7 +3143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3360,7 +3360,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412CG.json b/data/chips/STM32F412CG.json index d4d4693..051f701 100644 --- a/data/chips/STM32F412CG.json +++ b/data/chips/STM32F412CG.json @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2812,7 +2812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2949,7 +2949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3056,7 +3056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3143,7 +3143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3360,7 +3360,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412RE.json b/data/chips/STM32F412RE.json index 0d59af6..c241a76 100644 --- a/data/chips/STM32F412RE.json +++ b/data/chips/STM32F412RE.json @@ -3690,7 +3690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4386,7 +4386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4473,7 +4473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4690,7 +4690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412RG.json b/data/chips/STM32F412RG.json index eedc5a8..5c57141 100644 --- a/data/chips/STM32F412RG.json +++ b/data/chips/STM32F412RG.json @@ -3690,7 +3690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4386,7 +4386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4473,7 +4473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4690,7 +4690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412VE.json b/data/chips/STM32F412VE.json index 3b8d927..c21e192 100644 --- a/data/chips/STM32F412VE.json +++ b/data/chips/STM32F412VE.json @@ -4288,7 +4288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4760,7 +4760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4902,7 +4902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5034,7 +5034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5146,7 +5146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412VG.json b/data/chips/STM32F412VG.json index ce3d93a..8d90c56 100644 --- a/data/chips/STM32F412VG.json +++ b/data/chips/STM32F412VG.json @@ -4288,7 +4288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4760,7 +4760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4902,7 +4902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5034,7 +5034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5146,7 +5146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412ZE.json b/data/chips/STM32F412ZE.json index 8edf7a2..3c54d3d 100644 --- a/data/chips/STM32F412ZE.json +++ b/data/chips/STM32F412ZE.json @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5545,7 +5545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5687,7 +5687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5819,7 +5819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5931,7 +5931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6168,7 +6168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412ZG.json b/data/chips/STM32F412ZG.json index 7ec5ec3..6fb8b65 100644 --- a/data/chips/STM32F412ZG.json +++ b/data/chips/STM32F412ZG.json @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5545,7 +5545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5687,7 +5687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5819,7 +5819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5931,7 +5931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6168,7 +6168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413CG.json b/data/chips/STM32F413CG.json index 89710d9..4b9a201 100644 --- a/data/chips/STM32F413CG.json +++ b/data/chips/STM32F413CG.json @@ -2902,7 +2902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3329,7 +3329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3466,7 +3466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3573,7 +3573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3660,7 +3660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3877,7 +3877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413CH.json b/data/chips/STM32F413CH.json index 5c65ced..58b0954 100644 --- a/data/chips/STM32F413CH.json +++ b/data/chips/STM32F413CH.json @@ -2902,7 +2902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3329,7 +3329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3466,7 +3466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3573,7 +3573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3660,7 +3660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3877,7 +3877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413MG.json b/data/chips/STM32F413MG.json index 76ff471..aa4514a 100644 --- a/data/chips/STM32F413MG.json +++ b/data/chips/STM32F413MG.json @@ -3848,7 +3848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4310,7 +4310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4579,7 +4579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4666,7 +4666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413MH.json b/data/chips/STM32F413MH.json index 633eb41..c98b053 100644 --- a/data/chips/STM32F413MH.json +++ b/data/chips/STM32F413MH.json @@ -3848,7 +3848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4310,7 +4310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4579,7 +4579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4666,7 +4666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413RG.json b/data/chips/STM32F413RG.json index 69232c2..f47c72f 100644 --- a/data/chips/STM32F413RG.json +++ b/data/chips/STM32F413RG.json @@ -3511,7 +3511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4511,7 +4511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413RH.json b/data/chips/STM32F413RH.json index d3976cf..9a75224 100644 --- a/data/chips/STM32F413RH.json +++ b/data/chips/STM32F413RH.json @@ -3511,7 +3511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4511,7 +4511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413VG.json b/data/chips/STM32F413VG.json index 5491cf1..241652e 100644 --- a/data/chips/STM32F413VG.json +++ b/data/chips/STM32F413VG.json @@ -4968,7 +4968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5440,7 +5440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5714,7 +5714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5826,7 +5826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6043,7 +6043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413VH.json b/data/chips/STM32F413VH.json index 4c85698..e8487ff 100644 --- a/data/chips/STM32F413VH.json +++ b/data/chips/STM32F413VH.json @@ -4968,7 +4968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5440,7 +5440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5714,7 +5714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5826,7 +5826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6043,7 +6043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413ZG.json b/data/chips/STM32F413ZG.json index 174112d..873156c 100644 --- a/data/chips/STM32F413ZG.json +++ b/data/chips/STM32F413ZG.json @@ -5706,7 +5706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6345,7 +6345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6477,7 +6477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6589,7 +6589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6826,7 +6826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413ZH.json b/data/chips/STM32F413ZH.json index 11bee32..415b7dd 100644 --- a/data/chips/STM32F413ZH.json +++ b/data/chips/STM32F413ZH.json @@ -5706,7 +5706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6345,7 +6345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6477,7 +6477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6589,7 +6589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6826,7 +6826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415OG.json b/data/chips/STM32F415OG.json index c680db9..9d04489 100644 --- a/data/chips/STM32F415OG.json +++ b/data/chips/STM32F415OG.json @@ -2927,7 +2927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3399,7 +3399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3541,7 +3541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3775,7 +3775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3997,7 +3997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415RG.json b/data/chips/STM32F415RG.json index 8db6199..1aafddb 100644 --- a/data/chips/STM32F415RG.json +++ b/data/chips/STM32F415RG.json @@ -2530,7 +2530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2957,7 +2957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3099,7 +3099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3231,7 +3231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3318,7 +3318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3535,7 +3535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415VG.json b/data/chips/STM32F415VG.json index 3dcddac..28261fc 100644 --- a/data/chips/STM32F415VG.json +++ b/data/chips/STM32F415VG.json @@ -3040,7 +3040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3512,7 +3512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3654,7 +3654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3786,7 +3786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3898,7 +3898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4115,7 +4115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415ZG.json b/data/chips/STM32F415ZG.json index f0c46d4..4266e33 100644 --- a/data/chips/STM32F415ZG.json +++ b/data/chips/STM32F415ZG.json @@ -3506,7 +3506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3998,7 +3998,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4140,7 +4140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4272,7 +4272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4601,7 +4601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417IE.json b/data/chips/STM32F417IE.json index ee103f8..8305ef3 100644 --- a/data/chips/STM32F417IE.json +++ b/data/chips/STM32F417IE.json @@ -5426,7 +5426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6202,7 +6202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6314,7 +6314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417IG.json b/data/chips/STM32F417IG.json index 2dab27f..c36a63d 100644 --- a/data/chips/STM32F417IG.json +++ b/data/chips/STM32F417IG.json @@ -5426,7 +5426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6202,7 +6202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6314,7 +6314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417VE.json b/data/chips/STM32F417VE.json index 25041e6..129fc50 100644 --- a/data/chips/STM32F417VE.json +++ b/data/chips/STM32F417VE.json @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3813,7 +3813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3955,7 +3955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4087,7 +4087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4199,7 +4199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4416,7 +4416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417VG.json b/data/chips/STM32F417VG.json index 0aa7477..b2e9813 100644 --- a/data/chips/STM32F417VG.json +++ b/data/chips/STM32F417VG.json @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3813,7 +3813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3955,7 +3955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4087,7 +4087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4199,7 +4199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4416,7 +4416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417ZE.json b/data/chips/STM32F417ZE.json index a6bd9be..fd07ce4 100644 --- a/data/chips/STM32F417ZE.json +++ b/data/chips/STM32F417ZE.json @@ -3837,7 +3837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4329,7 +4329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4471,7 +4471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4715,7 +4715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4932,7 +4932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417ZG.json b/data/chips/STM32F417ZG.json index 37ed7e7..2695e02 100644 --- a/data/chips/STM32F417ZG.json +++ b/data/chips/STM32F417ZG.json @@ -3837,7 +3837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4329,7 +4329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4471,7 +4471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4715,7 +4715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4932,7 +4932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423CH.json b/data/chips/STM32F423CH.json index df47cb8..16c8924 100644 --- a/data/chips/STM32F423CH.json +++ b/data/chips/STM32F423CH.json @@ -2929,7 +2929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3356,7 +3356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3493,7 +3493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3600,7 +3600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3687,7 +3687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3904,7 +3904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423MH.json b/data/chips/STM32F423MH.json index 749922a..37b21f4 100644 --- a/data/chips/STM32F423MH.json +++ b/data/chips/STM32F423MH.json @@ -3875,7 +3875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4474,7 +4474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4606,7 +4606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4693,7 +4693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4910,7 +4910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423RH.json b/data/chips/STM32F423RH.json index c4ea8d6..a4eacb4 100644 --- a/data/chips/STM32F423RH.json +++ b/data/chips/STM32F423RH.json @@ -3538,7 +3538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3965,7 +3965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4102,7 +4102,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4234,7 +4234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4538,7 +4538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423VH.json b/data/chips/STM32F423VH.json index 8d9fec1..cb371cc 100644 --- a/data/chips/STM32F423VH.json +++ b/data/chips/STM32F423VH.json @@ -4995,7 +4995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5467,7 +5467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5609,7 +5609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5741,7 +5741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5853,7 +5853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423ZH.json b/data/chips/STM32F423ZH.json index 51c7249..99214c5 100644 --- a/data/chips/STM32F423ZH.json +++ b/data/chips/STM32F423ZH.json @@ -5733,7 +5733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6230,7 +6230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6372,7 +6372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6504,7 +6504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6616,7 +6616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6853,7 +6853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427AG.json b/data/chips/STM32F427AG.json index 5a8ce01..b4d951f 100644 --- a/data/chips/STM32F427AG.json +++ b/data/chips/STM32F427AG.json @@ -4630,7 +4630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5112,7 +5112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5254,7 +5254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5386,7 +5386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5498,7 +5498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5735,7 +5735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427AI.json b/data/chips/STM32F427AI.json index 601d559..b89c46b 100644 --- a/data/chips/STM32F427AI.json +++ b/data/chips/STM32F427AI.json @@ -4567,7 +4567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5049,7 +5049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5191,7 +5191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5323,7 +5323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5435,7 +5435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5672,7 +5672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427IG.json b/data/chips/STM32F427IG.json index 743477e..07299c8 100644 --- a/data/chips/STM32F427IG.json +++ b/data/chips/STM32F427IG.json @@ -6105,7 +6105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6607,7 +6607,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6749,7 +6749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6881,7 +6881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6993,7 +6993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7230,7 +7230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427II.json b/data/chips/STM32F427II.json index dee38cb..436f734 100644 --- a/data/chips/STM32F427II.json +++ b/data/chips/STM32F427II.json @@ -6042,7 +6042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6544,7 +6544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6686,7 +6686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6818,7 +6818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6930,7 +6930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7167,7 +7167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427VG.json b/data/chips/STM32F427VG.json index de700c2..deba6de 100644 --- a/data/chips/STM32F427VG.json +++ b/data/chips/STM32F427VG.json @@ -3669,7 +3669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4141,7 +4141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4415,7 +4415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4527,7 +4527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4744,7 +4744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427VI.json b/data/chips/STM32F427VI.json index 5aedab2..521a176 100644 --- a/data/chips/STM32F427VI.json +++ b/data/chips/STM32F427VI.json @@ -3606,7 +3606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4078,7 +4078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4220,7 +4220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4352,7 +4352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4464,7 +4464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4681,7 +4681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427ZG.json b/data/chips/STM32F427ZG.json index 31ff905..9f4f31e 100644 --- a/data/chips/STM32F427ZG.json +++ b/data/chips/STM32F427ZG.json @@ -4377,7 +4377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4869,7 +4869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5011,7 +5011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5143,7 +5143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5255,7 +5255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5472,7 +5472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427ZI.json b/data/chips/STM32F427ZI.json index 2ad0a8e..fe131d8 100644 --- a/data/chips/STM32F427ZI.json +++ b/data/chips/STM32F427ZI.json @@ -4314,7 +4314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4806,7 +4806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4948,7 +4948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5192,7 +5192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5409,7 +5409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429AG.json b/data/chips/STM32F429AG.json index 97e2f74..5f43661 100644 --- a/data/chips/STM32F429AG.json +++ b/data/chips/STM32F429AG.json @@ -4940,7 +4940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5422,7 +5422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5564,7 +5564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5696,7 +5696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5808,7 +5808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6045,7 +6045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429AI.json b/data/chips/STM32F429AI.json index 2bd8b03..8e93ecd 100644 --- a/data/chips/STM32F429AI.json +++ b/data/chips/STM32F429AI.json @@ -4877,7 +4877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5359,7 +5359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5501,7 +5501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5633,7 +5633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5745,7 +5745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5982,7 +5982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BE.json b/data/chips/STM32F429BE.json index 20c87d3..617d6ab 100644 --- a/data/chips/STM32F429BE.json +++ b/data/chips/STM32F429BE.json @@ -5427,7 +5427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5929,7 +5929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6071,7 +6071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6315,7 +6315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6552,7 +6552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BG.json b/data/chips/STM32F429BG.json index 090186b..6ca566c 100644 --- a/data/chips/STM32F429BG.json +++ b/data/chips/STM32F429BG.json @@ -5529,7 +5529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6031,7 +6031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6173,7 +6173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6305,7 +6305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6417,7 +6417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6654,7 +6654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BI.json b/data/chips/STM32F429BI.json index f1ca901..5380791 100644 --- a/data/chips/STM32F429BI.json +++ b/data/chips/STM32F429BI.json @@ -5466,7 +5466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5968,7 +5968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6110,7 +6110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6242,7 +6242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6354,7 +6354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6591,7 +6591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429IE.json b/data/chips/STM32F429IE.json index 427e532..9883d0c 100644 --- a/data/chips/STM32F429IE.json +++ b/data/chips/STM32F429IE.json @@ -6307,7 +6307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6809,7 +6809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6951,7 +6951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7083,7 +7083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7195,7 +7195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7432,7 +7432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429IG.json b/data/chips/STM32F429IG.json index bc9f5be..b16abad 100644 --- a/data/chips/STM32F429IG.json +++ b/data/chips/STM32F429IG.json @@ -6415,7 +6415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6917,7 +6917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7059,7 +7059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7191,7 +7191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7303,7 +7303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7540,7 +7540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429II.json b/data/chips/STM32F429II.json index 4b04d4d..caca7f2 100644 --- a/data/chips/STM32F429II.json +++ b/data/chips/STM32F429II.json @@ -6352,7 +6352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6854,7 +6854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6996,7 +6996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7240,7 +7240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7477,7 +7477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NE.json b/data/chips/STM32F429NE.json index e4628ea..61fac6d 100644 --- a/data/chips/STM32F429NE.json +++ b/data/chips/STM32F429NE.json @@ -5475,7 +5475,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5977,7 +5977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6119,7 +6119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6251,7 +6251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6600,7 +6600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NG.json b/data/chips/STM32F429NG.json index 53a0580..e502d41 100644 --- a/data/chips/STM32F429NG.json +++ b/data/chips/STM32F429NG.json @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6079,7 +6079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6221,7 +6221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6353,7 +6353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6465,7 +6465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6702,7 +6702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NI.json b/data/chips/STM32F429NI.json index 2ec2f57..676338f 100644 --- a/data/chips/STM32F429NI.json +++ b/data/chips/STM32F429NI.json @@ -5514,7 +5514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6016,7 +6016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6158,7 +6158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6290,7 +6290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6402,7 +6402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6639,7 +6639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VE.json b/data/chips/STM32F429VE.json index 81f8694..94c2778 100644 --- a/data/chips/STM32F429VE.json +++ b/data/chips/STM32F429VE.json @@ -3711,7 +3711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VG.json b/data/chips/STM32F429VG.json index df2dd98..68ac0ff 100644 --- a/data/chips/STM32F429VG.json +++ b/data/chips/STM32F429VG.json @@ -3813,7 +3813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4285,7 +4285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4427,7 +4427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4559,7 +4559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4671,7 +4671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4888,7 +4888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VI.json b/data/chips/STM32F429VI.json index 50f0c33..a039467 100644 --- a/data/chips/STM32F429VI.json +++ b/data/chips/STM32F429VI.json @@ -3750,7 +3750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4364,7 +4364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4608,7 +4608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4825,7 +4825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZE.json b/data/chips/STM32F429ZE.json index feb019a..eb2ce6c 100644 --- a/data/chips/STM32F429ZE.json +++ b/data/chips/STM32F429ZE.json @@ -4484,7 +4484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4976,7 +4976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5362,7 +5362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5579,7 +5579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZG.json b/data/chips/STM32F429ZG.json index c59d985..157109f 100644 --- a/data/chips/STM32F429ZG.json +++ b/data/chips/STM32F429ZG.json @@ -5450,7 +5450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5942,7 +5942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6084,7 +6084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6216,7 +6216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6328,7 +6328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6545,7 +6545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZI.json b/data/chips/STM32F429ZI.json index 77db73f..6fda5ed 100644 --- a/data/chips/STM32F429ZI.json +++ b/data/chips/STM32F429ZI.json @@ -5387,7 +5387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5879,7 +5879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6021,7 +6021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6153,7 +6153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6265,7 +6265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6482,7 +6482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437AI.json b/data/chips/STM32F437AI.json index c5390f3..2858dfe 100644 --- a/data/chips/STM32F437AI.json +++ b/data/chips/STM32F437AI.json @@ -4636,7 +4636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5260,7 +5260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5392,7 +5392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5504,7 +5504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5741,7 +5741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437IG.json b/data/chips/STM32F437IG.json index f14588b..18e90b8 100644 --- a/data/chips/STM32F437IG.json +++ b/data/chips/STM32F437IG.json @@ -6174,7 +6174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6676,7 +6676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6818,7 +6818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6950,7 +6950,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7062,7 +7062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7299,7 +7299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437II.json b/data/chips/STM32F437II.json index 34fee15..1721ac7 100644 --- a/data/chips/STM32F437II.json +++ b/data/chips/STM32F437II.json @@ -6111,7 +6111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6613,7 +6613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6755,7 +6755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6887,7 +6887,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6999,7 +6999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7236,7 +7236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437VG.json b/data/chips/STM32F437VG.json index c40f68c..80ebf75 100644 --- a/data/chips/STM32F437VG.json +++ b/data/chips/STM32F437VG.json @@ -3738,7 +3738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4352,7 +4352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4484,7 +4484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4813,7 +4813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437VI.json b/data/chips/STM32F437VI.json index 3a0ce81..f112d2b 100644 --- a/data/chips/STM32F437VI.json +++ b/data/chips/STM32F437VI.json @@ -3675,7 +3675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4147,7 +4147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4289,7 +4289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4421,7 +4421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4533,7 +4533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4750,7 +4750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437ZG.json b/data/chips/STM32F437ZG.json index 46d1198..60ea188 100644 --- a/data/chips/STM32F437ZG.json +++ b/data/chips/STM32F437ZG.json @@ -4446,7 +4446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4938,7 +4938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5212,7 +5212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5324,7 +5324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5541,7 +5541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437ZI.json b/data/chips/STM32F437ZI.json index d97278a..daf4b41 100644 --- a/data/chips/STM32F437ZI.json +++ b/data/chips/STM32F437ZI.json @@ -4383,7 +4383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4875,7 +4875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5017,7 +5017,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5149,7 +5149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5261,7 +5261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5478,7 +5478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439AI.json b/data/chips/STM32F439AI.json index 7220edf..ed56134 100644 --- a/data/chips/STM32F439AI.json +++ b/data/chips/STM32F439AI.json @@ -4946,7 +4946,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5428,7 +5428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5570,7 +5570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5702,7 +5702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5814,7 +5814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439BG.json b/data/chips/STM32F439BG.json index 2c27f80..89fa6b2 100644 --- a/data/chips/STM32F439BG.json +++ b/data/chips/STM32F439BG.json @@ -5598,7 +5598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6100,7 +6100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6242,7 +6242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6374,7 +6374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6486,7 +6486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6723,7 +6723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439BI.json b/data/chips/STM32F439BI.json index 75aa5eb..f1560bc 100644 --- a/data/chips/STM32F439BI.json +++ b/data/chips/STM32F439BI.json @@ -5535,7 +5535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6037,7 +6037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6179,7 +6179,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6311,7 +6311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6423,7 +6423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6660,7 +6660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439IG.json b/data/chips/STM32F439IG.json index 028b06b..ee3d440 100644 --- a/data/chips/STM32F439IG.json +++ b/data/chips/STM32F439IG.json @@ -6484,7 +6484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6986,7 +6986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7260,7 +7260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7372,7 +7372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7609,7 +7609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439II.json b/data/chips/STM32F439II.json index f52dea5..cb4a6c9 100644 --- a/data/chips/STM32F439II.json +++ b/data/chips/STM32F439II.json @@ -6421,7 +6421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6923,7 +6923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7065,7 +7065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7197,7 +7197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7309,7 +7309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7546,7 +7546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439NG.json b/data/chips/STM32F439NG.json index cfdfe3f..cba947a 100644 --- a/data/chips/STM32F439NG.json +++ b/data/chips/STM32F439NG.json @@ -5646,7 +5646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6148,7 +6148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6290,7 +6290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6422,7 +6422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6534,7 +6534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6771,7 +6771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439NI.json b/data/chips/STM32F439NI.json index 0c716f3..99af262 100644 --- a/data/chips/STM32F439NI.json +++ b/data/chips/STM32F439NI.json @@ -5583,7 +5583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6085,7 +6085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6359,7 +6359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6471,7 +6471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6708,7 +6708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439VG.json b/data/chips/STM32F439VG.json index 7917b1c..65169ba 100644 --- a/data/chips/STM32F439VG.json +++ b/data/chips/STM32F439VG.json @@ -3882,7 +3882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4354,7 +4354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4628,7 +4628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4740,7 +4740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4957,7 +4957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439VI.json b/data/chips/STM32F439VI.json index ad20149..c55226a 100644 --- a/data/chips/STM32F439VI.json +++ b/data/chips/STM32F439VI.json @@ -3819,7 +3819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4291,7 +4291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4433,7 +4433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4565,7 +4565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4677,7 +4677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4894,7 +4894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439ZG.json b/data/chips/STM32F439ZG.json index da22834..5a63f00 100644 --- a/data/chips/STM32F439ZG.json +++ b/data/chips/STM32F439ZG.json @@ -5519,7 +5519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6011,7 +6011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6153,7 +6153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6285,7 +6285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6397,7 +6397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6614,7 +6614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439ZI.json b/data/chips/STM32F439ZI.json index 9dc9be7..5777a6e 100644 --- a/data/chips/STM32F439ZI.json +++ b/data/chips/STM32F439ZI.json @@ -5456,7 +5456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5948,7 +5948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6090,7 +6090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6222,7 +6222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6334,7 +6334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446MC.json b/data/chips/STM32F446MC.json index 0cdb4d8..a661e91 100644 --- a/data/chips/STM32F446MC.json +++ b/data/chips/STM32F446MC.json @@ -3284,7 +3284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3731,7 +3731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3888,7 +3888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4020,7 +4020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4334,7 +4334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ME.json b/data/chips/STM32F446ME.json index 99b8df6..879837c 100644 --- a/data/chips/STM32F446ME.json +++ b/data/chips/STM32F446ME.json @@ -3284,7 +3284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3731,7 +3731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3888,7 +3888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4020,7 +4020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4334,7 +4334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446RC.json b/data/chips/STM32F446RC.json index 76378b2..2830673 100644 --- a/data/chips/STM32F446RC.json +++ b/data/chips/STM32F446RC.json @@ -2956,7 +2956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3383,7 +3383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3759,7 +3759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3976,7 +3976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446RE.json b/data/chips/STM32F446RE.json index 65678fd..31c75a3 100644 --- a/data/chips/STM32F446RE.json +++ b/data/chips/STM32F446RE.json @@ -2956,7 +2956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3383,7 +3383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3759,7 +3759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3976,7 +3976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446VC.json b/data/chips/STM32F446VC.json index e5170b9..9ad12cb 100644 --- a/data/chips/STM32F446VC.json +++ b/data/chips/STM32F446VC.json @@ -3882,7 +3882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4354,7 +4354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4511,7 +4511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4643,7 +4643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4755,7 +4755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4972,7 +4972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446VE.json b/data/chips/STM32F446VE.json index 70cb0b4..70cdfe9 100644 --- a/data/chips/STM32F446VE.json +++ b/data/chips/STM32F446VE.json @@ -3882,7 +3882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4354,7 +4354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4511,7 +4511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4643,7 +4643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4755,7 +4755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4972,7 +4972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ZC.json b/data/chips/STM32F446ZC.json index 55a1926..57bf010 100644 --- a/data/chips/STM32F446ZC.json +++ b/data/chips/STM32F446ZC.json @@ -6256,7 +6256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6748,7 +6748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6910,7 +6910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7042,7 +7042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7154,7 +7154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7371,7 +7371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ZE.json b/data/chips/STM32F446ZE.json index 7127b53..ddefe96 100644 --- a/data/chips/STM32F446ZE.json +++ b/data/chips/STM32F446ZE.json @@ -6256,7 +6256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6748,7 +6748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6910,7 +6910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7042,7 +7042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7154,7 +7154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7371,7 +7371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AE.json b/data/chips/STM32F469AE.json index ec97ac0..f19816c 100644 --- a/data/chips/STM32F469AE.json +++ b/data/chips/STM32F469AE.json @@ -5866,7 +5866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6343,7 +6343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6617,7 +6617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6729,7 +6729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6966,7 +6966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AG.json b/data/chips/STM32F469AG.json index eb00d0e..34233d2 100644 --- a/data/chips/STM32F469AG.json +++ b/data/chips/STM32F469AG.json @@ -5962,7 +5962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6439,7 +6439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6581,7 +6581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6713,7 +6713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6825,7 +6825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7062,7 +7062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AI.json b/data/chips/STM32F469AI.json index 26b5111..90e8bf3 100644 --- a/data/chips/STM32F469AI.json +++ b/data/chips/STM32F469AI.json @@ -5899,7 +5899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6376,7 +6376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6518,7 +6518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6650,7 +6650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6762,7 +6762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6999,7 +6999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BE.json b/data/chips/STM32F469BE.json index 8c53c02..87f92ac 100644 --- a/data/chips/STM32F469BE.json +++ b/data/chips/STM32F469BE.json @@ -5674,7 +5674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6176,7 +6176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6318,7 +6318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6450,7 +6450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6562,7 +6562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6799,7 +6799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BG.json b/data/chips/STM32F469BG.json index 0c9fd5a..6e6fc70 100644 --- a/data/chips/STM32F469BG.json +++ b/data/chips/STM32F469BG.json @@ -5770,7 +5770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6272,7 +6272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6414,7 +6414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6546,7 +6546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6658,7 +6658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6895,7 +6895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BI.json b/data/chips/STM32F469BI.json index 6252763..b847826 100644 --- a/data/chips/STM32F469BI.json +++ b/data/chips/STM32F469BI.json @@ -5707,7 +5707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6209,7 +6209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6351,7 +6351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6483,7 +6483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6595,7 +6595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6832,7 +6832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469IE.json b/data/chips/STM32F469IE.json index e3a8152..926cfe3 100644 --- a/data/chips/STM32F469IE.json +++ b/data/chips/STM32F469IE.json @@ -6417,7 +6417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6914,7 +6914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7056,7 +7056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7188,7 +7188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7300,7 +7300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7522,7 +7522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469IG.json b/data/chips/STM32F469IG.json index cf7f3dc..0bd4676 100644 --- a/data/chips/STM32F469IG.json +++ b/data/chips/STM32F469IG.json @@ -6513,7 +6513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7010,7 +7010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7152,7 +7152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7284,7 +7284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7396,7 +7396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7618,7 +7618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469II.json b/data/chips/STM32F469II.json index 0e2a087..bd4b044 100644 --- a/data/chips/STM32F469II.json +++ b/data/chips/STM32F469II.json @@ -6450,7 +6450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7089,7 +7089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7221,7 +7221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7333,7 +7333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7555,7 +7555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NE.json b/data/chips/STM32F469NE.json index eac3b1a..dfc83b0 100644 --- a/data/chips/STM32F469NE.json +++ b/data/chips/STM32F469NE.json @@ -5722,7 +5722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6224,7 +6224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6366,7 +6366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6498,7 +6498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6610,7 +6610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6847,7 +6847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NG.json b/data/chips/STM32F469NG.json index a57bbd3..f4fb828 100644 --- a/data/chips/STM32F469NG.json +++ b/data/chips/STM32F469NG.json @@ -5818,7 +5818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6320,7 +6320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6462,7 +6462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6706,7 +6706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6943,7 +6943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NI.json b/data/chips/STM32F469NI.json index 4a0114a..63f7580 100644 --- a/data/chips/STM32F469NI.json +++ b/data/chips/STM32F469NI.json @@ -5755,7 +5755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6257,7 +6257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6399,7 +6399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6531,7 +6531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6643,7 +6643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6880,7 +6880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VE.json b/data/chips/STM32F469VE.json index 35e4b44..e7b41e8 100644 --- a/data/chips/STM32F469VE.json +++ b/data/chips/STM32F469VE.json @@ -3644,7 +3644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4116,7 +4116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4258,7 +4258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4390,7 +4390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4487,7 +4487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4704,7 +4704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VG.json b/data/chips/STM32F469VG.json index 87f9a29..e172999 100644 --- a/data/chips/STM32F469VG.json +++ b/data/chips/STM32F469VG.json @@ -3740,7 +3740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4212,7 +4212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4354,7 +4354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4486,7 +4486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4583,7 +4583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4800,7 +4800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VI.json b/data/chips/STM32F469VI.json index b938a0c..30d2af0 100644 --- a/data/chips/STM32F469VI.json +++ b/data/chips/STM32F469VI.json @@ -3677,7 +3677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4149,7 +4149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4291,7 +4291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4423,7 +4423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4520,7 +4520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4737,7 +4737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZE.json b/data/chips/STM32F469ZE.json index 9cbde52..3f08b6f 100644 --- a/data/chips/STM32F469ZE.json +++ b/data/chips/STM32F469ZE.json @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4797,7 +4797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4939,7 +4939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5071,7 +5071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5178,7 +5178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5395,7 +5395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZG.json b/data/chips/STM32F469ZG.json index 707e3b4..39afaff 100644 --- a/data/chips/STM32F469ZG.json +++ b/data/chips/STM32F469ZG.json @@ -4421,7 +4421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4893,7 +4893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5035,7 +5035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5167,7 +5167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5274,7 +5274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5491,7 +5491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZI.json b/data/chips/STM32F469ZI.json index f58d00d..2ee7333 100644 --- a/data/chips/STM32F469ZI.json +++ b/data/chips/STM32F469ZI.json @@ -4358,7 +4358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4830,7 +4830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4972,7 +4972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5104,7 +5104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5211,7 +5211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5428,7 +5428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479AG.json b/data/chips/STM32F479AG.json index 9670097..597f4a4 100644 --- a/data/chips/STM32F479AG.json +++ b/data/chips/STM32F479AG.json @@ -6026,7 +6026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6503,7 +6503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6645,7 +6645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6777,7 +6777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6889,7 +6889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7126,7 +7126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479AI.json b/data/chips/STM32F479AI.json index 650dfdd..a39878b 100644 --- a/data/chips/STM32F479AI.json +++ b/data/chips/STM32F479AI.json @@ -5963,7 +5963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6440,7 +6440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6582,7 +6582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6714,7 +6714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6826,7 +6826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7063,7 +7063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479BG.json b/data/chips/STM32F479BG.json index 560a9d1..837ffec 100644 --- a/data/chips/STM32F479BG.json +++ b/data/chips/STM32F479BG.json @@ -5834,7 +5834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6336,7 +6336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6478,7 +6478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6610,7 +6610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6722,7 +6722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6959,7 +6959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479BI.json b/data/chips/STM32F479BI.json index 6b881d1..f2ec0df 100644 --- a/data/chips/STM32F479BI.json +++ b/data/chips/STM32F479BI.json @@ -5771,7 +5771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6273,7 +6273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6415,7 +6415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6547,7 +6547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6659,7 +6659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6896,7 +6896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479IG.json b/data/chips/STM32F479IG.json index b23de7a..70d5092 100644 --- a/data/chips/STM32F479IG.json +++ b/data/chips/STM32F479IG.json @@ -6577,7 +6577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7074,7 +7074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7216,7 +7216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7348,7 +7348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7460,7 +7460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7682,7 +7682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479II.json b/data/chips/STM32F479II.json index bb645f9..0bc59ac 100644 --- a/data/chips/STM32F479II.json +++ b/data/chips/STM32F479II.json @@ -6514,7 +6514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7011,7 +7011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7153,7 +7153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7285,7 +7285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7397,7 +7397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7619,7 +7619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479NG.json b/data/chips/STM32F479NG.json index b31d0ac..93b24e5 100644 --- a/data/chips/STM32F479NG.json +++ b/data/chips/STM32F479NG.json @@ -5882,7 +5882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6384,7 +6384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6526,7 +6526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6658,7 +6658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6770,7 +6770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7007,7 +7007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479NI.json b/data/chips/STM32F479NI.json index c50a3f3..290456e 100644 --- a/data/chips/STM32F479NI.json +++ b/data/chips/STM32F479NI.json @@ -5819,7 +5819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6321,7 +6321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6463,7 +6463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6595,7 +6595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6707,7 +6707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6944,7 +6944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479VG.json b/data/chips/STM32F479VG.json index 9de405e..60b1a76 100644 --- a/data/chips/STM32F479VG.json +++ b/data/chips/STM32F479VG.json @@ -3804,7 +3804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4276,7 +4276,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4418,7 +4418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4550,7 +4550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4647,7 +4647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4864,7 +4864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479VI.json b/data/chips/STM32F479VI.json index 7858d0f..e459c85 100644 --- a/data/chips/STM32F479VI.json +++ b/data/chips/STM32F479VI.json @@ -3741,7 +3741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4213,7 +4213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4355,7 +4355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4487,7 +4487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4584,7 +4584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4801,7 +4801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479ZG.json b/data/chips/STM32F479ZG.json index bf0fb65..4f91de6 100644 --- a/data/chips/STM32F479ZG.json +++ b/data/chips/STM32F479ZG.json @@ -4485,7 +4485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4957,7 +4957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5231,7 +5231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5338,7 +5338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5555,7 +5555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479ZI.json b/data/chips/STM32F479ZI.json index d28267b..07e8708 100644 --- a/data/chips/STM32F479ZI.json +++ b/data/chips/STM32F479ZI.json @@ -4422,7 +4422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4894,7 +4894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5036,7 +5036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5168,7 +5168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5492,7 +5492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722IC.json b/data/chips/STM32F722IC.json index a69e8fc..612a374 100644 --- a/data/chips/STM32F722IC.json +++ b/data/chips/STM32F722IC.json @@ -5907,7 +5907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6414,7 +6414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6556,7 +6556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6688,7 +6688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6800,7 +6800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7037,7 +7037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722IE.json b/data/chips/STM32F722IE.json index 76499e6..00e723d 100644 --- a/data/chips/STM32F722IE.json +++ b/data/chips/STM32F722IE.json @@ -5918,7 +5918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6425,7 +6425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6567,7 +6567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6699,7 +6699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6811,7 +6811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7048,7 +7048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722RC.json b/data/chips/STM32F722RC.json index 5c1ae6b..ffc52ae 100644 --- a/data/chips/STM32F722RC.json +++ b/data/chips/STM32F722RC.json @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3089,7 +3089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3231,7 +3231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3363,7 +3363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3450,7 +3450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722RE.json b/data/chips/STM32F722RE.json index 1b71ab9..6430cc6 100644 --- a/data/chips/STM32F722RE.json +++ b/data/chips/STM32F722RE.json @@ -2673,7 +2673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3100,7 +3100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3242,7 +3242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3374,7 +3374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3461,7 +3461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3678,7 +3678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722VC.json b/data/chips/STM32F722VC.json index 4c5368b..cb8674d 100644 --- a/data/chips/STM32F722VC.json +++ b/data/chips/STM32F722VC.json @@ -3608,7 +3608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4085,7 +4085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4227,7 +4227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4359,7 +4359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4471,7 +4471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4688,7 +4688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722VE.json b/data/chips/STM32F722VE.json index ea71aad..00b01d0 100644 --- a/data/chips/STM32F722VE.json +++ b/data/chips/STM32F722VE.json @@ -3619,7 +3619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4096,7 +4096,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4238,7 +4238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4370,7 +4370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4482,7 +4482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4699,7 +4699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722ZC.json b/data/chips/STM32F722ZC.json index 88d4336..617506e 100644 --- a/data/chips/STM32F722ZC.json +++ b/data/chips/STM32F722ZC.json @@ -4240,7 +4240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4737,7 +4737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4879,7 +4879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5011,7 +5011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5123,7 +5123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5340,7 +5340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722ZE.json b/data/chips/STM32F722ZE.json index 4421c51..1897562 100644 --- a/data/chips/STM32F722ZE.json +++ b/data/chips/STM32F722ZE.json @@ -4251,7 +4251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4748,7 +4748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5022,7 +5022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5134,7 +5134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5351,7 +5351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723IC.json b/data/chips/STM32F723IC.json index 85fc124..a89a52f 100644 --- a/data/chips/STM32F723IC.json +++ b/data/chips/STM32F723IC.json @@ -5872,7 +5872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6359,7 +6359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6501,7 +6501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6633,7 +6633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6745,7 +6745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6982,7 +6982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723IE.json b/data/chips/STM32F723IE.json index 37f9f17..0562fe4 100644 --- a/data/chips/STM32F723IE.json +++ b/data/chips/STM32F723IE.json @@ -5883,7 +5883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6370,7 +6370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6512,7 +6512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6644,7 +6644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6756,7 +6756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6993,7 +6993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723VC.json b/data/chips/STM32F723VC.json index d4c7ecd..7477ccd 100644 --- a/data/chips/STM32F723VC.json +++ b/data/chips/STM32F723VC.json @@ -4050,7 +4050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4462,7 +4462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5065,7 +5065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723VE.json b/data/chips/STM32F723VE.json index 978a2ab..6679128 100644 --- a/data/chips/STM32F723VE.json +++ b/data/chips/STM32F723VE.json @@ -4061,7 +4061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4473,7 +4473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4615,7 +4615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4747,7 +4747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4859,7 +4859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5076,7 +5076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723ZC.json b/data/chips/STM32F723ZC.json index 89a3ab0..9c55602 100644 --- a/data/chips/STM32F723ZC.json +++ b/data/chips/STM32F723ZC.json @@ -5075,7 +5075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5507,7 +5507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5649,7 +5649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5781,7 +5781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5893,7 +5893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6110,7 +6110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723ZE.json b/data/chips/STM32F723ZE.json index 7a59dc6..1bfe9d1 100644 --- a/data/chips/STM32F723ZE.json +++ b/data/chips/STM32F723ZE.json @@ -5086,7 +5086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5518,7 +5518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5660,7 +5660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5792,7 +5792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5904,7 +5904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6121,7 +6121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730I8.json b/data/chips/STM32F730I8.json index 4fd6d70..cad1b3f 100644 --- a/data/chips/STM32F730I8.json +++ b/data/chips/STM32F730I8.json @@ -4815,7 +4815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5302,7 +5302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5444,7 +5444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5576,7 +5576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5688,7 +5688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5925,7 +5925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730R8.json b/data/chips/STM32F730R8.json index 7eb0198..d4d3a3d 100644 --- a/data/chips/STM32F730R8.json +++ b/data/chips/STM32F730R8.json @@ -2667,7 +2667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3094,7 +3094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3236,7 +3236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3368,7 +3368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3455,7 +3455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730V8.json b/data/chips/STM32F730V8.json index abfd6f7..4e3497e 100644 --- a/data/chips/STM32F730V8.json +++ b/data/chips/STM32F730V8.json @@ -3613,7 +3613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4090,7 +4090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4232,7 +4232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4364,7 +4364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4476,7 +4476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4693,7 +4693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730Z8.json b/data/chips/STM32F730Z8.json index f0f5261..f8b39ee 100644 --- a/data/chips/STM32F730Z8.json +++ b/data/chips/STM32F730Z8.json @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4784,7 +4784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4916,7 +4916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5028,7 +5028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5245,7 +5245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732IE.json b/data/chips/STM32F732IE.json index b7bd65e..1992fb0 100644 --- a/data/chips/STM32F732IE.json +++ b/data/chips/STM32F732IE.json @@ -5957,7 +5957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6464,7 +6464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6606,7 +6606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6738,7 +6738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6850,7 +6850,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7087,7 +7087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732RE.json b/data/chips/STM32F732RE.json index 9bc48fc..7ba0422 100644 --- a/data/chips/STM32F732RE.json +++ b/data/chips/STM32F732RE.json @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3281,7 +3281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3413,7 +3413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3500,7 +3500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3717,7 +3717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732VE.json b/data/chips/STM32F732VE.json index 2f15512..34d52d0 100644 --- a/data/chips/STM32F732VE.json +++ b/data/chips/STM32F732VE.json @@ -3658,7 +3658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4135,7 +4135,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4409,7 +4409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4738,7 +4738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732ZE.json b/data/chips/STM32F732ZE.json index 4af56d4..11ca3b3 100644 --- a/data/chips/STM32F732ZE.json +++ b/data/chips/STM32F732ZE.json @@ -4290,7 +4290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4787,7 +4787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5061,7 +5061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5173,7 +5173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5390,7 +5390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733IE.json b/data/chips/STM32F733IE.json index 43a0eaa..2e1938d 100644 --- a/data/chips/STM32F733IE.json +++ b/data/chips/STM32F733IE.json @@ -5922,7 +5922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6683,7 +6683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6795,7 +6795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7032,7 +7032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733VE.json b/data/chips/STM32F733VE.json index c87383b..446142b 100644 --- a/data/chips/STM32F733VE.json +++ b/data/chips/STM32F733VE.json @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4512,7 +4512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4654,7 +4654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4898,7 +4898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5115,7 +5115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733ZE.json b/data/chips/STM32F733ZE.json index d5080a4..734171e 100644 --- a/data/chips/STM32F733ZE.json +++ b/data/chips/STM32F733ZE.json @@ -5125,7 +5125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5557,7 +5557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5699,7 +5699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5831,7 +5831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5943,7 +5943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6160,7 +6160,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745IE.json b/data/chips/STM32F745IE.json index c3815be..04d4b88 100644 --- a/data/chips/STM32F745IE.json +++ b/data/chips/STM32F745IE.json @@ -6709,7 +6709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7216,7 +7216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7358,7 +7358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7490,7 +7490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7602,7 +7602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7839,7 +7839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745IG.json b/data/chips/STM32F745IG.json index 824a524..aec899f 100644 --- a/data/chips/STM32F745IG.json +++ b/data/chips/STM32F745IG.json @@ -6709,7 +6709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7216,7 +7216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7358,7 +7358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7490,7 +7490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7602,7 +7602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7839,7 +7839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745VE.json b/data/chips/STM32F745VE.json index 8858b4e..9fbfbfe 100644 --- a/data/chips/STM32F745VE.json +++ b/data/chips/STM32F745VE.json @@ -4760,7 +4760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5237,7 +5237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5511,7 +5511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5623,7 +5623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5840,7 +5840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745VG.json b/data/chips/STM32F745VG.json index 3745ddc..e39dfbc 100644 --- a/data/chips/STM32F745VG.json +++ b/data/chips/STM32F745VG.json @@ -4760,7 +4760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5237,7 +5237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5511,7 +5511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5623,7 +5623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5840,7 +5840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745ZE.json b/data/chips/STM32F745ZE.json index e68e4e4..50a1413 100644 --- a/data/chips/STM32F745ZE.json +++ b/data/chips/STM32F745ZE.json @@ -4922,7 +4922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5419,7 +5419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5561,7 +5561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5693,7 +5693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5805,7 +5805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6022,7 +6022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745ZG.json b/data/chips/STM32F745ZG.json index a0207f0..14fb48a 100644 --- a/data/chips/STM32F745ZG.json +++ b/data/chips/STM32F745ZG.json @@ -4922,7 +4922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5419,7 +5419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5561,7 +5561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5693,7 +5693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5805,7 +5805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6022,7 +6022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746BE.json b/data/chips/STM32F746BE.json index 1282bce..a943470 100644 --- a/data/chips/STM32F746BE.json +++ b/data/chips/STM32F746BE.json @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6670,7 +6670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6812,7 +6812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6944,7 +6944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7056,7 +7056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7293,7 +7293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746BG.json b/data/chips/STM32F746BG.json index 83d5d78..1984c04 100644 --- a/data/chips/STM32F746BG.json +++ b/data/chips/STM32F746BG.json @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6670,7 +6670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6812,7 +6812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6944,7 +6944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7056,7 +7056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7293,7 +7293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746IE.json b/data/chips/STM32F746IE.json index 0bb9e6c..2f5369c 100644 --- a/data/chips/STM32F746IE.json +++ b/data/chips/STM32F746IE.json @@ -7043,7 +7043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7692,7 +7692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7824,7 +7824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7936,7 +7936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8173,7 +8173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746IG.json b/data/chips/STM32F746IG.json index 36f1387..5b72370 100644 --- a/data/chips/STM32F746IG.json +++ b/data/chips/STM32F746IG.json @@ -7043,7 +7043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7692,7 +7692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7824,7 +7824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7936,7 +7936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8173,7 +8173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746NE.json b/data/chips/STM32F746NE.json index ef39f9c..72f9d4d 100644 --- a/data/chips/STM32F746NE.json +++ b/data/chips/STM32F746NE.json @@ -6211,7 +6211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6718,7 +6718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6860,7 +6860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6992,7 +6992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7104,7 +7104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7341,7 +7341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746NG.json b/data/chips/STM32F746NG.json index 5a18c83..708d067 100644 --- a/data/chips/STM32F746NG.json +++ b/data/chips/STM32F746NG.json @@ -6211,7 +6211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6718,7 +6718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6860,7 +6860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6992,7 +6992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7104,7 +7104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7341,7 +7341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746VE.json b/data/chips/STM32F746VE.json index 4d99f42..b8a0486 100644 --- a/data/chips/STM32F746VE.json +++ b/data/chips/STM32F746VE.json @@ -4949,7 +4949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5426,7 +5426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5568,7 +5568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5700,7 +5700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5812,7 +5812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6029,7 +6029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746VG.json b/data/chips/STM32F746VG.json index 0e25c43..3ede01e 100644 --- a/data/chips/STM32F746VG.json +++ b/data/chips/STM32F746VG.json @@ -4949,7 +4949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5426,7 +5426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5568,7 +5568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5700,7 +5700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5812,7 +5812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6029,7 +6029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746ZE.json b/data/chips/STM32F746ZE.json index 9edc9bc..a6408ff 100644 --- a/data/chips/STM32F746ZE.json +++ b/data/chips/STM32F746ZE.json @@ -6025,7 +6025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6522,7 +6522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6664,7 +6664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6796,7 +6796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7125,7 +7125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746ZG.json b/data/chips/STM32F746ZG.json index 6fa0724..a072116 100644 --- a/data/chips/STM32F746ZG.json +++ b/data/chips/STM32F746ZG.json @@ -6025,7 +6025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6522,7 +6522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6664,7 +6664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6796,7 +6796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7125,7 +7125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750N8.json b/data/chips/STM32F750N8.json index 63b00c1..70e0ea2 100644 --- a/data/chips/STM32F750N8.json +++ b/data/chips/STM32F750N8.json @@ -6234,7 +6234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6741,7 +6741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6883,7 +6883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7015,7 +7015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7127,7 +7127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7364,7 +7364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750V8.json b/data/chips/STM32F750V8.json index 23daae0..e81ab2c 100644 --- a/data/chips/STM32F750V8.json +++ b/data/chips/STM32F750V8.json @@ -4366,7 +4366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4843,7 +4843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4985,7 +4985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5117,7 +5117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5229,7 +5229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5446,7 +5446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750Z8.json b/data/chips/STM32F750Z8.json index 3e33545..7a57ee2 100644 --- a/data/chips/STM32F750Z8.json +++ b/data/chips/STM32F750Z8.json @@ -5184,7 +5184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5681,7 +5681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5823,7 +5823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5955,7 +5955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6067,7 +6067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6284,7 +6284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756BG.json b/data/chips/STM32F756BG.json index 90c1845..f93b3d9 100644 --- a/data/chips/STM32F756BG.json +++ b/data/chips/STM32F756BG.json @@ -6232,7 +6232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6739,7 +6739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6881,7 +6881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7013,7 +7013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7125,7 +7125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7362,7 +7362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756IG.json b/data/chips/STM32F756IG.json index 921ceba..3a36248 100644 --- a/data/chips/STM32F756IG.json +++ b/data/chips/STM32F756IG.json @@ -7112,7 +7112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7619,7 +7619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7761,7 +7761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7893,7 +7893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8005,7 +8005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8242,7 +8242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756NG.json b/data/chips/STM32F756NG.json index 2b80b31..4008ac0 100644 --- a/data/chips/STM32F756NG.json +++ b/data/chips/STM32F756NG.json @@ -6280,7 +6280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6787,7 +6787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6929,7 +6929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7061,7 +7061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7173,7 +7173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7410,7 +7410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756VG.json b/data/chips/STM32F756VG.json index 99af5d9..7a86967 100644 --- a/data/chips/STM32F756VG.json +++ b/data/chips/STM32F756VG.json @@ -5018,7 +5018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5495,7 +5495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5637,7 +5637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5769,7 +5769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5881,7 +5881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6098,7 +6098,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756ZG.json b/data/chips/STM32F756ZG.json index e1635eb..3174ef8 100644 --- a/data/chips/STM32F756ZG.json +++ b/data/chips/STM32F756ZG.json @@ -6094,7 +6094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6591,7 +6591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6733,7 +6733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6865,7 +6865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6977,7 +6977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7194,7 +7194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765BG.json b/data/chips/STM32F765BG.json index a91b7bb..5a8595a 100644 --- a/data/chips/STM32F765BG.json +++ b/data/chips/STM32F765BG.json @@ -6505,7 +6505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7012,7 +7012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7154,7 +7154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7286,7 +7286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7398,7 +7398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7635,7 +7635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765BI.json b/data/chips/STM32F765BI.json index acc378a..20c4e56 100644 --- a/data/chips/STM32F765BI.json +++ b/data/chips/STM32F765BI.json @@ -6489,7 +6489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6996,7 +6996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7138,7 +7138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7270,7 +7270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7382,7 +7382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7619,7 +7619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765IG.json b/data/chips/STM32F765IG.json index d3800d9..f04695a 100644 --- a/data/chips/STM32F765IG.json +++ b/data/chips/STM32F765IG.json @@ -7531,7 +7531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8038,7 +8038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8180,7 +8180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8312,7 +8312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8424,7 +8424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8661,7 +8661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765II.json b/data/chips/STM32F765II.json index 9fa75ff..e3effa3 100644 --- a/data/chips/STM32F765II.json +++ b/data/chips/STM32F765II.json @@ -7509,7 +7509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8016,7 +8016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8158,7 +8158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8290,7 +8290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8402,7 +8402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8639,7 +8639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765NG.json b/data/chips/STM32F765NG.json index 42b3b61..b769385 100644 --- a/data/chips/STM32F765NG.json +++ b/data/chips/STM32F765NG.json @@ -6559,7 +6559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7066,7 +7066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7208,7 +7208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7340,7 +7340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7452,7 +7452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7689,7 +7689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765NI.json b/data/chips/STM32F765NI.json index 25c2030..8ae0d48 100644 --- a/data/chips/STM32F765NI.json +++ b/data/chips/STM32F765NI.json @@ -6537,7 +6537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7186,7 +7186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7318,7 +7318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7430,7 +7430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7667,7 +7667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765VG.json b/data/chips/STM32F765VG.json index 9477142..51951e5 100644 --- a/data/chips/STM32F765VG.json +++ b/data/chips/STM32F765VG.json @@ -5548,7 +5548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6025,7 +6025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6167,7 +6167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6299,7 +6299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6411,7 +6411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6628,7 +6628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765VI.json b/data/chips/STM32F765VI.json index 8cf5636..c30ec97 100644 --- a/data/chips/STM32F765VI.json +++ b/data/chips/STM32F765VI.json @@ -5526,7 +5526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6003,7 +6003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6145,7 +6145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6277,7 +6277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6606,7 +6606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765ZG.json b/data/chips/STM32F765ZG.json index edd93ba..ed369ae 100644 --- a/data/chips/STM32F765ZG.json +++ b/data/chips/STM32F765ZG.json @@ -5739,7 +5739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6236,7 +6236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6378,7 +6378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6510,7 +6510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6622,7 +6622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6839,7 +6839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765ZI.json b/data/chips/STM32F765ZI.json index 15f11cf..4bd5c38 100644 --- a/data/chips/STM32F765ZI.json +++ b/data/chips/STM32F765ZI.json @@ -5717,7 +5717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6214,7 +6214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6356,7 +6356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6488,7 +6488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6600,7 +6600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6817,7 +6817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767BG.json b/data/chips/STM32F767BG.json index 3c63876..b449b88 100644 --- a/data/chips/STM32F767BG.json +++ b/data/chips/STM32F767BG.json @@ -7120,7 +7120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7627,7 +7627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7769,7 +7769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7901,7 +7901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8013,7 +8013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8250,7 +8250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767BI.json b/data/chips/STM32F767BI.json index 80e80ca..497729f 100644 --- a/data/chips/STM32F767BI.json +++ b/data/chips/STM32F767BI.json @@ -7098,7 +7098,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7605,7 +7605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7747,7 +7747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7879,7 +7879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7991,7 +7991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8228,7 +8228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767IG.json b/data/chips/STM32F767IG.json index 5a36084..265b0a7 100644 --- a/data/chips/STM32F767IG.json +++ b/data/chips/STM32F767IG.json @@ -7980,7 +7980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8487,7 +8487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8629,7 +8629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8761,7 +8761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8873,7 +8873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9110,7 +9110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767II.json b/data/chips/STM32F767II.json index b350eaa..67f5fce 100644 --- a/data/chips/STM32F767II.json +++ b/data/chips/STM32F767II.json @@ -7958,7 +7958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8465,7 +8465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8607,7 +8607,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8739,7 +8739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8851,7 +8851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9088,7 +9088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767NG.json b/data/chips/STM32F767NG.json index a1145f1..17013dc 100644 --- a/data/chips/STM32F767NG.json +++ b/data/chips/STM32F767NG.json @@ -7168,7 +7168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7675,7 +7675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7817,7 +7817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7949,7 +7949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8061,7 +8061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8298,7 +8298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767NI.json b/data/chips/STM32F767NI.json index b58c423..9d3ca55 100644 --- a/data/chips/STM32F767NI.json +++ b/data/chips/STM32F767NI.json @@ -7146,7 +7146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7653,7 +7653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7795,7 +7795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7927,7 +7927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8039,7 +8039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8276,7 +8276,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767VG.json b/data/chips/STM32F767VG.json index 413ecc1..3db23c4 100644 --- a/data/chips/STM32F767VG.json +++ b/data/chips/STM32F767VG.json @@ -5832,7 +5832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6309,7 +6309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6451,7 +6451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6583,7 +6583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6695,7 +6695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6912,7 +6912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767VI.json b/data/chips/STM32F767VI.json index 15e83f8..daa0120 100644 --- a/data/chips/STM32F767VI.json +++ b/data/chips/STM32F767VI.json @@ -5810,7 +5810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6287,7 +6287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6561,7 +6561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6673,7 +6673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6890,7 +6890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767ZG.json b/data/chips/STM32F767ZG.json index 488b3ed..2c39def 100644 --- a/data/chips/STM32F767ZG.json +++ b/data/chips/STM32F767ZG.json @@ -6078,7 +6078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6575,7 +6575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6717,7 +6717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6961,7 +6961,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7178,7 +7178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767ZI.json b/data/chips/STM32F767ZI.json index a8311b7..3f10a1c 100644 --- a/data/chips/STM32F767ZI.json +++ b/data/chips/STM32F767ZI.json @@ -6056,7 +6056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6553,7 +6553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6695,7 +6695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6827,7 +6827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6939,7 +6939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7156,7 +7156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F768AI.json b/data/chips/STM32F768AI.json index 05a7d40..5a32b58 100644 --- a/data/chips/STM32F768AI.json +++ b/data/chips/STM32F768AI.json @@ -5993,7 +5993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6475,7 +6475,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6617,7 +6617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6749,7 +6749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6861,7 +6861,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7098,7 +7098,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769AG.json b/data/chips/STM32F769AG.json index d244a99..2c17f43 100644 --- a/data/chips/STM32F769AG.json +++ b/data/chips/STM32F769AG.json @@ -6015,7 +6015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6497,7 +6497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6639,7 +6639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6771,7 +6771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6883,7 +6883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7120,7 +7120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769AI.json b/data/chips/STM32F769AI.json index 5966ddb..86ed3a1 100644 --- a/data/chips/STM32F769AI.json +++ b/data/chips/STM32F769AI.json @@ -6282,7 +6282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6764,7 +6764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6906,7 +6906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7038,7 +7038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7150,7 +7150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7387,7 +7387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769BG.json b/data/chips/STM32F769BG.json index 11ab00b..1b0c37f 100644 --- a/data/chips/STM32F769BG.json +++ b/data/chips/STM32F769BG.json @@ -7129,7 +7129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7636,7 +7636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7778,7 +7778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7910,7 +7910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8022,7 +8022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8259,7 +8259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769BI.json b/data/chips/STM32F769BI.json index 23a42b3..2906fc8 100644 --- a/data/chips/STM32F769BI.json +++ b/data/chips/STM32F769BI.json @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7614,7 +7614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7756,7 +7756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7888,7 +7888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8000,7 +8000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8237,7 +8237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769IG.json b/data/chips/STM32F769IG.json index ca0d481..eb70c47 100644 --- a/data/chips/STM32F769IG.json +++ b/data/chips/STM32F769IG.json @@ -6647,7 +6647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7149,7 +7149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7291,7 +7291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7423,7 +7423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7535,7 +7535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7757,7 +7757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769II.json b/data/chips/STM32F769II.json index c4fc2f4..44f4a59 100644 --- a/data/chips/STM32F769II.json +++ b/data/chips/STM32F769II.json @@ -6625,7 +6625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7127,7 +7127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7269,7 +7269,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7401,7 +7401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7513,7 +7513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7735,7 +7735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769NG.json b/data/chips/STM32F769NG.json index 587a8c6..f0853ed 100644 --- a/data/chips/STM32F769NG.json +++ b/data/chips/STM32F769NG.json @@ -7177,7 +7177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7684,7 +7684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7826,7 +7826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7958,7 +7958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8070,7 +8070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8307,7 +8307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769NI.json b/data/chips/STM32F769NI.json index b8be833..657b3a5 100644 --- a/data/chips/STM32F769NI.json +++ b/data/chips/STM32F769NI.json @@ -7155,7 +7155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7662,7 +7662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7804,7 +7804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7936,7 +7936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8048,7 +8048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8285,7 +8285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777BI.json b/data/chips/STM32F777BI.json index f7bbb7c..6e36025 100644 --- a/data/chips/STM32F777BI.json +++ b/data/chips/STM32F777BI.json @@ -7173,7 +7173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7680,7 +7680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7822,7 +7822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7954,7 +7954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8066,7 +8066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8303,7 +8303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777II.json b/data/chips/STM32F777II.json index 11a226c..82178a1 100644 --- a/data/chips/STM32F777II.json +++ b/data/chips/STM32F777II.json @@ -8033,7 +8033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8540,7 +8540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8682,7 +8682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8814,7 +8814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8926,7 +8926,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9163,7 +9163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777NI.json b/data/chips/STM32F777NI.json index 6369765..a1f8bbc 100644 --- a/data/chips/STM32F777NI.json +++ b/data/chips/STM32F777NI.json @@ -7221,7 +7221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7728,7 +7728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7870,7 +7870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8002,7 +8002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8114,7 +8114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8351,7 +8351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777VI.json b/data/chips/STM32F777VI.json index af0fd3b..7ea2fa1 100644 --- a/data/chips/STM32F777VI.json +++ b/data/chips/STM32F777VI.json @@ -5885,7 +5885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6362,7 +6362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6504,7 +6504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6636,7 +6636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6748,7 +6748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6965,7 +6965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777ZI.json b/data/chips/STM32F777ZI.json index e55e70b..a9a0703 100644 --- a/data/chips/STM32F777ZI.json +++ b/data/chips/STM32F777ZI.json @@ -6131,7 +6131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6628,7 +6628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6770,7 +6770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7014,7 +7014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7231,7 +7231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F778AI.json b/data/chips/STM32F778AI.json index c03e859..a726e3a 100644 --- a/data/chips/STM32F778AI.json +++ b/data/chips/STM32F778AI.json @@ -6345,7 +6345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6827,7 +6827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6969,7 +6969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7101,7 +7101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7213,7 +7213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7450,7 +7450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779AI.json b/data/chips/STM32F779AI.json index 58ca6f9..fa9ab7e 100644 --- a/data/chips/STM32F779AI.json +++ b/data/chips/STM32F779AI.json @@ -6351,7 +6351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6833,7 +6833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6975,7 +6975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7219,7 +7219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7456,7 +7456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779BI.json b/data/chips/STM32F779BI.json index b13f2d4..7bf5ca9 100644 --- a/data/chips/STM32F779BI.json +++ b/data/chips/STM32F779BI.json @@ -7176,7 +7176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7683,7 +7683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7825,7 +7825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7957,7 +7957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8069,7 +8069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8306,7 +8306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779II.json b/data/chips/STM32F779II.json index 30c2205..24482ba 100644 --- a/data/chips/STM32F779II.json +++ b/data/chips/STM32F779II.json @@ -6694,7 +6694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7196,7 +7196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7338,7 +7338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7470,7 +7470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7582,7 +7582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7804,7 +7804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779NI.json b/data/chips/STM32F779NI.json index 1a1375c..9d48d7d 100644 --- a/data/chips/STM32F779NI.json +++ b/data/chips/STM32F779NI.json @@ -7224,7 +7224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7731,7 +7731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7873,7 +7873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8005,7 +8005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8117,7 +8117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8354,7 +8354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G030C6.json b/data/chips/STM32G030C6.json index 32d0f29..a222b5d 100644 --- a/data/chips/STM32G030C6.json +++ b/data/chips/STM32G030C6.json @@ -1568,7 +1568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1813,7 +1813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030C8.json b/data/chips/STM32G030C8.json index 43c2766..e376f6e 100644 --- a/data/chips/STM32G030C8.json +++ b/data/chips/STM32G030C8.json @@ -1568,7 +1568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1813,7 +1813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030F6.json b/data/chips/STM32G030F6.json index 138f0b6..1e17f63 100644 --- a/data/chips/STM32G030F6.json +++ b/data/chips/STM32G030F6.json @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1528,7 +1528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1610,7 +1610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1697,7 +1697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030J6.json b/data/chips/STM32G030J6.json index ebdd954..0ca0c6e 100644 --- a/data/chips/STM32G030J6.json +++ b/data/chips/STM32G030J6.json @@ -1125,7 +1125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1305,7 +1305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1382,7 +1382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1459,7 +1459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030K6.json b/data/chips/STM32G030K6.json index db99720..ff0051e 100644 --- a/data/chips/STM32G030K6.json +++ b/data/chips/STM32G030K6.json @@ -1386,7 +1386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1591,7 +1591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1673,7 +1673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1760,7 +1760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030K8.json b/data/chips/STM32G030K8.json index f9eaf3c..052596a 100644 --- a/data/chips/STM32G030K8.json +++ b/data/chips/STM32G030K8.json @@ -1386,7 +1386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1591,7 +1591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1673,7 +1673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1760,7 +1760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C4.json b/data/chips/STM32G031C4.json index 7441fb4..8773428 100644 --- a/data/chips/STM32G031C4.json +++ b/data/chips/STM32G031C4.json @@ -2080,7 +2080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2651,7 +2651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C6.json b/data/chips/STM32G031C6.json index 4b45eea..4fc94c8 100644 --- a/data/chips/STM32G031C6.json +++ b/data/chips/STM32G031C6.json @@ -2080,7 +2080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2651,7 +2651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C8.json b/data/chips/STM32G031C8.json index 04d6be2..3d67472 100644 --- a/data/chips/STM32G031C8.json +++ b/data/chips/STM32G031C8.json @@ -2080,7 +2080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2651,7 +2651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F4.json b/data/chips/STM32G031F4.json index 81ba88c..d17a00e 100644 --- a/data/chips/STM32G031F4.json +++ b/data/chips/STM32G031F4.json @@ -1514,7 +1514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1719,7 +1719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1801,7 +1801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1888,7 +1888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F6.json b/data/chips/STM32G031F6.json index ff6fecf..25225e2 100644 --- a/data/chips/STM32G031F6.json +++ b/data/chips/STM32G031F6.json @@ -1514,7 +1514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1719,7 +1719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1801,7 +1801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1888,7 +1888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F8.json b/data/chips/STM32G031F8.json index 4764335..325d010 100644 --- a/data/chips/STM32G031F8.json +++ b/data/chips/STM32G031F8.json @@ -1514,7 +1514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1719,7 +1719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1801,7 +1801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1888,7 +1888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G4.json b/data/chips/STM32G031G4.json index 835cb12..54707d9 100644 --- a/data/chips/STM32G031G4.json +++ b/data/chips/STM32G031G4.json @@ -1529,7 +1529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1734,7 +1734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1816,7 +1816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1898,7 +1898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2030,7 +2030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G6.json b/data/chips/STM32G031G6.json index 023cbba..ff3337a 100644 --- a/data/chips/STM32G031G6.json +++ b/data/chips/STM32G031G6.json @@ -1529,7 +1529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1734,7 +1734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1816,7 +1816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1898,7 +1898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2030,7 +2030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G8.json b/data/chips/STM32G031G8.json index beb5f6b..cbdd475 100644 --- a/data/chips/STM32G031G8.json +++ b/data/chips/STM32G031G8.json @@ -1529,7 +1529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1734,7 +1734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1816,7 +1816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1898,7 +1898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2030,7 +2030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031J4.json b/data/chips/STM32G031J4.json index 78ec341..98448da 100644 --- a/data/chips/STM32G031J4.json +++ b/data/chips/STM32G031J4.json @@ -1291,7 +1291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1471,7 +1471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1548,7 +1548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1625,7 +1625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1732,7 +1732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031J6.json b/data/chips/STM32G031J6.json index 4902688..2df2614 100644 --- a/data/chips/STM32G031J6.json +++ b/data/chips/STM32G031J6.json @@ -1291,7 +1291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1471,7 +1471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1548,7 +1548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1625,7 +1625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1732,7 +1732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K4.json b/data/chips/STM32G031K4.json index 8634f9b..ed50625 100644 --- a/data/chips/STM32G031K4.json +++ b/data/chips/STM32G031K4.json @@ -1777,7 +1777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1982,7 +1982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2064,7 +2064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2151,7 +2151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2283,7 +2283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K6.json b/data/chips/STM32G031K6.json index f6b6b71..52122a5 100644 --- a/data/chips/STM32G031K6.json +++ b/data/chips/STM32G031K6.json @@ -1777,7 +1777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1982,7 +1982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2064,7 +2064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2151,7 +2151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2283,7 +2283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K8.json b/data/chips/STM32G031K8.json index ad1de5c..69e563b 100644 --- a/data/chips/STM32G031K8.json +++ b/data/chips/STM32G031K8.json @@ -1777,7 +1777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1982,7 +1982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2064,7 +2064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2151,7 +2151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2283,7 +2283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031Y8.json b/data/chips/STM32G031Y8.json index 4161f25..01edd3b 100644 --- a/data/chips/STM32G031Y8.json +++ b/data/chips/STM32G031Y8.json @@ -1504,7 +1504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1709,7 +1709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1791,7 +1791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1878,7 +1878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2005,7 +2005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041C6.json b/data/chips/STM32G041C6.json index 63b359b..d3d96cf 100644 --- a/data/chips/STM32G041C6.json +++ b/data/chips/STM32G041C6.json @@ -2149,7 +2149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2394,7 +2394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2481,7 +2481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2720,7 +2720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041C8.json b/data/chips/STM32G041C8.json index c8baccb..e95b36c 100644 --- a/data/chips/STM32G041C8.json +++ b/data/chips/STM32G041C8.json @@ -2149,7 +2149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2394,7 +2394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2481,7 +2481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2720,7 +2720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041F6.json b/data/chips/STM32G041F6.json index c16d025..732490d 100644 --- a/data/chips/STM32G041F6.json +++ b/data/chips/STM32G041F6.json @@ -1583,7 +1583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1788,7 +1788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1870,7 +1870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1957,7 +1957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2084,7 +2084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041F8.json b/data/chips/STM32G041F8.json index e36679c..957f5ee 100644 --- a/data/chips/STM32G041F8.json +++ b/data/chips/STM32G041F8.json @@ -1583,7 +1583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1788,7 +1788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1870,7 +1870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1957,7 +1957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2084,7 +2084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041G6.json b/data/chips/STM32G041G6.json index b9bb650..71ea90b 100644 --- a/data/chips/STM32G041G6.json +++ b/data/chips/STM32G041G6.json @@ -1598,7 +1598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1803,7 +1803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1885,7 +1885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1967,7 +1967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2099,7 +2099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041G8.json b/data/chips/STM32G041G8.json index 7f45bc1..9a9376f 100644 --- a/data/chips/STM32G041G8.json +++ b/data/chips/STM32G041G8.json @@ -1598,7 +1598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1803,7 +1803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1885,7 +1885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1967,7 +1967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2099,7 +2099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041J6.json b/data/chips/STM32G041J6.json index 1e81a8c..6a8ce00 100644 --- a/data/chips/STM32G041J6.json +++ b/data/chips/STM32G041J6.json @@ -1360,7 +1360,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1540,7 +1540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1617,7 +1617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1694,7 +1694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1801,7 +1801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041K6.json b/data/chips/STM32G041K6.json index 990b248..8449f53 100644 --- a/data/chips/STM32G041K6.json +++ b/data/chips/STM32G041K6.json @@ -1846,7 +1846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2051,7 +2051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2133,7 +2133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2220,7 +2220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041K8.json b/data/chips/STM32G041K8.json index facf08b..6cdc146 100644 --- a/data/chips/STM32G041K8.json +++ b/data/chips/STM32G041K8.json @@ -1846,7 +1846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2051,7 +2051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2133,7 +2133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2220,7 +2220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041Y8.json b/data/chips/STM32G041Y8.json index a608f92..65855cf 100644 --- a/data/chips/STM32G041Y8.json +++ b/data/chips/STM32G041Y8.json @@ -1573,7 +1573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1778,7 +1778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1860,7 +1860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1947,7 +1947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2074,7 +2074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050C6.json b/data/chips/STM32G050C6.json index 82ec91f..0e274c3 100644 --- a/data/chips/STM32G050C6.json +++ b/data/chips/STM32G050C6.json @@ -1759,7 +1759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2004,7 +2004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2134,7 +2134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2313,7 +2313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050C8.json b/data/chips/STM32G050C8.json index 5df9017..50f02e6 100644 --- a/data/chips/STM32G050C8.json +++ b/data/chips/STM32G050C8.json @@ -1759,7 +1759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2004,7 +2004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2134,7 +2134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2313,7 +2313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050F6.json b/data/chips/STM32G050F6.json index 5a1000f..7397817 100644 --- a/data/chips/STM32G050F6.json +++ b/data/chips/STM32G050F6.json @@ -1518,7 +1518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1723,7 +1723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1823,7 +1823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1905,7 +1905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050K6.json b/data/chips/STM32G050K6.json index a6c9fa2..3fbb0ec 100644 --- a/data/chips/STM32G050K6.json +++ b/data/chips/STM32G050K6.json @@ -1581,7 +1581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1968,7 +1968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050K8.json b/data/chips/STM32G050K8.json index 21e845a..a5da5d0 100644 --- a/data/chips/STM32G050K8.json +++ b/data/chips/STM32G050K8.json @@ -1581,7 +1581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1968,7 +1968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051C6.json b/data/chips/STM32G051C6.json index e5c3cee..bb08817 100644 --- a/data/chips/STM32G051C6.json +++ b/data/chips/STM32G051C6.json @@ -2439,7 +2439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2684,7 +2684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2814,7 +2814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2901,7 +2901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2993,7 +2993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3140,7 +3140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051C8.json b/data/chips/STM32G051C8.json index 8e6fa98..5e7d867 100644 --- a/data/chips/STM32G051C8.json +++ b/data/chips/STM32G051C8.json @@ -2439,7 +2439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2684,7 +2684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2814,7 +2814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2901,7 +2901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2993,7 +2993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3140,7 +3140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051F6.json b/data/chips/STM32G051F6.json index cc75f1c..7b04e21 100644 --- a/data/chips/STM32G051F6.json +++ b/data/chips/STM32G051F6.json @@ -1867,7 +1867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2072,7 +2072,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2172,7 +2172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2254,7 +2254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2468,7 +2468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051F8.json b/data/chips/STM32G051F8.json index 32eb094..262bd9e 100644 --- a/data/chips/STM32G051F8.json +++ b/data/chips/STM32G051F8.json @@ -2004,7 +2004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2209,7 +2209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2309,7 +2309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2478,7 +2478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2605,7 +2605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051G6.json b/data/chips/STM32G051G6.json index d727e78..a4b9a3e 100644 --- a/data/chips/STM32G051G6.json +++ b/data/chips/STM32G051G6.json @@ -1878,7 +1878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2083,7 +2083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2265,7 +2265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2347,7 +2347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2479,7 +2479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051G8.json b/data/chips/STM32G051G8.json index 59e2ba2..a4a1fda 100644 --- a/data/chips/STM32G051G8.json +++ b/data/chips/STM32G051G8.json @@ -1878,7 +1878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2083,7 +2083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2265,7 +2265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2347,7 +2347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2479,7 +2479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051K6.json b/data/chips/STM32G051K6.json index cf7a3da..18970dc 100644 --- a/data/chips/STM32G051K6.json +++ b/data/chips/STM32G051K6.json @@ -2130,7 +2130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2435,7 +2435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2517,7 +2517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2604,7 +2604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2736,7 +2736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051K8.json b/data/chips/STM32G051K8.json index d69e0d9..44b0138 100644 --- a/data/chips/STM32G051K8.json +++ b/data/chips/STM32G051K8.json @@ -2130,7 +2130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2435,7 +2435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2517,7 +2517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2604,7 +2604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2736,7 +2736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061C6.json b/data/chips/STM32G061C6.json index d4bf880..109dee8 100644 --- a/data/chips/STM32G061C6.json +++ b/data/chips/STM32G061C6.json @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2753,7 +2753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2883,7 +2883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2970,7 +2970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3062,7 +3062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3209,7 +3209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061C8.json b/data/chips/STM32G061C8.json index f995ddd..5ed5d41 100644 --- a/data/chips/STM32G061C8.json +++ b/data/chips/STM32G061C8.json @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2753,7 +2753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2883,7 +2883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2970,7 +2970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3062,7 +3062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3209,7 +3209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061F6.json b/data/chips/STM32G061F6.json index a2c621b..c409f86 100644 --- a/data/chips/STM32G061F6.json +++ b/data/chips/STM32G061F6.json @@ -1936,7 +1936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2141,7 +2141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2323,7 +2323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2410,7 +2410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2537,7 +2537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061F8.json b/data/chips/STM32G061F8.json index 98134ac..6f9517b 100644 --- a/data/chips/STM32G061F8.json +++ b/data/chips/STM32G061F8.json @@ -2073,7 +2073,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2378,7 +2378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2547,7 +2547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2674,7 +2674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061G6.json b/data/chips/STM32G061G6.json index 3b082e5..23cc561 100644 --- a/data/chips/STM32G061G6.json +++ b/data/chips/STM32G061G6.json @@ -1947,7 +1947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2152,7 +2152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2252,7 +2252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061G8.json b/data/chips/STM32G061G8.json index c5893fe..a375ca4 100644 --- a/data/chips/STM32G061G8.json +++ b/data/chips/STM32G061G8.json @@ -1947,7 +1947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2152,7 +2152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2252,7 +2252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061K6.json b/data/chips/STM32G061K6.json index f6a6e2f..9fea1c9 100644 --- a/data/chips/STM32G061K6.json +++ b/data/chips/STM32G061K6.json @@ -2199,7 +2199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2404,7 +2404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2673,7 +2673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061K8.json b/data/chips/STM32G061K8.json index 85bc938..24e6b28 100644 --- a/data/chips/STM32G061K8.json +++ b/data/chips/STM32G061K8.json @@ -2199,7 +2199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2404,7 +2404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2673,7 +2673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070CB.json b/data/chips/STM32G070CB.json index 7a9a09a..faae62f 100644 --- a/data/chips/STM32G070CB.json +++ b/data/chips/STM32G070CB.json @@ -1568,7 +1568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1813,7 +1813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1943,7 +1943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2030,7 +2030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2122,7 +2122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070KB.json b/data/chips/STM32G070KB.json index f065b51..838dcfc 100644 --- a/data/chips/STM32G070KB.json +++ b/data/chips/STM32G070KB.json @@ -1374,7 +1374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1579,7 +1579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1679,7 +1679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1761,7 +1761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1848,7 +1848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070RB.json b/data/chips/STM32G070RB.json index 6ece32b..e506651 100644 --- a/data/chips/STM32G070RB.json +++ b/data/chips/STM32G070RB.json @@ -1727,7 +1727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2012,7 +2012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2152,7 +2152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2239,7 +2239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2331,7 +2331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071C6.json b/data/chips/STM32G071C6.json index 23dfdc0..01299d7 100644 --- a/data/chips/STM32G071C6.json +++ b/data/chips/STM32G071C6.json @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2357,7 +2357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2487,7 +2487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2574,7 +2574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2666,7 +2666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071C8.json b/data/chips/STM32G071C8.json index 24a8931..fff5a91 100644 --- a/data/chips/STM32G071C8.json +++ b/data/chips/STM32G071C8.json @@ -2287,7 +2287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2841,7 +2841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2988,7 +2988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071CB.json b/data/chips/STM32G071CB.json index 0114a2d..22bade5 100644 --- a/data/chips/STM32G071CB.json +++ b/data/chips/STM32G071CB.json @@ -2287,7 +2287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2841,7 +2841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2988,7 +2988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071EB.json b/data/chips/STM32G071EB.json index abbe352..f055ae9 100644 --- a/data/chips/STM32G071EB.json +++ b/data/chips/STM32G071EB.json @@ -1660,7 +1660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1860,7 +1860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1960,7 +1960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2042,7 +2042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071G6.json b/data/chips/STM32G071G6.json index b2d1f94..34e3c02 100644 --- a/data/chips/STM32G071G6.json +++ b/data/chips/STM32G071G6.json @@ -1555,7 +1555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1775,7 +1775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1885,7 +1885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1972,7 +1972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2059,7 +2059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2191,7 +2191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071G8.json b/data/chips/STM32G071G8.json index 525795e..eedd597 100644 --- a/data/chips/STM32G071G8.json +++ b/data/chips/STM32G071G8.json @@ -1906,7 +1906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2126,7 +2126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2236,7 +2236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2323,7 +2323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2410,7 +2410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071GB.json b/data/chips/STM32G071GB.json index f5760e1..6209044 100644 --- a/data/chips/STM32G071GB.json +++ b/data/chips/STM32G071GB.json @@ -1906,7 +1906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2126,7 +2126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2236,7 +2236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2323,7 +2323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2410,7 +2410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071K6.json b/data/chips/STM32G071K6.json index a701998..f5de60a 100644 --- a/data/chips/STM32G071K6.json +++ b/data/chips/STM32G071K6.json @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2141,7 +2141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2228,7 +2228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2320,7 +2320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071K8.json b/data/chips/STM32G071K8.json index 0f39445..c9aed73 100644 --- a/data/chips/STM32G071K8.json +++ b/data/chips/STM32G071K8.json @@ -2390,7 +2390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2610,7 +2610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2720,7 +2720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2807,7 +2807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2899,7 +2899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3031,7 +3031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071KB.json b/data/chips/STM32G071KB.json index c218b2d..ab5aa3b 100644 --- a/data/chips/STM32G071KB.json +++ b/data/chips/STM32G071KB.json @@ -2390,7 +2390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2610,7 +2610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2720,7 +2720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2807,7 +2807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2899,7 +2899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3031,7 +3031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071R6.json b/data/chips/STM32G071R6.json index 9326d07..db3927e 100644 --- a/data/chips/STM32G071R6.json +++ b/data/chips/STM32G071R6.json @@ -2036,7 +2036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2321,7 +2321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2461,7 +2461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2640,7 +2640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2802,7 +2802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071R8.json b/data/chips/STM32G071R8.json index c2dac66..65afa2c 100644 --- a/data/chips/STM32G071R8.json +++ b/data/chips/STM32G071R8.json @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2496,7 +2496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2636,7 +2636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2815,7 +2815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2977,7 +2977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071RB.json b/data/chips/STM32G071RB.json index 0b35b8f..ad48da3 100644 --- a/data/chips/STM32G071RB.json +++ b/data/chips/STM32G071RB.json @@ -2605,7 +2605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2890,7 +2890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3030,7 +3030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3117,7 +3117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3209,7 +3209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3371,7 +3371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081CB.json b/data/chips/STM32G081CB.json index 5a5baa4..4ccc060 100644 --- a/data/chips/STM32G081CB.json +++ b/data/chips/STM32G081CB.json @@ -2356,7 +2356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2731,7 +2731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2818,7 +2818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2910,7 +2910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3057,7 +3057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081EB.json b/data/chips/STM32G081EB.json index a5a9b66..3b0d8cd 100644 --- a/data/chips/STM32G081EB.json +++ b/data/chips/STM32G081EB.json @@ -1729,7 +1729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1929,7 +1929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2029,7 +2029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2111,7 +2111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2188,7 +2188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2310,7 +2310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081GB.json b/data/chips/STM32G081GB.json index 9666c0f..ca76456 100644 --- a/data/chips/STM32G081GB.json +++ b/data/chips/STM32G081GB.json @@ -1975,7 +1975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2305,7 +2305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2392,7 +2392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2479,7 +2479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081KB.json b/data/chips/STM32G081KB.json index fdebd49..75114a2 100644 --- a/data/chips/STM32G081KB.json +++ b/data/chips/STM32G081KB.json @@ -2455,7 +2455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2675,7 +2675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2785,7 +2785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2872,7 +2872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2964,7 +2964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3096,7 +3096,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081RB.json b/data/chips/STM32G081RB.json index ace8b02..92e25e3 100644 --- a/data/chips/STM32G081RB.json +++ b/data/chips/STM32G081RB.json @@ -2674,7 +2674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3099,7 +3099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3186,7 +3186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3440,7 +3440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0CE.json b/data/chips/STM32G0B0CE.json index cce69ca..a60bf47 100644 --- a/data/chips/STM32G0B0CE.json +++ b/data/chips/STM32G0B0CE.json @@ -2094,7 +2094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2339,7 +2339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2469,7 +2469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2556,7 +2556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2648,7 +2648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2770,7 +2770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0KE.json b/data/chips/STM32G0B0KE.json index ea63356..1a536f8 100644 --- a/data/chips/STM32G0B0KE.json +++ b/data/chips/STM32G0B0KE.json @@ -1854,7 +1854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2059,7 +2059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2159,7 +2159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2440,7 +2440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0RE.json b/data/chips/STM32G0B0RE.json index ca6e32c..6562643 100644 --- a/data/chips/STM32G0B0RE.json +++ b/data/chips/STM32G0B0RE.json @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2578,7 +2578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2718,7 +2718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2897,7 +2897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3029,7 +3029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0VE.json b/data/chips/STM32G0B0VE.json index d5a6264..bbb2d1f 100644 --- a/data/chips/STM32G0B0VE.json +++ b/data/chips/STM32G0B0VE.json @@ -2563,7 +2563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2898,7 +2898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3048,7 +3048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3140,7 +3140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3237,7 +3237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CB.json b/data/chips/STM32G0B1CB.json index c3c8164..a3a5483 100644 --- a/data/chips/STM32G0B1CB.json +++ b/data/chips/STM32G0B1CB.json @@ -3698,7 +3698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4073,7 +4073,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4160,7 +4160,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4399,7 +4399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CC.json b/data/chips/STM32G0B1CC.json index c84d2a1..a99a864 100644 --- a/data/chips/STM32G0B1CC.json +++ b/data/chips/STM32G0B1CC.json @@ -3728,7 +3728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3973,7 +3973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4190,7 +4190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4282,7 +4282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4429,7 +4429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4551,7 +4551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CE.json b/data/chips/STM32G0B1CE.json index da66ce8..c0f4cd8 100644 --- a/data/chips/STM32G0B1CE.json +++ b/data/chips/STM32G0B1CE.json @@ -3709,7 +3709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3954,7 +3954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4084,7 +4084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4171,7 +4171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4532,7 +4532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KB.json b/data/chips/STM32G0B1KB.json index 3d79768..92be0ba 100644 --- a/data/chips/STM32G0B1KB.json +++ b/data/chips/STM32G0B1KB.json @@ -3164,7 +3164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3384,7 +3384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3494,7 +3494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3581,7 +3581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3922,7 +3922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KC.json b/data/chips/STM32G0B1KC.json index 8f4b838..ca1af70 100644 --- a/data/chips/STM32G0B1KC.json +++ b/data/chips/STM32G0B1KC.json @@ -3194,7 +3194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3414,7 +3414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3524,7 +3524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3703,7 +3703,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3952,7 +3952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KE.json b/data/chips/STM32G0B1KE.json index f874d9d..91cf5a3 100644 --- a/data/chips/STM32G0B1KE.json +++ b/data/chips/STM32G0B1KE.json @@ -3175,7 +3175,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3395,7 +3395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3505,7 +3505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3592,7 +3592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3684,7 +3684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3816,7 +3816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3933,7 +3933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1MB.json b/data/chips/STM32G0B1MB.json index fa1011e..d3fc409 100644 --- a/data/chips/STM32G0B1MB.json +++ b/data/chips/STM32G0B1MB.json @@ -3293,7 +3293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3598,7 +3598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3738,7 +3738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3830,7 +3830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3927,7 +3927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4089,7 +4089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4226,7 +4226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1MC.json b/data/chips/STM32G0B1MC.json index bd8a69f..bef7c50 100644 --- a/data/chips/STM32G0B1MC.json +++ b/data/chips/STM32G0B1MC.json @@ -3323,7 +3323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3628,7 +3628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3768,7 +3768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3860,7 +3860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3957,7 +3957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4119,7 +4119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4256,7 +4256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1ME.json b/data/chips/STM32G0B1ME.json index 8e6ee75..0ed8fd1 100644 --- a/data/chips/STM32G0B1ME.json +++ b/data/chips/STM32G0B1ME.json @@ -3304,7 +3304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3609,7 +3609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3749,7 +3749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3841,7 +3841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4237,7 +4237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1NE.json b/data/chips/STM32G0B1NE.json index 2018662..af20195 100644 --- a/data/chips/STM32G0B1NE.json +++ b/data/chips/STM32G0B1NE.json @@ -2510,7 +2510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2755,7 +2755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2885,7 +2885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2972,7 +2972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3064,7 +3064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3348,7 +3348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RB.json b/data/chips/STM32G0B1RB.json index 996fe43..d9c880d 100644 --- a/data/chips/STM32G0B1RB.json +++ b/data/chips/STM32G0B1RB.json @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4202,7 +4202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4342,7 +4342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4429,7 +4429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4815,7 +4815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RC.json b/data/chips/STM32G0B1RC.json index c4303b3..5a778bb 100644 --- a/data/chips/STM32G0B1RC.json +++ b/data/chips/STM32G0B1RC.json @@ -3947,7 +3947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4232,7 +4232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4372,7 +4372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4551,7 +4551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4713,7 +4713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4845,7 +4845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RE.json b/data/chips/STM32G0B1RE.json index 97ce51b..25daf9c 100644 --- a/data/chips/STM32G0B1RE.json +++ b/data/chips/STM32G0B1RE.json @@ -3928,7 +3928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4213,7 +4213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4353,7 +4353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4440,7 +4440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4532,7 +4532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4694,7 +4694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4826,7 +4826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VB.json b/data/chips/STM32G0B1VB.json index 473a46c..99a2aaa 100644 --- a/data/chips/STM32G0B1VB.json +++ b/data/chips/STM32G0B1VB.json @@ -4097,7 +4097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4432,7 +4432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4674,7 +4674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4771,7 +4771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4933,7 +4933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5090,7 +5090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VC.json b/data/chips/STM32G0B1VC.json index e43ec44..678352c 100644 --- a/data/chips/STM32G0B1VC.json +++ b/data/chips/STM32G0B1VC.json @@ -4127,7 +4127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4462,7 +4462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4612,7 +4612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4704,7 +4704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4801,7 +4801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4963,7 +4963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5120,7 +5120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VE.json b/data/chips/STM32G0B1VE.json index b20998f..417495b 100644 --- a/data/chips/STM32G0B1VE.json +++ b/data/chips/STM32G0B1VE.json @@ -4108,7 +4108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4443,7 +4443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4593,7 +4593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4685,7 +4685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4782,7 +4782,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4944,7 +4944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5101,7 +5101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1CC.json b/data/chips/STM32G0C1CC.json index e3371dc..c3f563a 100644 --- a/data/chips/STM32G0C1CC.json +++ b/data/chips/STM32G0C1CC.json @@ -3797,7 +3797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4042,7 +4042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4172,7 +4172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4259,7 +4259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4351,7 +4351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4498,7 +4498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4620,7 +4620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1CE.json b/data/chips/STM32G0C1CE.json index 3a322e5..817136a 100644 --- a/data/chips/STM32G0C1CE.json +++ b/data/chips/STM32G0C1CE.json @@ -3778,7 +3778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4023,7 +4023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4153,7 +4153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4240,7 +4240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4479,7 +4479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4601,7 +4601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1KC.json b/data/chips/STM32G0C1KC.json index cb27709..560cf52 100644 --- a/data/chips/STM32G0C1KC.json +++ b/data/chips/STM32G0C1KC.json @@ -3263,7 +3263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3483,7 +3483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3680,7 +3680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3772,7 +3772,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3904,7 +3904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4021,7 +4021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1KE.json b/data/chips/STM32G0C1KE.json index d8ca8a5..400f7d8 100644 --- a/data/chips/STM32G0C1KE.json +++ b/data/chips/STM32G0C1KE.json @@ -3244,7 +3244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3464,7 +3464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3574,7 +3574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3661,7 +3661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3753,7 +3753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3885,7 +3885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4002,7 +4002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1MC.json b/data/chips/STM32G0C1MC.json index 2a96f26..3bfd863 100644 --- a/data/chips/STM32G0C1MC.json +++ b/data/chips/STM32G0C1MC.json @@ -3392,7 +3392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3697,7 +3697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3837,7 +3837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3929,7 +3929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4026,7 +4026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4188,7 +4188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1ME.json b/data/chips/STM32G0C1ME.json index fa21a86..108eab3 100644 --- a/data/chips/STM32G0C1ME.json +++ b/data/chips/STM32G0C1ME.json @@ -3373,7 +3373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3678,7 +3678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3818,7 +3818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3910,7 +3910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4007,7 +4007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4169,7 +4169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4306,7 +4306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1NE.json b/data/chips/STM32G0C1NE.json index 0deaa6e..641286e 100644 --- a/data/chips/STM32G0C1NE.json +++ b/data/chips/STM32G0C1NE.json @@ -2579,7 +2579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2824,7 +2824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2954,7 +2954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3041,7 +3041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3133,7 +3133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3295,7 +3295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3417,7 +3417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1RC.json b/data/chips/STM32G0C1RC.json index 5ec7d30..f0946bb 100644 --- a/data/chips/STM32G0C1RC.json +++ b/data/chips/STM32G0C1RC.json @@ -4016,7 +4016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4301,7 +4301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4441,7 +4441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4528,7 +4528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4620,7 +4620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4782,7 +4782,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4914,7 +4914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1RE.json b/data/chips/STM32G0C1RE.json index e5ff69c..6871d96 100644 --- a/data/chips/STM32G0C1RE.json +++ b/data/chips/STM32G0C1RE.json @@ -3997,7 +3997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4282,7 +4282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4422,7 +4422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4509,7 +4509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4601,7 +4601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4763,7 +4763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4895,7 +4895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1VC.json b/data/chips/STM32G0C1VC.json index f25ff36..00d67ed 100644 --- a/data/chips/STM32G0C1VC.json +++ b/data/chips/STM32G0C1VC.json @@ -4196,7 +4196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4531,7 +4531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4681,7 +4681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4773,7 +4773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4870,7 +4870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5032,7 +5032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5189,7 +5189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1VE.json b/data/chips/STM32G0C1VE.json index 9cf49f0..44302e3 100644 --- a/data/chips/STM32G0C1VE.json +++ b/data/chips/STM32G0C1VE.json @@ -4177,7 +4177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4512,7 +4512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4662,7 +4662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4754,7 +4754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4851,7 +4851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5013,7 +5013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5170,7 +5170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G431C6.json b/data/chips/STM32G431C6.json index fcd2c3e..b3c5214 100644 --- a/data/chips/STM32G431C6.json +++ b/data/chips/STM32G431C6.json @@ -3096,7 +3096,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3303,7 +3303,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3405,7 +3405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3497,7 +3497,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3584,7 +3584,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3726,7 +3726,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4070,7 +4070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431C8.json b/data/chips/STM32G431C8.json index 3a2c054..13f0d01 100644 --- a/data/chips/STM32G431C8.json +++ b/data/chips/STM32G431C8.json @@ -3096,7 +3096,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3303,7 +3303,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3405,7 +3405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3497,7 +3497,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3584,7 +3584,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3726,7 +3726,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4070,7 +4070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431CB.json b/data/chips/STM32G431CB.json index 4e45f77..0494b57 100644 --- a/data/chips/STM32G431CB.json +++ b/data/chips/STM32G431CB.json @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3603,7 +3603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3797,7 +3797,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3884,7 +3884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4026,7 +4026,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4153,7 +4153,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4370,7 +4370,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431K6.json b/data/chips/STM32G431K6.json index 356e5df..189814c 100644 --- a/data/chips/STM32G431K6.json +++ b/data/chips/STM32G431K6.json @@ -2622,7 +2622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2779,7 +2779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2866,7 +2866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3040,7 +3040,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3172,7 +3172,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3289,7 +3289,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3501,7 +3501,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431K8.json b/data/chips/STM32G431K8.json index 5d3a51f..8c36ac2 100644 --- a/data/chips/STM32G431K8.json +++ b/data/chips/STM32G431K8.json @@ -2622,7 +2622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2779,7 +2779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2866,7 +2866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3040,7 +3040,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3172,7 +3172,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3289,7 +3289,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3501,7 +3501,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431KB.json b/data/chips/STM32G431KB.json index 3f06e58..6382213 100644 --- a/data/chips/STM32G431KB.json +++ b/data/chips/STM32G431KB.json @@ -2622,7 +2622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2779,7 +2779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2866,7 +2866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3040,7 +3040,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3172,7 +3172,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3289,7 +3289,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3501,7 +3501,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431M6.json b/data/chips/STM32G431M6.json index 2421733..cd511cf 100644 --- a/data/chips/STM32G431M6.json +++ b/data/chips/STM32G431M6.json @@ -3180,7 +3180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3579,7 +3579,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3671,7 +3671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3758,7 +3758,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3900,7 +3900,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4047,7 +4047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4264,7 +4264,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431M8.json b/data/chips/STM32G431M8.json index de6dae5..9f4ddb3 100644 --- a/data/chips/STM32G431M8.json +++ b/data/chips/STM32G431M8.json @@ -3180,7 +3180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3579,7 +3579,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3671,7 +3671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3758,7 +3758,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3900,7 +3900,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4047,7 +4047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4264,7 +4264,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431MB.json b/data/chips/STM32G431MB.json index c1aa53c..c723d89 100644 --- a/data/chips/STM32G431MB.json +++ b/data/chips/STM32G431MB.json @@ -3180,7 +3180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3579,7 +3579,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3671,7 +3671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3758,7 +3758,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3900,7 +3900,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4047,7 +4047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4264,7 +4264,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431R6.json b/data/chips/STM32G431R6.json index fa25e9e..7dd0d79 100644 --- a/data/chips/STM32G431R6.json +++ b/data/chips/STM32G431R6.json @@ -3436,7 +3436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3780,7 +3780,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3872,7 +3872,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3959,7 +3959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4248,7 +4248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4465,7 +4465,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431R8.json b/data/chips/STM32G431R8.json index f8e6648..6d82d70 100644 --- a/data/chips/STM32G431R8.json +++ b/data/chips/STM32G431R8.json @@ -3436,7 +3436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3780,7 +3780,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3872,7 +3872,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3959,7 +3959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4248,7 +4248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4465,7 +4465,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431RB.json b/data/chips/STM32G431RB.json index 9cd31a5..83d5a91 100644 --- a/data/chips/STM32G431RB.json +++ b/data/chips/STM32G431RB.json @@ -3436,7 +3436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3780,7 +3780,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3872,7 +3872,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3959,7 +3959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4248,7 +4248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4465,7 +4465,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431V6.json b/data/chips/STM32G431V6.json index 96ec79a..135c54e 100644 --- a/data/chips/STM32G431V6.json +++ b/data/chips/STM32G431V6.json @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3999,7 +3999,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4166,7 +4166,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4575,7 +4575,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431V8.json b/data/chips/STM32G431V8.json index 822c74f..96b9bbb 100644 --- a/data/chips/STM32G431V8.json +++ b/data/chips/STM32G431V8.json @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3999,7 +3999,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4166,7 +4166,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4575,7 +4575,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431VB.json b/data/chips/STM32G431VB.json index 1c6ec13..7dc7b5f 100644 --- a/data/chips/STM32G431VB.json +++ b/data/chips/STM32G431VB.json @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3999,7 +3999,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4166,7 +4166,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4575,7 +4575,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441CB.json b/data/chips/STM32G441CB.json index dfe1757..1be7264 100644 --- a/data/chips/STM32G441CB.json +++ b/data/chips/STM32G441CB.json @@ -3429,7 +3429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3636,7 +3636,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3738,7 +3738,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3830,7 +3830,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4059,7 +4059,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4186,7 +4186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441KB.json b/data/chips/STM32G441KB.json index 1a9b0ba..94887c6 100644 --- a/data/chips/STM32G441KB.json +++ b/data/chips/STM32G441KB.json @@ -2655,7 +2655,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2812,7 +2812,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2899,7 +2899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2991,7 +2991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3073,7 +3073,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3205,7 +3205,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3322,7 +3322,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441MB.json b/data/chips/STM32G441MB.json index c3354cd..3951a8e 100644 --- a/data/chips/STM32G441MB.json +++ b/data/chips/STM32G441MB.json @@ -3213,7 +3213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3505,7 +3505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3612,7 +3612,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3704,7 +3704,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3791,7 +3791,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3933,7 +3933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4297,7 +4297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441RB.json b/data/chips/STM32G441RB.json index d8176d8..c114c97 100644 --- a/data/chips/STM32G441RB.json +++ b/data/chips/STM32G441RB.json @@ -3469,7 +3469,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3706,7 +3706,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3813,7 +3813,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3905,7 +3905,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3992,7 +3992,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4134,7 +4134,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4281,7 +4281,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4498,7 +4498,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441VB.json b/data/chips/STM32G441VB.json index fbc4a97..beb97c8 100644 --- a/data/chips/STM32G441VB.json +++ b/data/chips/STM32G441VB.json @@ -3434,7 +3434,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3726,7 +3726,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3843,7 +3843,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3940,7 +3940,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4032,7 +4032,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4199,7 +4199,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4366,7 +4366,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4608,7 +4608,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471CC.json b/data/chips/STM32G471CC.json index e449dd0..65f02e9 100644 --- a/data/chips/STM32G471CC.json +++ b/data/chips/STM32G471CC.json @@ -3224,7 +3224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3431,7 +3431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3625,7 +3625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3712,7 +3712,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3854,7 +3854,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4068,7 +4068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4285,7 +4285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471CE.json b/data/chips/STM32G471CE.json index 0196c83..b27070a 100644 --- a/data/chips/STM32G471CE.json +++ b/data/chips/STM32G471CE.json @@ -3224,7 +3224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3431,7 +3431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3625,7 +3625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3712,7 +3712,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3854,7 +3854,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4068,7 +4068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4285,7 +4285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471MC.json b/data/chips/STM32G471MC.json index f8298f8..e02c84e 100644 --- a/data/chips/STM32G471MC.json +++ b/data/chips/STM32G471MC.json @@ -3460,7 +3460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3752,7 +3752,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3859,7 +3859,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3951,7 +3951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4038,7 +4038,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4180,7 +4180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4641,7 +4641,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471ME.json b/data/chips/STM32G471ME.json index 0aa048f..48800f4 100644 --- a/data/chips/STM32G471ME.json +++ b/data/chips/STM32G471ME.json @@ -3952,7 +3952,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4244,7 +4244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4351,7 +4351,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4443,7 +4443,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4530,7 +4530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4672,7 +4672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4769,7 +4769,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4916,7 +4916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5133,7 +5133,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471QC.json b/data/chips/STM32G471QC.json index 998c2f4..f1ec3f4 100644 --- a/data/chips/STM32G471QC.json +++ b/data/chips/STM32G471QC.json @@ -4071,7 +4071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4363,7 +4363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4485,7 +4485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4674,7 +4674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4841,7 +4841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5497,7 +5497,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471QE.json b/data/chips/STM32G471QE.json index 9de9fd2..d08b8f7 100644 --- a/data/chips/STM32G471QE.json +++ b/data/chips/STM32G471QE.json @@ -4071,7 +4071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4363,7 +4363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4485,7 +4485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4674,7 +4674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4841,7 +4841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5497,7 +5497,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471RC.json b/data/chips/STM32G471RC.json index e5dc8d6..9e6a062 100644 --- a/data/chips/STM32G471RC.json +++ b/data/chips/STM32G471RC.json @@ -3194,7 +3194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3431,7 +3431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3538,7 +3538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3630,7 +3630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3717,7 +3717,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3859,7 +3859,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3956,7 +3956,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4320,7 +4320,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471RE.json b/data/chips/STM32G471RE.json index 7a370ea..5ac7ca5 100644 --- a/data/chips/STM32G471RE.json +++ b/data/chips/STM32G471RE.json @@ -3194,7 +3194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3431,7 +3431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3538,7 +3538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3630,7 +3630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3717,7 +3717,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3859,7 +3859,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3956,7 +3956,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4320,7 +4320,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471VC.json b/data/chips/STM32G471VC.json index 7c9b08e..327575d 100644 --- a/data/chips/STM32G471VC.json +++ b/data/chips/STM32G471VC.json @@ -4965,7 +4965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5257,7 +5257,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5563,7 +5563,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5730,7 +5730,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5882,7 +5882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6291,7 +6291,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471VE.json b/data/chips/STM32G471VE.json index f5e3d7d..2f4f728 100644 --- a/data/chips/STM32G471VE.json +++ b/data/chips/STM32G471VE.json @@ -4965,7 +4965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5257,7 +5257,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5563,7 +5563,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5730,7 +5730,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5882,7 +5882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6291,7 +6291,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CB.json b/data/chips/STM32G473CB.json index 7bfe00a..4571402 100644 --- a/data/chips/STM32G473CB.json +++ b/data/chips/STM32G473CB.json @@ -3925,7 +3925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4132,7 +4132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4234,7 +4234,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4326,7 +4326,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4413,7 +4413,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4769,7 +4769,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CC.json b/data/chips/STM32G473CC.json index 2c43b15..e9ef08c 100644 --- a/data/chips/STM32G473CC.json +++ b/data/chips/STM32G473CC.json @@ -3925,7 +3925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4132,7 +4132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4234,7 +4234,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4326,7 +4326,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4413,7 +4413,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4769,7 +4769,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CE.json b/data/chips/STM32G473CE.json index 2d449c2..ba1d376 100644 --- a/data/chips/STM32G473CE.json +++ b/data/chips/STM32G473CE.json @@ -3925,7 +3925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4132,7 +4132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4234,7 +4234,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4326,7 +4326,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4413,7 +4413,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4769,7 +4769,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473MB.json b/data/chips/STM32G473MB.json index 279817a..06320e8 100644 --- a/data/chips/STM32G473MB.json +++ b/data/chips/STM32G473MB.json @@ -4299,7 +4299,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4591,7 +4591,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4698,7 +4698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4790,7 +4790,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4877,7 +4877,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5019,7 +5019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5116,7 +5116,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5263,7 +5263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5380,7 +5380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5607,7 +5607,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473MC.json b/data/chips/STM32G473MC.json index fb1a43a..51a26c2 100644 --- a/data/chips/STM32G473MC.json +++ b/data/chips/STM32G473MC.json @@ -4299,7 +4299,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4591,7 +4591,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4698,7 +4698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4790,7 +4790,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4877,7 +4877,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5019,7 +5019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5116,7 +5116,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5263,7 +5263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5380,7 +5380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5607,7 +5607,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473ME.json b/data/chips/STM32G473ME.json index ef5ffa4..026a175 100644 --- a/data/chips/STM32G473ME.json +++ b/data/chips/STM32G473ME.json @@ -4791,7 +4791,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5190,7 +5190,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5369,7 +5369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5511,7 +5511,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5608,7 +5608,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5755,7 +5755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5872,7 +5872,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6099,7 +6099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PB.json b/data/chips/STM32G473PB.json index bbc875c..44d9bb8 100644 --- a/data/chips/STM32G473PB.json +++ b/data/chips/STM32G473PB.json @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5513,7 +5513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5630,7 +5630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5727,7 +5727,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5819,7 +5819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6218,7 +6218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6385,7 +6385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6532,7 +6532,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6784,7 +6784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PC.json b/data/chips/STM32G473PC.json index 2eea552..1b1a834 100644 --- a/data/chips/STM32G473PC.json +++ b/data/chips/STM32G473PC.json @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5513,7 +5513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5630,7 +5630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5727,7 +5727,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5819,7 +5819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6218,7 +6218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6385,7 +6385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6532,7 +6532,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6784,7 +6784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PE.json b/data/chips/STM32G473PE.json index e098d79..b9ef380 100644 --- a/data/chips/STM32G473PE.json +++ b/data/chips/STM32G473PE.json @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5513,7 +5513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5630,7 +5630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5727,7 +5727,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5819,7 +5819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6218,7 +6218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6385,7 +6385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6532,7 +6532,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6784,7 +6784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QB.json b/data/chips/STM32G473QB.json index 4c710bf..a69eaa7 100644 --- a/data/chips/STM32G473QB.json +++ b/data/chips/STM32G473QB.json @@ -5359,7 +5359,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5651,7 +5651,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5773,7 +5773,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5870,7 +5870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5962,7 +5962,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6129,7 +6129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6371,7 +6371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6538,7 +6538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6685,7 +6685,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6937,7 +6937,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QC.json b/data/chips/STM32G473QC.json index 6ac00af..67a3421 100644 --- a/data/chips/STM32G473QC.json +++ b/data/chips/STM32G473QC.json @@ -5359,7 +5359,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5651,7 +5651,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5773,7 +5773,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5870,7 +5870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5962,7 +5962,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6129,7 +6129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6371,7 +6371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6538,7 +6538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6685,7 +6685,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6937,7 +6937,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QE.json b/data/chips/STM32G473QE.json index 43c29d2..be9192d 100644 --- a/data/chips/STM32G473QE.json +++ b/data/chips/STM32G473QE.json @@ -5359,7 +5359,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5651,7 +5651,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5773,7 +5773,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5870,7 +5870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5962,7 +5962,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6129,7 +6129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6371,7 +6371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6538,7 +6538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6685,7 +6685,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6937,7 +6937,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RB.json b/data/chips/STM32G473RB.json index 6898eb8..d17dc50 100644 --- a/data/chips/STM32G473RB.json +++ b/data/chips/STM32G473RB.json @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4154,7 +4154,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4353,7 +4353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4440,7 +4440,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4826,7 +4826,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4943,7 +4943,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5155,7 +5155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RC.json b/data/chips/STM32G473RC.json index 2e15a21..46f7688 100644 --- a/data/chips/STM32G473RC.json +++ b/data/chips/STM32G473RC.json @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4154,7 +4154,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4353,7 +4353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4440,7 +4440,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4826,7 +4826,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4943,7 +4943,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5155,7 +5155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RE.json b/data/chips/STM32G473RE.json index 319ec11..220dba8 100644 --- a/data/chips/STM32G473RE.json +++ b/data/chips/STM32G473RE.json @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4154,7 +4154,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4353,7 +4353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4440,7 +4440,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4826,7 +4826,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4943,7 +4943,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5155,7 +5155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VB.json b/data/chips/STM32G473VB.json index 8c81a9d..3a102f7 100644 --- a/data/chips/STM32G473VB.json +++ b/data/chips/STM32G473VB.json @@ -5542,7 +5542,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5834,7 +5834,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5951,7 +5951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6048,7 +6048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6140,7 +6140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6307,7 +6307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6459,7 +6459,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6626,7 +6626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6768,7 +6768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7000,7 +7000,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VC.json b/data/chips/STM32G473VC.json index eee1a93..df9b95c 100644 --- a/data/chips/STM32G473VC.json +++ b/data/chips/STM32G473VC.json @@ -5542,7 +5542,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5834,7 +5834,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5951,7 +5951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6048,7 +6048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6140,7 +6140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6307,7 +6307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6459,7 +6459,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6626,7 +6626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6768,7 +6768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7000,7 +7000,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VE.json b/data/chips/STM32G473VE.json index 65c6eac..90c2083 100644 --- a/data/chips/STM32G473VE.json +++ b/data/chips/STM32G473VE.json @@ -5542,7 +5542,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5834,7 +5834,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5951,7 +5951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6048,7 +6048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6140,7 +6140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6307,7 +6307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6459,7 +6459,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6626,7 +6626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6768,7 +6768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7000,7 +7000,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CB.json b/data/chips/STM32G474CB.json index 9784cca..a54617b 100644 --- a/data/chips/STM32G474CB.json +++ b/data/chips/STM32G474CB.json @@ -4171,7 +4171,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4378,7 +4378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4480,7 +4480,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4659,7 +4659,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4801,7 +4801,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4888,7 +4888,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5015,7 +5015,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5132,7 +5132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5339,7 +5339,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CC.json b/data/chips/STM32G474CC.json index 17bcf75..b670e71 100644 --- a/data/chips/STM32G474CC.json +++ b/data/chips/STM32G474CC.json @@ -4171,7 +4171,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4378,7 +4378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4480,7 +4480,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4659,7 +4659,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4801,7 +4801,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4888,7 +4888,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5015,7 +5015,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5132,7 +5132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5339,7 +5339,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CE.json b/data/chips/STM32G474CE.json index 6e7d6d1..a003c39 100644 --- a/data/chips/STM32G474CE.json +++ b/data/chips/STM32G474CE.json @@ -4171,7 +4171,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4378,7 +4378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4480,7 +4480,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4659,7 +4659,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4801,7 +4801,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4888,7 +4888,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5015,7 +5015,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5132,7 +5132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5339,7 +5339,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474MB.json b/data/chips/STM32G474MB.json index e317cf8..502766e 100644 --- a/data/chips/STM32G474MB.json +++ b/data/chips/STM32G474MB.json @@ -4575,7 +4575,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4867,7 +4867,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4974,7 +4974,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5066,7 +5066,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5153,7 +5153,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5295,7 +5295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5392,7 +5392,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5539,7 +5539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5656,7 +5656,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5883,7 +5883,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474MC.json b/data/chips/STM32G474MC.json index f864a63..97eab67 100644 --- a/data/chips/STM32G474MC.json +++ b/data/chips/STM32G474MC.json @@ -4575,7 +4575,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4867,7 +4867,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4974,7 +4974,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5066,7 +5066,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5153,7 +5153,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5295,7 +5295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5392,7 +5392,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5539,7 +5539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5656,7 +5656,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5883,7 +5883,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474ME.json b/data/chips/STM32G474ME.json index b4c1fca..056333d 100644 --- a/data/chips/STM32G474ME.json +++ b/data/chips/STM32G474ME.json @@ -5067,7 +5067,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5359,7 +5359,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5466,7 +5466,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5558,7 +5558,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5645,7 +5645,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5787,7 +5787,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5884,7 +5884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6031,7 +6031,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6148,7 +6148,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6375,7 +6375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PB.json b/data/chips/STM32G474PB.json index c27000a..b58d430 100644 --- a/data/chips/STM32G474PB.json +++ b/data/chips/STM32G474PB.json @@ -5485,7 +5485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5894,7 +5894,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5991,7 +5991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6083,7 +6083,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6250,7 +6250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6482,7 +6482,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6649,7 +6649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6796,7 +6796,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7048,7 +7048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PC.json b/data/chips/STM32G474PC.json index 00f6bbf..0d5ac54 100644 --- a/data/chips/STM32G474PC.json +++ b/data/chips/STM32G474PC.json @@ -5485,7 +5485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5894,7 +5894,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5991,7 +5991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6083,7 +6083,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6250,7 +6250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6482,7 +6482,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6649,7 +6649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6796,7 +6796,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7048,7 +7048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PE.json b/data/chips/STM32G474PE.json index 53ff32f..32bd058 100644 --- a/data/chips/STM32G474PE.json +++ b/data/chips/STM32G474PE.json @@ -5485,7 +5485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5894,7 +5894,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5991,7 +5991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6083,7 +6083,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6250,7 +6250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6482,7 +6482,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6649,7 +6649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6796,7 +6796,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7048,7 +7048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QB.json b/data/chips/STM32G474QB.json index 60dea94..270d024 100644 --- a/data/chips/STM32G474QB.json +++ b/data/chips/STM32G474QB.json @@ -5635,7 +5635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5927,7 +5927,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6146,7 +6146,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6238,7 +6238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6405,7 +6405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6647,7 +6647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6814,7 +6814,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6961,7 +6961,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7213,7 +7213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QC.json b/data/chips/STM32G474QC.json index 33111c7..b32dee6 100644 --- a/data/chips/STM32G474QC.json +++ b/data/chips/STM32G474QC.json @@ -5635,7 +5635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5927,7 +5927,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6146,7 +6146,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6238,7 +6238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6405,7 +6405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6647,7 +6647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6814,7 +6814,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6961,7 +6961,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7213,7 +7213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QE.json b/data/chips/STM32G474QE.json index 1031348..844000c 100644 --- a/data/chips/STM32G474QE.json +++ b/data/chips/STM32G474QE.json @@ -5635,7 +5635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5927,7 +5927,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6146,7 +6146,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6238,7 +6238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6405,7 +6405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6647,7 +6647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6814,7 +6814,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6961,7 +6961,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7213,7 +7213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RB.json b/data/chips/STM32G474RB.json index c7cbf8b..d362326 100644 --- a/data/chips/STM32G474RB.json +++ b/data/chips/STM32G474RB.json @@ -4193,7 +4193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4430,7 +4430,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4537,7 +4537,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4629,7 +4629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4716,7 +4716,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4858,7 +4858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4955,7 +4955,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5102,7 +5102,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5219,7 +5219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5431,7 +5431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RC.json b/data/chips/STM32G474RC.json index 37c4ea3..a8634b5 100644 --- a/data/chips/STM32G474RC.json +++ b/data/chips/STM32G474RC.json @@ -4193,7 +4193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4430,7 +4430,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4537,7 +4537,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4629,7 +4629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4716,7 +4716,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4858,7 +4858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4955,7 +4955,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5102,7 +5102,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5219,7 +5219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5431,7 +5431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RE.json b/data/chips/STM32G474RE.json index fda5f14..1a1aaf1 100644 --- a/data/chips/STM32G474RE.json +++ b/data/chips/STM32G474RE.json @@ -4193,7 +4193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4430,7 +4430,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4537,7 +4537,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4629,7 +4629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4716,7 +4716,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4858,7 +4858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4955,7 +4955,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5102,7 +5102,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5219,7 +5219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5431,7 +5431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VB.json b/data/chips/STM32G474VB.json index 5c58c71..7f7d1c2 100644 --- a/data/chips/STM32G474VB.json +++ b/data/chips/STM32G474VB.json @@ -5818,7 +5818,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6110,7 +6110,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6324,7 +6324,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6416,7 +6416,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6583,7 +6583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6735,7 +6735,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7276,7 +7276,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VC.json b/data/chips/STM32G474VC.json index 184afc8..9a0b434 100644 --- a/data/chips/STM32G474VC.json +++ b/data/chips/STM32G474VC.json @@ -5818,7 +5818,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6110,7 +6110,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6324,7 +6324,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6416,7 +6416,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6583,7 +6583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6735,7 +6735,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7276,7 +7276,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VE.json b/data/chips/STM32G474VE.json index 466e345..10e03e8 100644 --- a/data/chips/STM32G474VE.json +++ b/data/chips/STM32G474VE.json @@ -5818,7 +5818,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6110,7 +6110,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6324,7 +6324,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6416,7 +6416,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6583,7 +6583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6735,7 +6735,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7276,7 +7276,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483CE.json b/data/chips/STM32G483CE.json index bef22f0..91e5da1 100644 --- a/data/chips/STM32G483CE.json +++ b/data/chips/STM32G483CE.json @@ -3964,7 +3964,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4171,7 +4171,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4273,7 +4273,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4365,7 +4365,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4452,7 +4452,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4594,7 +4594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4681,7 +4681,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4808,7 +4808,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4925,7 +4925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5132,7 +5132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483ME.json b/data/chips/STM32G483ME.json index f635eca..68c8639 100644 --- a/data/chips/STM32G483ME.json +++ b/data/chips/STM32G483ME.json @@ -4830,7 +4830,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5122,7 +5122,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5229,7 +5229,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5321,7 +5321,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5408,7 +5408,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5550,7 +5550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5647,7 +5647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5794,7 +5794,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5911,7 +5911,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6138,7 +6138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483PE.json b/data/chips/STM32G483PE.json index 5a67744..3c02e77 100644 --- a/data/chips/STM32G483PE.json +++ b/data/chips/STM32G483PE.json @@ -5260,7 +5260,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5552,7 +5552,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5669,7 +5669,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5766,7 +5766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5858,7 +5858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6025,7 +6025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6257,7 +6257,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6424,7 +6424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6571,7 +6571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6823,7 +6823,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483QE.json b/data/chips/STM32G483QE.json index 07fd3a7..35f7cf9 100644 --- a/data/chips/STM32G483QE.json +++ b/data/chips/STM32G483QE.json @@ -5398,7 +5398,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5690,7 +5690,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5812,7 +5812,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6001,7 +6001,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6168,7 +6168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6410,7 +6410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6577,7 +6577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6724,7 +6724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6976,7 +6976,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483RE.json b/data/chips/STM32G483RE.json index 5c578ba..186c895 100644 --- a/data/chips/STM32G483RE.json +++ b/data/chips/STM32G483RE.json @@ -3956,7 +3956,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4193,7 +4193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4300,7 +4300,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4392,7 +4392,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4479,7 +4479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4621,7 +4621,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4718,7 +4718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4865,7 +4865,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5194,7 +5194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483VE.json b/data/chips/STM32G483VE.json index 2b7b08b..1371256 100644 --- a/data/chips/STM32G483VE.json +++ b/data/chips/STM32G483VE.json @@ -5581,7 +5581,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5873,7 +5873,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5990,7 +5990,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6087,7 +6087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6179,7 +6179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6346,7 +6346,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6498,7 +6498,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6665,7 +6665,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6807,7 +6807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7039,7 +7039,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484CE.json b/data/chips/STM32G484CE.json index 313ffa5..caa64b3 100644 --- a/data/chips/STM32G484CE.json +++ b/data/chips/STM32G484CE.json @@ -4204,7 +4204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4411,7 +4411,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4513,7 +4513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4605,7 +4605,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4692,7 +4692,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4834,7 +4834,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4921,7 +4921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5165,7 +5165,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5372,7 +5372,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484ME.json b/data/chips/STM32G484ME.json index a2a18d2..ecd4a66 100644 --- a/data/chips/STM32G484ME.json +++ b/data/chips/STM32G484ME.json @@ -5100,7 +5100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5392,7 +5392,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5499,7 +5499,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5591,7 +5591,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5678,7 +5678,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5820,7 +5820,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5917,7 +5917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6064,7 +6064,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6181,7 +6181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6408,7 +6408,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484PE.json b/data/chips/STM32G484PE.json index 02ff24a..4a8e5f4 100644 --- a/data/chips/STM32G484PE.json +++ b/data/chips/STM32G484PE.json @@ -5524,7 +5524,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5816,7 +5816,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6030,7 +6030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6122,7 +6122,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6289,7 +6289,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6521,7 +6521,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6688,7 +6688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6835,7 +6835,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7087,7 +7087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484QE.json b/data/chips/STM32G484QE.json index a3bfe9e..4c0e735 100644 --- a/data/chips/STM32G484QE.json +++ b/data/chips/STM32G484QE.json @@ -5668,7 +5668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5960,7 +5960,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6082,7 +6082,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6179,7 +6179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6438,7 +6438,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6680,7 +6680,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6847,7 +6847,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6994,7 +6994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7246,7 +7246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484RE.json b/data/chips/STM32G484RE.json index 8f99e05..4cfc14d 100644 --- a/data/chips/STM32G484RE.json +++ b/data/chips/STM32G484RE.json @@ -4226,7 +4226,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4662,7 +4662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4749,7 +4749,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4891,7 +4891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4988,7 +4988,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5135,7 +5135,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5252,7 +5252,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5464,7 +5464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484VE.json b/data/chips/STM32G484VE.json index 381d9d7..dbc7c79 100644 --- a/data/chips/STM32G484VE.json +++ b/data/chips/STM32G484VE.json @@ -5851,7 +5851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6143,7 +6143,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6260,7 +6260,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6357,7 +6357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6449,7 +6449,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6616,7 +6616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6768,7 +6768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6935,7 +6935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7077,7 +7077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7309,7 +7309,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491CC.json b/data/chips/STM32G491CC.json index 66f1a7e..a96c63b 100644 --- a/data/chips/STM32G491CC.json +++ b/data/chips/STM32G491CC.json @@ -3367,7 +3367,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3574,7 +3574,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3768,7 +3768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3855,7 +3855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3997,7 +3997,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4089,7 +4089,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4216,7 +4216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4433,7 +4433,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491CE.json b/data/chips/STM32G491CE.json index 3b56387..0caf3ba 100644 --- a/data/chips/STM32G491CE.json +++ b/data/chips/STM32G491CE.json @@ -3367,7 +3367,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3574,7 +3574,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3768,7 +3768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3855,7 +3855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3997,7 +3997,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4089,7 +4089,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4216,7 +4216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4433,7 +4433,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491KC.json b/data/chips/STM32G491KC.json index 735560e..3ad70bc 100644 --- a/data/chips/STM32G491KC.json +++ b/data/chips/STM32G491KC.json @@ -2612,7 +2612,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2856,7 +2856,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2948,7 +2948,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3030,7 +3030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3162,7 +3162,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3366,7 +3366,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491KE.json b/data/chips/STM32G491KE.json index fba4595..a937988 100644 --- a/data/chips/STM32G491KE.json +++ b/data/chips/STM32G491KE.json @@ -2612,7 +2612,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2856,7 +2856,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2948,7 +2948,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3030,7 +3030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3162,7 +3162,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3366,7 +3366,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491MC.json b/data/chips/STM32G491MC.json index 7b17f3d..5261ea6 100644 --- a/data/chips/STM32G491MC.json +++ b/data/chips/STM32G491MC.json @@ -4026,7 +4026,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4318,7 +4318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4425,7 +4425,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4517,7 +4517,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4746,7 +4746,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4995,7 +4995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5212,7 +5212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491ME.json b/data/chips/STM32G491ME.json index f6e045a..e211cbc 100644 --- a/data/chips/STM32G491ME.json +++ b/data/chips/STM32G491ME.json @@ -4026,7 +4026,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4318,7 +4318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4425,7 +4425,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4517,7 +4517,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4746,7 +4746,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4995,7 +4995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5212,7 +5212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491RC.json b/data/chips/STM32G491RC.json index f80d335..419d1e5 100644 --- a/data/chips/STM32G491RC.json +++ b/data/chips/STM32G491RC.json @@ -3722,7 +3722,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3959,7 +3959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4066,7 +4066,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4158,7 +4158,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4245,7 +4245,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4387,7 +4387,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4489,7 +4489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4636,7 +4636,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4853,7 +4853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491RE.json b/data/chips/STM32G491RE.json index f3f6b92..00be9b6 100644 --- a/data/chips/STM32G491RE.json +++ b/data/chips/STM32G491RE.json @@ -4112,7 +4112,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4349,7 +4349,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4456,7 +4456,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4548,7 +4548,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4635,7 +4635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4777,7 +4777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4879,7 +4879,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5026,7 +5026,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5243,7 +5243,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491VC.json b/data/chips/STM32G491VC.json index 4342810..c1e8aae 100644 --- a/data/chips/STM32G491VC.json +++ b/data/chips/STM32G491VC.json @@ -3812,7 +3812,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4104,7 +4104,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4221,7 +4221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4318,7 +4318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4734,7 +4734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4901,7 +4901,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5143,7 +5143,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491VE.json b/data/chips/STM32G491VE.json index 96e4a50..ceb5620 100644 --- a/data/chips/STM32G491VE.json +++ b/data/chips/STM32G491VE.json @@ -3812,7 +3812,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4104,7 +4104,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4221,7 +4221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4318,7 +4318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4734,7 +4734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4901,7 +4901,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5143,7 +5143,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1CE.json b/data/chips/STM32G4A1CE.json index 9adc2a4..6eaf46c 100644 --- a/data/chips/STM32G4A1CE.json +++ b/data/chips/STM32G4A1CE.json @@ -3406,7 +3406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3613,7 +3613,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3715,7 +3715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3807,7 +3807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3894,7 +3894,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4036,7 +4036,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4128,7 +4128,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4255,7 +4255,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4472,7 +4472,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1KE.json b/data/chips/STM32G4A1KE.json index adacd3b..52cc777 100644 --- a/data/chips/STM32G4A1KE.json +++ b/data/chips/STM32G4A1KE.json @@ -2651,7 +2651,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2987,7 +2987,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3069,7 +3069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3201,7 +3201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3288,7 +3288,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3405,7 +3405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3617,7 +3617,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1ME.json b/data/chips/STM32G4A1ME.json index f043f4b..035da9b 100644 --- a/data/chips/STM32G4A1ME.json +++ b/data/chips/STM32G4A1ME.json @@ -4065,7 +4065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4357,7 +4357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4464,7 +4464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4556,7 +4556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4643,7 +4643,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4785,7 +4785,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4887,7 +4887,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5034,7 +5034,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5251,7 +5251,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1RE.json b/data/chips/STM32G4A1RE.json index 0dfca87..d6f51b4 100644 --- a/data/chips/STM32G4A1RE.json +++ b/data/chips/STM32G4A1RE.json @@ -4151,7 +4151,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4388,7 +4388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4495,7 +4495,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4587,7 +4587,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4674,7 +4674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4816,7 +4816,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5065,7 +5065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1VE.json b/data/chips/STM32G4A1VE.json index 5390dc2..f73c3ec 100644 --- a/data/chips/STM32G4A1VE.json +++ b/data/chips/STM32G4A1VE.json @@ -3851,7 +3851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4143,7 +4143,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4260,7 +4260,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4357,7 +4357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4449,7 +4449,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4616,7 +4616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4773,7 +4773,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4940,7 +4940,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5182,7 +5182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H503CB.json b/data/chips/STM32H503CB.json index 64a8a31..71dccef 100644 --- a/data/chips/STM32H503CB.json +++ b/data/chips/STM32H503CB.json @@ -3332,7 +3332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3624,7 +3624,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3791,7 +3791,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503EB.json b/data/chips/STM32H503EB.json index 0c20ce3..142a570 100644 --- a/data/chips/STM32H503EB.json +++ b/data/chips/STM32H503EB.json @@ -2434,7 +2434,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2651,7 +2651,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2793,7 +2793,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503KB.json b/data/chips/STM32H503KB.json index 484478a..50386ca 100644 --- a/data/chips/STM32H503KB.json +++ b/data/chips/STM32H503KB.json @@ -2716,7 +2716,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2983,7 +2983,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3140,7 +3140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503RB.json b/data/chips/STM32H503RB.json index 601196d..656cc87 100644 --- a/data/chips/STM32H503RB.json +++ b/data/chips/STM32H503RB.json @@ -3555,7 +3555,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4084,7 +4084,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H523CC.json b/data/chips/STM32H523CC.json index 761a972..536723d 100644 --- a/data/chips/STM32H523CC.json +++ b/data/chips/STM32H523CC.json @@ -3233,7 +3233,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3577,7 +3577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3866,7 +3866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3978,7 +3978,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4220,7 +4220,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523CE.json b/data/chips/STM32H523CE.json index 1e2b63f..5aff9b1 100644 --- a/data/chips/STM32H523CE.json +++ b/data/chips/STM32H523CE.json @@ -3233,7 +3233,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3577,7 +3577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3866,7 +3866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3978,7 +3978,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4220,7 +4220,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523HE.json b/data/chips/STM32H523HE.json index dcd5351..a430402 100644 --- a/data/chips/STM32H523HE.json +++ b/data/chips/STM32H523HE.json @@ -2464,7 +2464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2671,7 +2671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2778,7 +2778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2925,7 +2925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3057,7 +3057,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3164,7 +3164,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3406,7 +3406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523RC.json b/data/chips/STM32H523RC.json index 5f8b869..080bf05 100644 --- a/data/chips/STM32H523RC.json +++ b/data/chips/STM32H523RC.json @@ -3728,7 +3728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3970,7 +3970,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4087,7 +4087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4244,7 +4244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4523,7 +4523,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4765,7 +4765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523RE.json b/data/chips/STM32H523RE.json index 31f9d41..09644e1 100644 --- a/data/chips/STM32H523RE.json +++ b/data/chips/STM32H523RE.json @@ -3728,7 +3728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3970,7 +3970,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4087,7 +4087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4244,7 +4244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4523,7 +4523,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4765,7 +4765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523VC.json b/data/chips/STM32H523VC.json index 529f261..f4a9c13 100644 --- a/data/chips/STM32H523VC.json +++ b/data/chips/STM32H523VC.json @@ -5345,7 +5345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5647,7 +5647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5784,7 +5784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5941,7 +5941,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6103,7 +6103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6250,7 +6250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6492,7 +6492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523VE.json b/data/chips/STM32H523VE.json index 11740ee..2dccf3e 100644 --- a/data/chips/STM32H523VE.json +++ b/data/chips/STM32H523VE.json @@ -5345,7 +5345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5647,7 +5647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5784,7 +5784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5941,7 +5941,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6103,7 +6103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6250,7 +6250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6492,7 +6492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523ZC.json b/data/chips/STM32H523ZC.json index f002474..91dcbe7 100644 --- a/data/chips/STM32H523ZC.json +++ b/data/chips/STM32H523ZC.json @@ -6316,7 +6316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6628,7 +6628,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6765,7 +6765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6922,7 +6922,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7084,7 +7084,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7231,7 +7231,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7473,7 +7473,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523ZE.json b/data/chips/STM32H523ZE.json index 3ba0e65..6d26848 100644 --- a/data/chips/STM32H523ZE.json +++ b/data/chips/STM32H523ZE.json @@ -6316,7 +6316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6628,7 +6628,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6765,7 +6765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6922,7 +6922,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7084,7 +7084,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7231,7 +7231,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7473,7 +7473,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533CE.json b/data/chips/STM32H533CE.json index 5fd2ae0..c990c4c 100644 --- a/data/chips/STM32H533CE.json +++ b/data/chips/STM32H533CE.json @@ -3358,7 +3358,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3595,7 +3595,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3702,7 +3702,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3854,7 +3854,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4345,7 +4345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533HE.json b/data/chips/STM32H533HE.json index 8757432..8132832 100644 --- a/data/chips/STM32H533HE.json +++ b/data/chips/STM32H533HE.json @@ -2589,7 +2589,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2903,7 +2903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3050,7 +3050,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3182,7 +3182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3289,7 +3289,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3531,7 +3531,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533RE.json b/data/chips/STM32H533RE.json index 400d484..a212e29 100644 --- a/data/chips/STM32H533RE.json +++ b/data/chips/STM32H533RE.json @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4212,7 +4212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4531,7 +4531,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4648,7 +4648,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533VE.json b/data/chips/STM32H533VE.json index 6477518..514d305 100644 --- a/data/chips/STM32H533VE.json +++ b/data/chips/STM32H533VE.json @@ -5470,7 +5470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5772,7 +5772,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6066,7 +6066,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6228,7 +6228,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6375,7 +6375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6617,7 +6617,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533ZE.json b/data/chips/STM32H533ZE.json index 9f476ea..f3505a5 100644 --- a/data/chips/STM32H533ZE.json +++ b/data/chips/STM32H533ZE.json @@ -6441,7 +6441,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6753,7 +6753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6890,7 +6890,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7047,7 +7047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7209,7 +7209,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7356,7 +7356,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7598,7 +7598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562AG.json b/data/chips/STM32H562AG.json index ba08469..e10c6c0 100644 --- a/data/chips/STM32H562AG.json +++ b/data/chips/STM32H562AG.json @@ -6974,7 +6974,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7431,7 +7431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7568,7 +7568,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7670,7 +7670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7772,7 +7772,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7934,7 +7934,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8096,7 +8096,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8243,7 +8243,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8510,7 +8510,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562AI.json b/data/chips/STM32H562AI.json index 6c5cadc..8f4e602 100644 --- a/data/chips/STM32H562AI.json +++ b/data/chips/STM32H562AI.json @@ -6974,7 +6974,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7431,7 +7431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7568,7 +7568,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7670,7 +7670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7772,7 +7772,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7934,7 +7934,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8096,7 +8096,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8243,7 +8243,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8510,7 +8510,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562IG.json b/data/chips/STM32H562IG.json index 98b2232..f02b336 100644 --- a/data/chips/STM32H562IG.json +++ b/data/chips/STM32H562IG.json @@ -8278,7 +8278,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8745,7 +8745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8882,7 +8882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8984,7 +8984,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9086,7 +9086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9248,7 +9248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9410,7 +9410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9557,7 +9557,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9824,7 +9824,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562II.json b/data/chips/STM32H562II.json index df19449..0415a75 100644 --- a/data/chips/STM32H562II.json +++ b/data/chips/STM32H562II.json @@ -8278,7 +8278,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8745,7 +8745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8882,7 +8882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8984,7 +8984,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9086,7 +9086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9248,7 +9248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9410,7 +9410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9557,7 +9557,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9824,7 +9824,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562RG.json b/data/chips/STM32H562RG.json index 482d3dd..fe23521 100644 --- a/data/chips/STM32H562RG.json +++ b/data/chips/STM32H562RG.json @@ -4772,7 +4772,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5114,7 +5114,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5231,7 +5231,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5318,7 +5318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5405,7 +5405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5567,7 +5567,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5729,7 +5729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5861,7 +5861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6103,7 +6103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562RI.json b/data/chips/STM32H562RI.json index 1ef9891..6177c32 100644 --- a/data/chips/STM32H562RI.json +++ b/data/chips/STM32H562RI.json @@ -4772,7 +4772,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5114,7 +5114,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5231,7 +5231,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5318,7 +5318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5405,7 +5405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5567,7 +5567,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5729,7 +5729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5861,7 +5861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6103,7 +6103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562VG.json b/data/chips/STM32H562VG.json index 7b2ddb2..63ef4d5 100644 --- a/data/chips/STM32H562VG.json +++ b/data/chips/STM32H562VG.json @@ -5378,7 +5378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5780,7 +5780,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5917,7 +5917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6004,7 +6004,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6091,7 +6091,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6248,7 +6248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6410,7 +6410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6557,7 +6557,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6799,7 +6799,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562VI.json b/data/chips/STM32H562VI.json index ae5b74d..df97a0c 100644 --- a/data/chips/STM32H562VI.json +++ b/data/chips/STM32H562VI.json @@ -5378,7 +5378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5780,7 +5780,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5917,7 +5917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6004,7 +6004,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6091,7 +6091,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6248,7 +6248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6410,7 +6410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6557,7 +6557,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6799,7 +6799,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562ZG.json b/data/chips/STM32H562ZG.json index 4962f79..208967d 100644 --- a/data/chips/STM32H562ZG.json +++ b/data/chips/STM32H562ZG.json @@ -6365,7 +6365,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6787,7 +6787,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6924,7 +6924,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7026,7 +7026,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7285,7 +7285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7447,7 +7447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7594,7 +7594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7836,7 +7836,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562ZI.json b/data/chips/STM32H562ZI.json index aa3d480..8137d61 100644 --- a/data/chips/STM32H562ZI.json +++ b/data/chips/STM32H562ZI.json @@ -6365,7 +6365,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6787,7 +6787,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6924,7 +6924,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7026,7 +7026,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7285,7 +7285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7447,7 +7447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7594,7 +7594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7836,7 +7836,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563AG.json b/data/chips/STM32H563AG.json index bdb8ee9..f060bdc 100644 --- a/data/chips/STM32H563AG.json +++ b/data/chips/STM32H563AG.json @@ -7384,7 +7384,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7841,7 +7841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7978,7 +7978,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8080,7 +8080,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8182,7 +8182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8344,7 +8344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8506,7 +8506,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8653,7 +8653,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8920,7 +8920,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563AI.json b/data/chips/STM32H563AI.json index f3c3100..5d9148c 100644 --- a/data/chips/STM32H563AI.json +++ b/data/chips/STM32H563AI.json @@ -8439,7 +8439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8906,7 +8906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9043,7 +9043,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9145,7 +9145,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9247,7 +9247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9409,7 +9409,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9571,7 +9571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9718,7 +9718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9985,7 +9985,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563IG.json b/data/chips/STM32H563IG.json index 6c87bdb..afb33c4 100644 --- a/data/chips/STM32H563IG.json +++ b/data/chips/STM32H563IG.json @@ -8693,7 +8693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9160,7 +9160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9297,7 +9297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9399,7 +9399,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9501,7 +9501,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9663,7 +9663,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9825,7 +9825,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9972,7 +9972,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10239,7 +10239,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563II.json b/data/chips/STM32H563II.json index d537ee1..b6c2835 100644 --- a/data/chips/STM32H563II.json +++ b/data/chips/STM32H563II.json @@ -10967,7 +10967,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11434,7 +11434,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11571,7 +11571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11673,7 +11673,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11775,7 +11775,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11937,7 +11937,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12099,7 +12099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12246,7 +12246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12513,7 +12513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563MI.json b/data/chips/STM32H563MI.json index fadbb66..2f297fd 100644 --- a/data/chips/STM32H563MI.json +++ b/data/chips/STM32H563MI.json @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5098,7 +5098,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5215,7 +5215,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5302,7 +5302,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5384,7 +5384,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5541,7 +5541,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5703,7 +5703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5830,7 +5830,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6072,7 +6072,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563RG.json b/data/chips/STM32H563RG.json index 603f159..96fa9fc 100644 --- a/data/chips/STM32H563RG.json +++ b/data/chips/STM32H563RG.json @@ -4990,7 +4990,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5332,7 +5332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5449,7 +5449,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5536,7 +5536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5623,7 +5623,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5785,7 +5785,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5947,7 +5947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6079,7 +6079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6321,7 +6321,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563RI.json b/data/chips/STM32H563RI.json index fe5bab6..0e08354 100644 --- a/data/chips/STM32H563RI.json +++ b/data/chips/STM32H563RI.json @@ -4990,7 +4990,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5332,7 +5332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5449,7 +5449,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5536,7 +5536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5623,7 +5623,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5785,7 +5785,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5947,7 +5947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6079,7 +6079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6321,7 +6321,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563VG.json b/data/chips/STM32H563VG.json index af90410..fa40571 100644 --- a/data/chips/STM32H563VG.json +++ b/data/chips/STM32H563VG.json @@ -5601,7 +5601,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6003,7 +6003,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6140,7 +6140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6314,7 +6314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6471,7 +6471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6633,7 +6633,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6780,7 +6780,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7022,7 +7022,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563VI.json b/data/chips/STM32H563VI.json index c52b1fe..36faebb 100644 --- a/data/chips/STM32H563VI.json +++ b/data/chips/STM32H563VI.json @@ -6232,7 +6232,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6634,7 +6634,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6771,7 +6771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6858,7 +6858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6945,7 +6945,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7269,7 +7269,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7416,7 +7416,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7658,7 +7658,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563ZG.json b/data/chips/STM32H563ZG.json index deb8606..7cf98e8 100644 --- a/data/chips/STM32H563ZG.json +++ b/data/chips/STM32H563ZG.json @@ -6750,7 +6750,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7172,7 +7172,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7309,7 +7309,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7411,7 +7411,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7513,7 +7513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7670,7 +7670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7832,7 +7832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7979,7 +7979,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8221,7 +8221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563ZI.json b/data/chips/STM32H563ZI.json index 9bfc2b2..1d3ec7c 100644 --- a/data/chips/STM32H563ZI.json +++ b/data/chips/STM32H563ZI.json @@ -7670,7 +7670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8092,7 +8092,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8229,7 +8229,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8331,7 +8331,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8433,7 +8433,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8595,7 +8595,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8757,7 +8757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8904,7 +8904,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9146,7 +9146,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573AI.json b/data/chips/STM32H573AI.json index d379075..3f52823 100644 --- a/data/chips/STM32H573AI.json +++ b/data/chips/STM32H573AI.json @@ -8564,7 +8564,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9031,7 +9031,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9168,7 +9168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9270,7 +9270,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9372,7 +9372,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9534,7 +9534,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9696,7 +9696,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9843,7 +9843,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10110,7 +10110,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573II.json b/data/chips/STM32H573II.json index 3f1c6ad..ada99fb 100644 --- a/data/chips/STM32H573II.json +++ b/data/chips/STM32H573II.json @@ -11092,7 +11092,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11559,7 +11559,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11696,7 +11696,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11798,7 +11798,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11900,7 +11900,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12062,7 +12062,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12224,7 +12224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12371,7 +12371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12638,7 +12638,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573MI.json b/data/chips/STM32H573MI.json index 80079d8..e8812b8 100644 --- a/data/chips/STM32H573MI.json +++ b/data/chips/STM32H573MI.json @@ -4861,7 +4861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5223,7 +5223,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5340,7 +5340,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5427,7 +5427,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5509,7 +5509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5666,7 +5666,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5828,7 +5828,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5955,7 +5955,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573RI.json b/data/chips/STM32H573RI.json index d67f31f..7e86e43 100644 --- a/data/chips/STM32H573RI.json +++ b/data/chips/STM32H573RI.json @@ -5115,7 +5115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5457,7 +5457,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5574,7 +5574,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5661,7 +5661,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5748,7 +5748,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6072,7 +6072,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6204,7 +6204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6446,7 +6446,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573VI.json b/data/chips/STM32H573VI.json index 23709a1..6833a81 100644 --- a/data/chips/STM32H573VI.json +++ b/data/chips/STM32H573VI.json @@ -6357,7 +6357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6759,7 +6759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6896,7 +6896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6983,7 +6983,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7232,7 +7232,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7394,7 +7394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7541,7 +7541,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7783,7 +7783,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573ZI.json b/data/chips/STM32H573ZI.json index e2e5b0a..7d2c927 100644 --- a/data/chips/STM32H573ZI.json +++ b/data/chips/STM32H573ZI.json @@ -7795,7 +7795,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8217,7 +8217,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8354,7 +8354,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8456,7 +8456,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8558,7 +8558,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8720,7 +8720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8882,7 +8882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9029,7 +9029,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9271,7 +9271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723VE.json b/data/chips/STM32H723VE.json index 88c2130..4bca03d 100644 --- a/data/chips/STM32H723VE.json +++ b/data/chips/STM32H723VE.json @@ -7062,7 +7062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7459,7 +7459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7576,7 +7576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7648,7 +7648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7720,7 +7720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7852,7 +7852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7934,7 +7934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8016,7 +8016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8148,7 +8148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8260,7 +8260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8462,7 +8462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723VG.json b/data/chips/STM32H723VG.json index 1ce4c5e..93a0030 100644 --- a/data/chips/STM32H723VG.json +++ b/data/chips/STM32H723VG.json @@ -7062,7 +7062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7459,7 +7459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7576,7 +7576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7648,7 +7648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7720,7 +7720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7852,7 +7852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7934,7 +7934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8016,7 +8016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8148,7 +8148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8260,7 +8260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8462,7 +8462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723ZE.json b/data/chips/STM32H723ZE.json index 7150b44..a34f75c 100644 --- a/data/chips/STM32H723ZE.json +++ b/data/chips/STM32H723ZE.json @@ -8485,7 +8485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8912,7 +8912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9029,7 +9029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9116,7 +9116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9203,7 +9203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9335,7 +9335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9477,7 +9477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9584,7 +9584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9716,7 +9716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9828,7 +9828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10030,7 +10030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723ZG.json b/data/chips/STM32H723ZG.json index 923d0d9..9f71a60 100644 --- a/data/chips/STM32H723ZG.json +++ b/data/chips/STM32H723ZG.json @@ -8485,7 +8485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8912,7 +8912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9029,7 +9029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9116,7 +9116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9203,7 +9203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9335,7 +9335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9477,7 +9477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9584,7 +9584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9716,7 +9716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9828,7 +9828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10030,7 +10030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725AE.json b/data/chips/STM32H725AE.json index b81ec4f..66cc25c 100644 --- a/data/chips/STM32H725AE.json +++ b/data/chips/STM32H725AE.json @@ -7965,7 +7965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8392,7 +8392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8509,7 +8509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8596,7 +8596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8683,7 +8683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8815,7 +8815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8957,7 +8957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9064,7 +9064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9196,7 +9196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9308,7 +9308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9525,7 +9525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725AG.json b/data/chips/STM32H725AG.json index 7885125..5b368de 100644 --- a/data/chips/STM32H725AG.json +++ b/data/chips/STM32H725AG.json @@ -7971,7 +7971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8398,7 +8398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8515,7 +8515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8602,7 +8602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8689,7 +8689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8821,7 +8821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9070,7 +9070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9202,7 +9202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9314,7 +9314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9531,7 +9531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725IE.json b/data/chips/STM32H725IE.json index c6bad62..0d9e5e2 100644 --- a/data/chips/STM32H725IE.json +++ b/data/chips/STM32H725IE.json @@ -9451,7 +9451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9933,7 +9933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10050,7 +10050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10137,7 +10137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10224,7 +10224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10356,7 +10356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10498,7 +10498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10605,7 +10605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10737,7 +10737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10849,7 +10849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11071,7 +11071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725IG.json b/data/chips/STM32H725IG.json index f86c4ac..7dc2242 100644 --- a/data/chips/STM32H725IG.json +++ b/data/chips/STM32H725IG.json @@ -9457,7 +9457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9939,7 +9939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10056,7 +10056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10143,7 +10143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10230,7 +10230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10362,7 +10362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10504,7 +10504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10611,7 +10611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10743,7 +10743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10855,7 +10855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11077,7 +11077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725RE.json b/data/chips/STM32H725RE.json index 1a06dd4..48f2f73 100644 --- a/data/chips/STM32H725RE.json +++ b/data/chips/STM32H725RE.json @@ -4627,7 +4627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4954,7 +4954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5051,7 +5051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5123,7 +5123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5195,7 +5195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5322,7 +5322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5404,7 +5404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5486,7 +5486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5613,7 +5613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5700,7 +5700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5902,7 +5902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725RG.json b/data/chips/STM32H725RG.json index 83f0ec2..489c327 100644 --- a/data/chips/STM32H725RG.json +++ b/data/chips/STM32H725RG.json @@ -4633,7 +4633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4960,7 +4960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5057,7 +5057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5129,7 +5129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5201,7 +5201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5328,7 +5328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5410,7 +5410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5492,7 +5492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5619,7 +5619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5706,7 +5706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5908,7 +5908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725VE.json b/data/chips/STM32H725VE.json index b93e775..652156b 100644 --- a/data/chips/STM32H725VE.json +++ b/data/chips/STM32H725VE.json @@ -6907,7 +6907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7269,7 +7269,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7386,7 +7386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7458,7 +7458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7530,7 +7530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7662,7 +7662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7744,7 +7744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7826,7 +7826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7958,7 +7958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8070,7 +8070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8272,7 +8272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725VG.json b/data/chips/STM32H725VG.json index 4c44b0a..456c8f7 100644 --- a/data/chips/STM32H725VG.json +++ b/data/chips/STM32H725VG.json @@ -7609,7 +7609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7971,7 +7971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8088,7 +8088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8160,7 +8160,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8232,7 +8232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8364,7 +8364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8446,7 +8446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8528,7 +8528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8660,7 +8660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8772,7 +8772,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8974,7 +8974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725ZE.json b/data/chips/STM32H725ZE.json index ffa876e..8b6345f 100644 --- a/data/chips/STM32H725ZE.json +++ b/data/chips/STM32H725ZE.json @@ -7352,7 +7352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7759,7 +7759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7876,7 +7876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7963,7 +7963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8050,7 +8050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8182,7 +8182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8299,7 +8299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8391,7 +8391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8523,7 +8523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8635,7 +8635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8837,7 +8837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725ZG.json b/data/chips/STM32H725ZG.json index ecf71b9..84de351 100644 --- a/data/chips/STM32H725ZG.json +++ b/data/chips/STM32H725ZG.json @@ -7358,7 +7358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7765,7 +7765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7882,7 +7882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7969,7 +7969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8056,7 +8056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8188,7 +8188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8305,7 +8305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8397,7 +8397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8529,7 +8529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8641,7 +8641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8843,7 +8843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730AB.json b/data/chips/STM32H730AB.json index 5d80580..471a5f2 100644 --- a/data/chips/STM32H730AB.json +++ b/data/chips/STM32H730AB.json @@ -8086,7 +8086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8513,7 +8513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8630,7 +8630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8717,7 +8717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8804,7 +8804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8936,7 +8936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9078,7 +9078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9185,7 +9185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9317,7 +9317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9429,7 +9429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9646,7 +9646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730IB.json b/data/chips/STM32H730IB.json index 71f382f..3dbead7 100644 --- a/data/chips/STM32H730IB.json +++ b/data/chips/STM32H730IB.json @@ -9572,7 +9572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10054,7 +10054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10171,7 +10171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10258,7 +10258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10345,7 +10345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10477,7 +10477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10619,7 +10619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10726,7 +10726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10858,7 +10858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10970,7 +10970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11192,7 +11192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730VB.json b/data/chips/STM32H730VB.json index 5a4a4df..4bfb8ad 100644 --- a/data/chips/STM32H730VB.json +++ b/data/chips/STM32H730VB.json @@ -7177,7 +7177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7574,7 +7574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7691,7 +7691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7763,7 +7763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7835,7 +7835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7967,7 +7967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8049,7 +8049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8131,7 +8131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8263,7 +8263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8375,7 +8375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8577,7 +8577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730ZB.json b/data/chips/STM32H730ZB.json index 86b999f..fd801be 100644 --- a/data/chips/STM32H730ZB.json +++ b/data/chips/STM32H730ZB.json @@ -8600,7 +8600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9027,7 +9027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9144,7 +9144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9231,7 +9231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9318,7 +9318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9450,7 +9450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9592,7 +9592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9699,7 +9699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9831,7 +9831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9943,7 +9943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10145,7 +10145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H733VG.json b/data/chips/STM32H733VG.json index 66623f7..065f39b 100644 --- a/data/chips/STM32H733VG.json +++ b/data/chips/STM32H733VG.json @@ -7177,7 +7177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7574,7 +7574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7691,7 +7691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7763,7 +7763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7835,7 +7835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7967,7 +7967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8049,7 +8049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8131,7 +8131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8263,7 +8263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8375,7 +8375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8577,7 +8577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H733ZG.json b/data/chips/STM32H733ZG.json index aad1000..0efac0a 100644 --- a/data/chips/STM32H733ZG.json +++ b/data/chips/STM32H733ZG.json @@ -8600,7 +8600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9027,7 +9027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9144,7 +9144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9231,7 +9231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9318,7 +9318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9450,7 +9450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9592,7 +9592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9699,7 +9699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9831,7 +9831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9943,7 +9943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10145,7 +10145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735AG.json b/data/chips/STM32H735AG.json index 9c3474d..8c66818 100644 --- a/data/chips/STM32H735AG.json +++ b/data/chips/STM32H735AG.json @@ -8091,7 +8091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8518,7 +8518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8635,7 +8635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8722,7 +8722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8809,7 +8809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8941,7 +8941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9083,7 +9083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9190,7 +9190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9322,7 +9322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9434,7 +9434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9651,7 +9651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735IG.json b/data/chips/STM32H735IG.json index af6b0c1..732eef7 100644 --- a/data/chips/STM32H735IG.json +++ b/data/chips/STM32H735IG.json @@ -9577,7 +9577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10059,7 +10059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10176,7 +10176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10263,7 +10263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10350,7 +10350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10482,7 +10482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10624,7 +10624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10731,7 +10731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10863,7 +10863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10975,7 +10975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11197,7 +11197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735RG.json b/data/chips/STM32H735RG.json index fdb2379..6f6f846 100644 --- a/data/chips/STM32H735RG.json +++ b/data/chips/STM32H735RG.json @@ -4753,7 +4753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5177,7 +5177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5249,7 +5249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5321,7 +5321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5448,7 +5448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5530,7 +5530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5612,7 +5612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5739,7 +5739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5826,7 +5826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6028,7 +6028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735VG.json b/data/chips/STM32H735VG.json index 27044c2..26719f0 100644 --- a/data/chips/STM32H735VG.json +++ b/data/chips/STM32H735VG.json @@ -7729,7 +7729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8091,7 +8091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8208,7 +8208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8280,7 +8280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8352,7 +8352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8484,7 +8484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8566,7 +8566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8648,7 +8648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8780,7 +8780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8892,7 +8892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9094,7 +9094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735ZG.json b/data/chips/STM32H735ZG.json index 0e8c32e..4202ec8 100644 --- a/data/chips/STM32H735ZG.json +++ b/data/chips/STM32H735ZG.json @@ -7478,7 +7478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8002,7 +8002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8089,7 +8089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8176,7 +8176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8308,7 +8308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8425,7 +8425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8517,7 +8517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8649,7 +8649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8761,7 +8761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742AG.json b/data/chips/STM32H742AG.json index d770751..ca96cbb 100644 --- a/data/chips/STM32H742AG.json +++ b/data/chips/STM32H742AG.json @@ -7113,7 +7113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7535,7 +7535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7642,7 +7642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7729,7 +7729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7816,7 +7816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7948,7 +7948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8080,7 +8080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8192,7 +8192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8414,7 +8414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742AI.json b/data/chips/STM32H742AI.json index e57587b..c1586ae 100644 --- a/data/chips/STM32H742AI.json +++ b/data/chips/STM32H742AI.json @@ -7113,7 +7113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7535,7 +7535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7642,7 +7642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7729,7 +7729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7816,7 +7816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7948,7 +7948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8080,7 +8080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8192,7 +8192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8414,7 +8414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742BG.json b/data/chips/STM32H742BG.json index 989ec0c..493f616 100644 --- a/data/chips/STM32H742BG.json +++ b/data/chips/STM32H742BG.json @@ -7540,7 +7540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8017,7 +8017,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8124,7 +8124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8211,7 +8211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8298,7 +8298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8430,7 +8430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8562,7 +8562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8674,7 +8674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8901,7 +8901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742BI.json b/data/chips/STM32H742BI.json index 24f92a4..4af8175 100644 --- a/data/chips/STM32H742BI.json +++ b/data/chips/STM32H742BI.json @@ -7540,7 +7540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8017,7 +8017,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8124,7 +8124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8211,7 +8211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8298,7 +8298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8430,7 +8430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8562,7 +8562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8674,7 +8674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8901,7 +8901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742IG.json b/data/chips/STM32H742IG.json index 0358ef8..3836fcd 100644 --- a/data/chips/STM32H742IG.json +++ b/data/chips/STM32H742IG.json @@ -8535,7 +8535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8967,7 +8967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9074,7 +9074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9161,7 +9161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9248,7 +9248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9380,7 +9380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9512,7 +9512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9624,7 +9624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9851,7 +9851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742II.json b/data/chips/STM32H742II.json index eb54358..694a2dc 100644 --- a/data/chips/STM32H742II.json +++ b/data/chips/STM32H742II.json @@ -8535,7 +8535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8967,7 +8967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9074,7 +9074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9161,7 +9161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9248,7 +9248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9380,7 +9380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9512,7 +9512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9624,7 +9624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9851,7 +9851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742VG.json b/data/chips/STM32H742VG.json index 758e3a5..229831f 100644 --- a/data/chips/STM32H742VG.json +++ b/data/chips/STM32H742VG.json @@ -6414,7 +6414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6806,7 +6806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6913,7 +6913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6985,7 +6985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7057,7 +7057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7189,7 +7189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7321,7 +7321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7433,7 +7433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7635,7 +7635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742VI.json b/data/chips/STM32H742VI.json index a4ea8c6..8eb5441 100644 --- a/data/chips/STM32H742VI.json +++ b/data/chips/STM32H742VI.json @@ -6414,7 +6414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6806,7 +6806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6913,7 +6913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6985,7 +6985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7057,7 +7057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7189,7 +7189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7321,7 +7321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7433,7 +7433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7635,7 +7635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742XG.json b/data/chips/STM32H742XG.json index 29ec00c..1106f6b 100644 --- a/data/chips/STM32H742XG.json +++ b/data/chips/STM32H742XG.json @@ -7930,7 +7930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8407,7 +8407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8514,7 +8514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8601,7 +8601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8688,7 +8688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8820,7 +8820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8952,7 +8952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9064,7 +9064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9291,7 +9291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742XI.json b/data/chips/STM32H742XI.json index 16271f2..7afdf5c 100644 --- a/data/chips/STM32H742XI.json +++ b/data/chips/STM32H742XI.json @@ -7930,7 +7930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8407,7 +8407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8514,7 +8514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8601,7 +8601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8688,7 +8688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8820,7 +8820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8952,7 +8952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9064,7 +9064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9291,7 +9291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742ZG.json b/data/chips/STM32H742ZG.json index 75c6eda..b71a954 100644 --- a/data/chips/STM32H742ZG.json +++ b/data/chips/STM32H742ZG.json @@ -6706,7 +6706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7235,7 +7235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7322,7 +7322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7409,7 +7409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7541,7 +7541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7673,7 +7673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7785,7 +7785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7987,7 +7987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742ZI.json b/data/chips/STM32H742ZI.json index ac61b58..d5f6bd5 100644 --- a/data/chips/STM32H742ZI.json +++ b/data/chips/STM32H742ZI.json @@ -6706,7 +6706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7235,7 +7235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7322,7 +7322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7409,7 +7409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7541,7 +7541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7673,7 +7673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7785,7 +7785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7987,7 +7987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743AG.json b/data/chips/STM32H743AG.json index 83531e4..f74e97d 100644 --- a/data/chips/STM32H743AG.json +++ b/data/chips/STM32H743AG.json @@ -7554,7 +7554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7976,7 +7976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8083,7 +8083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8170,7 +8170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8389,7 +8389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8521,7 +8521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8633,7 +8633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8855,7 +8855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743AI.json b/data/chips/STM32H743AI.json index 0119add..2131fef 100644 --- a/data/chips/STM32H743AI.json +++ b/data/chips/STM32H743AI.json @@ -7554,7 +7554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7976,7 +7976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8083,7 +8083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8170,7 +8170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8389,7 +8389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8521,7 +8521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8633,7 +8633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8855,7 +8855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743BG.json b/data/chips/STM32H743BG.json index 0a21dc4..d4e4881 100644 --- a/data/chips/STM32H743BG.json +++ b/data/chips/STM32H743BG.json @@ -8161,7 +8161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8638,7 +8638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8745,7 +8745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8832,7 +8832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8919,7 +8919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9051,7 +9051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9183,7 +9183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9295,7 +9295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9522,7 +9522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743BI.json b/data/chips/STM32H743BI.json index fef4729..d3d662f 100644 --- a/data/chips/STM32H743BI.json +++ b/data/chips/STM32H743BI.json @@ -8161,7 +8161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8638,7 +8638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8745,7 +8745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8832,7 +8832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8919,7 +8919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9051,7 +9051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9183,7 +9183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9295,7 +9295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9522,7 +9522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743IG.json b/data/chips/STM32H743IG.json index 4a63db6..cd8fbba 100644 --- a/data/chips/STM32H743IG.json +++ b/data/chips/STM32H743IG.json @@ -8996,7 +8996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9428,7 +9428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9535,7 +9535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9622,7 +9622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9709,7 +9709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9841,7 +9841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9973,7 +9973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10085,7 +10085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10312,7 +10312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743II.json b/data/chips/STM32H743II.json index be21d86..5c87ed8 100644 --- a/data/chips/STM32H743II.json +++ b/data/chips/STM32H743II.json @@ -8996,7 +8996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9428,7 +9428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9535,7 +9535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9622,7 +9622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9709,7 +9709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9841,7 +9841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9973,7 +9973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10085,7 +10085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10312,7 +10312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743VG.json b/data/chips/STM32H743VG.json index 3c61f4d..9e52cc9 100644 --- a/data/chips/STM32H743VG.json +++ b/data/chips/STM32H743VG.json @@ -6710,7 +6710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7102,7 +7102,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7209,7 +7209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7281,7 +7281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7485,7 +7485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7617,7 +7617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7729,7 +7729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7931,7 +7931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743VI.json b/data/chips/STM32H743VI.json index 37aa095..5d0e2af 100644 --- a/data/chips/STM32H743VI.json +++ b/data/chips/STM32H743VI.json @@ -6710,7 +6710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7102,7 +7102,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7209,7 +7209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7281,7 +7281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7485,7 +7485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7617,7 +7617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7729,7 +7729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7931,7 +7931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743XG.json b/data/chips/STM32H743XG.json index 19d1ed6..f49b81e 100644 --- a/data/chips/STM32H743XG.json +++ b/data/chips/STM32H743XG.json @@ -8551,7 +8551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9028,7 +9028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9135,7 +9135,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9222,7 +9222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9309,7 +9309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9441,7 +9441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9573,7 +9573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9685,7 +9685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9912,7 +9912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743XI.json b/data/chips/STM32H743XI.json index 163f533..dce889e 100644 --- a/data/chips/STM32H743XI.json +++ b/data/chips/STM32H743XI.json @@ -8551,7 +8551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9028,7 +9028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9135,7 +9135,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9222,7 +9222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9309,7 +9309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9441,7 +9441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9573,7 +9573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9685,7 +9685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9912,7 +9912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743ZG.json b/data/chips/STM32H743ZG.json index c1ed513..ed4f71e 100644 --- a/data/chips/STM32H743ZG.json +++ b/data/chips/STM32H743ZG.json @@ -7057,7 +7057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7479,7 +7479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7586,7 +7586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7673,7 +7673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7760,7 +7760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7892,7 +7892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8024,7 +8024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8136,7 +8136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8338,7 +8338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743ZI.json b/data/chips/STM32H743ZI.json index cab48dc..7003996 100644 --- a/data/chips/STM32H743ZI.json +++ b/data/chips/STM32H743ZI.json @@ -7057,7 +7057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7479,7 +7479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7586,7 +7586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7673,7 +7673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7760,7 +7760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7892,7 +7892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8024,7 +8024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8136,7 +8136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8338,7 +8338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745BG.json b/data/chips/STM32H745BG.json index 3239b3e..cad6e91 100644 --- a/data/chips/STM32H745BG.json +++ b/data/chips/STM32H745BG.json @@ -8042,7 +8042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8519,7 +8519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8626,7 +8626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8713,7 +8713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8800,7 +8800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8932,7 +8932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9064,7 +9064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9176,7 +9176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9403,7 +9403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18501,7 +18501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18978,7 +18978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19085,7 +19085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19172,7 +19172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19259,7 +19259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19391,7 +19391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19523,7 +19523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19635,7 +19635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19862,7 +19862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745BI.json b/data/chips/STM32H745BI.json index bde8936..f33dcf2 100644 --- a/data/chips/STM32H745BI.json +++ b/data/chips/STM32H745BI.json @@ -8042,7 +8042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8519,7 +8519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8626,7 +8626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8713,7 +8713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8800,7 +8800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8932,7 +8932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9064,7 +9064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9176,7 +9176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9403,7 +9403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18501,7 +18501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18978,7 +18978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19085,7 +19085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19172,7 +19172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19259,7 +19259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19391,7 +19391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19523,7 +19523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19635,7 +19635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19862,7 +19862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745IG.json b/data/chips/STM32H745IG.json index 0ea5f0d..0f20500 100644 --- a/data/chips/STM32H745IG.json +++ b/data/chips/STM32H745IG.json @@ -8884,7 +8884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9361,7 +9361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9468,7 +9468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9555,7 +9555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9642,7 +9642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9774,7 +9774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9906,7 +9906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10018,7 +10018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10240,7 +10240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19040,7 +19040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19517,7 +19517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19624,7 +19624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19711,7 +19711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19798,7 +19798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19930,7 +19930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20062,7 +20062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20174,7 +20174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20396,7 +20396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745II.json b/data/chips/STM32H745II.json index 928885a..99aa879 100644 --- a/data/chips/STM32H745II.json +++ b/data/chips/STM32H745II.json @@ -8884,7 +8884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9361,7 +9361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9468,7 +9468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9555,7 +9555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9642,7 +9642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9774,7 +9774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9906,7 +9906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10018,7 +10018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10240,7 +10240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19040,7 +19040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19517,7 +19517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19624,7 +19624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19711,7 +19711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19798,7 +19798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19930,7 +19930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20062,7 +20062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20174,7 +20174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20396,7 +20396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745XG.json b/data/chips/STM32H745XG.json index c022049..eaef349 100644 --- a/data/chips/STM32H745XG.json +++ b/data/chips/STM32H745XG.json @@ -8544,7 +8544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9021,7 +9021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9128,7 +9128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9215,7 +9215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9302,7 +9302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9434,7 +9434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9566,7 +9566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9678,7 +9678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9905,7 +9905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19231,7 +19231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19708,7 +19708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19815,7 +19815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19902,7 +19902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19989,7 +19989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20121,7 +20121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20253,7 +20253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20365,7 +20365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20592,7 +20592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745XI.json b/data/chips/STM32H745XI.json index 54dee0c..8398f76 100644 --- a/data/chips/STM32H745XI.json +++ b/data/chips/STM32H745XI.json @@ -8544,7 +8544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9021,7 +9021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9128,7 +9128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9215,7 +9215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9302,7 +9302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9434,7 +9434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9566,7 +9566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9678,7 +9678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9905,7 +9905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19231,7 +19231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19708,7 +19708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19815,7 +19815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19902,7 +19902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19989,7 +19989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20121,7 +20121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20253,7 +20253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20365,7 +20365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20592,7 +20592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745ZG.json b/data/chips/STM32H745ZG.json index ed522ce..13ea845 100644 --- a/data/chips/STM32H745ZG.json +++ b/data/chips/STM32H745ZG.json @@ -6893,7 +6893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7295,7 +7295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7402,7 +7402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7489,7 +7489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7576,7 +7576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7708,7 +7708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7840,7 +7840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7952,7 +7952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8154,7 +8154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16134,7 +16134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16536,7 +16536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16643,7 +16643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16730,7 +16730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16817,7 +16817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16949,7 +16949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17081,7 +17081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17193,7 +17193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17395,7 +17395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745ZI.json b/data/chips/STM32H745ZI.json index c0091a3..c15b4af 100644 --- a/data/chips/STM32H745ZI.json +++ b/data/chips/STM32H745ZI.json @@ -6893,7 +6893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7295,7 +7295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7402,7 +7402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7489,7 +7489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7576,7 +7576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7708,7 +7708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7840,7 +7840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7952,7 +7952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8154,7 +8154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16134,7 +16134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16536,7 +16536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16643,7 +16643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16730,7 +16730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16817,7 +16817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16949,7 +16949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17081,7 +17081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17193,7 +17193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17395,7 +17395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747AG.json b/data/chips/STM32H747AG.json index d1a5556..18ecfe6 100644 --- a/data/chips/STM32H747AG.json +++ b/data/chips/STM32H747AG.json @@ -7246,7 +7246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7668,7 +7668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7775,7 +7775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7862,7 +7862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7949,7 +7949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8081,7 +8081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8213,7 +8213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8325,7 +8325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8527,7 +8527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16793,7 +16793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17215,7 +17215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17322,7 +17322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17409,7 +17409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17496,7 +17496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17628,7 +17628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17760,7 +17760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17872,7 +17872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18074,7 +18074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747AI.json b/data/chips/STM32H747AI.json index c276fdc..570cbb3 100644 --- a/data/chips/STM32H747AI.json +++ b/data/chips/STM32H747AI.json @@ -7246,7 +7246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7668,7 +7668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7775,7 +7775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7862,7 +7862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7949,7 +7949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8081,7 +8081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8213,7 +8213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8325,7 +8325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8527,7 +8527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16793,7 +16793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17215,7 +17215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17322,7 +17322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17409,7 +17409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17496,7 +17496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17628,7 +17628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17760,7 +17760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17872,7 +17872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18074,7 +18074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747BG.json b/data/chips/STM32H747BG.json index 9f08d13..c5bcf06 100644 --- a/data/chips/STM32H747BG.json +++ b/data/chips/STM32H747BG.json @@ -8025,7 +8025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8457,7 +8457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8564,7 +8564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8651,7 +8651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8738,7 +8738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8870,7 +8870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9002,7 +9002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9114,7 +9114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9341,7 +9341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18328,7 +18328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18760,7 +18760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18867,7 +18867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18954,7 +18954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19041,7 +19041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19173,7 +19173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19305,7 +19305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19417,7 +19417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19644,7 +19644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747BI.json b/data/chips/STM32H747BI.json index 4346e1d..857bf83 100644 --- a/data/chips/STM32H747BI.json +++ b/data/chips/STM32H747BI.json @@ -8025,7 +8025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8457,7 +8457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8564,7 +8564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8651,7 +8651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8738,7 +8738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8870,7 +8870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9002,7 +9002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9114,7 +9114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9341,7 +9341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18328,7 +18328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18760,7 +18760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18867,7 +18867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18954,7 +18954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19041,7 +19041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19173,7 +19173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19305,7 +19305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19417,7 +19417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19644,7 +19644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747IG.json b/data/chips/STM32H747IG.json index d1521bb..fe37abc 100644 --- a/data/chips/STM32H747IG.json +++ b/data/chips/STM32H747IG.json @@ -7288,7 +7288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7710,7 +7710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7817,7 +7817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7904,7 +7904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7991,7 +7991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8123,7 +8123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8255,7 +8255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8367,7 +8367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8569,7 +8569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16835,7 +16835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17257,7 +17257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17364,7 +17364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17451,7 +17451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17538,7 +17538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17670,7 +17670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17802,7 +17802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17914,7 +17914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18116,7 +18116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747II.json b/data/chips/STM32H747II.json index 1224e77..d464eec 100644 --- a/data/chips/STM32H747II.json +++ b/data/chips/STM32H747II.json @@ -7288,7 +7288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7710,7 +7710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7817,7 +7817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7904,7 +7904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7991,7 +7991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8123,7 +8123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8255,7 +8255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8367,7 +8367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8569,7 +8569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16835,7 +16835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17257,7 +17257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17364,7 +17364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17451,7 +17451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17538,7 +17538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17670,7 +17670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17802,7 +17802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17914,7 +17914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18116,7 +18116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747XG.json b/data/chips/STM32H747XG.json index aa1f852..7d71e03 100644 --- a/data/chips/STM32H747XG.json +++ b/data/chips/STM32H747XG.json @@ -8611,7 +8611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9088,7 +9088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9195,7 +9195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9282,7 +9282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9369,7 +9369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9501,7 +9501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9633,7 +9633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9745,7 +9745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9972,7 +9972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19349,7 +19349,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19826,7 +19826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19933,7 +19933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20020,7 +20020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20107,7 +20107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20239,7 +20239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20371,7 +20371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20483,7 +20483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20710,7 +20710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747XI.json b/data/chips/STM32H747XI.json index fa47ff1..2002ebd 100644 --- a/data/chips/STM32H747XI.json +++ b/data/chips/STM32H747XI.json @@ -8611,7 +8611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9088,7 +9088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9195,7 +9195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9282,7 +9282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9369,7 +9369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9501,7 +9501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9633,7 +9633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9745,7 +9745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9972,7 +9972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19349,7 +19349,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19826,7 +19826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19933,7 +19933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20020,7 +20020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20107,7 +20107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20239,7 +20239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20371,7 +20371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20483,7 +20483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20710,7 +20710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747ZI.json b/data/chips/STM32H747ZI.json index 63852e4..ab7a673 100644 --- a/data/chips/STM32H747ZI.json +++ b/data/chips/STM32H747ZI.json @@ -6707,7 +6707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7119,7 +7119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7226,7 +7226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7298,7 +7298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7370,7 +7370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7502,7 +7502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7634,7 +7634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7746,7 +7746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7948,7 +7948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15654,7 +15654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16066,7 +16066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16173,7 +16173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16245,7 +16245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16317,7 +16317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16449,7 +16449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16581,7 +16581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16693,7 +16693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16895,7 +16895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750IB.json b/data/chips/STM32H750IB.json index c22e4fa..ba4565a 100644 --- a/data/chips/STM32H750IB.json +++ b/data/chips/STM32H750IB.json @@ -9041,7 +9041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9473,7 +9473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9580,7 +9580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9667,7 +9667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9754,7 +9754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9886,7 +9886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10018,7 +10018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10130,7 +10130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10357,7 +10357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750VB.json b/data/chips/STM32H750VB.json index 222f2e7..765492d 100644 --- a/data/chips/STM32H750VB.json +++ b/data/chips/STM32H750VB.json @@ -6149,7 +6149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6541,7 +6541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6648,7 +6648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6720,7 +6720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6792,7 +6792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6924,7 +6924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7056,7 +7056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7168,7 +7168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7370,7 +7370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750XB.json b/data/chips/STM32H750XB.json index 5ae3ff6..7c46d39 100644 --- a/data/chips/STM32H750XB.json +++ b/data/chips/STM32H750XB.json @@ -8596,7 +8596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9073,7 +9073,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9180,7 +9180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9267,7 +9267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9354,7 +9354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9486,7 +9486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9618,7 +9618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9730,7 +9730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9957,7 +9957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750ZB.json b/data/chips/STM32H750ZB.json index 8ae5dc3..dbae3a3 100644 --- a/data/chips/STM32H750ZB.json +++ b/data/chips/STM32H750ZB.json @@ -7090,7 +7090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7512,7 +7512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7619,7 +7619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7706,7 +7706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7793,7 +7793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7925,7 +7925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8057,7 +8057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8169,7 +8169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8371,7 +8371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753AI.json b/data/chips/STM32H753AI.json index e100ddb..1ace13e 100644 --- a/data/chips/STM32H753AI.json +++ b/data/chips/STM32H753AI.json @@ -7633,7 +7633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8055,7 +8055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8162,7 +8162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8249,7 +8249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8336,7 +8336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8468,7 +8468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8600,7 +8600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8712,7 +8712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8934,7 +8934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753BI.json b/data/chips/STM32H753BI.json index b17ba0b..d140577 100644 --- a/data/chips/STM32H753BI.json +++ b/data/chips/STM32H753BI.json @@ -8240,7 +8240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8717,7 +8717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8824,7 +8824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8911,7 +8911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8998,7 +8998,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9130,7 +9130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9262,7 +9262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9374,7 +9374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9601,7 +9601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753II.json b/data/chips/STM32H753II.json index 3716a57..8e38a6c 100644 --- a/data/chips/STM32H753II.json +++ b/data/chips/STM32H753II.json @@ -9075,7 +9075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9507,7 +9507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9614,7 +9614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9701,7 +9701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9788,7 +9788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9920,7 +9920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10052,7 +10052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10164,7 +10164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10391,7 +10391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753VI.json b/data/chips/STM32H753VI.json index 2c150bb..06e78dd 100644 --- a/data/chips/STM32H753VI.json +++ b/data/chips/STM32H753VI.json @@ -6789,7 +6789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7181,7 +7181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7288,7 +7288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7360,7 +7360,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7432,7 +7432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7564,7 +7564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7696,7 +7696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7808,7 +7808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8010,7 +8010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753XI.json b/data/chips/STM32H753XI.json index 9584517..acf434d 100644 --- a/data/chips/STM32H753XI.json +++ b/data/chips/STM32H753XI.json @@ -8630,7 +8630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9107,7 +9107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9214,7 +9214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9301,7 +9301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9388,7 +9388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9520,7 +9520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9652,7 +9652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9764,7 +9764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9991,7 +9991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753ZI.json b/data/chips/STM32H753ZI.json index c4e37f4..99842d0 100644 --- a/data/chips/STM32H753ZI.json +++ b/data/chips/STM32H753ZI.json @@ -7136,7 +7136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7558,7 +7558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7665,7 +7665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7752,7 +7752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7839,7 +7839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7971,7 +7971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8103,7 +8103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8215,7 +8215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8417,7 +8417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755BI.json b/data/chips/STM32H755BI.json index 523b70f..b2bb7b9 100644 --- a/data/chips/STM32H755BI.json +++ b/data/chips/STM32H755BI.json @@ -8121,7 +8121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8598,7 +8598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8705,7 +8705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8792,7 +8792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8879,7 +8879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9011,7 +9011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9143,7 +9143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9255,7 +9255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9482,7 +9482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18657,7 +18657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19134,7 +19134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19241,7 +19241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19328,7 +19328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19415,7 +19415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19547,7 +19547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19679,7 +19679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19791,7 +19791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20018,7 +20018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755II.json b/data/chips/STM32H755II.json index 8b2af11..a9513ff 100644 --- a/data/chips/STM32H755II.json +++ b/data/chips/STM32H755II.json @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9440,7 +9440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9547,7 +9547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9634,7 +9634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9721,7 +9721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9853,7 +9853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9985,7 +9985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10097,7 +10097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10319,7 +10319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19196,7 +19196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19673,7 +19673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19780,7 +19780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19867,7 +19867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19954,7 +19954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20086,7 +20086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20218,7 +20218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20330,7 +20330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20552,7 +20552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755XI.json b/data/chips/STM32H755XI.json index a499bd9..41d43fb 100644 --- a/data/chips/STM32H755XI.json +++ b/data/chips/STM32H755XI.json @@ -8623,7 +8623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9100,7 +9100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9207,7 +9207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9294,7 +9294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9381,7 +9381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9513,7 +9513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9645,7 +9645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9757,7 +9757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9984,7 +9984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19387,7 +19387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19864,7 +19864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19971,7 +19971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20058,7 +20058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20145,7 +20145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20277,7 +20277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20409,7 +20409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20521,7 +20521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20748,7 +20748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755ZI.json b/data/chips/STM32H755ZI.json index eb198d7..5b96856 100644 --- a/data/chips/STM32H755ZI.json +++ b/data/chips/STM32H755ZI.json @@ -6972,7 +6972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7374,7 +7374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7481,7 +7481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7568,7 +7568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7655,7 +7655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7787,7 +7787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7919,7 +7919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8031,7 +8031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8233,7 +8233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16290,7 +16290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16692,7 +16692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16799,7 +16799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16886,7 +16886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16973,7 +16973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17105,7 +17105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17237,7 +17237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17349,7 +17349,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17551,7 +17551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757AI.json b/data/chips/STM32H757AI.json index 5e76ad1..23e9bb3 100644 --- a/data/chips/STM32H757AI.json +++ b/data/chips/STM32H757AI.json @@ -7325,7 +7325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7747,7 +7747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7854,7 +7854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7941,7 +7941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8028,7 +8028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8160,7 +8160,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8292,7 +8292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8404,7 +8404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8606,7 +8606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16949,7 +16949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17371,7 +17371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17478,7 +17478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17565,7 +17565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17652,7 +17652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17784,7 +17784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17916,7 +17916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18028,7 +18028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18230,7 +18230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757BI.json b/data/chips/STM32H757BI.json index 2855562..54ec26d 100644 --- a/data/chips/STM32H757BI.json +++ b/data/chips/STM32H757BI.json @@ -8104,7 +8104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8536,7 +8536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8643,7 +8643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8730,7 +8730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8817,7 +8817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8949,7 +8949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9081,7 +9081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9193,7 +9193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9420,7 +9420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18484,7 +18484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18916,7 +18916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19023,7 +19023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19110,7 +19110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19197,7 +19197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19329,7 +19329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19461,7 +19461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19573,7 +19573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19800,7 +19800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757II.json b/data/chips/STM32H757II.json index e01695e..937534f 100644 --- a/data/chips/STM32H757II.json +++ b/data/chips/STM32H757II.json @@ -7367,7 +7367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7789,7 +7789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7896,7 +7896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7983,7 +7983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8070,7 +8070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8202,7 +8202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8334,7 +8334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8446,7 +8446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8648,7 +8648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16991,7 +16991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17413,7 +17413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17520,7 +17520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17607,7 +17607,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17694,7 +17694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17826,7 +17826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17958,7 +17958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18070,7 +18070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18272,7 +18272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757XI.json b/data/chips/STM32H757XI.json index ef33a84..4071e03 100644 --- a/data/chips/STM32H757XI.json +++ b/data/chips/STM32H757XI.json @@ -8690,7 +8690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9167,7 +9167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9274,7 +9274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9361,7 +9361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9448,7 +9448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9580,7 +9580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9712,7 +9712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9824,7 +9824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10051,7 +10051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19505,7 +19505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19982,7 +19982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20089,7 +20089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20176,7 +20176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -20263,7 +20263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20395,7 +20395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20527,7 +20527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20639,7 +20639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20866,7 +20866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757ZI.json b/data/chips/STM32H757ZI.json index 7a9b733..833ea0c 100644 --- a/data/chips/STM32H757ZI.json +++ b/data/chips/STM32H757ZI.json @@ -6786,7 +6786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7198,7 +7198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7305,7 +7305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7377,7 +7377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7449,7 +7449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7581,7 +7581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7713,7 +7713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7825,7 +7825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8027,7 +8027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15810,7 +15810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16222,7 +16222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16329,7 +16329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16401,7 +16401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16473,7 +16473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16605,7 +16605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16737,7 +16737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16849,7 +16849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17051,7 +17051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3AG.json b/data/chips/STM32H7A3AG.json index bd81819..4a3b90e 100644 --- a/data/chips/STM32H7A3AG.json +++ b/data/chips/STM32H7A3AG.json @@ -7420,7 +7420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7842,7 +7842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7959,7 +7959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8046,7 +8046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8133,7 +8133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8265,7 +8265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8397,7 +8397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8509,7 +8509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8726,7 +8726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3AI.json b/data/chips/STM32H7A3AI.json index 8dde77c..8467659 100644 --- a/data/chips/STM32H7A3AI.json +++ b/data/chips/STM32H7A3AI.json @@ -7420,7 +7420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7842,7 +7842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7959,7 +7959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8046,7 +8046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8133,7 +8133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8265,7 +8265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8397,7 +8397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8509,7 +8509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8726,7 +8726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3IG.json b/data/chips/STM32H7A3IG.json index 280e317..e0432d3 100644 --- a/data/chips/STM32H7A3IG.json +++ b/data/chips/STM32H7A3IG.json @@ -11444,7 +11444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11921,7 +11921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12038,7 +12038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12125,7 +12125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12212,7 +12212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12344,7 +12344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12476,7 +12476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12588,7 +12588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12815,7 +12815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3II.json b/data/chips/STM32H7A3II.json index 8fdf3f7..e4618ff 100644 --- a/data/chips/STM32H7A3II.json +++ b/data/chips/STM32H7A3II.json @@ -11444,7 +11444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11921,7 +11921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12038,7 +12038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12125,7 +12125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12212,7 +12212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12344,7 +12344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12476,7 +12476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12588,7 +12588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12815,7 +12815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3LG.json b/data/chips/STM32H7A3LG.json index 1c7fb90..3f82013 100644 --- a/data/chips/STM32H7A3LG.json +++ b/data/chips/STM32H7A3LG.json @@ -8416,7 +8416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8893,7 +8893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9010,7 +9010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9097,7 +9097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9184,7 +9184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9316,7 +9316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9448,7 +9448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9560,7 +9560,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9787,7 +9787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3LI.json b/data/chips/STM32H7A3LI.json index 6888c80..5aaabac 100644 --- a/data/chips/STM32H7A3LI.json +++ b/data/chips/STM32H7A3LI.json @@ -8422,7 +8422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8899,7 +8899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9016,7 +9016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9103,7 +9103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9190,7 +9190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9322,7 +9322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9454,7 +9454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9566,7 +9566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9793,7 +9793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3NG.json b/data/chips/STM32H7A3NG.json index 169a032..dbaf544 100644 --- a/data/chips/STM32H7A3NG.json +++ b/data/chips/STM32H7A3NG.json @@ -8324,7 +8324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8801,7 +8801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8918,7 +8918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9005,7 +9005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9092,7 +9092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9224,7 +9224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9356,7 +9356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9468,7 +9468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9695,7 +9695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3NI.json b/data/chips/STM32H7A3NI.json index 27b3381..2c821dd 100644 --- a/data/chips/STM32H7A3NI.json +++ b/data/chips/STM32H7A3NI.json @@ -8324,7 +8324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8801,7 +8801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8918,7 +8918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9005,7 +9005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9092,7 +9092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9224,7 +9224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9356,7 +9356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9468,7 +9468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9695,7 +9695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3QI.json b/data/chips/STM32H7A3QI.json index e88e1b3..473a4ba 100644 --- a/data/chips/STM32H7A3QI.json +++ b/data/chips/STM32H7A3QI.json @@ -6511,7 +6511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6903,7 +6903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7020,7 +7020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7092,7 +7092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7164,7 +7164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7296,7 +7296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7423,7 +7423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7535,7 +7535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7737,7 +7737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3RG.json b/data/chips/STM32H7A3RG.json index 14df5bc..d56e588 100644 --- a/data/chips/STM32H7A3RG.json +++ b/data/chips/STM32H7A3RG.json @@ -4663,7 +4663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4975,7 +4975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5072,7 +5072,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5144,7 +5144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5216,7 +5216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5343,7 +5343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5470,7 +5470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5557,7 +5557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3RI.json b/data/chips/STM32H7A3RI.json index 5fe5313..862dfb1 100644 --- a/data/chips/STM32H7A3RI.json +++ b/data/chips/STM32H7A3RI.json @@ -4663,7 +4663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4975,7 +4975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5072,7 +5072,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5144,7 +5144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5216,7 +5216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5343,7 +5343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5470,7 +5470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5557,7 +5557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3VG.json b/data/chips/STM32H7A3VG.json index 1b04d93..7c72088 100644 --- a/data/chips/STM32H7A3VG.json +++ b/data/chips/STM32H7A3VG.json @@ -7902,7 +7902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8294,7 +8294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8411,7 +8411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8483,7 +8483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8555,7 +8555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8687,7 +8687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8819,7 +8819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8931,7 +8931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9133,7 +9133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3VI.json b/data/chips/STM32H7A3VI.json index 65303a9..f8de4d2 100644 --- a/data/chips/STM32H7A3VI.json +++ b/data/chips/STM32H7A3VI.json @@ -7902,7 +7902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8294,7 +8294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8411,7 +8411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8483,7 +8483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8555,7 +8555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8687,7 +8687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8819,7 +8819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8931,7 +8931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9133,7 +9133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3ZG.json b/data/chips/STM32H7A3ZG.json index bed75e2..0fa5ca8 100644 --- a/data/chips/STM32H7A3ZG.json +++ b/data/chips/STM32H7A3ZG.json @@ -7936,7 +7936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8358,7 +8358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8475,7 +8475,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8562,7 +8562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8649,7 +8649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8781,7 +8781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8913,7 +8913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9025,7 +9025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9227,7 +9227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3ZI.json b/data/chips/STM32H7A3ZI.json index 7cabdcb..2a6cc30 100644 --- a/data/chips/STM32H7A3ZI.json +++ b/data/chips/STM32H7A3ZI.json @@ -7936,7 +7936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8358,7 +8358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8475,7 +8475,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8562,7 +8562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8649,7 +8649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8781,7 +8781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8913,7 +8913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9025,7 +9025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9227,7 +9227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0AB.json b/data/chips/STM32H7B0AB.json index 397d169..39d72c7 100644 --- a/data/chips/STM32H7B0AB.json +++ b/data/chips/STM32H7B0AB.json @@ -7518,7 +7518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7940,7 +7940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8057,7 +8057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8144,7 +8144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8231,7 +8231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8363,7 +8363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8495,7 +8495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8607,7 +8607,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8824,7 +8824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0IB.json b/data/chips/STM32H7B0IB.json index 65ac392..5f48151 100644 --- a/data/chips/STM32H7B0IB.json +++ b/data/chips/STM32H7B0IB.json @@ -9213,7 +9213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9645,7 +9645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9762,7 +9762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9849,7 +9849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9936,7 +9936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10068,7 +10068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10200,7 +10200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10312,7 +10312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10539,7 +10539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0RB.json b/data/chips/STM32H7B0RB.json index 40e7ddd..5a3b734 100644 --- a/data/chips/STM32H7B0RB.json +++ b/data/chips/STM32H7B0RB.json @@ -4746,7 +4746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5058,7 +5058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5155,7 +5155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5227,7 +5227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5299,7 +5299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5426,7 +5426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5553,7 +5553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5640,7 +5640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5842,7 +5842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0VB.json b/data/chips/STM32H7B0VB.json index 4a41060..37b79ad 100644 --- a/data/chips/STM32H7B0VB.json +++ b/data/chips/STM32H7B0VB.json @@ -6167,7 +6167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6559,7 +6559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6676,7 +6676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6748,7 +6748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6820,7 +6820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6952,7 +6952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7084,7 +7084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7196,7 +7196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7398,7 +7398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0ZB.json b/data/chips/STM32H7B0ZB.json index 5923bf5..a0d884b 100644 --- a/data/chips/STM32H7B0ZB.json +++ b/data/chips/STM32H7B0ZB.json @@ -7164,7 +7164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7586,7 +7586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7703,7 +7703,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7790,7 +7790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7877,7 +7877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8009,7 +8009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8141,7 +8141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8253,7 +8253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8455,7 +8455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3AI.json b/data/chips/STM32H7B3AI.json index 27f886c..3592a08 100644 --- a/data/chips/STM32H7B3AI.json +++ b/data/chips/STM32H7B3AI.json @@ -7540,7 +7540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7962,7 +7962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8079,7 +8079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8166,7 +8166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8253,7 +8253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8385,7 +8385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8517,7 +8517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8629,7 +8629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8846,7 +8846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3II.json b/data/chips/STM32H7B3II.json index 0606eb3..0a49390 100644 --- a/data/chips/STM32H7B3II.json +++ b/data/chips/STM32H7B3II.json @@ -11564,7 +11564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12041,7 +12041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12158,7 +12158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12245,7 +12245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12332,7 +12332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12464,7 +12464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12596,7 +12596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12708,7 +12708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12935,7 +12935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3LI.json b/data/chips/STM32H7B3LI.json index e15a0d4..aadd094 100644 --- a/data/chips/STM32H7B3LI.json +++ b/data/chips/STM32H7B3LI.json @@ -8542,7 +8542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9019,7 +9019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9136,7 +9136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9223,7 +9223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9310,7 +9310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9442,7 +9442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9574,7 +9574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9686,7 +9686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9913,7 +9913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3NI.json b/data/chips/STM32H7B3NI.json index c220cae..e1116ee 100644 --- a/data/chips/STM32H7B3NI.json +++ b/data/chips/STM32H7B3NI.json @@ -8444,7 +8444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8921,7 +8921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9038,7 +9038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9125,7 +9125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9212,7 +9212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9344,7 +9344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9476,7 +9476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9588,7 +9588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9815,7 +9815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3QI.json b/data/chips/STM32H7B3QI.json index a5a0eee..7a14ba5 100644 --- a/data/chips/STM32H7B3QI.json +++ b/data/chips/STM32H7B3QI.json @@ -6616,7 +6616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7008,7 +7008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7125,7 +7125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7197,7 +7197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7269,7 +7269,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7401,7 +7401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7528,7 +7528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7640,7 +7640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7842,7 +7842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3RI.json b/data/chips/STM32H7B3RI.json index dfe1eed..508a303 100644 --- a/data/chips/STM32H7B3RI.json +++ b/data/chips/STM32H7B3RI.json @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5177,7 +5177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5249,7 +5249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5321,7 +5321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5448,7 +5448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5575,7 +5575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5662,7 +5662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5864,7 +5864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3VI.json b/data/chips/STM32H7B3VI.json index 21d7db2..6d2d99b 100644 --- a/data/chips/STM32H7B3VI.json +++ b/data/chips/STM32H7B3VI.json @@ -8007,7 +8007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8399,7 +8399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8516,7 +8516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8588,7 +8588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8660,7 +8660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8792,7 +8792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8924,7 +8924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9036,7 +9036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9238,7 +9238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3ZI.json b/data/chips/STM32H7B3ZI.json index dfd8c3a..883d9ab 100644 --- a/data/chips/STM32H7B3ZI.json +++ b/data/chips/STM32H7B3ZI.json @@ -8056,7 +8056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8478,7 +8478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8595,7 +8595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8682,7 +8682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8769,7 +8769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8901,7 +8901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9033,7 +9033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9145,7 +9145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9347,7 +9347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7R3A8.json b/data/chips/STM32H7R3A8.json index 192101e..7bbe56e 100644 --- a/data/chips/STM32H7R3A8.json +++ b/data/chips/STM32H7R3A8.json @@ -6140,7 +6140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6537,7 +6537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6654,7 +6654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6741,7 +6741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6828,7 +6828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6945,7 +6945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7062,7 +7062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3I8.json b/data/chips/STM32H7R3I8.json index 185e0d9..95b1f31 100644 --- a/data/chips/STM32H7R3I8.json +++ b/data/chips/STM32H7R3I8.json @@ -7546,7 +7546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7953,7 +7953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8070,7 +8070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8162,7 +8162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8249,7 +8249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8366,7 +8366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8483,7 +8483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8590,7 +8590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3L8.json b/data/chips/STM32H7R3L8.json index e4791f2..7d9d6af 100644 --- a/data/chips/STM32H7R3L8.json +++ b/data/chips/STM32H7R3L8.json @@ -8452,7 +8452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8869,7 +8869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8986,7 +8986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9078,7 +9078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9170,7 +9170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9287,7 +9287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9404,7 +9404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9511,7 +9511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3R8.json b/data/chips/STM32H7R3R8.json index 5450d96..9795cf8 100644 --- a/data/chips/STM32H7R3R8.json +++ b/data/chips/STM32H7R3R8.json @@ -3189,7 +3189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3476,7 +3476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3563,7 +3563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3640,7 +3640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3V8.json b/data/chips/STM32H7R3V8.json index 11e0b9d..cba7e56 100644 --- a/data/chips/STM32H7R3V8.json +++ b/data/chips/STM32H7R3V8.json @@ -5130,7 +5130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5432,7 +5432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5524,7 +5524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5601,7 +5601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5678,7 +5678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5795,7 +5795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3Z8.json b/data/chips/STM32H7R3Z8.json index 667128f..eb6d7f3 100644 --- a/data/chips/STM32H7R3Z8.json +++ b/data/chips/STM32H7R3Z8.json @@ -6606,7 +6606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6953,7 +6953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7147,7 +7147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7224,7 +7224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7341,7 +7341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7458,7 +7458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7565,7 +7565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7A8.json b/data/chips/STM32H7R7A8.json index 6a65a56..6fca6c3 100644 --- a/data/chips/STM32H7R7A8.json +++ b/data/chips/STM32H7R7A8.json @@ -6303,7 +6303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6700,7 +6700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6817,7 +6817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6904,7 +6904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7108,7 +7108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7225,7 +7225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7312,7 +7312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7I8.json b/data/chips/STM32H7R7I8.json index ade72ac..aa28ebd 100644 --- a/data/chips/STM32H7R7I8.json +++ b/data/chips/STM32H7R7I8.json @@ -7681,7 +7681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8078,7 +8078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8195,7 +8195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8287,7 +8287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8374,7 +8374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8491,7 +8491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8608,7 +8608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8695,7 +8695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7L8.json b/data/chips/STM32H7R7L8.json index 36bf85f..2b2fa11 100644 --- a/data/chips/STM32H7R7L8.json +++ b/data/chips/STM32H7R7L8.json @@ -8740,7 +8740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9157,7 +9157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9274,7 +9274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9366,7 +9366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9458,7 +9458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9575,7 +9575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9692,7 +9692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9799,7 +9799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7Z8.json b/data/chips/STM32H7R7Z8.json index 7e1e37b..666db7b 100644 --- a/data/chips/STM32H7R7Z8.json +++ b/data/chips/STM32H7R7Z8.json @@ -5601,7 +5601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6050,7 +6050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6127,7 +6127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6204,7 +6204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6321,7 +6321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6438,7 +6438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3A8.json b/data/chips/STM32H7S3A8.json index 04a4334..0ee6807 100644 --- a/data/chips/STM32H7S3A8.json +++ b/data/chips/STM32H7S3A8.json @@ -6265,7 +6265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6662,7 +6662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6779,7 +6779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6866,7 +6866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6953,7 +6953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7187,7 +7187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7294,7 +7294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3I8.json b/data/chips/STM32H7S3I8.json index 04af97c..3c6a018 100644 --- a/data/chips/STM32H7S3I8.json +++ b/data/chips/STM32H7S3I8.json @@ -7671,7 +7671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8078,7 +8078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8195,7 +8195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8287,7 +8287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8374,7 +8374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8491,7 +8491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8608,7 +8608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8715,7 +8715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3L8.json b/data/chips/STM32H7S3L8.json index 79d42d1..b160893 100644 --- a/data/chips/STM32H7S3L8.json +++ b/data/chips/STM32H7S3L8.json @@ -8577,7 +8577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8994,7 +8994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9111,7 +9111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9203,7 +9203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9295,7 +9295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9412,7 +9412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9529,7 +9529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9636,7 +9636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3R8.json b/data/chips/STM32H7S3R8.json index 6a295ee..696a809 100644 --- a/data/chips/STM32H7S3R8.json +++ b/data/chips/STM32H7S3R8.json @@ -3314,7 +3314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3601,7 +3601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3765,7 +3765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3882,7 +3882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3V8.json b/data/chips/STM32H7S3V8.json index ad33a42..b724141 100644 --- a/data/chips/STM32H7S3V8.json +++ b/data/chips/STM32H7S3V8.json @@ -5255,7 +5255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5557,7 +5557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5649,7 +5649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5803,7 +5803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5920,7 +5920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3Z8.json b/data/chips/STM32H7S3Z8.json index b6fb533..0da31d9 100644 --- a/data/chips/STM32H7S3Z8.json +++ b/data/chips/STM32H7S3Z8.json @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7078,7 +7078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7195,7 +7195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7272,7 +7272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7349,7 +7349,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7466,7 +7466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7583,7 +7583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7690,7 +7690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7A8.json b/data/chips/STM32H7S7A8.json index c42d0ed..eb90750 100644 --- a/data/chips/STM32H7S7A8.json +++ b/data/chips/STM32H7S7A8.json @@ -6428,7 +6428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6825,7 +6825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6942,7 +6942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7029,7 +7029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7116,7 +7116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7233,7 +7233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7350,7 +7350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7437,7 +7437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7I8.json b/data/chips/STM32H7S7I8.json index 2310631..1097f09 100644 --- a/data/chips/STM32H7S7I8.json +++ b/data/chips/STM32H7S7I8.json @@ -7806,7 +7806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8203,7 +8203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8320,7 +8320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8412,7 +8412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8499,7 +8499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8616,7 +8616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8733,7 +8733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8820,7 +8820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7L8.json b/data/chips/STM32H7S7L8.json index e4fff52..8d26586 100644 --- a/data/chips/STM32H7S7L8.json +++ b/data/chips/STM32H7S7L8.json @@ -8865,7 +8865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9282,7 +9282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9399,7 +9399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9491,7 +9491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9583,7 +9583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9700,7 +9700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9817,7 +9817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9924,7 +9924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7Z8.json b/data/chips/STM32H7S7Z8.json index 5d7f210..a2b0035 100644 --- a/data/chips/STM32H7S7Z8.json +++ b/data/chips/STM32H7S7Z8.json @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6063,7 +6063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6175,7 +6175,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6252,7 +6252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6329,7 +6329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6446,7 +6446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6563,7 +6563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010C6.json b/data/chips/STM32L010C6.json index 39e46b9..ff79ba6 100644 --- a/data/chips/STM32L010C6.json +++ b/data/chips/STM32L010C6.json @@ -1584,7 +1584,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010F4.json b/data/chips/STM32L010F4.json index 2f61393..41633b6 100644 --- a/data/chips/STM32L010F4.json +++ b/data/chips/STM32L010F4.json @@ -1280,7 +1280,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010K4.json b/data/chips/STM32L010K4.json index 00ec0db..6fa14c2 100644 --- a/data/chips/STM32L010K4.json +++ b/data/chips/STM32L010K4.json @@ -1446,7 +1446,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010K8.json b/data/chips/STM32L010K8.json index 3f9fd28..b3f75d2 100644 --- a/data/chips/STM32L010K8.json +++ b/data/chips/STM32L010K8.json @@ -1226,7 +1226,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010R8.json b/data/chips/STM32L010R8.json index 15d8616..b49a09c 100644 --- a/data/chips/STM32L010R8.json +++ b/data/chips/STM32L010R8.json @@ -1651,7 +1651,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010RB.json b/data/chips/STM32L010RB.json index 68879f9..15f4239 100644 --- a/data/chips/STM32L010RB.json +++ b/data/chips/STM32L010RB.json @@ -1727,7 +1727,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011D3.json b/data/chips/STM32L011D3.json index fbbbb1e..bb36fad 100644 --- a/data/chips/STM32L011D3.json +++ b/data/chips/STM32L011D3.json @@ -1232,7 +1232,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011D4.json b/data/chips/STM32L011D4.json index a1ca948..6034b06 100644 --- a/data/chips/STM32L011D4.json +++ b/data/chips/STM32L011D4.json @@ -1232,7 +1232,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011E3.json b/data/chips/STM32L011E3.json index 91e42ad..8792541 100644 --- a/data/chips/STM32L011E3.json +++ b/data/chips/STM32L011E3.json @@ -1481,7 +1481,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011E4.json b/data/chips/STM32L011E4.json index f1b87d5..62865dd 100644 --- a/data/chips/STM32L011E4.json +++ b/data/chips/STM32L011E4.json @@ -1481,7 +1481,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011F3.json b/data/chips/STM32L011F3.json index f1d4748..8df72ed 100644 --- a/data/chips/STM32L011F3.json +++ b/data/chips/STM32L011F3.json @@ -1549,7 +1549,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011F4.json b/data/chips/STM32L011F4.json index 8bc0e6b..52ec3c6 100644 --- a/data/chips/STM32L011F4.json +++ b/data/chips/STM32L011F4.json @@ -1549,7 +1549,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011G3.json b/data/chips/STM32L011G3.json index 5256923..38c536a 100644 --- a/data/chips/STM32L011G3.json +++ b/data/chips/STM32L011G3.json @@ -1532,7 +1532,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011G4.json b/data/chips/STM32L011G4.json index 0b60827..0eaae6b 100644 --- a/data/chips/STM32L011G4.json +++ b/data/chips/STM32L011G4.json @@ -1532,7 +1532,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011K3.json b/data/chips/STM32L011K3.json index fa09c78..9846558 100644 --- a/data/chips/STM32L011K3.json +++ b/data/chips/STM32L011K3.json @@ -1794,7 +1794,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011K4.json b/data/chips/STM32L011K4.json index 83827f6..5162287 100644 --- a/data/chips/STM32L011K4.json +++ b/data/chips/STM32L011K4.json @@ -1794,7 +1794,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021D4.json b/data/chips/STM32L021D4.json index 371ef61..4b494aa 100644 --- a/data/chips/STM32L021D4.json +++ b/data/chips/STM32L021D4.json @@ -1269,7 +1269,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021F4.json b/data/chips/STM32L021F4.json index 895beaf..95da1b7 100644 --- a/data/chips/STM32L021F4.json +++ b/data/chips/STM32L021F4.json @@ -1586,7 +1586,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021G4.json b/data/chips/STM32L021G4.json index a30f98c..0dc8eca 100644 --- a/data/chips/STM32L021G4.json +++ b/data/chips/STM32L021G4.json @@ -1569,7 +1569,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021K4.json b/data/chips/STM32L021K4.json index 1f319ad..bbf72f2 100644 --- a/data/chips/STM32L021K4.json +++ b/data/chips/STM32L021K4.json @@ -1831,7 +1831,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031C4.json b/data/chips/STM32L031C4.json index 0b80525..20f4f9c 100644 --- a/data/chips/STM32L031C4.json +++ b/data/chips/STM32L031C4.json @@ -1984,7 +1984,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031C6.json b/data/chips/STM32L031C6.json index e4b08f8..acbccfe 100644 --- a/data/chips/STM32L031C6.json +++ b/data/chips/STM32L031C6.json @@ -1984,7 +1984,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031E4.json b/data/chips/STM32L031E4.json index 245531b..b1157b4 100644 --- a/data/chips/STM32L031E4.json +++ b/data/chips/STM32L031E4.json @@ -1401,7 +1401,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031E6.json b/data/chips/STM32L031E6.json index a4bde13..3a953d3 100644 --- a/data/chips/STM32L031E6.json +++ b/data/chips/STM32L031E6.json @@ -1401,7 +1401,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031F4.json b/data/chips/STM32L031F4.json index ca3e8b2..15fc9fe 100644 --- a/data/chips/STM32L031F4.json +++ b/data/chips/STM32L031F4.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031F6.json b/data/chips/STM32L031F6.json index 212920b..2d7974a 100644 --- a/data/chips/STM32L031F6.json +++ b/data/chips/STM32L031F6.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031G4.json b/data/chips/STM32L031G4.json index 602ea4f..a5164bb 100644 --- a/data/chips/STM32L031G4.json +++ b/data/chips/STM32L031G4.json @@ -1452,7 +1452,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031G6.json b/data/chips/STM32L031G6.json index 093080c..cf4b91a 100644 --- a/data/chips/STM32L031G6.json +++ b/data/chips/STM32L031G6.json @@ -1626,7 +1626,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031K4.json b/data/chips/STM32L031K4.json index 161fb1d..8fb7bee 100644 --- a/data/chips/STM32L031K4.json +++ b/data/chips/STM32L031K4.json @@ -1704,7 +1704,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031K6.json b/data/chips/STM32L031K6.json index 93887fe..767b05f 100644 --- a/data/chips/STM32L031K6.json +++ b/data/chips/STM32L031K6.json @@ -1704,7 +1704,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041C4.json b/data/chips/STM32L041C4.json index 116dbdc..eefa18d 100644 --- a/data/chips/STM32L041C4.json +++ b/data/chips/STM32L041C4.json @@ -1444,7 +1444,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041C6.json b/data/chips/STM32L041C6.json index d782173..666540c 100644 --- a/data/chips/STM32L041C6.json +++ b/data/chips/STM32L041C6.json @@ -2021,7 +2021,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041E6.json b/data/chips/STM32L041E6.json index c27e9e5..dddca47 100644 --- a/data/chips/STM32L041E6.json +++ b/data/chips/STM32L041E6.json @@ -1432,7 +1432,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041F6.json b/data/chips/STM32L041F6.json index 5552a09..89dbcea 100644 --- a/data/chips/STM32L041F6.json +++ b/data/chips/STM32L041F6.json @@ -1352,7 +1352,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041G6.json b/data/chips/STM32L041G6.json index 6679a70..2d28e9c 100644 --- a/data/chips/STM32L041G6.json +++ b/data/chips/STM32L041G6.json @@ -1663,7 +1663,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041K6.json b/data/chips/STM32L041K6.json index 39c6ac0..a18c7c3 100644 --- a/data/chips/STM32L041K6.json +++ b/data/chips/STM32L041K6.json @@ -1741,7 +1741,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051C6.json b/data/chips/STM32L051C6.json index c8cee27..46f0ad1 100644 --- a/data/chips/STM32L051C6.json +++ b/data/chips/STM32L051C6.json @@ -2052,7 +2052,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051C8.json b/data/chips/STM32L051C8.json index 6c8f3f3..f289ad6 100644 --- a/data/chips/STM32L051C8.json +++ b/data/chips/STM32L051C8.json @@ -2052,7 +2052,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051K6.json b/data/chips/STM32L051K6.json index 63063db..7173997 100644 --- a/data/chips/STM32L051K6.json +++ b/data/chips/STM32L051K6.json @@ -1540,7 +1540,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051K8.json b/data/chips/STM32L051K8.json index 9d4f92c..c5cfe8b 100644 --- a/data/chips/STM32L051K8.json +++ b/data/chips/STM32L051K8.json @@ -1540,7 +1540,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051R6.json b/data/chips/STM32L051R6.json index cec8963..ea5187f 100644 --- a/data/chips/STM32L051R6.json +++ b/data/chips/STM32L051R6.json @@ -2338,7 +2338,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051R8.json b/data/chips/STM32L051R8.json index 269a41c..7f9372d 100644 --- a/data/chips/STM32L051R8.json +++ b/data/chips/STM32L051R8.json @@ -2338,7 +2338,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051T6.json b/data/chips/STM32L051T6.json index e9765dd..2ac81f5 100644 --- a/data/chips/STM32L051T6.json +++ b/data/chips/STM32L051T6.json @@ -1501,7 +1501,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051T8.json b/data/chips/STM32L051T8.json index eab7356..3fbe2d5 100644 --- a/data/chips/STM32L051T8.json +++ b/data/chips/STM32L051T8.json @@ -1501,7 +1501,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052C6.json b/data/chips/STM32L052C6.json index 901de89..621ff4c 100644 --- a/data/chips/STM32L052C6.json +++ b/data/chips/STM32L052C6.json @@ -2168,7 +2168,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052C8.json b/data/chips/STM32L052C8.json index 9aae39a..f27cb08 100644 --- a/data/chips/STM32L052C8.json +++ b/data/chips/STM32L052C8.json @@ -2168,7 +2168,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052K6.json b/data/chips/STM32L052K6.json index 41eecc8..aeab283 100644 --- a/data/chips/STM32L052K6.json +++ b/data/chips/STM32L052K6.json @@ -1651,7 +1651,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052K8.json b/data/chips/STM32L052K8.json index bfedb0f..558003a 100644 --- a/data/chips/STM32L052K8.json +++ b/data/chips/STM32L052K8.json @@ -1651,7 +1651,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052R6.json b/data/chips/STM32L052R6.json index 9ece087..06c7ee1 100644 --- a/data/chips/STM32L052R6.json +++ b/data/chips/STM32L052R6.json @@ -2454,7 +2454,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052R8.json b/data/chips/STM32L052R8.json index 3d980ba..279ecd2 100644 --- a/data/chips/STM32L052R8.json +++ b/data/chips/STM32L052R8.json @@ -2454,7 +2454,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052T6.json b/data/chips/STM32L052T6.json index 918b8a5..969f120 100644 --- a/data/chips/STM32L052T6.json +++ b/data/chips/STM32L052T6.json @@ -1612,7 +1612,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052T8.json b/data/chips/STM32L052T8.json index 4e35b8b..4fbdaa2 100644 --- a/data/chips/STM32L052T8.json +++ b/data/chips/STM32L052T8.json @@ -1834,7 +1834,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053C6.json b/data/chips/STM32L053C6.json index 78cfc2a..6d57304 100644 --- a/data/chips/STM32L053C6.json +++ b/data/chips/STM32L053C6.json @@ -2307,7 +2307,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053C8.json b/data/chips/STM32L053C8.json index 13014f8..b080dfe 100644 --- a/data/chips/STM32L053C8.json +++ b/data/chips/STM32L053C8.json @@ -2307,7 +2307,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053R6.json b/data/chips/STM32L053R6.json index aff9511..3c594fd 100644 --- a/data/chips/STM32L053R6.json +++ b/data/chips/STM32L053R6.json @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053R8.json b/data/chips/STM32L053R8.json index 050e8c3..3d86bd1 100644 --- a/data/chips/STM32L053R8.json +++ b/data/chips/STM32L053R8.json @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L062C8.json b/data/chips/STM32L062C8.json index 547912e..722f9c8 100644 --- a/data/chips/STM32L062C8.json +++ b/data/chips/STM32L062C8.json @@ -1899,7 +1899,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L062K8.json b/data/chips/STM32L062K8.json index 2588dc1..073281c 100644 --- a/data/chips/STM32L062K8.json +++ b/data/chips/STM32L062K8.json @@ -1688,7 +1688,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L063C8.json b/data/chips/STM32L063C8.json index 3065871..ac9a534 100644 --- a/data/chips/STM32L063C8.json +++ b/data/chips/STM32L063C8.json @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L063R8.json b/data/chips/STM32L063R8.json index a22903e..0c24c1b 100644 --- a/data/chips/STM32L063R8.json +++ b/data/chips/STM32L063R8.json @@ -2330,7 +2330,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071C8.json b/data/chips/STM32L071C8.json index 1edcba2..c617b44 100644 --- a/data/chips/STM32L071C8.json +++ b/data/chips/STM32L071C8.json @@ -2196,7 +2196,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2478,7 +2478,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071CB.json b/data/chips/STM32L071CB.json index 43729e5..4be1cd3 100644 --- a/data/chips/STM32L071CB.json +++ b/data/chips/STM32L071CB.json @@ -2564,7 +2564,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2846,7 +2846,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071CZ.json b/data/chips/STM32L071CZ.json index f466c9e..f710c28 100644 --- a/data/chips/STM32L071CZ.json +++ b/data/chips/STM32L071CZ.json @@ -2564,7 +2564,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2846,7 +2846,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071K8.json b/data/chips/STM32L071K8.json index 5fb074d..e900021 100644 --- a/data/chips/STM32L071K8.json +++ b/data/chips/STM32L071K8.json @@ -1512,7 +1512,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1759,7 +1759,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071KB.json b/data/chips/STM32L071KB.json index 846149f..2eccd36 100644 --- a/data/chips/STM32L071KB.json +++ b/data/chips/STM32L071KB.json @@ -1735,7 +1735,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1997,7 +1997,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071KZ.json b/data/chips/STM32L071KZ.json index 4dd9afa..8a7ded2 100644 --- a/data/chips/STM32L071KZ.json +++ b/data/chips/STM32L071KZ.json @@ -1735,7 +1735,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1997,7 +1997,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071RB.json b/data/chips/STM32L071RB.json index b916483..08d6f96 100644 --- a/data/chips/STM32L071RB.json +++ b/data/chips/STM32L071RB.json @@ -2518,7 +2518,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2820,7 +2820,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071RZ.json b/data/chips/STM32L071RZ.json index 3d392d8..4e6a03f 100644 --- a/data/chips/STM32L071RZ.json +++ b/data/chips/STM32L071RZ.json @@ -2518,7 +2518,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2820,7 +2820,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071V8.json b/data/chips/STM32L071V8.json index e4de7db..738e07b 100644 --- a/data/chips/STM32L071V8.json +++ b/data/chips/STM32L071V8.json @@ -3028,7 +3028,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3385,7 +3385,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071VB.json b/data/chips/STM32L071VB.json index bee219e..b9f533b 100644 --- a/data/chips/STM32L071VB.json +++ b/data/chips/STM32L071VB.json @@ -3039,7 +3039,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071VZ.json b/data/chips/STM32L071VZ.json index addef62..4ffd93a 100644 --- a/data/chips/STM32L071VZ.json +++ b/data/chips/STM32L071VZ.json @@ -3039,7 +3039,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072CB.json b/data/chips/STM32L072CB.json index b8f72d6..abd6254 100644 --- a/data/chips/STM32L072CB.json +++ b/data/chips/STM32L072CB.json @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072CZ.json b/data/chips/STM32L072CZ.json index c4bb9d1..d66d309 100644 --- a/data/chips/STM32L072CZ.json +++ b/data/chips/STM32L072CZ.json @@ -2983,7 +2983,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3265,7 +3265,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072KB.json b/data/chips/STM32L072KB.json index c93c8df..2e40dcf 100644 --- a/data/chips/STM32L072KB.json +++ b/data/chips/STM32L072KB.json @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2111,7 +2111,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072KZ.json b/data/chips/STM32L072KZ.json index 569de89..5c7eb10 100644 --- a/data/chips/STM32L072KZ.json +++ b/data/chips/STM32L072KZ.json @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2111,7 +2111,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072RB.json b/data/chips/STM32L072RB.json index 3c03149..c2fe12c 100644 --- a/data/chips/STM32L072RB.json +++ b/data/chips/STM32L072RB.json @@ -3027,7 +3027,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3329,7 +3329,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072RZ.json b/data/chips/STM32L072RZ.json index 050f827..130fc7e 100644 --- a/data/chips/STM32L072RZ.json +++ b/data/chips/STM32L072RZ.json @@ -3027,7 +3027,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3329,7 +3329,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072V8.json b/data/chips/STM32L072V8.json index fb19dcc..7a6ea8b 100644 --- a/data/chips/STM32L072V8.json +++ b/data/chips/STM32L072V8.json @@ -3152,7 +3152,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072VB.json b/data/chips/STM32L072VB.json index 67b567e..b7a3784 100644 --- a/data/chips/STM32L072VB.json +++ b/data/chips/STM32L072VB.json @@ -3163,7 +3163,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072VZ.json b/data/chips/STM32L072VZ.json index f7102b0..379b581 100644 --- a/data/chips/STM32L072VZ.json +++ b/data/chips/STM32L072VZ.json @@ -3163,7 +3163,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073CB.json b/data/chips/STM32L073CB.json index efe62b3..4af4373 100644 --- a/data/chips/STM32L073CB.json +++ b/data/chips/STM32L073CB.json @@ -2537,7 +2537,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2819,7 +2819,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073CZ.json b/data/chips/STM32L073CZ.json index a83575b..6e8fd5a 100644 --- a/data/chips/STM32L073CZ.json +++ b/data/chips/STM32L073CZ.json @@ -2837,7 +2837,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073RB.json b/data/chips/STM32L073RB.json index 06891ca..5c7536e 100644 --- a/data/chips/STM32L073RB.json +++ b/data/chips/STM32L073RB.json @@ -2866,7 +2866,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3168,7 +3168,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073RZ.json b/data/chips/STM32L073RZ.json index f4439e4..753ce54 100644 --- a/data/chips/STM32L073RZ.json +++ b/data/chips/STM32L073RZ.json @@ -3256,7 +3256,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3558,7 +3558,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073V8.json b/data/chips/STM32L073V8.json index 2f4eb82..d9a8504 100644 --- a/data/chips/STM32L073V8.json +++ b/data/chips/STM32L073V8.json @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3866,7 +3866,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073VB.json b/data/chips/STM32L073VB.json index 9ed315f..e24ba30 100644 --- a/data/chips/STM32L073VB.json +++ b/data/chips/STM32L073VB.json @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3877,7 +3877,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073VZ.json b/data/chips/STM32L073VZ.json index 50cb8b0..d99c8b2 100644 --- a/data/chips/STM32L073VZ.json +++ b/data/chips/STM32L073VZ.json @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3877,7 +3877,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081CB.json b/data/chips/STM32L081CB.json index 294fd5c..2f63cd6 100644 --- a/data/chips/STM32L081CB.json +++ b/data/chips/STM32L081CB.json @@ -1944,7 +1944,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2226,7 +2226,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081CZ.json b/data/chips/STM32L081CZ.json index 843d1e3..5e014bf 100644 --- a/data/chips/STM32L081CZ.json +++ b/data/chips/STM32L081CZ.json @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2526,7 +2526,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081KZ.json b/data/chips/STM32L081KZ.json index db08973..5a8df91 100644 --- a/data/chips/STM32L081KZ.json +++ b/data/chips/STM32L081KZ.json @@ -1772,7 +1772,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2034,7 +2034,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082CZ.json b/data/chips/STM32L082CZ.json index f03d742..80ecbaa 100644 --- a/data/chips/STM32L082CZ.json +++ b/data/chips/STM32L082CZ.json @@ -2426,7 +2426,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2708,7 +2708,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082KB.json b/data/chips/STM32L082KB.json index 0c64455..0e453a8 100644 --- a/data/chips/STM32L082KB.json +++ b/data/chips/STM32L082KB.json @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082KZ.json b/data/chips/STM32L082KZ.json index cc5269a..e11c447 100644 --- a/data/chips/STM32L082KZ.json +++ b/data/chips/STM32L082KZ.json @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083CB.json b/data/chips/STM32L083CB.json index ed6a5ea..3899d03 100644 --- a/data/chips/STM32L083CB.json +++ b/data/chips/STM32L083CB.json @@ -2208,7 +2208,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2490,7 +2490,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083CZ.json b/data/chips/STM32L083CZ.json index 082e48c..150d549 100644 --- a/data/chips/STM32L083CZ.json +++ b/data/chips/STM32L083CZ.json @@ -2502,7 +2502,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2784,7 +2784,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083RB.json b/data/chips/STM32L083RB.json index fe76385..4774d8e 100644 --- a/data/chips/STM32L083RB.json +++ b/data/chips/STM32L083RB.json @@ -2903,7 +2903,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3205,7 +3205,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083RZ.json b/data/chips/STM32L083RZ.json index 5f00af7..d1352dc 100644 --- a/data/chips/STM32L083RZ.json +++ b/data/chips/STM32L083RZ.json @@ -2903,7 +2903,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3205,7 +3205,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083V8.json b/data/chips/STM32L083V8.json index 0ee774d..12a9190 100644 --- a/data/chips/STM32L083V8.json +++ b/data/chips/STM32L083V8.json @@ -3546,7 +3546,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3903,7 +3903,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083VB.json b/data/chips/STM32L083VB.json index 3f96a2e..e6c1f00 100644 --- a/data/chips/STM32L083VB.json +++ b/data/chips/STM32L083VB.json @@ -3557,7 +3557,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3914,7 +3914,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083VZ.json b/data/chips/STM32L083VZ.json index 606f926..eafe31d 100644 --- a/data/chips/STM32L083VZ.json +++ b/data/chips/STM32L083VZ.json @@ -3557,7 +3557,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3914,7 +3914,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100C6-A.json b/data/chips/STM32L100C6-A.json index 3d19576..73e01e5 100644 --- a/data/chips/STM32L100C6-A.json +++ b/data/chips/STM32L100C6-A.json @@ -1825,7 +1825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1949,7 +1949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2046,7 +2046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100C6.json b/data/chips/STM32L100C6.json index fe2920b..d120879 100644 --- a/data/chips/STM32L100C6.json +++ b/data/chips/STM32L100C6.json @@ -1810,7 +1810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1935,7 +1935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2032,7 +2032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100R8-A.json b/data/chips/STM32L100R8-A.json index eeb4556..8be7212 100644 --- a/data/chips/STM32L100R8-A.json +++ b/data/chips/STM32L100R8-A.json @@ -2059,7 +2059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2305,7 +2305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100R8.json b/data/chips/STM32L100R8.json index 7f18ad0..cf8e915 100644 --- a/data/chips/STM32L100R8.json +++ b/data/chips/STM32L100R8.json @@ -2044,7 +2044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2169,7 +2169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2291,7 +2291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RB-A.json b/data/chips/STM32L100RB-A.json index 699f699..97535eb 100644 --- a/data/chips/STM32L100RB-A.json +++ b/data/chips/STM32L100RB-A.json @@ -2059,7 +2059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2305,7 +2305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RB.json b/data/chips/STM32L100RB.json index 429b4b8..855d7fe 100644 --- a/data/chips/STM32L100RB.json +++ b/data/chips/STM32L100RB.json @@ -2044,7 +2044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2169,7 +2169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2291,7 +2291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RC.json b/data/chips/STM32L100RC.json index 9803ed9..3a6141a 100644 --- a/data/chips/STM32L100RC.json +++ b/data/chips/STM32L100RC.json @@ -2262,7 +2262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2386,7 +2386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C6-A.json b/data/chips/STM32L151C6-A.json index 0a5f0b8..1d750f3 100644 --- a/data/chips/STM32L151C6-A.json +++ b/data/chips/STM32L151C6-A.json @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2125,7 +2125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2222,7 +2222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C6.json b/data/chips/STM32L151C6.json index a810c50..d16f32c 100644 --- a/data/chips/STM32L151C6.json +++ b/data/chips/STM32L151C6.json @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C8-A.json b/data/chips/STM32L151C8-A.json index 3b5f1a2..4bf98ee 100644 --- a/data/chips/STM32L151C8-A.json +++ b/data/chips/STM32L151C8-A.json @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2125,7 +2125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2222,7 +2222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C8.json b/data/chips/STM32L151C8.json index 2974c90..0ec8281 100644 --- a/data/chips/STM32L151C8.json +++ b/data/chips/STM32L151C8.json @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CB-A.json b/data/chips/STM32L151CB-A.json index a14bfab..06e641f 100644 --- a/data/chips/STM32L151CB-A.json +++ b/data/chips/STM32L151CB-A.json @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2125,7 +2125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2222,7 +2222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CB.json b/data/chips/STM32L151CB.json index 62b1e21..683df65 100644 --- a/data/chips/STM32L151CB.json +++ b/data/chips/STM32L151CB.json @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CC.json b/data/chips/STM32L151CC.json index 19d9c18..f1a0064 100644 --- a/data/chips/STM32L151CC.json +++ b/data/chips/STM32L151CC.json @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2422,7 +2422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2505,7 +2505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QC.json b/data/chips/STM32L151QC.json index 9c0e3f6..9748951 100644 --- a/data/chips/STM32L151QC.json +++ b/data/chips/STM32L151QC.json @@ -2708,7 +2708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2856,7 +2856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2993,7 +2993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3101,7 +3101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QD.json b/data/chips/STM32L151QD.json index 3566880..1fef2d1 100644 --- a/data/chips/STM32L151QD.json +++ b/data/chips/STM32L151QD.json @@ -3185,7 +3185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3333,7 +3333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QE.json b/data/chips/STM32L151QE.json index 94bc69b..8c42ec2 100644 --- a/data/chips/STM32L151QE.json +++ b/data/chips/STM32L151QE.json @@ -2748,7 +2748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2896,7 +2896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3033,7 +3033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3141,7 +3141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R6-A.json b/data/chips/STM32L151R6-A.json index 64542f9..b0c9d4f 100644 --- a/data/chips/STM32L151R6-A.json +++ b/data/chips/STM32L151R6-A.json @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2365,7 +2365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2487,7 +2487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R6.json b/data/chips/STM32L151R6.json index 6d391a6..ef05156 100644 --- a/data/chips/STM32L151R6.json +++ b/data/chips/STM32L151R6.json @@ -2232,7 +2232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2357,7 +2357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2479,7 +2479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R8-A.json b/data/chips/STM32L151R8-A.json index b6d9498..5492b55 100644 --- a/data/chips/STM32L151R8-A.json +++ b/data/chips/STM32L151R8-A.json @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2365,7 +2365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2487,7 +2487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R8.json b/data/chips/STM32L151R8.json index 6cf4391..bacc333 100644 --- a/data/chips/STM32L151R8.json +++ b/data/chips/STM32L151R8.json @@ -2232,7 +2232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2357,7 +2357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2479,7 +2479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RB-A.json b/data/chips/STM32L151RB-A.json index c520a15..f416202 100644 --- a/data/chips/STM32L151RB-A.json +++ b/data/chips/STM32L151RB-A.json @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2365,7 +2365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2487,7 +2487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RB.json b/data/chips/STM32L151RB.json index 53ad9a4..1e280fd 100644 --- a/data/chips/STM32L151RB.json +++ b/data/chips/STM32L151RB.json @@ -2232,7 +2232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2357,7 +2357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2479,7 +2479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RC-A.json b/data/chips/STM32L151RC-A.json index bec6287..e7ac88a 100644 --- a/data/chips/STM32L151RC-A.json +++ b/data/chips/STM32L151RC-A.json @@ -2122,7 +2122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2246,7 +2246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2368,7 +2368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2451,7 +2451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RC.json b/data/chips/STM32L151RC.json index 2fc7347..89818d2 100644 --- a/data/chips/STM32L151RC.json +++ b/data/chips/STM32L151RC.json @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2606,7 +2606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2728,7 +2728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2811,7 +2811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RD.json b/data/chips/STM32L151RD.json index 19818fb..09cc2f7 100644 --- a/data/chips/STM32L151RD.json +++ b/data/chips/STM32L151RD.json @@ -2637,7 +2637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2883,7 +2883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2966,7 +2966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RE.json b/data/chips/STM32L151RE.json index 13cad4a..fd2927e 100644 --- a/data/chips/STM32L151RE.json +++ b/data/chips/STM32L151RE.json @@ -2173,7 +2173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2297,7 +2297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2419,7 +2419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2502,7 +2502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151UC.json b/data/chips/STM32L151UC.json index 285f7fa..5434be4 100644 --- a/data/chips/STM32L151UC.json +++ b/data/chips/STM32L151UC.json @@ -2080,7 +2080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2204,7 +2204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2326,7 +2326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151V8-A.json b/data/chips/STM32L151V8-A.json index 7c1584d..4943432 100644 --- a/data/chips/STM32L151V8-A.json +++ b/data/chips/STM32L151V8-A.json @@ -2760,7 +2760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2908,7 +2908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151V8.json b/data/chips/STM32L151V8.json index 7c859d2..3e99ca7 100644 --- a/data/chips/STM32L151V8.json +++ b/data/chips/STM32L151V8.json @@ -2746,7 +2746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VB-A.json b/data/chips/STM32L151VB-A.json index 0cf26ed..ddf7d2a 100644 --- a/data/chips/STM32L151VB-A.json +++ b/data/chips/STM32L151VB-A.json @@ -2760,7 +2760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2908,7 +2908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VB.json b/data/chips/STM32L151VB.json index ce53138..eb48eab 100644 --- a/data/chips/STM32L151VB.json +++ b/data/chips/STM32L151VB.json @@ -2746,7 +2746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VC-A.json b/data/chips/STM32L151VC-A.json index e321f4c..66643cd 100644 --- a/data/chips/STM32L151VC-A.json +++ b/data/chips/STM32L151VC-A.json @@ -2440,7 +2440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2588,7 +2588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2725,7 +2725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2833,7 +2833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VC.json b/data/chips/STM32L151VC.json index cc05b22..5385f51 100644 --- a/data/chips/STM32L151VC.json +++ b/data/chips/STM32L151VC.json @@ -3010,7 +3010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3158,7 +3158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3295,7 +3295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3403,7 +3403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VD-X.json b/data/chips/STM32L151VD-X.json index d2875ba..6eae669 100644 --- a/data/chips/STM32L151VD-X.json +++ b/data/chips/STM32L151VD-X.json @@ -3125,7 +3125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3273,7 +3273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3410,7 +3410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3518,7 +3518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VD.json b/data/chips/STM32L151VD.json index 89b4ca4..f2a4d76 100644 --- a/data/chips/STM32L151VD.json +++ b/data/chips/STM32L151VD.json @@ -2828,7 +2828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2976,7 +2976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3113,7 +3113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3221,7 +3221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VE.json b/data/chips/STM32L151VE.json index 1d031d5..0db1627 100644 --- a/data/chips/STM32L151VE.json +++ b/data/chips/STM32L151VE.json @@ -3125,7 +3125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3273,7 +3273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3410,7 +3410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3518,7 +3518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZC.json b/data/chips/STM32L151ZC.json index 6309bbb..acba3c1 100644 --- a/data/chips/STM32L151ZC.json +++ b/data/chips/STM32L151ZC.json @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2944,7 +2944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3081,7 +3081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3189,7 +3189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZD.json b/data/chips/STM32L151ZD.json index 88ccc87..1807799 100644 --- a/data/chips/STM32L151ZD.json +++ b/data/chips/STM32L151ZD.json @@ -3277,7 +3277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3425,7 +3425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3562,7 +3562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZE.json b/data/chips/STM32L151ZE.json index d645786..826b93c 100644 --- a/data/chips/STM32L151ZE.json +++ b/data/chips/STM32L151ZE.json @@ -2839,7 +2839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2987,7 +2987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3124,7 +3124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3232,7 +3232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C6-A.json b/data/chips/STM32L152C6-A.json index c8ef568..72dc7d0 100644 --- a/data/chips/STM32L152C6-A.json +++ b/data/chips/STM32L152C6-A.json @@ -2140,7 +2140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2264,7 +2264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2361,7 +2361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C6.json b/data/chips/STM32L152C6.json index 6f064c0..5dce921 100644 --- a/data/chips/STM32L152C6.json +++ b/data/chips/STM32L152C6.json @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2256,7 +2256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2353,7 +2353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C8-A.json b/data/chips/STM32L152C8-A.json index eafbdab..7c1fc84 100644 --- a/data/chips/STM32L152C8-A.json +++ b/data/chips/STM32L152C8-A.json @@ -2140,7 +2140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2264,7 +2264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2361,7 +2361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C8.json b/data/chips/STM32L152C8.json index b9d7e8e..04ba43c 100644 --- a/data/chips/STM32L152C8.json +++ b/data/chips/STM32L152C8.json @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2256,7 +2256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2353,7 +2353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CB-A.json b/data/chips/STM32L152CB-A.json index 03d9c96..24300c9 100644 --- a/data/chips/STM32L152CB-A.json +++ b/data/chips/STM32L152CB-A.json @@ -2140,7 +2140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2264,7 +2264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2361,7 +2361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CB.json b/data/chips/STM32L152CB.json index 101ab34..567afd8 100644 --- a/data/chips/STM32L152CB.json +++ b/data/chips/STM32L152CB.json @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2256,7 +2256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2353,7 +2353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CC.json b/data/chips/STM32L152CC.json index a1cf84d..7f36515 100644 --- a/data/chips/STM32L152CC.json +++ b/data/chips/STM32L152CC.json @@ -2340,7 +2340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2464,7 +2464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2561,7 +2561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2644,7 +2644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QC.json b/data/chips/STM32L152QC.json index 9ee6402..9099684 100644 --- a/data/chips/STM32L152QC.json +++ b/data/chips/STM32L152QC.json @@ -3017,7 +3017,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3165,7 +3165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3302,7 +3302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3410,7 +3410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QD.json b/data/chips/STM32L152QD.json index 26589e9..2a08d78 100644 --- a/data/chips/STM32L152QD.json +++ b/data/chips/STM32L152QD.json @@ -3494,7 +3494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3642,7 +3642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3779,7 +3779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3887,7 +3887,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QE.json b/data/chips/STM32L152QE.json index 67d9ee1..bb00469 100644 --- a/data/chips/STM32L152QE.json +++ b/data/chips/STM32L152QE.json @@ -3057,7 +3057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3205,7 +3205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3342,7 +3342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3450,7 +3450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R6-A.json b/data/chips/STM32L152R6-A.json index 61f9ff6..84d421f 100644 --- a/data/chips/STM32L152R6-A.json +++ b/data/chips/STM32L152R6-A.json @@ -2490,7 +2490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2614,7 +2614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2736,7 +2736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R6.json b/data/chips/STM32L152R6.json index f038226..143dc44 100644 --- a/data/chips/STM32L152R6.json +++ b/data/chips/STM32L152R6.json @@ -2461,7 +2461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2708,7 +2708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R8-A.json b/data/chips/STM32L152R8-A.json index 3e578ed..9ba0b73 100644 --- a/data/chips/STM32L152R8-A.json +++ b/data/chips/STM32L152R8-A.json @@ -2490,7 +2490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2614,7 +2614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2736,7 +2736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R8.json b/data/chips/STM32L152R8.json index 8a36cd7..eeb6cfc 100644 --- a/data/chips/STM32L152R8.json +++ b/data/chips/STM32L152R8.json @@ -2461,7 +2461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2708,7 +2708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RB-A.json b/data/chips/STM32L152RB-A.json index a4c949b..fb9cd82 100644 --- a/data/chips/STM32L152RB-A.json +++ b/data/chips/STM32L152RB-A.json @@ -2490,7 +2490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2614,7 +2614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2736,7 +2736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RB.json b/data/chips/STM32L152RB.json index ad455ab..0242784 100644 --- a/data/chips/STM32L152RB.json +++ b/data/chips/STM32L152RB.json @@ -2461,7 +2461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2708,7 +2708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RC-A.json b/data/chips/STM32L152RC-A.json index cb2dbfb..bf154c1 100644 --- a/data/chips/STM32L152RC-A.json +++ b/data/chips/STM32L152RC-A.json @@ -2371,7 +2371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2617,7 +2617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2700,7 +2700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RC.json b/data/chips/STM32L152RC.json index 252d25a..b897676 100644 --- a/data/chips/STM32L152RC.json +++ b/data/chips/STM32L152RC.json @@ -2321,7 +2321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2650,7 +2650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RD.json b/data/chips/STM32L152RD.json index c80969f..78ac9c5 100644 --- a/data/chips/STM32L152RD.json +++ b/data/chips/STM32L152RD.json @@ -2886,7 +2886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3010,7 +3010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3132,7 +3132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3215,7 +3215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RE.json b/data/chips/STM32L152RE.json index b9acac6..3b40b2e 100644 --- a/data/chips/STM32L152RE.json +++ b/data/chips/STM32L152RE.json @@ -2422,7 +2422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2546,7 +2546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2668,7 +2668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2751,7 +2751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152UC.json b/data/chips/STM32L152UC.json index ad4e105..c3fb535 100644 --- a/data/chips/STM32L152UC.json +++ b/data/chips/STM32L152UC.json @@ -2309,7 +2309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2433,7 +2433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2555,7 +2555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2638,7 +2638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152V8-A.json b/data/chips/STM32L152V8-A.json index e74cfd4..9ffd1db 100644 --- a/data/chips/STM32L152V8-A.json +++ b/data/chips/STM32L152V8-A.json @@ -3069,7 +3069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3217,7 +3217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3354,7 +3354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152V8.json b/data/chips/STM32L152V8.json index 4dbc9a4..80af49a 100644 --- a/data/chips/STM32L152V8.json +++ b/data/chips/STM32L152V8.json @@ -3055,7 +3055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VB-A.json b/data/chips/STM32L152VB-A.json index f63fc9e..770f8c6 100644 --- a/data/chips/STM32L152VB-A.json +++ b/data/chips/STM32L152VB-A.json @@ -3069,7 +3069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3217,7 +3217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3354,7 +3354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VB.json b/data/chips/STM32L152VB.json index 2062c94..53f990a 100644 --- a/data/chips/STM32L152VB.json +++ b/data/chips/STM32L152VB.json @@ -3055,7 +3055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VC-A.json b/data/chips/STM32L152VC-A.json index 6609a08..639436a 100644 --- a/data/chips/STM32L152VC-A.json +++ b/data/chips/STM32L152VC-A.json @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2897,7 +2897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3034,7 +3034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3142,7 +3142,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VC.json b/data/chips/STM32L152VC.json index 9c6870b..ce22d15 100644 --- a/data/chips/STM32L152VC.json +++ b/data/chips/STM32L152VC.json @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3473,7 +3473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3610,7 +3610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3718,7 +3718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VD-X.json b/data/chips/STM32L152VD-X.json index f8f6869..ed6c1ee 100644 --- a/data/chips/STM32L152VD-X.json +++ b/data/chips/STM32L152VD-X.json @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2952,7 +2952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3089,7 +3089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VD.json b/data/chips/STM32L152VD.json index d03fd17..68ea80f 100644 --- a/data/chips/STM32L152VD.json +++ b/data/chips/STM32L152VD.json @@ -3137,7 +3137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3285,7 +3285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3422,7 +3422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3530,7 +3530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VE.json b/data/chips/STM32L152VE.json index 58ef532..69c3989 100644 --- a/data/chips/STM32L152VE.json +++ b/data/chips/STM32L152VE.json @@ -3434,7 +3434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3582,7 +3582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3719,7 +3719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3827,7 +3827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZC.json b/data/chips/STM32L152ZC.json index bac1fc3..e123d1a 100644 --- a/data/chips/STM32L152ZC.json +++ b/data/chips/STM32L152ZC.json @@ -3105,7 +3105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3498,7 +3498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZD.json b/data/chips/STM32L152ZD.json index 6efa2fe..69da013 100644 --- a/data/chips/STM32L152ZD.json +++ b/data/chips/STM32L152ZD.json @@ -3586,7 +3586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3734,7 +3734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3979,7 +3979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZE.json b/data/chips/STM32L152ZE.json index 1829f51..b5d4695 100644 --- a/data/chips/STM32L152ZE.json +++ b/data/chips/STM32L152ZE.json @@ -3148,7 +3148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3433,7 +3433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3541,7 +3541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162QC.json b/data/chips/STM32L162QC.json index 0edd47e..a4faa70 100644 --- a/data/chips/STM32L162QC.json +++ b/data/chips/STM32L162QC.json @@ -3036,7 +3036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3184,7 +3184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3321,7 +3321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3429,7 +3429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162QD.json b/data/chips/STM32L162QD.json index d31649e..5074ae6 100644 --- a/data/chips/STM32L162QD.json +++ b/data/chips/STM32L162QD.json @@ -3519,7 +3519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3804,7 +3804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3912,7 +3912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RC-A.json b/data/chips/STM32L162RC-A.json index 3fbdfec..82836fd 100644 --- a/data/chips/STM32L162RC-A.json +++ b/data/chips/STM32L162RC-A.json @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2520,7 +2520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2642,7 +2642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2725,7 +2725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RC.json b/data/chips/STM32L162RC.json index 28eb56a..80786a5 100644 --- a/data/chips/STM32L162RC.json +++ b/data/chips/STM32L162RC.json @@ -2340,7 +2340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2464,7 +2464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2669,7 +2669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RD.json b/data/chips/STM32L162RD.json index de99325..0e50a7a 100644 --- a/data/chips/STM32L162RD.json +++ b/data/chips/STM32L162RD.json @@ -2905,7 +2905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3029,7 +3029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3151,7 +3151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3234,7 +3234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RE.json b/data/chips/STM32L162RE.json index 63c6f94..4224ad8 100644 --- a/data/chips/STM32L162RE.json +++ b/data/chips/STM32L162RE.json @@ -2447,7 +2447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2571,7 +2571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2776,7 +2776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VC-A.json b/data/chips/STM32L162VC-A.json index 0ae435c..edd3701 100644 --- a/data/chips/STM32L162VC-A.json +++ b/data/chips/STM32L162VC-A.json @@ -2774,7 +2774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2922,7 +2922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3059,7 +3059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3167,7 +3167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VC.json b/data/chips/STM32L162VC.json index fbf5b4d..201b8be 100644 --- a/data/chips/STM32L162VC.json +++ b/data/chips/STM32L162VC.json @@ -3344,7 +3344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3492,7 +3492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3629,7 +3629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3737,7 +3737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VD-X.json b/data/chips/STM32L162VD-X.json index 6102b60..708af43 100644 --- a/data/chips/STM32L162VD-X.json +++ b/data/chips/STM32L162VD-X.json @@ -2853,7 +2853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3001,7 +3001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3138,7 +3138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3246,7 +3246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VD.json b/data/chips/STM32L162VD.json index 2f97892..086fa02 100644 --- a/data/chips/STM32L162VD.json +++ b/data/chips/STM32L162VD.json @@ -3162,7 +3162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3310,7 +3310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3447,7 +3447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3555,7 +3555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VE.json b/data/chips/STM32L162VE.json index e19a703..7b0135c 100644 --- a/data/chips/STM32L162VE.json +++ b/data/chips/STM32L162VE.json @@ -3459,7 +3459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3607,7 +3607,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3744,7 +3744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3852,7 +3852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZC.json b/data/chips/STM32L162ZC.json index b461e5c..c2b88d5 100644 --- a/data/chips/STM32L162ZC.json +++ b/data/chips/STM32L162ZC.json @@ -3124,7 +3124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3272,7 +3272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3409,7 +3409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3517,7 +3517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZD.json b/data/chips/STM32L162ZD.json index a83fc0c..9c03281 100644 --- a/data/chips/STM32L162ZD.json +++ b/data/chips/STM32L162ZD.json @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3759,7 +3759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3896,7 +3896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4004,7 +4004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZE.json b/data/chips/STM32L162ZE.json index 215c774..1c19c5c 100644 --- a/data/chips/STM32L162ZE.json +++ b/data/chips/STM32L162ZE.json @@ -3173,7 +3173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3321,7 +3321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3458,7 +3458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3566,7 +3566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412C8.json b/data/chips/STM32L412C8.json index c5c20d8..17c04b1 100644 --- a/data/chips/STM32L412C8.json +++ b/data/chips/STM32L412C8.json @@ -2527,7 +2527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2684,7 +2684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2791,7 +2791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2878,7 +2878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412CB.json b/data/chips/STM32L412CB.json index 22dda71..af567c1 100644 --- a/data/chips/STM32L412CB.json +++ b/data/chips/STM32L412CB.json @@ -3115,7 +3115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3272,7 +3272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3379,7 +3379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3466,7 +3466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412K8.json b/data/chips/STM32L412K8.json index cb18cf0..ab673c0 100644 --- a/data/chips/STM32L412K8.json +++ b/data/chips/STM32L412K8.json @@ -2092,7 +2092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2229,7 +2229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2316,7 +2316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412KB.json b/data/chips/STM32L412KB.json index 6190c2b..5c5627f 100644 --- a/data/chips/STM32L412KB.json +++ b/data/chips/STM32L412KB.json @@ -2092,7 +2092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2229,7 +2229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2316,7 +2316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412R8.json b/data/chips/STM32L412R8.json index d9ee91f..8a5cc15 100644 --- a/data/chips/STM32L412R8.json +++ b/data/chips/STM32L412R8.json @@ -2835,7 +2835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3099,7 +3099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3186,7 +3186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412RB.json b/data/chips/STM32L412RB.json index 3ba41f5..96e0777 100644 --- a/data/chips/STM32L412RB.json +++ b/data/chips/STM32L412RB.json @@ -3621,7 +3621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3778,7 +3778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3885,7 +3885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3972,7 +3972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412T8.json b/data/chips/STM32L412T8.json index e228eb8..770148a 100644 --- a/data/chips/STM32L412T8.json +++ b/data/chips/STM32L412T8.json @@ -1962,7 +1962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2099,7 +2099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412TB.json b/data/chips/STM32L412TB.json index 745db87..bb3c58b 100644 --- a/data/chips/STM32L412TB.json +++ b/data/chips/STM32L412TB.json @@ -2184,7 +2184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2321,7 +2321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2408,7 +2408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422CB.json b/data/chips/STM32L422CB.json index 9f010b4..3e72427 100644 --- a/data/chips/STM32L422CB.json +++ b/data/chips/STM32L422CB.json @@ -2576,7 +2576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2733,7 +2733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2840,7 +2840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2927,7 +2927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422KB.json b/data/chips/STM32L422KB.json index 8dbe9d6..60fc4ce 100644 --- a/data/chips/STM32L422KB.json +++ b/data/chips/STM32L422KB.json @@ -2141,7 +2141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2365,7 +2365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2447,7 +2447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422RB.json b/data/chips/STM32L422RB.json index 2a7bb0b..6ce7a47 100644 --- a/data/chips/STM32L422RB.json +++ b/data/chips/STM32L422RB.json @@ -2890,7 +2890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3047,7 +3047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3154,7 +3154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3241,7 +3241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422TB.json b/data/chips/STM32L422TB.json index 0a14ed1..5630d18 100644 --- a/data/chips/STM32L422TB.json +++ b/data/chips/STM32L422TB.json @@ -2011,7 +2011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2235,7 +2235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431CB.json b/data/chips/STM32L431CB.json index 83b5348..5afd501 100644 --- a/data/chips/STM32L431CB.json +++ b/data/chips/STM32L431CB.json @@ -3258,7 +3258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3425,7 +3425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3532,7 +3532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3619,7 +3619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431CC.json b/data/chips/STM32L431CC.json index 3713103..94d0411 100644 --- a/data/chips/STM32L431CC.json +++ b/data/chips/STM32L431CC.json @@ -3258,7 +3258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3425,7 +3425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3532,7 +3532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3619,7 +3619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431KB.json b/data/chips/STM32L431KB.json index 0935444..c1b434f 100644 --- a/data/chips/STM32L431KB.json +++ b/data/chips/STM32L431KB.json @@ -2231,7 +2231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431KC.json b/data/chips/STM32L431KC.json index 7b623b3..86281d3 100644 --- a/data/chips/STM32L431KC.json +++ b/data/chips/STM32L431KC.json @@ -2231,7 +2231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431RB.json b/data/chips/STM32L431RB.json index d95b18d..4613652 100644 --- a/data/chips/STM32L431RB.json +++ b/data/chips/STM32L431RB.json @@ -3739,7 +3739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3906,7 +3906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4013,7 +4013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431RC.json b/data/chips/STM32L431RC.json index e0b7c86..01b57d8 100644 --- a/data/chips/STM32L431RC.json +++ b/data/chips/STM32L431RC.json @@ -3739,7 +3739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3906,7 +3906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4013,7 +4013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431VC.json b/data/chips/STM32L431VC.json index 70e3a1b..fcd584e 100644 --- a/data/chips/STM32L431VC.json +++ b/data/chips/STM32L431VC.json @@ -3955,7 +3955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4182,7 +4182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4289,7 +4289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4381,7 +4381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L432KB.json b/data/chips/STM32L432KB.json index 3a1b5d2..4cb9d8d 100644 --- a/data/chips/STM32L432KB.json +++ b/data/chips/STM32L432KB.json @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2513,7 +2513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L432KC.json b/data/chips/STM32L432KC.json index e7ac242..1127c4f 100644 --- a/data/chips/STM32L432KC.json +++ b/data/chips/STM32L432KC.json @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2513,7 +2513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433CB.json b/data/chips/STM32L433CB.json index 5549b38..0d6fa80 100644 --- a/data/chips/STM32L433CB.json +++ b/data/chips/STM32L433CB.json @@ -3431,7 +3431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3598,7 +3598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3792,7 +3792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433CC.json b/data/chips/STM32L433CC.json index c3db490..5fc924f 100644 --- a/data/chips/STM32L433CC.json +++ b/data/chips/STM32L433CC.json @@ -3431,7 +3431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3598,7 +3598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3792,7 +3792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433RB.json b/data/chips/STM32L433RB.json index c058299..c3da9ba 100644 --- a/data/chips/STM32L433RB.json +++ b/data/chips/STM32L433RB.json @@ -4017,7 +4017,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4184,7 +4184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4291,7 +4291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4378,7 +4378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433RC.json b/data/chips/STM32L433RC.json index 7b4d98b..5790d00 100644 --- a/data/chips/STM32L433RC.json +++ b/data/chips/STM32L433RC.json @@ -4413,7 +4413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4580,7 +4580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4687,7 +4687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4774,7 +4774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433VC.json b/data/chips/STM32L433VC.json index 7975438..a7c96aa 100644 --- a/data/chips/STM32L433VC.json +++ b/data/chips/STM32L433VC.json @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4520,7 +4520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4627,7 +4627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4719,7 +4719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L442KC.json b/data/chips/STM32L442KC.json index 4e19908..3a6434a 100644 --- a/data/chips/STM32L442KC.json +++ b/data/chips/STM32L442KC.json @@ -2251,7 +2251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2562,7 +2562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443CC.json b/data/chips/STM32L443CC.json index 9db8f19..fbe425f 100644 --- a/data/chips/STM32L443CC.json +++ b/data/chips/STM32L443CC.json @@ -3780,7 +3780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3947,7 +3947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4054,7 +4054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4141,7 +4141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443RC.json b/data/chips/STM32L443RC.json index 1374076..695fe09 100644 --- a/data/chips/STM32L443RC.json +++ b/data/chips/STM32L443RC.json @@ -4066,7 +4066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4233,7 +4233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4340,7 +4340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4427,7 +4427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443VC.json b/data/chips/STM32L443VC.json index 5e274fc..9e5cb44 100644 --- a/data/chips/STM32L443VC.json +++ b/data/chips/STM32L443VC.json @@ -4342,7 +4342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4676,7 +4676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451CC.json b/data/chips/STM32L451CC.json index 1c05a92..700c042 100644 --- a/data/chips/STM32L451CC.json +++ b/data/chips/STM32L451CC.json @@ -2767,7 +2767,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2934,7 +2934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3041,7 +3041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3128,7 +3128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3260,7 +3260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451CE.json b/data/chips/STM32L451CE.json index 006c5b2..4f34e6d 100644 --- a/data/chips/STM32L451CE.json +++ b/data/chips/STM32L451CE.json @@ -3061,7 +3061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3228,7 +3228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3335,7 +3335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3422,7 +3422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3554,7 +3554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451RC.json b/data/chips/STM32L451RC.json index 7d0468b..7b116ba 100644 --- a/data/chips/STM32L451RC.json +++ b/data/chips/STM32L451RC.json @@ -3891,7 +3891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4165,7 +4165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451RE.json b/data/chips/STM32L451RE.json index 8e712d7..7c21988 100644 --- a/data/chips/STM32L451RE.json +++ b/data/chips/STM32L451RE.json @@ -3891,7 +3891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4165,7 +4165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451VC.json b/data/chips/STM32L451VC.json index 9c5d804..5df7e2b 100644 --- a/data/chips/STM32L451VC.json +++ b/data/chips/STM32L451VC.json @@ -4167,7 +4167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4501,7 +4501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4593,7 +4593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4725,7 +4725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451VE.json b/data/chips/STM32L451VE.json index 1bd782c..81d05cd 100644 --- a/data/chips/STM32L451VE.json +++ b/data/chips/STM32L451VE.json @@ -4167,7 +4167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4501,7 +4501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4593,7 +4593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4725,7 +4725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452CC.json b/data/chips/STM32L452CC.json index a6f5c30..6ddc56a 100644 --- a/data/chips/STM32L452CC.json +++ b/data/chips/STM32L452CC.json @@ -2780,7 +2780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2947,7 +2947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3054,7 +3054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3141,7 +3141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3273,7 +3273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452CE.json b/data/chips/STM32L452CE.json index 77519dc..99324d7 100644 --- a/data/chips/STM32L452CE.json +++ b/data/chips/STM32L452CE.json @@ -3368,7 +3368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3535,7 +3535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3642,7 +3642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3861,7 +3861,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452RC.json b/data/chips/STM32L452RC.json index 1bb744d..4f2fd1d 100644 --- a/data/chips/STM32L452RC.json +++ b/data/chips/STM32L452RC.json @@ -3904,7 +3904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4071,7 +4071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4178,7 +4178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4265,7 +4265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452RE.json b/data/chips/STM32L452RE.json index f716fc5..15307b6 100644 --- a/data/chips/STM32L452RE.json +++ b/data/chips/STM32L452RE.json @@ -4690,7 +4690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4857,7 +4857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4964,7 +4964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5051,7 +5051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5183,7 +5183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452VC.json b/data/chips/STM32L452VC.json index d5fb102..dd06616 100644 --- a/data/chips/STM32L452VC.json +++ b/data/chips/STM32L452VC.json @@ -4180,7 +4180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4407,7 +4407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4514,7 +4514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4606,7 +4606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4738,7 +4738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452VE.json b/data/chips/STM32L452VE.json index 6cacbba..83957b1 100644 --- a/data/chips/STM32L452VE.json +++ b/data/chips/STM32L452VE.json @@ -4180,7 +4180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4407,7 +4407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4514,7 +4514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4606,7 +4606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4738,7 +4738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462CE.json b/data/chips/STM32L462CE.json index 803cb87..a39ee86 100644 --- a/data/chips/STM32L462CE.json +++ b/data/chips/STM32L462CE.json @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3403,7 +3403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3490,7 +3490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3622,7 +3622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462RE.json b/data/chips/STM32L462RE.json index 5f002fb..44e6b75 100644 --- a/data/chips/STM32L462RE.json +++ b/data/chips/STM32L462RE.json @@ -3953,7 +3953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4120,7 +4120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4227,7 +4227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4314,7 +4314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4446,7 +4446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462VE.json b/data/chips/STM32L462VE.json index 8643f2e..262b625 100644 --- a/data/chips/STM32L462VE.json +++ b/data/chips/STM32L462VE.json @@ -4229,7 +4229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4456,7 +4456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4563,7 +4563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4655,7 +4655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4787,7 +4787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L471QE.json b/data/chips/STM32L471QE.json index 0541ea7..6787b66 100644 --- a/data/chips/STM32L471QE.json +++ b/data/chips/STM32L471QE.json @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4684,7 +4684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4806,7 +4806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4898,7 +4898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4995,7 +4995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5127,7 +5127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5279,7 +5279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5391,7 +5391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5603,7 +5603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471QG.json b/data/chips/STM32L471QG.json index 5c90b2a..d706094 100644 --- a/data/chips/STM32L471QG.json +++ b/data/chips/STM32L471QG.json @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4684,7 +4684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4806,7 +4806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4898,7 +4898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4995,7 +4995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5127,7 +5127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5279,7 +5279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5391,7 +5391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5603,7 +5603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471RE.json b/data/chips/STM32L471RE.json index f017c78..25476f2 100644 --- a/data/chips/STM32L471RE.json +++ b/data/chips/STM32L471RE.json @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3393,7 +3393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3500,7 +3500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3587,7 +3587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3811,7 +3811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4025,7 +4025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4237,7 +4237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471RG.json b/data/chips/STM32L471RG.json index 50c50f4..0150f27 100644 --- a/data/chips/STM32L471RG.json +++ b/data/chips/STM32L471RG.json @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3393,7 +3393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3500,7 +3500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3587,7 +3587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3811,7 +3811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4025,7 +4025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4237,7 +4237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471VE.json b/data/chips/STM32L471VE.json index 9f76e2a..9fd7c81 100644 --- a/data/chips/STM32L471VE.json +++ b/data/chips/STM32L471VE.json @@ -3958,7 +3958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4185,7 +4185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4292,7 +4292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4481,7 +4481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4613,7 +4613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4765,7 +4765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4877,7 +4877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5089,7 +5089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471VG.json b/data/chips/STM32L471VG.json index 97ad76b..a331ab9 100644 --- a/data/chips/STM32L471VG.json +++ b/data/chips/STM32L471VG.json @@ -3958,7 +3958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4185,7 +4185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4292,7 +4292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4481,7 +4481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4613,7 +4613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4765,7 +4765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4877,7 +4877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5089,7 +5089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471ZE.json b/data/chips/STM32L471ZE.json index 7f242dd..edd1129 100644 --- a/data/chips/STM32L471ZE.json +++ b/data/chips/STM32L471ZE.json @@ -5439,7 +5439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5666,7 +5666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5798,7 +5798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5890,7 +5890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5987,7 +5987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6119,7 +6119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6383,7 +6383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6620,7 +6620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471ZG.json b/data/chips/STM32L471ZG.json index bd7ed77..bb10394 100644 --- a/data/chips/STM32L471ZG.json +++ b/data/chips/STM32L471ZG.json @@ -5439,7 +5439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5666,7 +5666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5798,7 +5798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5890,7 +5890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5987,7 +5987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6119,7 +6119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6383,7 +6383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6620,7 +6620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RC.json b/data/chips/STM32L475RC.json index a73f419..ff3f475 100644 --- a/data/chips/STM32L475RC.json +++ b/data/chips/STM32L475RC.json @@ -3232,7 +3232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3399,7 +3399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3506,7 +3506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3685,7 +3685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3817,7 +3817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3944,7 +3944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4031,7 +4031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4243,7 +4243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RE.json b/data/chips/STM32L475RE.json index 5fd3742..93e40f0 100644 --- a/data/chips/STM32L475RE.json +++ b/data/chips/STM32L475RE.json @@ -3232,7 +3232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3399,7 +3399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3506,7 +3506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3685,7 +3685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3817,7 +3817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3944,7 +3944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4031,7 +4031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4243,7 +4243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RG.json b/data/chips/STM32L475RG.json index 8d948dd..e0ed9d4 100644 --- a/data/chips/STM32L475RG.json +++ b/data/chips/STM32L475RG.json @@ -3232,7 +3232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3399,7 +3399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3506,7 +3506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3685,7 +3685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3817,7 +3817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3944,7 +3944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4031,7 +4031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4243,7 +4243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VC.json b/data/chips/STM32L475VC.json index 0cc6c39..5ddf80e 100644 --- a/data/chips/STM32L475VC.json +++ b/data/chips/STM32L475VC.json @@ -3964,7 +3964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4191,7 +4191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4298,7 +4298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4390,7 +4390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4487,7 +4487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4619,7 +4619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4771,7 +4771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5095,7 +5095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VE.json b/data/chips/STM32L475VE.json index 20552f8..8a5c42e 100644 --- a/data/chips/STM32L475VE.json +++ b/data/chips/STM32L475VE.json @@ -3964,7 +3964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4191,7 +4191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4298,7 +4298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4390,7 +4390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4487,7 +4487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4619,7 +4619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4771,7 +4771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5095,7 +5095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VG.json b/data/chips/STM32L475VG.json index b684e9c..3930773 100644 --- a/data/chips/STM32L475VG.json +++ b/data/chips/STM32L475VG.json @@ -3964,7 +3964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4191,7 +4191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4298,7 +4298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4390,7 +4390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4487,7 +4487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4619,7 +4619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4771,7 +4771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5095,7 +5095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476JE.json b/data/chips/STM32L476JE.json index 1a0d6db..7d440db 100644 --- a/data/chips/STM32L476JE.json +++ b/data/chips/STM32L476JE.json @@ -3623,7 +3623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3790,7 +3790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3912,7 +3912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3999,7 +3999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4091,7 +4091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4223,7 +4223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4350,7 +4350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4437,7 +4437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4649,7 +4649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476JG.json b/data/chips/STM32L476JG.json index 80ac775..08c8766 100644 --- a/data/chips/STM32L476JG.json +++ b/data/chips/STM32L476JG.json @@ -4067,7 +4067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4234,7 +4234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4356,7 +4356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4443,7 +4443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4535,7 +4535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4667,7 +4667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4794,7 +4794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4881,7 +4881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ME.json b/data/chips/STM32L476ME.json index ae8bfa9..4f7b91b 100644 --- a/data/chips/STM32L476ME.json +++ b/data/chips/STM32L476ME.json @@ -3737,7 +3737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3914,7 +3914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4036,7 +4036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4123,7 +4123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4215,7 +4215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4347,7 +4347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4474,7 +4474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4561,7 +4561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4773,7 +4773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476MG.json b/data/chips/STM32L476MG.json index d593023..13869f4 100644 --- a/data/chips/STM32L476MG.json +++ b/data/chips/STM32L476MG.json @@ -3737,7 +3737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3914,7 +3914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4036,7 +4036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4123,7 +4123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4215,7 +4215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4347,7 +4347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4474,7 +4474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4561,7 +4561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4773,7 +4773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476QE.json b/data/chips/STM32L476QE.json index 153cb9c..5b8ba68 100644 --- a/data/chips/STM32L476QE.json +++ b/data/chips/STM32L476QE.json @@ -4807,7 +4807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5034,7 +5034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5156,7 +5156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5248,7 +5248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5345,7 +5345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5477,7 +5477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5629,7 +5629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5741,7 +5741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5953,7 +5953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476QG.json b/data/chips/STM32L476QG.json index 2159dd9..db04061 100644 --- a/data/chips/STM32L476QG.json +++ b/data/chips/STM32L476QG.json @@ -5605,7 +5605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5832,7 +5832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5954,7 +5954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6046,7 +6046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6143,7 +6143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6275,7 +6275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6427,7 +6427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6539,7 +6539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6751,7 +6751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RC.json b/data/chips/STM32L476RC.json index 05fb46b..9096010 100644 --- a/data/chips/STM32L476RC.json +++ b/data/chips/STM32L476RC.json @@ -3510,7 +3510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3677,7 +3677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3784,7 +3784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3963,7 +3963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4309,7 +4309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RE.json b/data/chips/STM32L476RE.json index 8ca9765..97d6f50 100644 --- a/data/chips/STM32L476RE.json +++ b/data/chips/STM32L476RE.json @@ -3510,7 +3510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3677,7 +3677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3784,7 +3784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3963,7 +3963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4309,7 +4309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RG.json b/data/chips/STM32L476RG.json index 2abcd7e..65d1759 100644 --- a/data/chips/STM32L476RG.json +++ b/data/chips/STM32L476RG.json @@ -3510,7 +3510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3677,7 +3677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3784,7 +3784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3963,7 +3963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4309,7 +4309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VC.json b/data/chips/STM32L476VC.json index 3ae871a..db75947 100644 --- a/data/chips/STM32L476VC.json +++ b/data/chips/STM32L476VC.json @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4690,7 +4690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4812,7 +4812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4904,7 +4904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5001,7 +5001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5133,7 +5133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5285,7 +5285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5397,7 +5397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5609,7 +5609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VE.json b/data/chips/STM32L476VE.json index 3341f4f..8f20522 100644 --- a/data/chips/STM32L476VE.json +++ b/data/chips/STM32L476VE.json @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4690,7 +4690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4812,7 +4812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4904,7 +4904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5001,7 +5001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5133,7 +5133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5285,7 +5285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5397,7 +5397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5609,7 +5609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VG.json b/data/chips/STM32L476VG.json index e4da90a..6704004 100644 --- a/data/chips/STM32L476VG.json +++ b/data/chips/STM32L476VG.json @@ -5063,7 +5063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5290,7 +5290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5412,7 +5412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5504,7 +5504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5601,7 +5601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5733,7 +5733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5885,7 +5885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5997,7 +5997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6209,7 +6209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ZE.json b/data/chips/STM32L476ZE.json index 8394ab1..7d930a3 100644 --- a/data/chips/STM32L476ZE.json +++ b/data/chips/STM32L476ZE.json @@ -4919,7 +4919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5146,7 +5146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5278,7 +5278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5370,7 +5370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5467,7 +5467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5599,7 +5599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5751,7 +5751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5863,7 +5863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6100,7 +6100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ZG.json b/data/chips/STM32L476ZG.json index 0c4db9e..0c8f473 100644 --- a/data/chips/STM32L476ZG.json +++ b/data/chips/STM32L476ZG.json @@ -6665,7 +6665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6892,7 +6892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7024,7 +7024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7116,7 +7116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7213,7 +7213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7345,7 +7345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7497,7 +7497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7609,7 +7609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7846,7 +7846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486JG.json b/data/chips/STM32L486JG.json index c03c469..bf5ec33 100644 --- a/data/chips/STM32L486JG.json +++ b/data/chips/STM32L486JG.json @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3839,7 +3839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3961,7 +3961,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4048,7 +4048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4140,7 +4140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4272,7 +4272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4399,7 +4399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4486,7 +4486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4698,7 +4698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486QG.json b/data/chips/STM32L486QG.json index 78de711..75a8708 100644 --- a/data/chips/STM32L486QG.json +++ b/data/chips/STM32L486QG.json @@ -4856,7 +4856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5205,7 +5205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5526,7 +5526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5678,7 +5678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5790,7 +5790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6002,7 +6002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486RG.json b/data/chips/STM32L486RG.json index 5660759..c6e94d1 100644 --- a/data/chips/STM32L486RG.json +++ b/data/chips/STM32L486RG.json @@ -3559,7 +3559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3726,7 +3726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3920,7 +3920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4012,7 +4012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4144,7 +4144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4271,7 +4271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4358,7 +4358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486VG.json b/data/chips/STM32L486VG.json index e7df2f2..237e59f 100644 --- a/data/chips/STM32L486VG.json +++ b/data/chips/STM32L486VG.json @@ -4357,7 +4357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4584,7 +4584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4691,7 +4691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4783,7 +4783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4880,7 +4880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5012,7 +5012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5164,7 +5164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5276,7 +5276,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5488,7 +5488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486ZG.json b/data/chips/STM32L486ZG.json index 4f6cf78..a33efce 100644 --- a/data/chips/STM32L486ZG.json +++ b/data/chips/STM32L486ZG.json @@ -4968,7 +4968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5195,7 +5195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5327,7 +5327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5419,7 +5419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5516,7 +5516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5648,7 +5648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5800,7 +5800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5912,7 +5912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6149,7 +6149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496AE.json b/data/chips/STM32L496AE.json index aad1044..6b2e114 100644 --- a/data/chips/STM32L496AE.json +++ b/data/chips/STM32L496AE.json @@ -5851,7 +5851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6078,7 +6078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6205,7 +6205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6297,7 +6297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6394,7 +6394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6526,7 +6526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6678,7 +6678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6790,7 +6790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7022,7 +7022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496AG.json b/data/chips/STM32L496AG.json index c0bb2c7..e8030be 100644 --- a/data/chips/STM32L496AG.json +++ b/data/chips/STM32L496AG.json @@ -6877,7 +6877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7104,7 +7104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7231,7 +7231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7323,7 +7323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7420,7 +7420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7552,7 +7552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7704,7 +7704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7816,7 +7816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8048,7 +8048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496QE.json b/data/chips/STM32L496QE.json index 4c5248d..b04762d 100644 --- a/data/chips/STM32L496QE.json +++ b/data/chips/STM32L496QE.json @@ -5455,7 +5455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5682,7 +5682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5804,7 +5804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5896,7 +5896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5993,7 +5993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6125,7 +6125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6277,7 +6277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6601,7 +6601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496QG.json b/data/chips/STM32L496QG.json index e73b46c..2cd2053 100644 --- a/data/chips/STM32L496QG.json +++ b/data/chips/STM32L496QG.json @@ -7051,7 +7051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7278,7 +7278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7400,7 +7400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7492,7 +7492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7589,7 +7589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7721,7 +7721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7873,7 +7873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7985,7 +7985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8197,7 +8197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496RE.json b/data/chips/STM32L496RE.json index be1aeb3..250a19d 100644 --- a/data/chips/STM32L496RE.json +++ b/data/chips/STM32L496RE.json @@ -4047,7 +4047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4214,7 +4214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4408,7 +4408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4632,7 +4632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4759,7 +4759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4846,7 +4846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5058,7 +5058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496RG.json b/data/chips/STM32L496RG.json index 21c6173..44761e7 100644 --- a/data/chips/STM32L496RG.json +++ b/data/chips/STM32L496RG.json @@ -4437,7 +4437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4711,7 +4711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4798,7 +4798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5022,7 +5022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5149,7 +5149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5236,7 +5236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5448,7 +5448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496VE.json b/data/chips/STM32L496VE.json index b152274..7a57ec9 100644 --- a/data/chips/STM32L496VE.json +++ b/data/chips/STM32L496VE.json @@ -4994,7 +4994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5343,7 +5343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5435,7 +5435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5532,7 +5532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5664,7 +5664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5816,7 +5816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6140,7 +6140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496VG.json b/data/chips/STM32L496VG.json index bafbf06..1078c41 100644 --- a/data/chips/STM32L496VG.json +++ b/data/chips/STM32L496VG.json @@ -6818,7 +6818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7045,7 +7045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7167,7 +7167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7259,7 +7259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7356,7 +7356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7488,7 +7488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7640,7 +7640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7752,7 +7752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7964,7 +7964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496WG.json b/data/chips/STM32L496WG.json index 0d6c0c2..334e5d4 100644 --- a/data/chips/STM32L496WG.json +++ b/data/chips/STM32L496WG.json @@ -5288,7 +5288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5510,7 +5510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5627,7 +5627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5709,7 +5709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5801,7 +5801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6085,7 +6085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6177,7 +6177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496ZE.json b/data/chips/STM32L496ZE.json index 114f235..b47e444 100644 --- a/data/chips/STM32L496ZE.json +++ b/data/chips/STM32L496ZE.json @@ -5605,7 +5605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5832,7 +5832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5964,7 +5964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6056,7 +6056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6153,7 +6153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6285,7 +6285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6437,7 +6437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6549,7 +6549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6786,7 +6786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496ZG.json b/data/chips/STM32L496ZG.json index a7d2570..745a9d1 100644 --- a/data/chips/STM32L496ZG.json +++ b/data/chips/STM32L496ZG.json @@ -6481,7 +6481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6708,7 +6708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6840,7 +6840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6932,7 +6932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7029,7 +7029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7161,7 +7161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7313,7 +7313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7425,7 +7425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7662,7 +7662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6AG.json b/data/chips/STM32L4A6AG.json index d7b93a0..b983124 100644 --- a/data/chips/STM32L4A6AG.json +++ b/data/chips/STM32L4A6AG.json @@ -6954,7 +6954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7181,7 +7181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7308,7 +7308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7400,7 +7400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7497,7 +7497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7629,7 +7629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7781,7 +7781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7893,7 +7893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8125,7 +8125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6QG.json b/data/chips/STM32L4A6QG.json index 8c73e80..6fdf451 100644 --- a/data/chips/STM32L4A6QG.json +++ b/data/chips/STM32L4A6QG.json @@ -6336,7 +6336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6563,7 +6563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6685,7 +6685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6777,7 +6777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6874,7 +6874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7006,7 +7006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7158,7 +7158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7270,7 +7270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7482,7 +7482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6RG.json b/data/chips/STM32L4A6RG.json index 2ee78cf..f1f08bf 100644 --- a/data/chips/STM32L4A6RG.json +++ b/data/chips/STM32L4A6RG.json @@ -4520,7 +4520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4687,7 +4687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4794,7 +4794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4881,7 +4881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4973,7 +4973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5105,7 +5105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5232,7 +5232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5319,7 +5319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5531,7 +5531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6VG.json b/data/chips/STM32L4A6VG.json index fc9ee4c..cd2262d 100644 --- a/data/chips/STM32L4A6VG.json +++ b/data/chips/STM32L4A6VG.json @@ -6895,7 +6895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7122,7 +7122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7244,7 +7244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7336,7 +7336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7433,7 +7433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7565,7 +7565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7717,7 +7717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7829,7 +7829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8041,7 +8041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6ZG.json b/data/chips/STM32L4A6ZG.json index 9562c2e..68847a0 100644 --- a/data/chips/STM32L4A6ZG.json +++ b/data/chips/STM32L4A6ZG.json @@ -6558,7 +6558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6785,7 +6785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6917,7 +6917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7009,7 +7009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7106,7 +7106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7238,7 +7238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7390,7 +7390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7502,7 +7502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7739,7 +7739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5AE.json b/data/chips/STM32L4P5AE.json index 2430367..c73310a 100644 --- a/data/chips/STM32L4P5AE.json +++ b/data/chips/STM32L4P5AE.json @@ -6378,7 +6378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6580,7 +6580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6707,7 +6707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6789,7 +6789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6876,7 +6876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7008,7 +7008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7165,7 +7165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7282,7 +7282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7499,7 +7499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5AG.json b/data/chips/STM32L4P5AG.json index cca05bb..2afffcf 100644 --- a/data/chips/STM32L4P5AG.json +++ b/data/chips/STM32L4P5AG.json @@ -7398,7 +7398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7600,7 +7600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7727,7 +7727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7809,7 +7809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7896,7 +7896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8028,7 +8028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8185,7 +8185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8302,7 +8302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8519,7 +8519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5CE.json b/data/chips/STM32L4P5CE.json index 635c620..ed7d6a9 100644 --- a/data/chips/STM32L4P5CE.json +++ b/data/chips/STM32L4P5CE.json @@ -3594,7 +3594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3746,7 +3746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3930,7 +3930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4012,7 +4012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4144,7 +4144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4251,7 +4251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4343,7 +4343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4540,7 +4540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5CG.json b/data/chips/STM32L4P5CG.json index bb1da89..2bda6e6 100644 --- a/data/chips/STM32L4P5CG.json +++ b/data/chips/STM32L4P5CG.json @@ -4182,7 +4182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4334,7 +4334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4441,7 +4441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4518,7 +4518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4600,7 +4600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4732,7 +4732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4839,7 +4839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4931,7 +4931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5128,7 +5128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5QE.json b/data/chips/STM32L4P5QE.json index 2341762..53222b8 100644 --- a/data/chips/STM32L4P5QE.json +++ b/data/chips/STM32L4P5QE.json @@ -5771,7 +5771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5973,7 +5973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6095,7 +6095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6177,7 +6177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6264,7 +6264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6396,7 +6396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6553,7 +6553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6670,7 +6670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6867,7 +6867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5QG.json b/data/chips/STM32L4P5QG.json index 1467163..3de6a9e 100644 --- a/data/chips/STM32L4P5QG.json +++ b/data/chips/STM32L4P5QG.json @@ -7367,7 +7367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7569,7 +7569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7691,7 +7691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7773,7 +7773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7860,7 +7860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7992,7 +7992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8149,7 +8149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8266,7 +8266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8463,7 +8463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5RE.json b/data/chips/STM32L4P5RE.json index 9fafdda..8b6b8e1 100644 --- a/data/chips/STM32L4P5RE.json +++ b/data/chips/STM32L4P5RE.json @@ -4047,7 +4047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4199,7 +4199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4306,7 +4306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4383,7 +4383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4465,7 +4465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4597,7 +4597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4729,7 +4729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5018,7 +5018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5RG.json b/data/chips/STM32L4P5RG.json index 3db2be8..509d848 100644 --- a/data/chips/STM32L4P5RG.json +++ b/data/chips/STM32L4P5RG.json @@ -4437,7 +4437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4589,7 +4589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4696,7 +4696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4773,7 +4773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4987,7 +4987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5119,7 +5119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5211,7 +5211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5408,7 +5408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5VE.json b/data/chips/STM32L4P5VE.json index 3be5bc4..5037d46 100644 --- a/data/chips/STM32L4P5VE.json +++ b/data/chips/STM32L4P5VE.json @@ -5800,7 +5800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6002,7 +6002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6124,7 +6124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6206,7 +6206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6425,7 +6425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6582,7 +6582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6699,7 +6699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6896,7 +6896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5VG.json b/data/chips/STM32L4P5VG.json index f4a4e84..648fb35 100644 --- a/data/chips/STM32L4P5VG.json +++ b/data/chips/STM32L4P5VG.json @@ -7012,7 +7012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7214,7 +7214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7336,7 +7336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7418,7 +7418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7505,7 +7505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7637,7 +7637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7794,7 +7794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7911,7 +7911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8108,7 +8108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5ZE.json b/data/chips/STM32L4P5ZE.json index 870d9be..402b7bc 100644 --- a/data/chips/STM32L4P5ZE.json +++ b/data/chips/STM32L4P5ZE.json @@ -5913,7 +5913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6115,7 +6115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6247,7 +6247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6329,7 +6329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6416,7 +6416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6548,7 +6548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6705,7 +6705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6822,7 +6822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5ZG.json b/data/chips/STM32L4P5ZG.json index 7e9687e..f34db54 100644 --- a/data/chips/STM32L4P5ZG.json +++ b/data/chips/STM32L4P5ZG.json @@ -6783,7 +6783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6985,7 +6985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7117,7 +7117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7199,7 +7199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7286,7 +7286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7418,7 +7418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7575,7 +7575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7692,7 +7692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7914,7 +7914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5AG.json b/data/chips/STM32L4Q5AG.json index adb6154..1a4819e 100644 --- a/data/chips/STM32L4Q5AG.json +++ b/data/chips/STM32L4Q5AG.json @@ -7464,7 +7464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7666,7 +7666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7793,7 +7793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7875,7 +7875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7962,7 +7962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8094,7 +8094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8251,7 +8251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8368,7 +8368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8585,7 +8585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5CG.json b/data/chips/STM32L4Q5CG.json index 00c00b3..6f45034 100644 --- a/data/chips/STM32L4Q5CG.json +++ b/data/chips/STM32L4Q5CG.json @@ -4248,7 +4248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4400,7 +4400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4507,7 +4507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4584,7 +4584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4666,7 +4666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4798,7 +4798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4905,7 +4905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4997,7 +4997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5194,7 +5194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5QG.json b/data/chips/STM32L4Q5QG.json index 7ca3181..9a0becd 100644 --- a/data/chips/STM32L4Q5QG.json +++ b/data/chips/STM32L4Q5QG.json @@ -6635,7 +6635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6837,7 +6837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6959,7 +6959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7041,7 +7041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7260,7 +7260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7417,7 +7417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7534,7 +7534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7731,7 +7731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5RG.json b/data/chips/STM32L4Q5RG.json index f869b67..bd945f1 100644 --- a/data/chips/STM32L4Q5RG.json +++ b/data/chips/STM32L4Q5RG.json @@ -4503,7 +4503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4655,7 +4655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4762,7 +4762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4839,7 +4839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4921,7 +4921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5053,7 +5053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5185,7 +5185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5277,7 +5277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5474,7 +5474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5VG.json b/data/chips/STM32L4Q5VG.json index c205b87..8af4a70 100644 --- a/data/chips/STM32L4Q5VG.json +++ b/data/chips/STM32L4Q5VG.json @@ -7078,7 +7078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7280,7 +7280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7402,7 +7402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7484,7 +7484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7571,7 +7571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7703,7 +7703,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7860,7 +7860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7977,7 +7977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8174,7 +8174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5ZG.json b/data/chips/STM32L4Q5ZG.json index d1595b9..e24694e 100644 --- a/data/chips/STM32L4Q5ZG.json +++ b/data/chips/STM32L4Q5ZG.json @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7051,7 +7051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7183,7 +7183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7265,7 +7265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7352,7 +7352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7484,7 +7484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7641,7 +7641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7758,7 +7758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7980,7 +7980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5AG.json b/data/chips/STM32L4R5AG.json index 0ddb1e6..4e066f4 100644 --- a/data/chips/STM32L4R5AG.json +++ b/data/chips/STM32L4R5AG.json @@ -5521,7 +5521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5723,7 +5723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5850,7 +5850,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5932,7 +5932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6019,7 +6019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6151,7 +6151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6308,7 +6308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6425,7 +6425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6642,7 +6642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5AI.json b/data/chips/STM32L4R5AI.json index 584ab64..c02a897 100644 --- a/data/chips/STM32L4R5AI.json +++ b/data/chips/STM32L4R5AI.json @@ -6541,7 +6541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6870,7 +6870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6952,7 +6952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7039,7 +7039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7171,7 +7171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7328,7 +7328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7445,7 +7445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7662,7 +7662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5QG.json b/data/chips/STM32L4R5QG.json index 5f0d653..3768a67 100644 --- a/data/chips/STM32L4R5QG.json +++ b/data/chips/STM32L4R5QG.json @@ -5842,7 +5842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6044,7 +6044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6166,7 +6166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6248,7 +6248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6335,7 +6335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6467,7 +6467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6624,7 +6624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6741,7 +6741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6938,7 +6938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5QI.json b/data/chips/STM32L4R5QI.json index b9f66e5..461b5f6 100644 --- a/data/chips/STM32L4R5QI.json +++ b/data/chips/STM32L4R5QI.json @@ -5842,7 +5842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6044,7 +6044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6166,7 +6166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6248,7 +6248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6335,7 +6335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6467,7 +6467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6624,7 +6624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6741,7 +6741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6938,7 +6938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5VG.json b/data/chips/STM32L4R5VG.json index 29d4fb0..a6db423 100644 --- a/data/chips/STM32L4R5VG.json +++ b/data/chips/STM32L4R5VG.json @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4644,7 +4644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4833,7 +4833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4920,7 +4920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5052,7 +5052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5209,7 +5209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5326,7 +5326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5523,7 +5523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5VI.json b/data/chips/STM32L4R5VI.json index 23d40e3..2c04953 100644 --- a/data/chips/STM32L4R5VI.json +++ b/data/chips/STM32L4R5VI.json @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4644,7 +4644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4833,7 +4833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4920,7 +4920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5052,7 +5052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5209,7 +5209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5326,7 +5326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5523,7 +5523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5ZG.json b/data/chips/STM32L4R5ZG.json index eb55a45..2830e92 100644 --- a/data/chips/STM32L4R5ZG.json +++ b/data/chips/STM32L4R5ZG.json @@ -6032,7 +6032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6234,7 +6234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6366,7 +6366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6448,7 +6448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6535,7 +6535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6667,7 +6667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6824,7 +6824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6941,7 +6941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7163,7 +7163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5ZI.json b/data/chips/STM32L4R5ZI.json index 4c939e9..97fa9f4 100644 --- a/data/chips/STM32L4R5ZI.json +++ b/data/chips/STM32L4R5ZI.json @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7110,7 +7110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7242,7 +7242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7324,7 +7324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7411,7 +7411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7543,7 +7543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7700,7 +7700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7817,7 +7817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8039,7 +8039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7AI.json b/data/chips/STM32L4R7AI.json index 8be8dc1..9ed3c4d 100644 --- a/data/chips/STM32L4R7AI.json +++ b/data/chips/STM32L4R7AI.json @@ -5776,7 +5776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5978,7 +5978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6105,7 +6105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6187,7 +6187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6274,7 +6274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6406,7 +6406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6563,7 +6563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6680,7 +6680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6897,7 +6897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7VI.json b/data/chips/STM32L4R7VI.json index 21d17c5..ed2294b 100644 --- a/data/chips/STM32L4R7VI.json +++ b/data/chips/STM32L4R7VI.json @@ -4657,7 +4657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4859,7 +4859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4966,7 +4966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5135,7 +5135,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5267,7 +5267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5541,7 +5541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5738,7 +5738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7ZI.json b/data/chips/STM32L4R7ZI.json index e0dbea7..c10ed08 100644 --- a/data/chips/STM32L4R7ZI.json +++ b/data/chips/STM32L4R7ZI.json @@ -5431,7 +5431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5633,7 +5633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5847,7 +5847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5934,7 +5934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6066,7 +6066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6223,7 +6223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6340,7 +6340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6562,7 +6562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9AG.json b/data/chips/STM32L4R9AG.json index 84ffb1b..661e068 100644 --- a/data/chips/STM32L4R9AG.json +++ b/data/chips/STM32L4R9AG.json @@ -5771,7 +5771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5973,7 +5973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6100,7 +6100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6182,7 +6182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6269,7 +6269,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6401,7 +6401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6558,7 +6558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6675,7 +6675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6892,7 +6892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9AI.json b/data/chips/STM32L4R9AI.json index 4042925..c1ffc2b 100644 --- a/data/chips/STM32L4R9AI.json +++ b/data/chips/STM32L4R9AI.json @@ -5771,7 +5771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5973,7 +5973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6100,7 +6100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6182,7 +6182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6269,7 +6269,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6401,7 +6401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6558,7 +6558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6675,7 +6675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6892,7 +6892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9VG.json b/data/chips/STM32L4R9VG.json index 4d83e01..dc753c5 100644 --- a/data/chips/STM32L4R9VG.json +++ b/data/chips/STM32L4R9VG.json @@ -4584,7 +4584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4893,7 +4893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4970,7 +4970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5052,7 +5052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5184,7 +5184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5341,7 +5341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5443,7 +5443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5640,7 +5640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9VI.json b/data/chips/STM32L4R9VI.json index b13edcc..996b77e 100644 --- a/data/chips/STM32L4R9VI.json +++ b/data/chips/STM32L4R9VI.json @@ -4584,7 +4584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4893,7 +4893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4970,7 +4970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5052,7 +5052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5184,7 +5184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5341,7 +5341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5443,7 +5443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5640,7 +5640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9ZG.json b/data/chips/STM32L4R9ZG.json index da1cf18..b4e23fe 100644 --- a/data/chips/STM32L4R9ZG.json +++ b/data/chips/STM32L4R9ZG.json @@ -7214,7 +7214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7416,7 +7416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7548,7 +7548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7630,7 +7630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7717,7 +7717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7849,7 +7849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8006,7 +8006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8123,7 +8123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8345,7 +8345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9ZI.json b/data/chips/STM32L4R9ZI.json index 59b4d88..d0be225 100644 --- a/data/chips/STM32L4R9ZI.json +++ b/data/chips/STM32L4R9ZI.json @@ -8090,7 +8090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8292,7 +8292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8424,7 +8424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8506,7 +8506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8593,7 +8593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8725,7 +8725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8882,7 +8882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8999,7 +8999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9221,7 +9221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5AI.json b/data/chips/STM32L4S5AI.json index aaf1315..60ce419 100644 --- a/data/chips/STM32L4S5AI.json +++ b/data/chips/STM32L4S5AI.json @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5804,7 +5804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5931,7 +5931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6013,7 +6013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6100,7 +6100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6232,7 +6232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6506,7 +6506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6723,7 +6723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5QI.json b/data/chips/STM32L4S5QI.json index 9516292..fe22a77 100644 --- a/data/chips/STM32L4S5QI.json +++ b/data/chips/STM32L4S5QI.json @@ -5125,7 +5125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5327,7 +5327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5449,7 +5449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5531,7 +5531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5618,7 +5618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5750,7 +5750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5907,7 +5907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6024,7 +6024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6221,7 +6221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5VI.json b/data/chips/STM32L4S5VI.json index 2236178..4081a3e 100644 --- a/data/chips/STM32L4S5VI.json +++ b/data/chips/STM32L4S5VI.json @@ -4523,7 +4523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4725,7 +4725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4832,7 +4832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4914,7 +4914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5001,7 +5001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5133,7 +5133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5290,7 +5290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5407,7 +5407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5604,7 +5604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5ZI.json b/data/chips/STM32L4S5ZI.json index b9d66b1..e471d6b 100644 --- a/data/chips/STM32L4S5ZI.json +++ b/data/chips/STM32L4S5ZI.json @@ -6113,7 +6113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6315,7 +6315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6447,7 +6447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6529,7 +6529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6616,7 +6616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6748,7 +6748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6905,7 +6905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7022,7 +7022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7244,7 +7244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7AI.json b/data/chips/STM32L4S7AI.json index 81e92a2..622b2c2 100644 --- a/data/chips/STM32L4S7AI.json +++ b/data/chips/STM32L4S7AI.json @@ -5857,7 +5857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6059,7 +6059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6186,7 +6186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6268,7 +6268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6355,7 +6355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6487,7 +6487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6644,7 +6644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6761,7 +6761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6978,7 +6978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7VI.json b/data/chips/STM32L4S7VI.json index ae377aa..56ab1b8 100644 --- a/data/chips/STM32L4S7VI.json +++ b/data/chips/STM32L4S7VI.json @@ -4738,7 +4738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4940,7 +4940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5047,7 +5047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5129,7 +5129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5216,7 +5216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5348,7 +5348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5505,7 +5505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5622,7 +5622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5819,7 +5819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7ZI.json b/data/chips/STM32L4S7ZI.json index 9a406ff..1563c80 100644 --- a/data/chips/STM32L4S7ZI.json +++ b/data/chips/STM32L4S7ZI.json @@ -5512,7 +5512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5714,7 +5714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5846,7 +5846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6015,7 +6015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6147,7 +6147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6304,7 +6304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6421,7 +6421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6643,7 +6643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9AI.json b/data/chips/STM32L4S9AI.json index 3a7797a..3b263f9 100644 --- a/data/chips/STM32L4S9AI.json +++ b/data/chips/STM32L4S9AI.json @@ -5852,7 +5852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6054,7 +6054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6181,7 +6181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6263,7 +6263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6350,7 +6350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6482,7 +6482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6639,7 +6639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6756,7 +6756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6973,7 +6973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9VI.json b/data/chips/STM32L4S9VI.json index ed31834..9953793 100644 --- a/data/chips/STM32L4S9VI.json +++ b/data/chips/STM32L4S9VI.json @@ -4665,7 +4665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4867,7 +4867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4974,7 +4974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5051,7 +5051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5133,7 +5133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5265,7 +5265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5422,7 +5422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5524,7 +5524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5721,7 +5721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9ZI.json b/data/chips/STM32L4S9ZI.json index a80c913..e094987 100644 --- a/data/chips/STM32L4S9ZI.json +++ b/data/chips/STM32L4S9ZI.json @@ -7295,7 +7295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7497,7 +7497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7629,7 +7629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7711,7 +7711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7798,7 +7798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7930,7 +7930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8087,7 +8087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8204,7 +8204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8426,7 +8426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552CC.json b/data/chips/STM32L552CC.json index 287ffab..57ff9b8 100644 --- a/data/chips/STM32L552CC.json +++ b/data/chips/STM32L552CC.json @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3281,7 +3281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3388,7 +3388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3465,7 +3465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3547,7 +3547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3786,7 +3786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3878,7 +3878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552CE.json b/data/chips/STM32L552CE.json index 077c1fe..8512967 100644 --- a/data/chips/STM32L552CE.json +++ b/data/chips/STM32L552CE.json @@ -3747,7 +3747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4083,7 +4083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4165,7 +4165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4297,7 +4297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4404,7 +4404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4693,7 +4693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ME.json b/data/chips/STM32L552ME.json index 5ecb913..77cce66 100644 --- a/data/chips/STM32L552ME.json +++ b/data/chips/STM32L552ME.json @@ -3988,7 +3988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4160,7 +4160,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4282,7 +4282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4359,7 +4359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4441,7 +4441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4573,7 +4573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4705,7 +4705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4797,7 +4797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4994,7 +4994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552QC.json b/data/chips/STM32L552QC.json index 38b48d0..dd70ec1 100644 --- a/data/chips/STM32L552QC.json +++ b/data/chips/STM32L552QC.json @@ -4565,7 +4565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4767,7 +4767,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4889,7 +4889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4971,7 +4971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5058,7 +5058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5190,7 +5190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5464,7 +5464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5661,7 +5661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552QE.json b/data/chips/STM32L552QE.json index c7482e6..bcda7ef 100644 --- a/data/chips/STM32L552QE.json +++ b/data/chips/STM32L552QE.json @@ -6191,7 +6191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6393,7 +6393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6515,7 +6515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6597,7 +6597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6684,7 +6684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6816,7 +6816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6973,7 +6973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7090,7 +7090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7287,7 +7287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552RC.json b/data/chips/STM32L552RC.json index 4f2f090..502ab40 100644 --- a/data/chips/STM32L552RC.json +++ b/data/chips/STM32L552RC.json @@ -3283,7 +3283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3542,7 +3542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3619,7 +3619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3701,7 +3701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3965,7 +3965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4057,7 +4057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552RE.json b/data/chips/STM32L552RE.json index ce08ebb..8bbf62d 100644 --- a/data/chips/STM32L552RE.json +++ b/data/chips/STM32L552RE.json @@ -4093,7 +4093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4245,7 +4245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4352,7 +4352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4429,7 +4429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4511,7 +4511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4643,7 +4643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4775,7 +4775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4867,7 +4867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5064,7 +5064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552VC.json b/data/chips/STM32L552VC.json index e68edf4..5ec8314 100644 --- a/data/chips/STM32L552VC.json +++ b/data/chips/STM32L552VC.json @@ -4033,7 +4033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4342,7 +4342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4511,7 +4511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4643,7 +4643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4800,7 +4800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4917,7 +4917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5114,7 +5114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552VE.json b/data/chips/STM32L552VE.json index 1ca267f..d114a6e 100644 --- a/data/chips/STM32L552VE.json +++ b/data/chips/STM32L552VE.json @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4871,7 +4871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4978,7 +4978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5147,7 +5147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5279,7 +5279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5436,7 +5436,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5553,7 +5553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5750,7 +5750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ZC.json b/data/chips/STM32L552ZC.json index 6fcb11e..294588d 100644 --- a/data/chips/STM32L552ZC.json +++ b/data/chips/STM32L552ZC.json @@ -4711,7 +4711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4913,7 +4913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5045,7 +5045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5127,7 +5127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5214,7 +5214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5346,7 +5346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5503,7 +5503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5620,7 +5620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5842,7 +5842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ZE.json b/data/chips/STM32L552ZE.json index 402170a..ee87e71 100644 --- a/data/chips/STM32L552ZE.json +++ b/data/chips/STM32L552ZE.json @@ -5611,7 +5611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5813,7 +5813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5945,7 +5945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6027,7 +6027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6114,7 +6114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6246,7 +6246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6403,7 +6403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6520,7 +6520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6742,7 +6742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562CE.json b/data/chips/STM32L562CE.json index 10c9e92..e80f207 100644 --- a/data/chips/STM32L562CE.json +++ b/data/chips/STM32L562CE.json @@ -3840,7 +3840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3992,7 +3992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4258,7 +4258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4390,7 +4390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4497,7 +4497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4589,7 +4589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562ME.json b/data/chips/STM32L562ME.json index 427885d..337106b 100644 --- a/data/chips/STM32L562ME.json +++ b/data/chips/STM32L562ME.json @@ -4081,7 +4081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4253,7 +4253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4452,7 +4452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4534,7 +4534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4666,7 +4666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4798,7 +4798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5087,7 +5087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562QE.json b/data/chips/STM32L562QE.json index 4c10cf1..42bb15d 100644 --- a/data/chips/STM32L562QE.json +++ b/data/chips/STM32L562QE.json @@ -6284,7 +6284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6486,7 +6486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6608,7 +6608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6690,7 +6690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6777,7 +6777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6909,7 +6909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7066,7 +7066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7183,7 +7183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7380,7 +7380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562RE.json b/data/chips/STM32L562RE.json index c73db72..3993d50 100644 --- a/data/chips/STM32L562RE.json +++ b/data/chips/STM32L562RE.json @@ -4186,7 +4186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4338,7 +4338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4445,7 +4445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4868,7 +4868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4960,7 +4960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562VE.json b/data/chips/STM32L562VE.json index 029165e..325ac28 100644 --- a/data/chips/STM32L562VE.json +++ b/data/chips/STM32L562VE.json @@ -4762,7 +4762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4964,7 +4964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5071,7 +5071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5153,7 +5153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5240,7 +5240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5372,7 +5372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5529,7 +5529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5646,7 +5646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5843,7 +5843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562ZE.json b/data/chips/STM32L562ZE.json index 7dad77f..cf3be9d 100644 --- a/data/chips/STM32L562ZE.json +++ b/data/chips/STM32L562ZE.json @@ -5704,7 +5704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5906,7 +5906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6038,7 +6038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6207,7 +6207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6339,7 +6339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6496,7 +6496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6613,7 +6613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6835,7 +6835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U031C6.json b/data/chips/STM32U031C6.json index df51444..e2f2df9 100644 --- a/data/chips/STM32U031C6.json +++ b/data/chips/STM32U031C6.json @@ -2235,7 +2235,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2577,7 +2577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2714,7 +2714,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031C8.json b/data/chips/STM32U031C8.json index 0ae310f..0a58846 100644 --- a/data/chips/STM32U031C8.json +++ b/data/chips/STM32U031C8.json @@ -2235,7 +2235,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2577,7 +2577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2714,7 +2714,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F4.json b/data/chips/STM32U031F4.json index e339fba..13841f6 100644 --- a/data/chips/STM32U031F4.json +++ b/data/chips/STM32U031F4.json @@ -1610,7 +1610,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1740,7 +1740,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1830,7 +1830,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1912,7 +1912,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2024,7 +2024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F6.json b/data/chips/STM32U031F6.json index 8b4685a..ffb1ac9 100644 --- a/data/chips/STM32U031F6.json +++ b/data/chips/STM32U031F6.json @@ -1610,7 +1610,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1740,7 +1740,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1830,7 +1830,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1912,7 +1912,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2024,7 +2024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F8.json b/data/chips/STM32U031F8.json index f19db0e..42f2153 100644 --- a/data/chips/STM32U031F8.json +++ b/data/chips/STM32U031F8.json @@ -1610,7 +1610,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1740,7 +1740,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1830,7 +1830,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1912,7 +1912,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2024,7 +2024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031G6.json b/data/chips/STM32U031G6.json index 1735426..87b4617 100644 --- a/data/chips/STM32U031G6.json +++ b/data/chips/STM32U031G6.json @@ -1587,7 +1587,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1717,7 +1717,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1807,7 +1807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1884,7 +1884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1996,7 +1996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031G8.json b/data/chips/STM32U031G8.json index ff2d02b..d763795 100644 --- a/data/chips/STM32U031G8.json +++ b/data/chips/STM32U031G8.json @@ -1587,7 +1587,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1717,7 +1717,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1807,7 +1807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1884,7 +1884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1996,7 +1996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K4.json b/data/chips/STM32U031K4.json index 573105e..6c43763 100644 --- a/data/chips/STM32U031K4.json +++ b/data/chips/STM32U031K4.json @@ -1662,7 +1662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1792,7 +1792,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1959,7 +1959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2086,7 +2086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K6.json b/data/chips/STM32U031K6.json index 4f829f4..d0ec0b2 100644 --- a/data/chips/STM32U031K6.json +++ b/data/chips/STM32U031K6.json @@ -1662,7 +1662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1792,7 +1792,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1959,7 +1959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2086,7 +2086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K8.json b/data/chips/STM32U031K8.json index 6cf67c2..43dd482 100644 --- a/data/chips/STM32U031K8.json +++ b/data/chips/STM32U031K8.json @@ -1662,7 +1662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1792,7 +1792,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1959,7 +1959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2086,7 +2086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031R6.json b/data/chips/STM32U031R6.json index d99ab9a..89fa62f 100644 --- a/data/chips/STM32U031R6.json +++ b/data/chips/STM32U031R6.json @@ -2561,7 +2561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2711,7 +2711,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2821,7 +2821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2903,7 +2903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3040,7 +3040,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031R8.json b/data/chips/STM32U031R8.json index 5979a32..d6ca469 100644 --- a/data/chips/STM32U031R8.json +++ b/data/chips/STM32U031R8.json @@ -2561,7 +2561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2711,7 +2711,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2821,7 +2821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2903,7 +2903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3040,7 +3040,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073C8.json b/data/chips/STM32U073C8.json index 6b47628..f3b85de 100644 --- a/data/chips/STM32U073C8.json +++ b/data/chips/STM32U073C8.json @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3155,7 +3155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3237,7 +3237,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3374,7 +3374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073CB.json b/data/chips/STM32U073CB.json index faa01e8..de61a85 100644 --- a/data/chips/STM32U073CB.json +++ b/data/chips/STM32U073CB.json @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3155,7 +3155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3237,7 +3237,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3374,7 +3374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073CC.json b/data/chips/STM32U073CC.json index 38afdbd..fc11d05 100644 --- a/data/chips/STM32U073CC.json +++ b/data/chips/STM32U073CC.json @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3155,7 +3155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3237,7 +3237,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3374,7 +3374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073H8.json b/data/chips/STM32U073H8.json index bf8872d..6ca313f 100644 --- a/data/chips/STM32U073H8.json +++ b/data/chips/STM32U073H8.json @@ -2417,7 +2417,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2547,7 +2547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2637,7 +2637,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2851,7 +2851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073HB.json b/data/chips/STM32U073HB.json index dfee5a2..a79d56e 100644 --- a/data/chips/STM32U073HB.json +++ b/data/chips/STM32U073HB.json @@ -2417,7 +2417,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2547,7 +2547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2637,7 +2637,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2851,7 +2851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073HC.json b/data/chips/STM32U073HC.json index f1c472b..c27ecfb 100644 --- a/data/chips/STM32U073HC.json +++ b/data/chips/STM32U073HC.json @@ -2417,7 +2417,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2547,7 +2547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2637,7 +2637,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2851,7 +2851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073K8.json b/data/chips/STM32U073K8.json index c1c4944..f42745e 100644 --- a/data/chips/STM32U073K8.json +++ b/data/chips/STM32U073K8.json @@ -2232,7 +2232,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2362,7 +2362,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2529,7 +2529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2656,7 +2656,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073KB.json b/data/chips/STM32U073KB.json index 8c93403..2e6067a 100644 --- a/data/chips/STM32U073KB.json +++ b/data/chips/STM32U073KB.json @@ -2232,7 +2232,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2362,7 +2362,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2529,7 +2529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2656,7 +2656,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073KC.json b/data/chips/STM32U073KC.json index 18ae68b..1bcd414 100644 --- a/data/chips/STM32U073KC.json +++ b/data/chips/STM32U073KC.json @@ -2232,7 +2232,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2362,7 +2362,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2529,7 +2529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2656,7 +2656,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073M8.json b/data/chips/STM32U073M8.json index 2599882..b1b87b5 100644 --- a/data/chips/STM32U073M8.json +++ b/data/chips/STM32U073M8.json @@ -3783,7 +3783,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4140,7 +4140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073MB.json b/data/chips/STM32U073MB.json index 8e0e3d7..da5ec78 100644 --- a/data/chips/STM32U073MB.json +++ b/data/chips/STM32U073MB.json @@ -3783,7 +3783,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4140,7 +4140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073MC.json b/data/chips/STM32U073MC.json index cf35d03..d392e32 100644 --- a/data/chips/STM32U073MC.json +++ b/data/chips/STM32U073MC.json @@ -3783,7 +3783,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4140,7 +4140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073R8.json b/data/chips/STM32U073R8.json index 533f91a..8f678ac 100644 --- a/data/chips/STM32U073R8.json +++ b/data/chips/STM32U073R8.json @@ -3406,7 +3406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3556,7 +3556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3666,7 +3666,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3748,7 +3748,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3885,7 +3885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073RB.json b/data/chips/STM32U073RB.json index f708691..5f97b3a 100644 --- a/data/chips/STM32U073RB.json +++ b/data/chips/STM32U073RB.json @@ -3406,7 +3406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3556,7 +3556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3666,7 +3666,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3748,7 +3748,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3885,7 +3885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073RC.json b/data/chips/STM32U073RC.json index 3f593d5..bed8b89 100644 --- a/data/chips/STM32U073RC.json +++ b/data/chips/STM32U073RC.json @@ -3406,7 +3406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3556,7 +3556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3666,7 +3666,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3748,7 +3748,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3885,7 +3885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083CC.json b/data/chips/STM32U083CC.json index f14b19f..3f73945 100644 --- a/data/chips/STM32U083CC.json +++ b/data/chips/STM32U083CC.json @@ -2928,7 +2928,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3078,7 +3078,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3188,7 +3188,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3270,7 +3270,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3407,7 +3407,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083HC.json b/data/chips/STM32U083HC.json index d8f69f5..e073756 100644 --- a/data/chips/STM32U083HC.json +++ b/data/chips/STM32U083HC.json @@ -2450,7 +2450,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2580,7 +2580,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2884,7 +2884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083KC.json b/data/chips/STM32U083KC.json index 67c4d54..66f1333 100644 --- a/data/chips/STM32U083KC.json +++ b/data/chips/STM32U083KC.json @@ -2265,7 +2265,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2395,7 +2395,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2485,7 +2485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2562,7 +2562,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2689,7 +2689,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083MC.json b/data/chips/STM32U083MC.json index c7971ca..289ced1 100644 --- a/data/chips/STM32U083MC.json +++ b/data/chips/STM32U083MC.json @@ -3816,7 +3816,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4091,7 +4091,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4173,7 +4173,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4310,7 +4310,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083RC.json b/data/chips/STM32U083RC.json index d6bb870..1b182dc 100644 --- a/data/chips/STM32U083RC.json +++ b/data/chips/STM32U083RC.json @@ -3439,7 +3439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3699,7 +3699,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3781,7 +3781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3918,7 +3918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U535CB.json b/data/chips/STM32U535CB.json index f320255..9b1f995 100644 --- a/data/chips/STM32U535CB.json +++ b/data/chips/STM32U535CB.json @@ -3951,7 +3951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4695,7 +4695,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4892,7 +4892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535CC.json b/data/chips/STM32U535CC.json index e58b3e4..078a50b 100644 --- a/data/chips/STM32U535CC.json +++ b/data/chips/STM32U535CC.json @@ -3951,7 +3951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4695,7 +4695,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4892,7 +4892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535CE.json b/data/chips/STM32U535CE.json index 263408f..0c99975 100644 --- a/data/chips/STM32U535CE.json +++ b/data/chips/STM32U535CE.json @@ -3951,7 +3951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4695,7 +4695,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4892,7 +4892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535JE.json b/data/chips/STM32U535JE.json index bcb4360..736f55c 100644 --- a/data/chips/STM32U535JE.json +++ b/data/chips/STM32U535JE.json @@ -3376,7 +3376,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3523,7 +3523,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3640,7 +3640,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3717,7 +3717,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3794,7 +3794,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3921,7 +3921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4028,7 +4028,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4115,7 +4115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4312,7 +4312,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535NC.json b/data/chips/STM32U535NC.json index 3842894..ae87721 100644 --- a/data/chips/STM32U535NC.json +++ b/data/chips/STM32U535NC.json @@ -3135,7 +3135,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3287,7 +3287,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3471,7 +3471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3553,7 +3553,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3675,7 +3675,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3797,7 +3797,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3889,7 +3889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4086,7 +4086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535NE.json b/data/chips/STM32U535NE.json index bbfdee5..680b4bd 100644 --- a/data/chips/STM32U535NE.json +++ b/data/chips/STM32U535NE.json @@ -3135,7 +3135,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3287,7 +3287,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3471,7 +3471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3553,7 +3553,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3675,7 +3675,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3797,7 +3797,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3889,7 +3889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4086,7 +4086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RB.json b/data/chips/STM32U535RB.json index a67ca6d..7084a1f 100644 --- a/data/chips/STM32U535RB.json +++ b/data/chips/STM32U535RB.json @@ -4712,7 +4712,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4869,7 +4869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4976,7 +4976,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5053,7 +5053,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5135,7 +5135,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5262,7 +5262,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5486,7 +5486,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5683,7 +5683,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RC.json b/data/chips/STM32U535RC.json index 15a7328..5b7eb17 100644 --- a/data/chips/STM32U535RC.json +++ b/data/chips/STM32U535RC.json @@ -4712,7 +4712,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4869,7 +4869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4976,7 +4976,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5053,7 +5053,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5135,7 +5135,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5262,7 +5262,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5486,7 +5486,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5683,7 +5683,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RE.json b/data/chips/STM32U535RE.json index d8719c2..e7cbae3 100644 --- a/data/chips/STM32U535RE.json +++ b/data/chips/STM32U535RE.json @@ -4712,7 +4712,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4869,7 +4869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4976,7 +4976,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5053,7 +5053,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5135,7 +5135,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5262,7 +5262,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5486,7 +5486,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5683,7 +5683,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535VC.json b/data/chips/STM32U535VC.json index 07074a5..a6506fd 100644 --- a/data/chips/STM32U535VC.json +++ b/data/chips/STM32U535VC.json @@ -6323,7 +6323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6535,7 +6535,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6642,7 +6642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6724,7 +6724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6811,7 +6811,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6943,7 +6943,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7100,7 +7100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7217,7 +7217,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7414,7 +7414,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535VE.json b/data/chips/STM32U535VE.json index 4757a36..97441fa 100644 --- a/data/chips/STM32U535VE.json +++ b/data/chips/STM32U535VE.json @@ -6323,7 +6323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6535,7 +6535,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6642,7 +6642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6724,7 +6724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6811,7 +6811,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6943,7 +6943,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7100,7 +7100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7217,7 +7217,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7414,7 +7414,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545CE.json b/data/chips/STM32U545CE.json index 6cd7d93..71766a1 100644 --- a/data/chips/STM32U545CE.json +++ b/data/chips/STM32U545CE.json @@ -4086,7 +4086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4238,7 +4238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4345,7 +4345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4422,7 +4422,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4504,7 +4504,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4631,7 +4631,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4738,7 +4738,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4830,7 +4830,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545JE.json b/data/chips/STM32U545JE.json index 3c841a3..49bc89f 100644 --- a/data/chips/STM32U545JE.json +++ b/data/chips/STM32U545JE.json @@ -3511,7 +3511,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3658,7 +3658,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3775,7 +3775,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3852,7 +3852,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3929,7 +3929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4163,7 +4163,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545NE.json b/data/chips/STM32U545NE.json index 246e0b3..acd57bf 100644 --- a/data/chips/STM32U545NE.json +++ b/data/chips/STM32U545NE.json @@ -3270,7 +3270,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3422,7 +3422,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3529,7 +3529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3606,7 +3606,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4024,7 +4024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4221,7 +4221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545RE.json b/data/chips/STM32U545RE.json index 97d5dce..e6311d4 100644 --- a/data/chips/STM32U545RE.json +++ b/data/chips/STM32U545RE.json @@ -4847,7 +4847,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5004,7 +5004,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5111,7 +5111,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5188,7 +5188,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5270,7 +5270,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5397,7 +5397,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5529,7 +5529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5621,7 +5621,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5818,7 +5818,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545VE.json b/data/chips/STM32U545VE.json index 63fd70c..c9790b6 100644 --- a/data/chips/STM32U545VE.json +++ b/data/chips/STM32U545VE.json @@ -6458,7 +6458,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6670,7 +6670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6777,7 +6777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6859,7 +6859,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6946,7 +6946,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7078,7 +7078,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7235,7 +7235,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7352,7 +7352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7549,7 +7549,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575AG.json b/data/chips/STM32U575AG.json index edd2555..95c6836 100644 --- a/data/chips/STM32U575AG.json +++ b/data/chips/STM32U575AG.json @@ -8025,7 +8025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8237,7 +8237,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8369,7 +8369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8451,7 +8451,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8538,7 +8538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8670,7 +8670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8827,7 +8827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8944,7 +8944,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9186,7 +9186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575AI.json b/data/chips/STM32U575AI.json index e36fb6d..906cf77 100644 --- a/data/chips/STM32U575AI.json +++ b/data/chips/STM32U575AI.json @@ -8025,7 +8025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8237,7 +8237,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8369,7 +8369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8451,7 +8451,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8538,7 +8538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8670,7 +8670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8827,7 +8827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8944,7 +8944,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9186,7 +9186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575CG.json b/data/chips/STM32U575CG.json index 0abd847..d3fdf4e 100644 --- a/data/chips/STM32U575CG.json +++ b/data/chips/STM32U575CG.json @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4707,7 +4707,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4814,7 +4814,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4891,7 +4891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4973,7 +4973,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5100,7 +5100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5207,7 +5207,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5299,7 +5299,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5496,7 +5496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575CI.json b/data/chips/STM32U575CI.json index 5e28103..5d7d1d5 100644 --- a/data/chips/STM32U575CI.json +++ b/data/chips/STM32U575CI.json @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4707,7 +4707,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4814,7 +4814,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4891,7 +4891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4973,7 +4973,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5100,7 +5100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5207,7 +5207,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5299,7 +5299,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5496,7 +5496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575OG.json b/data/chips/STM32U575OG.json index 0a63312..ea0ead4 100644 --- a/data/chips/STM32U575OG.json +++ b/data/chips/STM32U575OG.json @@ -5094,7 +5094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5266,7 +5266,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5383,7 +5383,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5542,7 +5542,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5669,7 +5669,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5821,7 +5821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5923,7 +5923,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575OI.json b/data/chips/STM32U575OI.json index 2890415..7efb3cc 100644 --- a/data/chips/STM32U575OI.json +++ b/data/chips/STM32U575OI.json @@ -5094,7 +5094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5266,7 +5266,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5383,7 +5383,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5542,7 +5542,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5669,7 +5669,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5821,7 +5821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5923,7 +5923,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575QG.json b/data/chips/STM32U575QG.json index 46678f9..de29e30 100644 --- a/data/chips/STM32U575QG.json +++ b/data/chips/STM32U575QG.json @@ -7141,7 +7141,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7475,7 +7475,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7557,7 +7557,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7644,7 +7644,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7776,7 +7776,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7933,7 +7933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8050,7 +8050,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8247,7 +8247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575QI.json b/data/chips/STM32U575QI.json index a3b5fb5..c6b11c7 100644 --- a/data/chips/STM32U575QI.json +++ b/data/chips/STM32U575QI.json @@ -7141,7 +7141,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7475,7 +7475,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7557,7 +7557,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7644,7 +7644,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7776,7 +7776,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7933,7 +7933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8050,7 +8050,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8247,7 +8247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575RG.json b/data/chips/STM32U575RG.json index 35f6787..935a6de 100644 --- a/data/chips/STM32U575RG.json +++ b/data/chips/STM32U575RG.json @@ -4891,7 +4891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5155,7 +5155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5232,7 +5232,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5441,7 +5441,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5573,7 +5573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5665,7 +5665,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5862,7 +5862,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575RI.json b/data/chips/STM32U575RI.json index ec5e7e3..bc63177 100644 --- a/data/chips/STM32U575RI.json +++ b/data/chips/STM32U575RI.json @@ -4891,7 +4891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5155,7 +5155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5232,7 +5232,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5441,7 +5441,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5573,7 +5573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5665,7 +5665,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5862,7 +5862,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575VG.json b/data/chips/STM32U575VG.json index 0c3f75b..bbffdaf 100644 --- a/data/chips/STM32U575VG.json +++ b/data/chips/STM32U575VG.json @@ -6267,7 +6267,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6479,7 +6479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6586,7 +6586,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6668,7 +6668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6755,7 +6755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6887,7 +6887,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7161,7 +7161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7358,7 +7358,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575VI.json b/data/chips/STM32U575VI.json index ab17216..ea75676 100644 --- a/data/chips/STM32U575VI.json +++ b/data/chips/STM32U575VI.json @@ -6267,7 +6267,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6479,7 +6479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6586,7 +6586,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6668,7 +6668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6755,7 +6755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6887,7 +6887,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7161,7 +7161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7358,7 +7358,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575ZG.json b/data/chips/STM32U575ZG.json index 62e86ad..f7f753f 100644 --- a/data/chips/STM32U575ZG.json +++ b/data/chips/STM32U575ZG.json @@ -7390,7 +7390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7602,7 +7602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7734,7 +7734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7816,7 +7816,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7903,7 +7903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8035,7 +8035,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8192,7 +8192,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8309,7 +8309,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8531,7 +8531,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575ZI.json b/data/chips/STM32U575ZI.json index 73f71db..098aaf0 100644 --- a/data/chips/STM32U575ZI.json +++ b/data/chips/STM32U575ZI.json @@ -7390,7 +7390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7602,7 +7602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7734,7 +7734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7816,7 +7816,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7903,7 +7903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8035,7 +8035,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8192,7 +8192,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8309,7 +8309,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8531,7 +8531,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585AI.json b/data/chips/STM32U585AI.json index 99eeb2a..e9e6040 100644 --- a/data/chips/STM32U585AI.json +++ b/data/chips/STM32U585AI.json @@ -8193,7 +8193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8405,7 +8405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8537,7 +8537,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8619,7 +8619,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8706,7 +8706,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8838,7 +8838,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8995,7 +8995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9112,7 +9112,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9354,7 +9354,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585CI.json b/data/chips/STM32U585CI.json index 655f405..f6908b7 100644 --- a/data/chips/STM32U585CI.json +++ b/data/chips/STM32U585CI.json @@ -4723,7 +4723,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4875,7 +4875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5059,7 +5059,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5141,7 +5141,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5268,7 +5268,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5375,7 +5375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5467,7 +5467,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5664,7 +5664,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585OI.json b/data/chips/STM32U585OI.json index 6cebde6..8fe7b5c 100644 --- a/data/chips/STM32U585OI.json +++ b/data/chips/STM32U585OI.json @@ -5262,7 +5262,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5434,7 +5434,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5551,7 +5551,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5628,7 +5628,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5710,7 +5710,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5837,7 +5837,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5989,7 +5989,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6091,7 +6091,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6288,7 +6288,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585QI.json b/data/chips/STM32U585QI.json index 05c7c59..0622dd4 100644 --- a/data/chips/STM32U585QI.json +++ b/data/chips/STM32U585QI.json @@ -7309,7 +7309,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7521,7 +7521,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7643,7 +7643,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7725,7 +7725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7812,7 +7812,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7944,7 +7944,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8101,7 +8101,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8218,7 +8218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8415,7 +8415,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585RI.json b/data/chips/STM32U585RI.json index 0283397..db246ff 100644 --- a/data/chips/STM32U585RI.json +++ b/data/chips/STM32U585RI.json @@ -5059,7 +5059,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5216,7 +5216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5323,7 +5323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5400,7 +5400,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5482,7 +5482,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5609,7 +5609,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5741,7 +5741,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5833,7 +5833,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6030,7 +6030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585VI.json b/data/chips/STM32U585VI.json index 3852ca4..08cac0a 100644 --- a/data/chips/STM32U585VI.json +++ b/data/chips/STM32U585VI.json @@ -6435,7 +6435,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6647,7 +6647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6754,7 +6754,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6836,7 +6836,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6923,7 +6923,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7055,7 +7055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7212,7 +7212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7329,7 +7329,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7526,7 +7526,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585ZI.json b/data/chips/STM32U585ZI.json index 8c73a55..0edc141 100644 --- a/data/chips/STM32U585ZI.json +++ b/data/chips/STM32U585ZI.json @@ -7558,7 +7558,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7770,7 +7770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7902,7 +7902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7984,7 +7984,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8071,7 +8071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8203,7 +8203,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8360,7 +8360,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8477,7 +8477,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8699,7 +8699,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595AI.json b/data/chips/STM32U595AI.json index fb20849..cd9fa23 100644 --- a/data/chips/STM32U595AI.json +++ b/data/chips/STM32U595AI.json @@ -7952,7 +7952,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8164,7 +8164,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8296,7 +8296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8378,7 +8378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8465,7 +8465,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8597,7 +8597,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8754,7 +8754,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8871,7 +8871,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9113,7 +9113,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595AJ.json b/data/chips/STM32U595AJ.json index 923f288..82f2a1e 100644 --- a/data/chips/STM32U595AJ.json +++ b/data/chips/STM32U595AJ.json @@ -7952,7 +7952,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8164,7 +8164,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8296,7 +8296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8378,7 +8378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8465,7 +8465,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8597,7 +8597,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8754,7 +8754,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8871,7 +8871,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9113,7 +9113,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595QI.json b/data/chips/STM32U595QI.json index 3b53fb2..969f018 100644 --- a/data/chips/STM32U595QI.json +++ b/data/chips/STM32U595QI.json @@ -7053,7 +7053,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7265,7 +7265,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7387,7 +7387,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7469,7 +7469,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7556,7 +7556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7688,7 +7688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7845,7 +7845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7962,7 +7962,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8159,7 +8159,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595QJ.json b/data/chips/STM32U595QJ.json index 8e4a754..a0468b3 100644 --- a/data/chips/STM32U595QJ.json +++ b/data/chips/STM32U595QJ.json @@ -7053,7 +7053,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7265,7 +7265,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7387,7 +7387,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7469,7 +7469,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7556,7 +7556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7688,7 +7688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7845,7 +7845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7962,7 +7962,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8159,7 +8159,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595RI.json b/data/chips/STM32U595RI.json index 17d0e8c..1f7bc80 100644 --- a/data/chips/STM32U595RI.json +++ b/data/chips/STM32U595RI.json @@ -4651,7 +4651,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4808,7 +4808,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4915,7 +4915,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4992,7 +4992,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5201,7 +5201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5333,7 +5333,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5425,7 +5425,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5622,7 +5622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595RJ.json b/data/chips/STM32U595RJ.json index 5ac6054..7a6184c 100644 --- a/data/chips/STM32U595RJ.json +++ b/data/chips/STM32U595RJ.json @@ -4651,7 +4651,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4808,7 +4808,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4915,7 +4915,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4992,7 +4992,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5201,7 +5201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5333,7 +5333,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5425,7 +5425,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5622,7 +5622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595VI.json b/data/chips/STM32U595VI.json index 07d3cde..f7adef7 100644 --- a/data/chips/STM32U595VI.json +++ b/data/chips/STM32U595VI.json @@ -6144,7 +6144,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6356,7 +6356,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6463,7 +6463,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6545,7 +6545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6764,7 +6764,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6921,7 +6921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7038,7 +7038,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7235,7 +7235,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595VJ.json b/data/chips/STM32U595VJ.json index e0170b9..b56edac 100644 --- a/data/chips/STM32U595VJ.json +++ b/data/chips/STM32U595VJ.json @@ -6144,7 +6144,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6356,7 +6356,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6463,7 +6463,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6545,7 +6545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6764,7 +6764,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6921,7 +6921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7038,7 +7038,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7235,7 +7235,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595ZI.json b/data/chips/STM32U595ZI.json index 4bce4db..d80def4 100644 --- a/data/chips/STM32U595ZI.json +++ b/data/chips/STM32U595ZI.json @@ -8208,7 +8208,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8420,7 +8420,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8552,7 +8552,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8634,7 +8634,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8721,7 +8721,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8853,7 +8853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9010,7 +9010,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9127,7 +9127,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9349,7 +9349,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595ZJ.json b/data/chips/STM32U595ZJ.json index c908ff2..ffde9c1 100644 --- a/data/chips/STM32U595ZJ.json +++ b/data/chips/STM32U595ZJ.json @@ -8208,7 +8208,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8420,7 +8420,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8552,7 +8552,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8634,7 +8634,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8721,7 +8721,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8853,7 +8853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9010,7 +9010,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9127,7 +9127,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9349,7 +9349,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599BJ.json b/data/chips/STM32U599BJ.json index 136a165..72867b8 100644 --- a/data/chips/STM32U599BJ.json +++ b/data/chips/STM32U599BJ.json @@ -7670,7 +7670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7882,7 +7882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8014,7 +8014,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8096,7 +8096,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8183,7 +8183,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8315,7 +8315,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8472,7 +8472,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8589,7 +8589,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8831,7 +8831,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599NI.json b/data/chips/STM32U599NI.json index e9f58e6..5b0bc1d 100644 --- a/data/chips/STM32U599NI.json +++ b/data/chips/STM32U599NI.json @@ -7743,7 +7743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7955,7 +7955,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8087,7 +8087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8169,7 +8169,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8256,7 +8256,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8388,7 +8388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8545,7 +8545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8662,7 +8662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8904,7 +8904,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599NJ.json b/data/chips/STM32U599NJ.json index 414f0bb..ee0a056 100644 --- a/data/chips/STM32U599NJ.json +++ b/data/chips/STM32U599NJ.json @@ -7743,7 +7743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7955,7 +7955,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8087,7 +8087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8169,7 +8169,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8256,7 +8256,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8388,7 +8388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8545,7 +8545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8662,7 +8662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8904,7 +8904,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599VI.json b/data/chips/STM32U599VI.json index a6477c3..3f5ba5d 100644 --- a/data/chips/STM32U599VI.json +++ b/data/chips/STM32U599VI.json @@ -5682,7 +5682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5884,7 +5884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6068,7 +6068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6150,7 +6150,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6282,7 +6282,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6439,7 +6439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6556,7 +6556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6753,7 +6753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599VJ.json b/data/chips/STM32U599VJ.json index 2c50528..7ecc0b3 100644 --- a/data/chips/STM32U599VJ.json +++ b/data/chips/STM32U599VJ.json @@ -6412,7 +6412,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6624,7 +6624,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6813,7 +6813,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6900,7 +6900,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7032,7 +7032,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7189,7 +7189,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7306,7 +7306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7503,7 +7503,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599ZI.json b/data/chips/STM32U599ZI.json index 26dbae7..011952f 100644 --- a/data/chips/STM32U599ZI.json +++ b/data/chips/STM32U599ZI.json @@ -7673,7 +7673,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8012,7 +8012,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8094,7 +8094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8181,7 +8181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8313,7 +8313,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8470,7 +8470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8587,7 +8587,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8809,7 +8809,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599ZJ.json b/data/chips/STM32U599ZJ.json index 50344f0..efd94d1 100644 --- a/data/chips/STM32U599ZJ.json +++ b/data/chips/STM32U599ZJ.json @@ -7673,7 +7673,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8012,7 +8012,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8094,7 +8094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8181,7 +8181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8313,7 +8313,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8470,7 +8470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8587,7 +8587,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8809,7 +8809,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5AJ.json b/data/chips/STM32U5A5AJ.json index 95fe506..57a987a 100644 --- a/data/chips/STM32U5A5AJ.json +++ b/data/chips/STM32U5A5AJ.json @@ -8114,7 +8114,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8326,7 +8326,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8458,7 +8458,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8540,7 +8540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8627,7 +8627,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8759,7 +8759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8916,7 +8916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9033,7 +9033,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9275,7 +9275,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5QI.json b/data/chips/STM32U5A5QI.json index e37b9a6..053977c 100644 --- a/data/chips/STM32U5A5QI.json +++ b/data/chips/STM32U5A5QI.json @@ -6342,7 +6342,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6554,7 +6554,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6671,7 +6671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6753,7 +6753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6840,7 +6840,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6972,7 +6972,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7129,7 +7129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7246,7 +7246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7443,7 +7443,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5QJ.json b/data/chips/STM32U5A5QJ.json index fd9b4ce..85fd14f 100644 --- a/data/chips/STM32U5A5QJ.json +++ b/data/chips/STM32U5A5QJ.json @@ -7215,7 +7215,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7427,7 +7427,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7549,7 +7549,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7631,7 +7631,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7718,7 +7718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7850,7 +7850,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8007,7 +8007,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8124,7 +8124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8321,7 +8321,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5RJ.json b/data/chips/STM32U5A5RJ.json index d1af7b9..a61d689 100644 --- a/data/chips/STM32U5A5RJ.json +++ b/data/chips/STM32U5A5RJ.json @@ -4813,7 +4813,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4970,7 +4970,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5077,7 +5077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5154,7 +5154,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5236,7 +5236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5495,7 +5495,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5587,7 +5587,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5784,7 +5784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5VJ.json b/data/chips/STM32U5A5VJ.json index f5e226c..d84fff9 100644 --- a/data/chips/STM32U5A5VJ.json +++ b/data/chips/STM32U5A5VJ.json @@ -6306,7 +6306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6518,7 +6518,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6625,7 +6625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6707,7 +6707,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6794,7 +6794,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6926,7 +6926,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7083,7 +7083,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7200,7 +7200,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7397,7 +7397,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5ZJ.json b/data/chips/STM32U5A5ZJ.json index e8a9c31..b51c3a3 100644 --- a/data/chips/STM32U5A5ZJ.json +++ b/data/chips/STM32U5A5ZJ.json @@ -8370,7 +8370,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8582,7 +8582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8714,7 +8714,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8796,7 +8796,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8883,7 +8883,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9015,7 +9015,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9172,7 +9172,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9289,7 +9289,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9511,7 +9511,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9BJ.json b/data/chips/STM32U5A9BJ.json index 54099d9..018a952 100644 --- a/data/chips/STM32U5A9BJ.json +++ b/data/chips/STM32U5A9BJ.json @@ -7832,7 +7832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8044,7 +8044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8176,7 +8176,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8258,7 +8258,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8345,7 +8345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8477,7 +8477,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8634,7 +8634,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8751,7 +8751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8993,7 +8993,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9NJ.json b/data/chips/STM32U5A9NJ.json index 64f8b68..a3cf5f4 100644 --- a/data/chips/STM32U5A9NJ.json +++ b/data/chips/STM32U5A9NJ.json @@ -7905,7 +7905,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8117,7 +8117,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8249,7 +8249,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8331,7 +8331,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8418,7 +8418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8550,7 +8550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8707,7 +8707,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8824,7 +8824,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9066,7 +9066,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9VJ.json b/data/chips/STM32U5A9VJ.json index cf3d43d..5218d1b 100644 --- a/data/chips/STM32U5A9VJ.json +++ b/data/chips/STM32U5A9VJ.json @@ -5844,7 +5844,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6046,7 +6046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6148,7 +6148,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6230,7 +6230,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6312,7 +6312,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6444,7 +6444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6601,7 +6601,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6718,7 +6718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6915,7 +6915,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9ZJ.json b/data/chips/STM32U5A9ZJ.json index b788a90..f250d3a 100644 --- a/data/chips/STM32U5A9ZJ.json +++ b/data/chips/STM32U5A9ZJ.json @@ -7835,7 +7835,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8047,7 +8047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8174,7 +8174,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8256,7 +8256,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8343,7 +8343,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8475,7 +8475,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8632,7 +8632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8749,7 +8749,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8971,7 +8971,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F7VI.json b/data/chips/STM32U5F7VI.json index 05f64c5..a185d33 100644 --- a/data/chips/STM32U5F7VI.json +++ b/data/chips/STM32U5F7VI.json @@ -6459,7 +6459,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6671,7 +6671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6860,7 +6860,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7079,7 +7079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7236,7 +7236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F7VJ.json b/data/chips/STM32U5F7VJ.json index eaa0b21..f67231e 100644 --- a/data/chips/STM32U5F7VJ.json +++ b/data/chips/STM32U5F7VJ.json @@ -6459,7 +6459,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6671,7 +6671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6860,7 +6860,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7079,7 +7079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7236,7 +7236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9BJ.json b/data/chips/STM32U5F9BJ.json index 856c932..d331d6f 100644 --- a/data/chips/STM32U5F9BJ.json +++ b/data/chips/STM32U5F9BJ.json @@ -7759,7 +7759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7971,7 +7971,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8103,7 +8103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8185,7 +8185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8272,7 +8272,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8404,7 +8404,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8561,7 +8561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8678,7 +8678,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8920,7 +8920,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9NJ.json b/data/chips/STM32U5F9NJ.json index 1ae352b..fe92d31 100644 --- a/data/chips/STM32U5F9NJ.json +++ b/data/chips/STM32U5F9NJ.json @@ -7832,7 +7832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8044,7 +8044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8176,7 +8176,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8258,7 +8258,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8345,7 +8345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8477,7 +8477,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8634,7 +8634,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8751,7 +8751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8993,7 +8993,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9VI.json b/data/chips/STM32U5F9VI.json index 77ddf88..74917ab 100644 --- a/data/chips/STM32U5F9VI.json +++ b/data/chips/STM32U5F9VI.json @@ -5043,7 +5043,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5312,7 +5312,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5389,7 +5389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5593,7 +5593,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5705,7 +5705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5797,7 +5797,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6014,7 +6014,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9VJ.json b/data/chips/STM32U5F9VJ.json index 9a18b5f..25d8910 100644 --- a/data/chips/STM32U5F9VJ.json +++ b/data/chips/STM32U5F9VJ.json @@ -5043,7 +5043,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5312,7 +5312,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5389,7 +5389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5593,7 +5593,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5705,7 +5705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5797,7 +5797,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6014,7 +6014,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9ZI.json b/data/chips/STM32U5F9ZI.json index 6c86819..fdf3698 100644 --- a/data/chips/STM32U5F9ZI.json +++ b/data/chips/STM32U5F9ZI.json @@ -7401,7 +7401,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7603,7 +7603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7715,7 +7715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7797,7 +7797,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7879,7 +7879,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8011,7 +8011,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8168,7 +8168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8285,7 +8285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8502,7 +8502,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9ZJ.json b/data/chips/STM32U5F9ZJ.json index 8dae99d..637a3ad 100644 --- a/data/chips/STM32U5F9ZJ.json +++ b/data/chips/STM32U5F9ZJ.json @@ -7401,7 +7401,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7603,7 +7603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7715,7 +7715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7797,7 +7797,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7879,7 +7879,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8011,7 +8011,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8168,7 +8168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8285,7 +8285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8502,7 +8502,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G7VJ.json b/data/chips/STM32U5G7VJ.json index 9147607..71d82aa 100644 --- a/data/chips/STM32U5G7VJ.json +++ b/data/chips/STM32U5G7VJ.json @@ -6669,7 +6669,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6881,7 +6881,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6988,7 +6988,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7157,7 +7157,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7289,7 +7289,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7446,7 +7446,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7563,7 +7563,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7760,7 +7760,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9BJ.json b/data/chips/STM32U5G9BJ.json index 4a451a1..32e6165 100644 --- a/data/chips/STM32U5G9BJ.json +++ b/data/chips/STM32U5G9BJ.json @@ -7921,7 +7921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8133,7 +8133,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8265,7 +8265,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8347,7 +8347,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8434,7 +8434,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8566,7 +8566,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8723,7 +8723,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8840,7 +8840,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9082,7 +9082,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9NJ.json b/data/chips/STM32U5G9NJ.json index 44bd5b2..560b2f4 100644 --- a/data/chips/STM32U5G9NJ.json +++ b/data/chips/STM32U5G9NJ.json @@ -8089,7 +8089,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8301,7 +8301,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8433,7 +8433,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8515,7 +8515,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8602,7 +8602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8734,7 +8734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8891,7 +8891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9008,7 +9008,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9250,7 +9250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9VJ.json b/data/chips/STM32U5G9VJ.json index 7b127b1..5564df8 100644 --- a/data/chips/STM32U5G9VJ.json +++ b/data/chips/STM32U5G9VJ.json @@ -5263,7 +5263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5430,7 +5430,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5532,7 +5532,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5609,7 +5609,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5691,7 +5691,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5813,7 +5813,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5925,7 +5925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6017,7 +6017,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6234,7 +6234,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9ZJ.json b/data/chips/STM32U5G9ZJ.json index b56ef4d..42fe7df 100644 --- a/data/chips/STM32U5G9ZJ.json +++ b/data/chips/STM32U5G9ZJ.json @@ -7621,7 +7621,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7823,7 +7823,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7935,7 +7935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8017,7 +8017,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8099,7 +8099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8231,7 +8231,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8388,7 +8388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8505,7 +8505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8722,7 +8722,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32WB10CC.json b/data/chips/STM32WB10CC.json index f04c2d8..fae76ab 100644 --- a/data/chips/STM32WB10CC.json +++ b/data/chips/STM32WB10CC.json @@ -1847,7 +1847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1989,7 +1989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB15CC.json b/data/chips/STM32WB15CC.json index 10c7de5..b8017e4 100644 --- a/data/chips/STM32WB15CC.json +++ b/data/chips/STM32WB15CC.json @@ -2579,7 +2579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2726,7 +2726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB30CE.json b/data/chips/STM32WB30CE.json index f26ba92..9319fb1 100644 --- a/data/chips/STM32WB30CE.json +++ b/data/chips/STM32WB30CE.json @@ -1657,7 +1657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1794,7 +1794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1871,7 +1871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1953,7 +1953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB35CC.json b/data/chips/STM32WB35CC.json index 5009bba..4b8f0e8 100644 --- a/data/chips/STM32WB35CC.json +++ b/data/chips/STM32WB35CC.json @@ -2254,7 +2254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2468,7 +2468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2550,7 +2550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB35CE.json b/data/chips/STM32WB35CE.json index 759c003..9117ab5 100644 --- a/data/chips/STM32WB35CE.json +++ b/data/chips/STM32WB35CE.json @@ -2254,7 +2254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2468,7 +2468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2550,7 +2550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB50CG.json b/data/chips/STM32WB50CG.json index 4bd0b4f..efe98be 100644 --- a/data/chips/STM32WB50CG.json +++ b/data/chips/STM32WB50CG.json @@ -1657,7 +1657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1794,7 +1794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1871,7 +1871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1953,7 +1953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CC.json b/data/chips/STM32WB55CC.json index 88b947e..64912ae 100644 --- a/data/chips/STM32WB55CC.json +++ b/data/chips/STM32WB55CC.json @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2553,7 +2553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2630,7 +2630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CE.json b/data/chips/STM32WB55CE.json index 8b86cb6..74a58ee 100644 --- a/data/chips/STM32WB55CE.json +++ b/data/chips/STM32WB55CE.json @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2553,7 +2553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2630,7 +2630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CG.json b/data/chips/STM32WB55CG.json index 15ae26c..e6bf7b4 100644 --- a/data/chips/STM32WB55CG.json +++ b/data/chips/STM32WB55CG.json @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2553,7 +2553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2630,7 +2630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RC.json b/data/chips/STM32WB55RC.json index a56ac8e..1c0f5d6 100644 --- a/data/chips/STM32WB55RC.json +++ b/data/chips/STM32WB55RC.json @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3199,7 +3199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3281,7 +3281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RE.json b/data/chips/STM32WB55RE.json index 2d37a1f..7c6c2a3 100644 --- a/data/chips/STM32WB55RE.json +++ b/data/chips/STM32WB55RE.json @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3199,7 +3199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3281,7 +3281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RG.json b/data/chips/STM32WB55RG.json index d8ca042..ea90c28 100644 --- a/data/chips/STM32WB55RG.json +++ b/data/chips/STM32WB55RG.json @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3199,7 +3199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3281,7 +3281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VC.json b/data/chips/STM32WB55VC.json index 27a1809..f1c90da 100644 --- a/data/chips/STM32WB55VC.json +++ b/data/chips/STM32WB55VC.json @@ -4112,7 +4112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4376,7 +4376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VE.json b/data/chips/STM32WB55VE.json index 8f0193b..58a1245 100644 --- a/data/chips/STM32WB55VE.json +++ b/data/chips/STM32WB55VE.json @@ -4112,7 +4112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4376,7 +4376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VG.json b/data/chips/STM32WB55VG.json index c8a0a8c..0678ef6 100644 --- a/data/chips/STM32WB55VG.json +++ b/data/chips/STM32WB55VG.json @@ -4112,7 +4112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4376,7 +4376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VY.json b/data/chips/STM32WB55VY.json index 4a7a270..5b4da2b 100644 --- a/data/chips/STM32WB55VY.json +++ b/data/chips/STM32WB55VY.json @@ -3314,7 +3314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3665,7 +3665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA50KE.json b/data/chips/STM32WBA50KE.json index 59e1635..3987423 100644 --- a/data/chips/STM32WBA50KE.json +++ b/data/chips/STM32WBA50KE.json @@ -1274,7 +1274,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1483,7 +1483,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA50KG.json b/data/chips/STM32WBA50KG.json index 86196aa..4774f01 100644 --- a/data/chips/STM32WBA50KG.json +++ b/data/chips/STM32WBA50KG.json @@ -1274,7 +1274,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1483,7 +1483,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52CE.json b/data/chips/STM32WBA52CE.json index d1188ba..1b36cfa 100644 --- a/data/chips/STM32WBA52CE.json +++ b/data/chips/STM32WBA52CE.json @@ -1753,7 +1753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1915,7 +1915,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2196,7 +2196,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52CG.json b/data/chips/STM32WBA52CG.json index 5e56877..efbc249 100644 --- a/data/chips/STM32WBA52CG.json +++ b/data/chips/STM32WBA52CG.json @@ -1753,7 +1753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1915,7 +1915,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2196,7 +2196,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52KE.json b/data/chips/STM32WBA52KE.json index bd776aa..b2f36eb 100644 --- a/data/chips/STM32WBA52KE.json +++ b/data/chips/STM32WBA52KE.json @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1657,7 +1657,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1734,7 +1734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1918,7 +1918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52KG.json b/data/chips/STM32WBA52KG.json index 96c5469..da4334d 100644 --- a/data/chips/STM32WBA52KG.json +++ b/data/chips/STM32WBA52KG.json @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1657,7 +1657,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1734,7 +1734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1918,7 +1918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54CE.json b/data/chips/STM32WBA54CE.json index d57622b..f03a7ef 100644 --- a/data/chips/STM32WBA54CE.json +++ b/data/chips/STM32WBA54CE.json @@ -1909,7 +1909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2158,7 +2158,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2235,7 +2235,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54CG.json b/data/chips/STM32WBA54CG.json index 6bc12e0..2fff6eb 100644 --- a/data/chips/STM32WBA54CG.json +++ b/data/chips/STM32WBA54CG.json @@ -1909,7 +1909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2158,7 +2158,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2235,7 +2235,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54KE.json b/data/chips/STM32WBA54KE.json index 588e851..5cf5010 100644 --- a/data/chips/STM32WBA54KE.json +++ b/data/chips/STM32WBA54KE.json @@ -1646,7 +1646,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1778,7 +1778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1932,7 +1932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54KG.json b/data/chips/STM32WBA54KG.json index 80c1c91..c997870 100644 --- a/data/chips/STM32WBA54KG.json +++ b/data/chips/STM32WBA54KG.json @@ -1646,7 +1646,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1778,7 +1778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1932,7 +1932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55CE.json b/data/chips/STM32WBA55CE.json index 100fe8e..697948c 100644 --- a/data/chips/STM32WBA55CE.json +++ b/data/chips/STM32WBA55CE.json @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2048,7 +2048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2125,7 +2125,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2319,7 +2319,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55CG.json b/data/chips/STM32WBA55CG.json index 4ff5324..522dac4 100644 --- a/data/chips/STM32WBA55CG.json +++ b/data/chips/STM32WBA55CG.json @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2048,7 +2048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2125,7 +2125,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2319,7 +2319,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55HE.json b/data/chips/STM32WBA55HE.json index d5c3aa3..1d7d307 100644 --- a/data/chips/STM32WBA55HE.json +++ b/data/chips/STM32WBA55HE.json @@ -1694,7 +1694,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1903,7 +1903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1980,7 +1980,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55HG.json b/data/chips/STM32WBA55HG.json index 080c0a7..8576532 100644 --- a/data/chips/STM32WBA55HG.json +++ b/data/chips/STM32WBA55HG.json @@ -1694,7 +1694,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1903,7 +1903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1980,7 +1980,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55UE.json b/data/chips/STM32WBA55UE.json index 7b3c163..f4bd413 100644 --- a/data/chips/STM32WBA55UE.json +++ b/data/chips/STM32WBA55UE.json @@ -1985,7 +1985,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2234,7 +2234,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2311,7 +2311,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2428,7 +2428,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55UG.json b/data/chips/STM32WBA55UG.json index 3fed441..6a169fb 100644 --- a/data/chips/STM32WBA55UG.json +++ b/data/chips/STM32WBA55UG.json @@ -1985,7 +1985,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2234,7 +2234,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2311,7 +2311,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2428,7 +2428,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL54CC.json b/data/chips/STM32WL54CC.json index 2f8f5d5..4ff3af3 100644 --- a/data/chips/STM32WL54CC.json +++ b/data/chips/STM32WL54CC.json @@ -2121,7 +2121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2258,7 +2258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4925,7 +4925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5002,7 +5002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5079,7 +5079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL54JC.json b/data/chips/STM32WL54JC.json index 2d27bdc..77705f6 100644 --- a/data/chips/STM32WL54JC.json +++ b/data/chips/STM32WL54JC.json @@ -2487,7 +2487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2644,7 +2644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2721,7 +2721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2803,7 +2803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5447,7 +5447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5604,7 +5604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5681,7 +5681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5763,7 +5763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL55CC.json b/data/chips/STM32WL55CC.json index b003a6a..8393d9f 100644 --- a/data/chips/STM32WL55CC.json +++ b/data/chips/STM32WL55CC.json @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2264,7 +2264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2418,7 +2418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4794,7 +4794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4931,7 +4931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5008,7 +5008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5085,7 +5085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL55JC.json b/data/chips/STM32WL55JC.json index 1094f7f..c284ad9 100644 --- a/data/chips/STM32WL55JC.json +++ b/data/chips/STM32WL55JC.json @@ -2493,7 +2493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2650,7 +2650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2727,7 +2727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2809,7 +2809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5453,7 +5453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5610,7 +5610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5687,7 +5687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5769,7 +5769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4C8.json b/data/chips/STM32WLE4C8.json index f376049..b847412 100644 --- a/data/chips/STM32WLE4C8.json +++ b/data/chips/STM32WLE4C8.json @@ -1930,7 +1930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2144,7 +2144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4CB.json b/data/chips/STM32WLE4CB.json index 6a34b7e..cbef080 100644 --- a/data/chips/STM32WLE4CB.json +++ b/data/chips/STM32WLE4CB.json @@ -1930,7 +1930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2144,7 +2144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4CC.json b/data/chips/STM32WLE4CC.json index e44cf67..ad5ef6b 100644 --- a/data/chips/STM32WLE4CC.json +++ b/data/chips/STM32WLE4CC.json @@ -2105,7 +2105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2242,7 +2242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2319,7 +2319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4J8.json b/data/chips/STM32WLE4J8.json index 50cebea..67a32d9 100644 --- a/data/chips/STM32WLE4J8.json +++ b/data/chips/STM32WLE4J8.json @@ -2296,7 +2296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2453,7 +2453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2530,7 +2530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2612,7 +2612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4JB.json b/data/chips/STM32WLE4JB.json index c15997e..f6dac79 100644 --- a/data/chips/STM32WLE4JB.json +++ b/data/chips/STM32WLE4JB.json @@ -2296,7 +2296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2453,7 +2453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2530,7 +2530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2612,7 +2612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4JC.json b/data/chips/STM32WLE4JC.json index eab948a..d00d4ef 100644 --- a/data/chips/STM32WLE4JC.json +++ b/data/chips/STM32WLE4JC.json @@ -2471,7 +2471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2628,7 +2628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2787,7 +2787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5C8.json b/data/chips/STM32WLE5C8.json index c7cbee9..46f8559 100644 --- a/data/chips/STM32WLE5C8.json +++ b/data/chips/STM32WLE5C8.json @@ -2105,7 +2105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2242,7 +2242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2319,7 +2319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5CB.json b/data/chips/STM32WLE5CB.json index 93badf9..2a72fd3 100644 --- a/data/chips/STM32WLE5CB.json +++ b/data/chips/STM32WLE5CB.json @@ -2105,7 +2105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2242,7 +2242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2319,7 +2319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5CC.json b/data/chips/STM32WLE5CC.json index 9d51ab2..40090bc 100644 --- a/data/chips/STM32WLE5CC.json +++ b/data/chips/STM32WLE5CC.json @@ -2105,7 +2105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2242,7 +2242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2319,7 +2319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5J8.json b/data/chips/STM32WLE5J8.json index a3772a9..6c6af70 100644 --- a/data/chips/STM32WLE5J8.json +++ b/data/chips/STM32WLE5J8.json @@ -2471,7 +2471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2628,7 +2628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2787,7 +2787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5JB.json b/data/chips/STM32WLE5JB.json index 261c30a..497d1fe 100644 --- a/data/chips/STM32WLE5JB.json +++ b/data/chips/STM32WLE5JB.json @@ -2471,7 +2471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2628,7 +2628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2787,7 +2787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5JC.json b/data/chips/STM32WLE5JC.json index b9a789a..63652b1 100644 --- a/data/chips/STM32WLE5JC.json +++ b/data/chips/STM32WLE5JC.json @@ -2471,7 +2471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2628,7 +2628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2787,7 +2787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/registers/timer_l0.json b/data/registers/timer_l0.json index 92b61bd..e1d6bd3 100644 --- a/data/registers/timer_l0.json +++ b/data/registers/timer_l0.json @@ -1,7 +1,7 @@ { "block/TIM_1CH": { "extends": "TIM_CORE", - "description": "Virtual 1-channel timers", + "description": "1-channel timers", "items": [ { "name": "CR1", @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -77,6 +77,13 @@ "extends": "TIM_1CH", "description": "2-channel timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_2CH" + }, { "name": "CR2", "description": "control register 2", @@ -87,7 +94,7 @@ "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_2CH" }, { "name": "DIER", @@ -108,71 +115,87 @@ "access": "Write", "bit_size": 16, "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", + "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_4CH" }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_TRIGDMA" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_4CH" + }, + { + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_4CH" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_4CH" }, { "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", + "description": "capture/compare mode register 1-2 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 72, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 76 } ] }, "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", + "extends": "TIM_CORE", "description": "Basic timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ + "fieldset": "CR2_MMS" + }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" + "fieldset": "DIER_UPDMA" } ] }, "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", + "description": "Virtual timer for common parts of all timers", "items": [ { "name": "CR1", @@ -221,99 +244,6 @@ } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", - "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, - { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_GP16" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_GP16" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_GP16" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 72, - "fieldset": "DCR_GP16" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" - } - ] - }, "fieldset/ARR_CORE": { "description": "auto-reload register", "fields": [ @@ -326,77 +256,6 @@ ] }, "fieldset/CCER_1CH": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_GP16": { "description": "capture/compare enable register", "fields": [ { @@ -432,45 +291,7 @@ ] }, "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", + "description": "capture/compare mode register (input mode)", "fields": [ { "name": "CCS", @@ -507,55 +328,7 @@ ] }, "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "CCS", @@ -601,9 +374,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -658,6 +431,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -691,43 +489,27 @@ "description": "Auto-reload preload enable", "bit_offset": 7, "bit_size": 1 - }, - { - "name": "UIFREMAP", - "description": "UIF status bit remapping enable", - "bit_offset": 11, - "bit_size": 1 } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", + "fields": [] + }, + "fieldset/CR2_CCDMA": { + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "CCDS" } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -736,17 +518,11 @@ "bit_offset": 4, "bit_size": 3, "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -755,19 +531,6 @@ "bit_offset": 4, "bit_size": 3, "enum": "MMS" - } - ] - }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", - "description": "control register 2", - "fields": [ - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" }, { "name": "TI1S", @@ -778,7 +541,7 @@ } ] }, - "fieldset/DCR_GP16": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -801,11 +564,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -815,16 +578,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -833,15 +586,24 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", + "description": "DMA/Interrupt enable register", + "fields": [] + }, + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 + "name": "CCDE", + "description": "Capture/Compare x (x=1-4) DMA request enable", + "bit_offset": 9, + "bit_size": 1, + "array": { + "len": 4, + "stride": 1 + } } ] }, @@ -856,36 +618,10 @@ } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1-4) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "TDE", "description": "Trigger DMA request enable", @@ -894,14 +630,15 @@ } ] }, - "fieldset/DMAR_GP16": { - "description": "DMA address for full transfer", + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "DMAB", - "description": "DMA register for burst accesses", - "bit_offset": 0, - "bit_size": 16 + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, + "bit_size": 1 } ] }, @@ -911,11 +648,11 @@ "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -925,16 +662,6 @@ "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -954,29 +681,7 @@ } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", - "description": "event generation register", - "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, - "bit_size": 1 - } - ] - }, - "fieldset/SMCR_GP16": { + "fieldset/SMCR_2CH": { "description": "slave mode control register", "fields": [ { @@ -1029,27 +734,37 @@ } ] }, + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", + "description": "slave mode control register", + "fields": [] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [] + }, "fieldset/SR_1CH": { "extends": "SR_CORE", "description": "status register", "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1059,34 +774,19 @@ "extends": "SR_1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, + "fieldset/SR_4CH": { + "extends": "SR_2CH", + "description": "status register", + "fields": [] + }, "fieldset/SR_CORE": { "description": "status register", "fields": [ @@ -1098,38 +798,6 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - } - ] - }, "enum/CCDS": { "bit_size": 1, "variants": [ diff --git a/data/registers/timer_v1.json b/data/registers/timer_v1.json index 21f2809..61cf91d 100644 --- a/data/registers/timer_v1.json +++ b/data/registers/timer_v1.json @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -79,27 +79,40 @@ } ] }, - "block/TIM_1CH_CMP": { + "block/TIM_2CH": { "extends": "TIM_1CH", - "description": "1-channel with one complementary output timers", + "description": "2-channel timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_2CH" + }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_1CH_CMP" + "fieldset": "CR2_2CH" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_2CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_1CH_CMP" + "fieldset": "DIER_2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_1CH_CMP" + "fieldset": "SR_2CH" }, { "name": "EGR", @@ -107,74 +120,120 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_1CH_CMP" + "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_32BIT": { + "extends": "TIM_4CH", + "description": "General purpose 32-bit timers", + "items": [ + { + "name": "CNT", + "description": "counter", + "byte_offset": 36 }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_1CH_CMP" + "name": "ARR", + "description": "auto-reload register", + "byte_offset": 44 }, { - "name": "RCR", - "description": "repetition counter register", - "byte_offset": 48, + "name": "CCR", + "description": "capture/compare register x (x=1-4)", + "array": { + "len": 4, + "stride": 4 + }, + "byte_offset": 52 + } + ] + }, + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", + "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, "bit_size": 16, - "fieldset": "RCR_1CH_CMP" + "fieldset": "CR1_4CH" }, { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_TRIGDMA" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_4CH" + }, + { + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_4CH" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_4CH" + }, + { + "name": "CCMR_Output", + "description": "capture/compare mode register 1-2 (output mode)", + "array": { + "len": 2, + "stride": 4 + }, + "byte_offset": 24, + "fieldset": "CCMR_Output_4CH" }, { "name": "DCR", "description": "DMA control register", "byte_offset": 72, - "fieldset": "DCR_1CH_CMP" + "fieldset": "DCR_CCDMA" }, { "name": "DMAR", "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" + "byte_offset": 76 }, { "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_1CH_CMP" + "fieldset": "AF1_4CH" } ] }, - "block/TIM_2CH": { + "block/TIM_ADV1CH": { "extends": "TIM_1CH", - "description": "2-channel timers", + "description": "1-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_2CH" + "fieldset": "CR2_ADV1CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH" + "fieldset": "DIER_ADV1CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH" + "fieldset": "SR_ADV1CH" }, { "name": "EGR", @@ -182,79 +241,73 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_2CH" + "fieldset": "EGR_ADV1CH" }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CCER", + "description": "capture/compare enable register", + "byte_offset": 32, + "fieldset": "CCER_ADV1CH" }, { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "name": "RCR", + "description": "repetition counter register", + "byte_offset": 48, + "bit_size": 16, + "fieldset": "RCR_ADV1CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "BDTR", + "description": "break and dead-time register", + "byte_offset": 68, + "fieldset": "BDTR_ADV1CH" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 72, + "fieldset": "DCR_CCDMA" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_2CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 76 + }, + { + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_ADV1CH" } ] }, - "block/TIM_2CH_CMP": { - "extends": "TIM_1CH_CMP", + "block/TIM_ADV2CH": { + "extends": "TIM_ADV1CH", "description": "2-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH_CMP" + "fieldset": "CR2_ADV2CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_2CH" + "fieldset": "SMCR_TRIGDMA" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH_CMP" + "fieldset": "DIER_ADV2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH_CMP" + "fieldset": "SR_ADV2CH" }, { "name": "EGR", @@ -262,60 +315,12 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_2CH_CMP" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_1CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_1CH" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH_CMP" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_2CH" + "fieldset": "EGR_ADV2CH" } ] }, - "block/TIM_ADV": { - "extends": "TIM_2CH_CMP", + "block/TIM_ADV4CH": { + "extends": "TIM_ADV2CH", "description": "Advanced Control timers", "items": [ { @@ -323,49 +328,31 @@ "description": "control register 1", "byte_offset": 0, "bit_size": 16, - "fieldset": "CR1_GP16" + "fieldset": "CR1_4CH" }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_ADV" + "fieldset": "CR2_ADV4CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_ADV4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_ADV" + "fieldset": "DIER_ADV4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_ADV" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_ADV" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "fieldset": "SR_ADV4CH" }, { "name": "CCMR_Output", @@ -375,53 +362,26 @@ "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_ADV" + "fieldset": "CCMR_Output_4CH" }, { "name": "RCR", "description": "repetition counter register", "byte_offset": 48, "bit_size": 16, - "fieldset": "RCR_ADV" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_ADV" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76 + "fieldset": "RCR_ADV4CH" }, { - "name": "CCMR3", - "description": "capture/compare mode register 3", + "name": "CCMR3_Output", + "description": "capture/compare mode register 3 (output mode)", "byte_offset": 84, - "fieldset": "CCMR3_ADV" + "fieldset": "CCMR3_Output_ADV4CH" }, { "name": "CCR5", "description": "capture/compare register 5", "byte_offset": 88, - "fieldset": "CCR5_ADV" + "fieldset": "CCR5_ADV4CH" }, { "name": "CCR6", @@ -433,48 +393,36 @@ "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_ADV" + "fieldset": "AF1_ADV4CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_ADV" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_GP16" + "fieldset": "AF2_ADV4CH" } ] }, "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", + "extends": "TIM_CORE", "description": "Basic timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ + "fieldset": "CR2_MMS" + }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" + "fieldset": "DIER_UPDMA" } ] }, "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", + "description": "Virtual timer for common parts of all timers", "items": [ { "name": "CR1", @@ -523,137 +471,18 @@ } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", - "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, + "fieldset/AF1_4CH": { + "description": "alternate function register 1", + "fields": [ { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_GP16" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_GP16" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_GP16" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 72, - "fieldset": "DCR_1CH_CMP" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_GP16" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_GP16" - } - ] - }, - "block/TIM_GP32": { - "extends": "TIM_GP16", - "description": "General purpose 32-bit timers", - "items": [ - { - "name": "CNT", - "description": "counter", - "byte_offset": 36 - }, - { - "name": "ARR", - "description": "auto-reload register", - "byte_offset": 44 - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52 + "name": "ETRSEL", + "description": "etr_in source selection", + "bit_offset": 14, + "bit_size": 4 } ] }, - "fieldset/AF1_1CH_CMP": { + "fieldset/AF1_ADV1CH": { "description": "alternate function register 1", "fields": [ { @@ -698,19 +527,8 @@ } ] }, - "fieldset/AF1_ADV": { - "extends": "AF1_1CH_CMP", - "description": "alternate function register 1", - "fields": [ - { - "name": "ETRSEL", - "description": "etr_in source selection", - "bit_offset": 14, - "bit_size": 4 - } - ] - }, - "fieldset/AF1_GP16": { + "fieldset/AF1_ADV4CH": { + "extends": "AF1_ADV1CH", "description": "alternate function register 1", "fields": [ { @@ -721,7 +539,8 @@ } ] }, - "fieldset/AF2_ADV": { + "fieldset/AF2_ADV4CH": { + "extends": "AF2_CCDMA", "description": "alternate function register 2", "fields": [ { @@ -732,12 +551,12 @@ }, { "name": "BK2CMPE", - "description": "TIM_BRK2_CMPx (x=1-8) enable", + "description": "TIM_BRK2_CMPx (x=1-2) enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 8 + "len": 2, + "stride": 1 } }, { @@ -766,6 +585,10 @@ } ] }, + "fieldset/AF2_CCDMA": { + "description": "alternate function register 2", + "fields": [] + }, "fieldset/ARR_CORE": { "description": "auto-reload register", "fields": [ @@ -777,7 +600,7 @@ } ] }, - "fieldset/BDTR_1CH_CMP": { + "fieldset/BDTR_ADV1CH": { "description": "break and dead-time register", "fields": [ { @@ -809,21 +632,21 @@ }, { "name": "BKE", - "description": "Break x (x=1) enable", + "description": "Break x (x=1,2) enable", "bit_offset": 12, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 } }, { "name": "BKP", - "description": "Break x (x=1) polarity", + "description": "Break x (x=1,2) polarity", "bit_offset": 13, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 }, "enum": "BKP" @@ -840,44 +663,6 @@ "bit_offset": 15, "bit_size": 1 }, - { - "name": "BKF", - "description": "Break x (x=1) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 1, - "stride": 4 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/BDTR_ADV": { - "extends": "BDTR_1CH_CMP", - "description": "break and dead-time register", - "fields": [ - { - "name": "BKE", - "description": "Break x (x=1,2) enable", - "bit_offset": 12, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - } - }, - { - "name": "BKP", - "description": "Break x (x=1,2) polarity", - "bit_offset": 13, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - }, - "enum": "BKP" - }, { "name": "BKF", "description": "Break x (x=1,2) filter", @@ -896,376 +681,157 @@ "fields": [ { "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", + "description": "Capture/Compare x (x=1-4) output enable", "bit_offset": 0, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } }, { "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", + "description": "Capture/Compare x (x=1-4) output Polarity", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } }, { "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", + "description": "Capture/Compare x (x=1-4) output Polarity", "bit_offset": 3, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } } ] }, - "fieldset/CCER_1CH_CMP": { + "fieldset/CCER_ADV1CH": { "extends": "CCER_1CH", "description": "capture/compare enable register", "fields": [ { "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", + "description": "Capture/Compare x (x=1-3) complementary output enable", "bit_offset": 2, "bit_size": 1, "array": { - "len": 1, + "len": 3, "stride": 4 } } ] }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", + "fieldset/CCMR3_Output_ADV4CH": { + "description": "capture/compare mode register 3", "fields": [ { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, + "name": "OCFE", + "description": "Output compare x (x=5,6) fast enable", + "bit_offset": 2, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } }, { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, + "name": "OCPE", + "description": "Output compare x (x=5,6) preload enable", + "bit_offset": 3, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } }, { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, + "name": "OCM", + "description": "Output compare x (x=5,6) mode", + "bit_offset": 4, + "bit_size": 3, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "OCM" + }, + { + "name": "OCCE", + "description": "Output compare x (x=5,6) clear enable", + "bit_offset": 7, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } } ] }, - "fieldset/CCER_2CH_CMP": { - "extends": "CCER_2CH", - "description": "capture/compare enable register", + "fieldset/CCMR_Input_1CH": { + "description": "capture/compare mode register (input mode)", "fields": [ { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", + "name": "CCS", + "description": "Capture/Compare y selection", + "bit_offset": 0, + "bit_size": 2, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "CCMR_Input_CCS" + }, + { + "name": "ICPSC", + "description": "Input capture y prescaler", "bit_offset": 2, - "bit_size": 1, + "bit_size": 2, "array": { - "len": 1, - "stride": 4 + "len": 2, + "stride": 8 } + }, + { + "name": "ICF", + "description": "Input capture y filter", + "bit_offset": 4, + "bit_size": 4, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "FilterValue" } ] }, - "fieldset/CCER_ADV": { - "extends": "CCER_2CH_CMP", - "description": "capture/compare enable register", + "fieldset/CCMR_Output_1CH": { + "description": "capture/compare mode register (output mode)", "fields": [ { - "name": "CCE", - "description": "Capture/Compare x (x=1-6) output enable", + "name": "CCS", + "description": "Capture/Compare y selection", "bit_offset": 0, - "bit_size": 1, + "bit_size": 2, "array": { - "len": 6, - "stride": 4 - } + "len": 2, + "stride": 8 + }, + "enum": "CCMR_Output_CCS" }, { - "name": "CCP", - "description": "Capture/Compare x (x=1-6) output Polarity", - "bit_offset": 1, + "name": "OCFE", + "description": "Output compare y fast enable", + "bit_offset": 2, "bit_size": 1, "array": { - "len": 6, - "stride": 4 - } - }, - { - "name": "CCNE", - "description": "Capture/Compare x (x=1-3) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 3, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_GP16": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-4) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - } - ] - }, - "fieldset/CCMR3_ADV": { - "description": "capture/compare mode register 3", - "fields": [ - { - "name": "OCFE", - "description": "Output compare x (x=5,6) fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare x (x=5,6) preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare x (x=5,6) mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "OCM" - }, - { - "name": "OCCE", - "description": "Output compare x (x=5,6) clear enable", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 + "len": 2, + "stride": 8 } }, { @@ -1291,9 +857,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -1307,7 +873,7 @@ } ] }, - "fieldset/CCR5_ADV": { + "fieldset/CCR5_ADV4CH": { "extends": "CCR_1CH", "description": "capture/compare register 5", "fields": [ @@ -1365,6 +931,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -1407,34 +998,21 @@ } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "TI1S", + "description": "TI1 selection", + "bit_offset": 7, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "TI1S" } ] }, - "fieldset/CR2_1CH_CMP": { + "fieldset/CR2_ADV1CH": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -1449,36 +1027,30 @@ "bit_offset": 2, "bit_size": 1 }, - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" - }, { "name": "OIS", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x (x=1-6)", "bit_offset": 8, "bit_size": 1, "array": { - "len": 1, + "len": 6, "stride": 2 } }, { "name": "OISN", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x N x (x=1-4)", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 2 } } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_ADV2CH": { + "extends": "CR2_ADV1CH", "description": "control register 2", "fields": [ { @@ -1497,70 +1069,32 @@ } ] }, - "fieldset/CR2_2CH_CMP": { - "extends": "CR2_1CH_CMP", + "fieldset/CR2_ADV4CH": { + "extends": "CR2_ADV2CH", "description": "control register 2", "fields": [ { - "name": "MMS", - "description": "Master mode selection", - "bit_offset": 4, - "bit_size": 3, - "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" - }, - { - "name": "OIS", - "description": "Output Idle state x (x=1,2)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 2, - "stride": 2 - } + "name": "MMS2", + "description": "Master mode selection 2", + "bit_offset": 20, + "bit_size": 4, + "enum": "MMS2" } ] }, - "fieldset/CR2_ADV": { - "extends": "CR2_2CH_CMP", + "fieldset/CR2_CCDMA": { "description": "control register 2", "fields": [ { - "name": "OIS", - "description": "Output Idle state x (x=1-6)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 6, - "stride": 2 - } - }, - { - "name": "OISN", - "description": "Output Idle state x N x (x=1-4)", - "bit_offset": 9, + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, "bit_size": 1, - "array": { - "len": 4, - "stride": 2 - } - }, - { - "name": "MMS2", - "description": "Master mode selection 2", - "bit_offset": 20, - "bit_size": 4, - "enum": "MMS2" + "enum": "CCDS" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -1572,8 +1106,8 @@ } ] }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_2CH", "description": "control register 2", "fields": [ { @@ -1582,17 +1116,10 @@ "bit_offset": 3, "bit_size": 1, "enum": "CCDS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/DCR_1CH_CMP": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -1615,45 +1142,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/DIER_1CH_CMP": { - "extends": "DIER_1CH", - "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "COMIE", - "description": "COM interrupt enable", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIE", - "description": "Break interrupt enable", - "bit_offset": 7, - "bit_size": 1 - }, - { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1663,16 +1156,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -1681,32 +1164,13 @@ } ] }, - "fieldset/DIER_2CH_CMP": { - "extends": "DIER_1CH_CMP", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "COMDE", - "description": "COM DMA request enable", - "bit_offset": 13, - "bit_size": 1 - }, - { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, - "bit_size": 1 - } - ] + "fields": [] }, - "fieldset/DIER_ADV": { - "extends": "DIER_2CH_CMP", + "fieldset/DIER_ADV1CH": { + "extends": "DIER_UPDMA", "description": "DMA/Interrupt enable register", "fields": [ { @@ -1719,6 +1183,18 @@ "stride": 1 } }, + { + "name": "COMIE", + "description": "COM interrupt enable", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "BIE", + "description": "Break interrupt enable", + "bit_offset": 7, + "bit_size": 1 + }, { "name": "CCDE", "description": "Capture/Compare x (x=1-4) DMA request enable", @@ -1731,152 +1207,100 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_ADV2CH": { + "extends": "DIER_ADV1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, + "name": "COMDE", + "description": "COM DMA request enable", + "bit_offset": 13, "bit_size": 1 - } - ] - }, - "fieldset/DIER_CORE": { - "description": "DMA/Interrupt enable register", - "fields": [ + }, { - "name": "UIE", - "description": "Update interrupt enable", - "bit_offset": 0, + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, "bit_size": 1 } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_ADV4CH": { + "extends": "DIER_ADV2CH", + "description": "DMA/Interrupt enable register", + "fields": [] + }, + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, { "name": "CCDE", "description": "Capture/Compare x (x=1-4) DMA request enable", "bit_offset": 9, "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, - "bit_size": 1 + "array": { + "len": 4, + "stride": 1 + } } ] }, - "fieldset/DMAR_GP16": { - "description": "DMA address for full transfer", + "fieldset/DIER_CORE": { + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "DMAB", - "description": "DMA register for burst accesses", + "name": "UIE", + "description": "Update interrupt enable", "bit_offset": 0, - "bit_size": 16 + "bit_size": 1 } ] }, - "fieldset/EGR_1CH": { - "extends": "EGR_CORE", - "description": "event generation register", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, + "bit_size": 1 } ] }, - "fieldset/EGR_1CH_CMP": { - "extends": "EGR_1CH", - "description": "event generation register", + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "COMG", - "description": "Capture/Compare control update generation", - "bit_offset": 5, + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, "bit_size": 1 - }, - { - "name": "BG", - "description": "Break x (x=1) generation", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } } ] }, - "fieldset/EGR_2CH": { - "extends": "EGR_1CH", + "fieldset/EGR_1CH": { + "extends": "EGR_CORE", "description": "event generation register", "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 2, + "len": 4, "stride": 1 } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, - "bit_size": 1 } ] }, - "fieldset/EGR_2CH_CMP": { - "extends": "EGR_1CH_CMP", + "fieldset/EGR_2CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1,2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -1885,19 +1309,15 @@ } ] }, - "fieldset/EGR_ADV": { - "extends": "EGR_2CH_CMP", + "fieldset/EGR_ADV1CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } + "name": "COMG", + "description": "Capture/Compare control update generation", + "bit_offset": 5, + "bit_size": 1 }, { "name": "BG", @@ -1911,40 +1331,30 @@ } ] }, - "fieldset/EGR_CORE": { + "fieldset/EGR_ADV2CH": { + "extends": "EGR_ADV1CH", "description": "event generation register", "fields": [ { - "name": "UG", - "description": "Update generation", - "bit_offset": 0, + "name": "TG", + "description": "Trigger generation", + "bit_offset": 6, "bit_size": 1 } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", + "fieldset/EGR_CORE": { "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "UG", + "description": "Update generation", + "bit_offset": 0, "bit_size": 1 } ] }, - "fieldset/RCR_1CH_CMP": { + "fieldset/RCR_ADV1CH": { "description": "repetition counter register", "fields": [ { @@ -1955,7 +1365,7 @@ } ] }, - "fieldset/RCR_ADV": { + "fieldset/RCR_ADV4CH": { "description": "repetition counter register", "fields": [ { @@ -2010,8 +1420,8 @@ } ] }, - "fieldset/SMCR_GP16": { - "extends": "SMCR_2CH", + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", "description": "slave mode control register", "fields": [ { @@ -2043,78 +1453,73 @@ } ] }, + "fieldset/SMCR_ADV4CH": { + "extends": "SMCR_4CH", + "description": "slave mode control register", + "fields": [] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [] + }, "fieldset/SR_1CH": { "extends": "SR_CORE", "description": "status register", "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } ] }, - "fieldset/SR_1CH_CMP": { + "fieldset/SR_2CH": { "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "COMIF", - "description": "COM interrupt flag", - "bit_offset": 5, + "name": "TIF", + "description": "Trigger interrupt flag", + "bit_offset": 6, "bit_size": 1 - }, - { - "name": "BIF", - "description": "Break x (x=1) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } } ] }, - "fieldset/SR_2CH": { + "fieldset/SR_4CH": { + "extends": "SR_2CH", + "description": "status register", + "fields": [] + }, + "fieldset/SR_ADV1CH": { "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, + "name": "COMIF", + "description": "COM interrupt flag", + "bit_offset": 5, "bit_size": 1 }, { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, + "name": "BIF", + "description": "Break x (x=1,2) interrupt flag", + "bit_offset": 7, "bit_size": 1, "array": { "len": 2, @@ -2123,72 +1528,22 @@ } ] }, - "fieldset/SR_2CH_CMP": { - "extends": "SR_1CH_CMP", + "fieldset/SR_ADV2CH": { + "extends": "SR_ADV1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1,2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1,2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, - "fieldset/SR_ADV": { - "extends": "SR_2CH_CMP", + "fieldset/SR_ADV4CH": { + "extends": "SR_ADV2CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "BIF", - "description": "Break x (x=1,2) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "SBIF", "description": "System break interrupt flag", @@ -2220,70 +1575,7 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - } - ] - }, "fieldset/TISEL_1CH": { - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_2CH": { - "extends": "TISEL_1CH", - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1-2) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_GP16": { "description": "input selection register", "fields": [ { diff --git a/data/registers/timer_v2.json b/data/registers/timer_v2.json index 918d05e..fde1969 100644 --- a/data/registers/timer_v2.json +++ b/data/registers/timer_v2.json @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -68,9 +68,9 @@ }, { "name": "CCR_DITHER", - "description": "capture/compare register x (x=1) (Dither mode enabled)", + "description": "capture/compare register x (x=1-4) (dither mode enabled)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -89,90 +89,17 @@ } ] }, - "block/TIM_1CH_CMP": { + "block/TIM_2CH": { "extends": "TIM_1CH", - "description": "1-channel with one complementary output timers", + "description": "2-channel timers", "items": [ { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_1CH_CMP" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_1CH_CMP" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_1CH_CMP" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_1CH_CMP" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_1CH_CMP" - }, - { - "name": "RCR", - "description": "repetition counter register", - "byte_offset": 48, + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, "bit_size": 16, - "fieldset": "RCR_1CH_CMP" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" - }, - { - "name": "DTR2", - "description": "break and dead-time register", - "byte_offset": 84, - "fieldset": "DTR2_1CH_CMP" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_1CH_CMP" - }, - { - "name": "AF2", - "description": "alternate function register 2", - "byte_offset": 100, - "fieldset": "AF2_1CH_CMP" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 988, - "fieldset": "DCR_1CH_CMP" + "fieldset": "CR1_2CH" }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 992 - } - ] - }, - "block/TIM_2CH": { - "extends": "TIM_1CH", - "description": "2-channel timers", - "items": [ { "name": "CR2", "description": "control register 2", @@ -204,191 +131,153 @@ "access": "Write", "bit_size": 16, "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_32BIT": { + "extends": "TIM_4CH", + "description": "General purpose 32-bit timers", + "items": [ + { + "name": "CNT", + "description": "counter", + "byte_offset": 36 }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CNT_DITHER", + "description": "counter (dither mode enabled)", + "byte_offset": 36, + "fieldset": "CNT_DITHER_32BIT" }, { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "name": "ARR", + "description": "auto-reload register", + "byte_offset": 44 }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "ARR_DITHER", + "description": "auto-reload register (dither mode enabled)", + "byte_offset": 44, + "fieldset": "ARR_DITHER_32BIT" }, { "name": "CCR", - "description": "capture/compare register x (x=1-2) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 2, + "len": 4, "stride": 4 }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "byte_offset": 52 }, { "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-2) (Dither mode enabled)", + "description": "capture/compare register x (x=1-4) (dither mode enabled)", "array": { - "len": 2, + "len": 4, "stride": 4 }, "byte_offset": 52, - "fieldset": "CCR_DITHER_1CH" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_2CH" + "fieldset": "CCR_DITHER_32BIT" } ] }, - "block/TIM_2CH_CMP": { - "extends": "TIM_1CH_CMP", - "description": "2-channel with one complementary output timers", + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_4CH" + }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH_CMP" + "fieldset": "CR2_TRIGDMA" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_2CH_CMP" + "fieldset": "SMCR_4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH_CMP" + "fieldset": "DIER_4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH_CMP" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_2CH_CMP" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_1CH" + "fieldset": "SR_4CH" }, { "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", + "description": "capture/compare mode register 1-2 (output mode)", "array": { "len": 2, "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_1CH" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH_CMP" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 988, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 992 }, { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-2) (Dither mode enabled)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_DITHER_1CH" + "name": "ECR", + "description": "encoder control register", + "byte_offset": 88, + "fieldset": "ECR_4CH" }, { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_4CH" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_2CH" + "name": "AF2", + "description": "alternate function register 2", + "byte_offset": 100, + "fieldset": "AF2_CCDMA" } ] }, - "block/TIM_ADV": { - "extends": "TIM_2CH_CMP", - "description": "Advanced Control timers", + "block/TIM_ADV1CH": { + "extends": "TIM_1CH", + "description": "1-channel with one complementary output timers", "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_ADV" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_ADV" + "fieldset": "CR2_ADV1CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_ADV" + "fieldset": "DIER_ADV1CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_ADV" + "fieldset": "SR_ADV1CH" }, { "name": "EGR", @@ -396,158 +285,85 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_ADV" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" + "fieldset": "EGR_ADV1CH" }, { "name": "CCER", "description": "capture/compare enable register", "byte_offset": 32, - "fieldset": "CCER_ADV" + "fieldset": "CCER_ADV1CH" }, { "name": "RCR", "description": "repetition counter register", "byte_offset": 48, "bit_size": 16, - "fieldset": "RCR_ADV" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "ECR", - "description": "encoder control register", - "byte_offset": 88, - "fieldset": "ECR_GP16" + "fieldset": "RCR_ADV1CH" }, { "name": "BDTR", "description": "break and dead-time register", "byte_offset": 68, - "fieldset": "BDTR_ADV" + "fieldset": "BDTR_ADV1CH" }, { - "name": "CCR5", - "description": "capture/compare register 5 (Dither mode disabled)", - "byte_offset": 72, - "fieldset": "CCR5_ADV" + "name": "DTR2", + "description": "break and dead-time register", + "byte_offset": 84, + "fieldset": "DTR2_ADV1CH" }, { - "name": "CCR5_DITHER", - "description": "capture/compare register 5 (Dither mode enabled)", - "byte_offset": 72, - "fieldset": "CCR5_DITHER_ADV" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 988, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR6", - "description": "capture/compare register 6 (Dither mode disabled)", - "byte_offset": 76, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 992 }, { - "name": "CCR6_DITHER", - "description": "capture/compare register 6 (Dither mode enabled)", - "byte_offset": 76, - "fieldset": "CCR_DITHER_1CH" - }, - { - "name": "CCMR3", - "description": "capture/compare mode register 3", - "byte_offset": 80, - "fieldset": "CCMR3_ADV" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_ADV" + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_ADV1CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_ADV" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_GP16" + "fieldset": "AF2_CCDMA" } ] }, - "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", - "description": "Basic timers", + "block/TIM_ADV2CH": { + "extends": "TIM_ADV1CH", + "description": "2-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" - } - ] - }, - "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", - "items": [ + "fieldset": "CR2_ADV2CH" + }, { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_CORE" + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_TRIGDMA" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_CORE" + "fieldset": "DIER_ADV2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_CORE" + "fieldset": "SR_ADV2CH" }, { "name": "EGR", @@ -555,86 +371,44 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_CORE" - }, - { - "name": "CNT", - "description": "counter", - "byte_offset": 36, - "fieldset": "CNT_CORE" - }, - { - "name": "PSC", - "description": "prescaler", - "byte_offset": 40, - "bit_size": 16 - }, - { - "name": "ARR", - "description": "auto-reload register (Dither mode disabled)", - "byte_offset": 44, - "fieldset": "ARR_CORE" - }, - { - "name": "ARR_DITHER", - "description": "auto-reload register (Dither mode enabled)", - "byte_offset": 44, - "fieldset": "ARR_DITHER_CORE" + "fieldset": "EGR_ADV2CH" } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", + "block/TIM_ADV4CH": { + "extends": "TIM_ADV2CH", + "description": "Advanced Control timers", "items": [ { "name": "CR1", "description": "control register 1", "byte_offset": 0, "bit_size": 16, - "fieldset": "CR1_GP16" + "fieldset": "CR1_4CH" }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_GP16" + "fieldset": "CR2_ADV4CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_ADV4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_GP16" + "fieldset": "DIER_ADV4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "fieldset": "SR_ADV4CH" }, { "name": "CCMR_Output", @@ -644,119 +418,151 @@ "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" + "name": "RCR", + "description": "repetition counter register", + "byte_offset": 48, + "bit_size": 16, + "fieldset": "RCR_ADV4CH" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-4) (Dither mode disabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, + "name": "CCMR3_Output", + "description": "capture/compare mode register 3 (output mode)", + "byte_offset": 80, + "fieldset": "CCMR3_Output_ADV4CH" + }, + { + "name": "CCR5", + "description": "capture/compare register 5", + "byte_offset": 72, + "fieldset": "CCR5_ADV4CH" + }, + { + "name": "CCR5_DITHER", + "description": "capture/compare register 5 (dither mode enabled)", + "byte_offset": 72, + "fieldset": "CCR5_DITHER_ADV4CH" + }, + { + "name": "CCR6", + "description": "capture/compare register 6", + "byte_offset": 76, "fieldset": "CCR_1CH" }, { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-4) (Dither mode enabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, + "name": "CCR6_DITHER", + "description": "capture/compare register 6 (dither mode enabled)", + "byte_offset": 76, "fieldset": "CCR_DITHER_1CH" }, { "name": "ECR", "description": "encoder control register", "byte_offset": 88, - "fieldset": "ECR_GP16" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 988, - "fieldset": "DCR_1CH_CMP" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 992 + "fieldset": "ECR_4CH" }, { "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_GP16" + "fieldset": "AF1_ADV4CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_1CH_CMP" + "fieldset": "AF2_ADV4CH" + } + ] + }, + "block/TIM_BASIC": { + "extends": "TIM_CORE", + "description": "Basic timers", + "items": [ + { + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_MMS" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_GP16" + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_UPDMA" } ] }, - "block/TIM_GP32": { - "extends": "TIM_GP16", - "description": "General purpose 32-bit timers", + "block/TIM_CORE": { + "description": "Virtual timer for common parts of all timers", "items": [ { - "name": "CNT", - "description": "counter (Dither mode disabled)", - "byte_offset": 36 + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_CORE" }, { - "name": "CNT_DITHER", - "description": "counter (Dither mode enbled)", + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_CORE" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_CORE" + }, + { + "name": "EGR", + "description": "event generation register", + "byte_offset": 20, + "access": "Write", + "bit_size": 16, + "fieldset": "EGR_CORE" + }, + { + "name": "CNT", + "description": "counter", "byte_offset": 36, - "fieldset": "CNT_DITHER_GP32" + "fieldset": "CNT_CORE" }, { - "name": "ARR", - "description": "auto-reload register (Dither mode disabled)", - "byte_offset": 44 + "name": "PSC", + "description": "prescaler", + "byte_offset": 40, + "bit_size": 16 }, { - "name": "ARR_DITHER", - "description": "auto-reload register (Dither mode enabled)", + "name": "ARR", + "description": "auto-reload register", "byte_offset": 44, - "fieldset": "ARR_DITHER_GP32" + "fieldset": "ARR_CORE" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-4) (Dither mode disabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52 - }, + "name": "ARR_DITHER", + "description": "auto-reload register (dither mode enabled)", + "byte_offset": 44, + "fieldset": "ARR_DITHER_CORE" + } + ] + }, + "fieldset/AF1_4CH": { + "description": "alternate function register 1", + "fields": [ { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-4) (Dither mode enabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_DITHER_GP32" + "name": "ETRSEL", + "description": "etr_in source selection", + "bit_offset": 14, + "bit_size": 4 } ] }, - "fieldset/AF1_1CH_CMP": { + "fieldset/AF1_ADV1CH": { "description": "alternate function register 1", "fields": [ { @@ -784,7 +590,7 @@ }, { "name": "BKCMPP", - "description": "TIM_BRK_CMPx (x=1-4) input polarity", + "description": "TIM_BRK_CMPx (x=1-3) input polarity", "bit_offset": 10, "bit_size": 1, "array": { @@ -795,19 +601,8 @@ } ] }, - "fieldset/AF1_ADV": { - "extends": "AF1_1CH_CMP", - "description": "alternate function register 1", - "fields": [ - { - "name": "ETRSEL", - "description": "etr_in source selection", - "bit_offset": 14, - "bit_size": 4 - } - ] - }, - "fieldset/AF1_GP16": { + "fieldset/AF1_ADV4CH": { + "extends": "AF1_ADV1CH", "description": "alternate function register 1", "fields": [ { @@ -818,19 +613,8 @@ } ] }, - "fieldset/AF2_1CH_CMP": { - "description": "alternate function register 2", - "fields": [ - { - "name": "OCRSEL", - "description": "ocref_clr source selection", - "bit_offset": 16, - "bit_size": 3 - } - ] - }, - "fieldset/AF2_ADV": { - "extends": "AF2_1CH_CMP", + "fieldset/AF2_ADV4CH": { + "extends": "AF2_CCDMA", "description": "alternate function register 2", "fields": [ { @@ -869,8 +653,19 @@ } ] }, + "fieldset/AF2_CCDMA": { + "description": "alternate function register 2", + "fields": [ + { + "name": "OCRSEL", + "description": "ocref_clr source selection", + "bit_offset": 16, + "bit_size": 3 + } + ] + }, "fieldset/ARR_CORE": { - "description": "auto-reload register (Dither mode disabled)", + "description": "auto-reload register", "fields": [ { "name": "ARR", @@ -880,7 +675,7 @@ } ] }, - "fieldset/ARR_DITHER_CORE": { + "fieldset/ARR_DITHER_32BIT": { "description": "auto-reload register (Dither mode enabled)", "fields": [ { @@ -893,11 +688,11 @@ "name": "ARR", "description": "Auto-reload value", "bit_offset": 4, - "bit_size": 16 + "bit_size": 28 } ] }, - "fieldset/ARR_DITHER_GP32": { + "fieldset/ARR_DITHER_CORE": { "description": "auto-reload register (Dither mode enabled)", "fields": [ { @@ -910,11 +705,11 @@ "name": "ARR", "description": "Auto-reload value", "bit_offset": 4, - "bit_size": 28 + "bit_size": 16 } ] }, - "fieldset/BDTR_1CH_CMP": { + "fieldset/BDTR_ADV1CH": { "description": "break and dead-time register", "fields": [ { @@ -946,21 +741,21 @@ }, { "name": "BKE", - "description": "Break x (x=1) enable", + "description": "Break x (x=1,2) enable", "bit_offset": 12, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 } }, { "name": "BKP", - "description": "Break x (x=1) polarity", + "description": "Break x (x=1,2) polarity", "bit_offset": 13, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 }, "enum": "BKP" @@ -978,250 +773,41 @@ "bit_size": 1 }, { - "name": "BKF", - "description": "Break x (x=1) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 1, - "stride": 4 - }, - "enum": "FilterValue" - }, - { - "name": "BKDSRM", - "description": "Break x (x=1) Disarm", - "bit_offset": 26, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - }, - "enum": "BKDSRM" - }, - { - "name": "BKBID", - "description": "Break x (x=1) bidirectional", - "bit_offset": 28, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - }, - "enum": "BKBID" - } - ] - }, - "fieldset/BDTR_ADV": { - "extends": "BDTR_1CH_CMP", - "description": "break and dead-time register", - "fields": [ - { - "name": "BKE", - "description": "Break x (x=1,2) enable", - "bit_offset": 12, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - } - }, - { - "name": "BKP", - "description": "Break x (x=1,2) polarity", - "bit_offset": 13, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - }, - "enum": "BKP" - }, - { - "name": "BKF", - "description": "Break x (x=1,2) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 2, - "stride": 4 - }, - "enum": "FilterValue" - }, - { - "name": "BKDSRM", - "description": "Break x (x=1,2) Disarm", - "bit_offset": 26, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - }, - "enum": "BKDSRM" - }, - { - "name": "BKBID", - "description": "Break x (x=1,2) bidirectional", - "bit_offset": 28, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - }, - "enum": "BKBID" - } - ] - }, - "fieldset/CCER_1CH": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_1CH_CMP": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH_CMP": { - "extends": "CCER_2CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_ADV": { - "extends": "CCER_2CH_CMP", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-6) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 6, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-6) output Polarity", - "bit_offset": 1, - "bit_size": 1, + "name": "BKF", + "description": "Break x (x=1,2) filter", + "bit_offset": 16, + "bit_size": 4, "array": { - "len": 6, + "len": 2, "stride": 4 - } + }, + "enum": "FilterValue" }, { - "name": "CCNE", - "description": "Capture/Compare x (x=1-4) complementary output enable", - "bit_offset": 2, + "name": "BKDSRM", + "description": "Break x (x=1,2) Disarm", + "bit_offset": 26, "bit_size": 1, "array": { - "len": 4, - "stride": 4 - } + "len": 2, + "stride": 1 + }, + "enum": "BKDSRM" }, { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, + "name": "BKBID", + "description": "Break x (x=1,2) bidirectional", + "bit_offset": 28, "bit_size": 1, "array": { - "len": 4, - "stride": 4 - } + "len": 2, + "stride": 1 + }, + "enum": "BKBID" } ] }, - "fieldset/CCER_GP16": { + "fieldset/CCER_1CH": { "description": "capture/compare enable register", "fields": [ { @@ -1256,7 +842,23 @@ } ] }, - "fieldset/CCMR3_ADV": { + "fieldset/CCER_ADV1CH": { + "extends": "CCER_1CH", + "description": "capture/compare enable register", + "fields": [ + { + "name": "CCNE", + "description": "Capture/Compare x (x=1-4) complementary output enable", + "bit_offset": 2, + "bit_size": 1, + "array": { + "len": 4, + "stride": 4 + } + } + ] + }, + "fieldset/CCMR3_Output_ADV4CH": { "description": "capture/compare mode register 3", "fields": [ { @@ -1312,45 +914,7 @@ ] }, "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", + "description": "capture/compare mode register (input mode)", "fields": [ { "name": "CCS", @@ -1387,64 +951,7 @@ ] }, "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": [ - { - "start": 4, - "end": 6 - }, - { - "start": 16, - "end": 16 - } - ], - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "CCS", @@ -1499,9 +1006,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -1515,9 +1022,9 @@ } ] }, - "fieldset/CCR5_ADV": { + "fieldset/CCR5_ADV4CH": { "extends": "CCR_1CH", - "description": "capture/compare register 5 (Dither mode disabled)", + "description": "capture/compare register 5", "fields": [ { "name": "GC5C", @@ -1532,9 +1039,9 @@ } ] }, - "fieldset/CCR5_DITHER_ADV": { + "fieldset/CCR5_DITHER_ADV4CH": { "extends": "CCR_DITHER_1CH", - "description": "capture/compare register 5 (Dither mode enabled)", + "description": "capture/compare register 5", "fields": [ { "name": "GC5C", @@ -1550,7 +1057,7 @@ ] }, "fieldset/CCR_1CH": { - "description": "capture/compare register x (x=1-4,6) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4,6)", "fields": [ { "name": "CCR", @@ -1577,7 +1084,7 @@ } ] }, - "fieldset/CCR_DITHER_GP32": { + "fieldset/CCR_DITHER_32BIT": { "description": "capture/compare register x (x=1-4,6) (Dither mode enabled)", "fields": [ { @@ -1611,8 +1118,8 @@ } ] }, - "fieldset/CNT_DITHER_GP32": { - "description": "counter (Dither mode enabled)", + "fieldset/CNT_DITHER_32BIT": { + "description": "counter (dither mode enabled)", "fields": [ { "name": "CNT", @@ -1641,6 +1148,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -1689,34 +1221,21 @@ } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "TI1S", + "description": "TI1 selection", + "bit_offset": 7, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "TI1S" } ] }, - "fieldset/CR2_1CH_CMP": { + "fieldset/CR2_ADV1CH": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -1731,36 +1250,30 @@ "bit_offset": 2, "bit_size": 1 }, - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" - }, { "name": "OIS", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x (x=1-6)", "bit_offset": 8, "bit_size": 1, "array": { - "len": 1, + "len": 6, "stride": 2 } }, { "name": "OISN", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x N x (x=1-4)", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 2 } } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_ADV2CH": { + "extends": "CR2_ADV1CH", "description": "control register 2", "fields": [ { @@ -1788,79 +1301,32 @@ } ] }, - "fieldset/CR2_2CH_CMP": { - "extends": "CR2_1CH_CMP", + "fieldset/CR2_ADV4CH": { + "extends": "CR2_ADV2CH", "description": "control register 2", "fields": [ { - "name": "MMS", - "description": "Master mode selection", - "bit_offset": [ - { - "start": 4, - "end": 6 - }, - { - "start": 25, - "end": 25 - } - ], + "name": "MMS2", + "description": "Master mode selection 2", + "bit_offset": 20, "bit_size": 4, - "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" - }, - { - "name": "OIS", - "description": "Output Idle state x (x=1,2)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 2, - "stride": 2 - } + "enum": "MMS2" } ] }, - "fieldset/CR2_ADV": { - "extends": "CR2_2CH_CMP", + "fieldset/CR2_CCDMA": { "description": "control register 2", "fields": [ { - "name": "OIS", - "description": "Output Idle state x (x=1-6)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 6, - "stride": 2 - } - }, - { - "name": "OISN", - "description": "Output Idle state x N x (x=1-4)", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 2 - } - }, - { - "name": "MMS2", - "description": "Master mode selection 2", - "bit_offset": 20, - "bit_size": 4, - "enum": "MMS2" + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, + "bit_size": 1, + "enum": "CCDS" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -1881,8 +1347,8 @@ } ] }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_2CH", "description": "control register 2", "fields": [ { @@ -1891,17 +1357,10 @@ "bit_offset": 3, "bit_size": 1, "enum": "CCDS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/DCR_1CH_CMP": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -1931,45 +1390,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/DIER_1CH_CMP": { - "extends": "DIER_1CH", - "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "COMIE", - "description": "COM interrupt enable", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIE", - "description": "Break interrupt enable", - "bit_offset": 7, - "bit_size": 1 - }, - { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1979,16 +1404,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -1997,32 +1412,38 @@ } ] }, - "fieldset/DIER_2CH_CMP": { - "extends": "DIER_1CH_CMP", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, + "name": "IDXIE", + "description": "Index interrupt enable", + "bit_offset": 20, "bit_size": 1 }, { - "name": "COMDE", - "description": "COM DMA request enable", - "bit_offset": 13, + "name": "DIRIE", + "description": "Direction change interrupt enable", + "bit_offset": 21, "bit_size": 1 }, { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, + "name": "IERRIE", + "description": "Index error interrupt enable", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "TERRIE", + "description": "Transition error interrupt enable", + "bit_offset": 23, "bit_size": 1 } ] }, - "fieldset/DIER_ADV": { - "extends": "DIER_2CH_CMP", + "fieldset/DIER_ADV1CH": { + "extends": "DIER_UPDMA", "description": "DMA/Interrupt enable register", "fields": [ { @@ -2035,6 +1456,12 @@ "stride": 1 } }, + { + "name": "COMIE", + "description": "COM interrupt enable", + "bit_offset": 5, + "bit_size": 1 + }, { "name": "BIE", "description": "Break interrupt enable", @@ -2043,14 +1470,38 @@ }, { "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", + "description": "Capture/Compare x (x=1-4) DMA request enable", "bit_offset": 9, "bit_size": 1, "array": { "len": 4, "stride": 1 } + } + ] + }, + "fieldset/DIER_ADV2CH": { + "extends": "DIER_ADV1CH", + "description": "DMA/Interrupt enable register", + "fields": [ + { + "name": "COMDE", + "description": "COM DMA request enable", + "bit_offset": 13, + "bit_size": 1 }, + { + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, + "bit_size": 1 + } + ] + }, + "fieldset/DIER_ADV4CH": { + "extends": "DIER_ADV2CH", + "description": "DMA/Interrupt enable register", + "fields": [ { "name": "IDXIE", "description": "Index interrupt enable", @@ -2077,15 +1528,19 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 + "name": "CCDE", + "description": "Capture/Compare x (x=1-4) DMA request enable", + "bit_offset": 9, + "bit_size": 1, + "array": { + "len": 4, + "stride": 1 + } } ] }, @@ -2100,69 +1555,31 @@ } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1-4) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "TDE", "description": "Trigger DMA request enable", "bit_offset": 14, "bit_size": 1 - }, - { - "name": "IDXIE", - "description": "Index interrupt enable", - "bit_offset": 20, - "bit_size": 1 - }, - { - "name": "DIRIE", - "description": "Direction change interrupt enable", - "bit_offset": 21, - "bit_size": 1 - }, - { - "name": "IERRIE", - "description": "Index error interrupt enable", - "bit_offset": 22, - "bit_size": 1 - }, + } + ] + }, + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", + "fields": [ { - "name": "TERRIE", - "description": "Transition error interrupt enable", - "bit_offset": 23, + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, "bit_size": 1 } ] }, - "fieldset/DTR2_1CH_CMP": { + "fieldset/DTR2_ADV1CH": { "description": "deadtime register 2", "fields": [ { @@ -2186,7 +1603,7 @@ } ] }, - "fieldset/ECR_GP16": { + "fieldset/ECR_4CH": { "description": "encoder control register", "fields": [ { @@ -2242,33 +1659,11 @@ "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/EGR_1CH_CMP": { - "extends": "EGR_1CH", - "description": "event generation register", - "fields": [ - { - "name": "COMG", - "description": "Capture/Compare control update generation", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BG", - "description": "Break x (x=1) generation", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -2278,16 +1673,6 @@ "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -2296,41 +1681,15 @@ } ] }, - "fieldset/EGR_2CH_CMP": { - "extends": "EGR_1CH_CMP", + "fieldset/EGR_ADV1CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1,2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "COMG", + "description": "Capture/Compare control update generation", + "bit_offset": 5, "bit_size": 1 - } - ] - }, - "fieldset/EGR_ADV": { - "extends": "EGR_2CH_CMP", - "description": "event generation register", - "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } }, { "name": "BG", @@ -2344,40 +1703,30 @@ } ] }, - "fieldset/EGR_CORE": { + "fieldset/EGR_ADV2CH": { + "extends": "EGR_ADV1CH", "description": "event generation register", "fields": [ { - "name": "UG", - "description": "Update generation", - "bit_offset": 0, + "name": "TG", + "description": "Trigger generation", + "bit_offset": 6, "bit_size": 1 } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", + "fieldset/EGR_CORE": { "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "UG", + "description": "Update generation", + "bit_offset": 0, "bit_size": 1 } ] }, - "fieldset/RCR_1CH_CMP": { + "fieldset/RCR_ADV1CH": { "description": "repetition counter register", "fields": [ { @@ -2388,7 +1737,7 @@ } ] }, - "fieldset/RCR_ADV": { + "fieldset/RCR_ADV4CH": { "description": "repetition counter register", "fields": [ { @@ -2443,29 +1792,10 @@ } ] }, - "fieldset/SMCR_2CH_CMP": { - "extends": "SMCR_2CH", - "description": "slave mode control register", - "fields": [ - { - "name": "SMSPE", - "description": "SMS preload enable", - "bit_offset": 24, - "bit_size": 1 - } - ] - }, - "fieldset/SMCR_ADV": { - "extends": "SMCR_2CH_CMP", + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", "description": "slave mode control register", "fields": [ - { - "name": "OCCS", - "description": "OCREF clear selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "OCCS" - }, { "name": "ETF", "description": "External trigger filter", @@ -2502,49 +1832,28 @@ } ] }, - "fieldset/SMCR_GP16": { - "extends": "SMCR_2CH", + "fieldset/SMCR_ADV4CH": { + "extends": "SMCR_4CH", "description": "slave mode control register", "fields": [ { - "name": "ETF", - "description": "External trigger filter", - "bit_offset": 8, - "bit_size": 4, - "enum": "FilterValue" - }, - { - "name": "ETPS", - "description": "External trigger prescaler", - "bit_offset": 12, - "bit_size": 2, - "enum": "ETPS" - }, - { - "name": "ECE", - "description": "External clock mode 2 enable", - "bit_offset": 14, - "bit_size": 1 - }, - { - "name": "ETP", - "description": "External trigger polarity", - "bit_offset": 15, + "name": "OCCS", + "description": "OCREF clear selection", + "bit_offset": 3, "bit_size": 1, - "enum": "ETP" - }, + "enum": "OCCS" + } + ] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [ { "name": "SMSPE", "description": "SMS preload enable", "bit_offset": 24, "bit_size": 1 - }, - { - "name": "SMSPS", - "description": "SMS preload source", - "bit_offset": 25, - "bit_size": 1, - "enum": "SMSPS" } ] }, @@ -2554,43 +1863,21 @@ "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/SR_1CH_CMP": { - "extends": "SR_1CH", - "description": "status register", - "fields": [ - { - "name": "COMIF", - "description": "COM interrupt flag", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIF", - "description": "Break x (x=1) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -2600,79 +1887,53 @@ "extends": "SR_1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, - "fieldset/SR_2CH_CMP": { - "extends": "SR_1CH_CMP", + "fieldset/SR_4CH": { + "extends": "SR_2CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1,2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } + "name": "IDXIF", + "description": "Index interrupt flag", + "bit_offset": 20, + "bit_size": 1 }, { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, + "name": "DIRIF", + "description": "Direction change interrupt flag", + "bit_offset": 21, "bit_size": 1 }, { - "name": "CCOF", - "description": "Capture/Compare x (x=1,2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } + "name": "IERRIF", + "description": "Index error interrupt flag", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "TERRIF", + "description": "Transition error interrupt flag", + "bit_offset": 23, + "bit_size": 1 } ] }, - "fieldset/SR_ADV": { - "extends": "SR_2CH_CMP", + "fieldset/SR_ADV1CH": { + "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } + "name": "COMIF", + "description": "COM interrupt flag", + "bit_offset": 5, + "bit_size": 1 }, { "name": "BIF", @@ -2683,17 +1944,25 @@ "len": 2, "stride": 1 } - }, + } + ] + }, + "fieldset/SR_ADV2CH": { + "extends": "SR_ADV1CH", + "description": "status register", + "fields": [ { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, + "name": "TIF", + "description": "Trigger interrupt flag", + "bit_offset": 6, + "bit_size": 1 + } + ] + }, + "fieldset/SR_ADV4CH": { + "extends": "SR_ADV2CH", + "description": "status register", + "fields": [ { "name": "SBIF", "description": "System break interrupt flag", @@ -2749,94 +2018,7 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "IDXIF", - "description": "Index interrupt flag", - "bit_offset": 20, - "bit_size": 1 - }, - { - "name": "DIRIF", - "description": "Direction change interrupt flag", - "bit_offset": 21, - "bit_size": 1 - }, - { - "name": "IERRIF", - "description": "Index error interrupt flag", - "bit_offset": 22, - "bit_size": 1 - }, - { - "name": "TERRIF", - "description": "Transition error interrupt flag", - "bit_offset": 23, - "bit_size": 1 - } - ] - }, "fieldset/TISEL_1CH": { - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_2CH": { - "extends": "TISEL_1CH", - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1-2) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_GP16": { "description": "input selection register", "fields": [ {