block/INTERRUPT_CORE0: description: Interrupt Controller (Core 0). items: - name: MAC_INTR_MAP description: mac intr map register. byte_offset: 0 fieldset: MAC_INTR_MAP - name: MAC_NMI_MAP description: mac nmi_intr map register. byte_offset: 4 fieldset: MAC_NMI_MAP - name: PWR_INTR_MAP description: pwr intr map register. byte_offset: 8 fieldset: PWR_INTR_MAP - name: BB_INT_MAP description: bb intr map register. byte_offset: 12 fieldset: BB_INT_MAP - name: BT_MAC_INT_MAP description: bt intr map register. byte_offset: 16 fieldset: BT_MAC_INT_MAP - name: BT_BB_INT_MAP description: bb_bt intr map register. byte_offset: 20 fieldset: BT_BB_INT_MAP - name: BT_BB_NMI_MAP description: bb_bt_nmi intr map register. byte_offset: 24 fieldset: BT_BB_NMI_MAP - name: RWBT_IRQ_MAP description: rwbt intr map register. byte_offset: 28 fieldset: RWBT_IRQ_MAP - name: RWBLE_IRQ_MAP description: rwble intr map register. byte_offset: 32 fieldset: RWBLE_IRQ_MAP - name: RWBT_NMI_MAP description: rwbt_nmi intr map register. byte_offset: 36 fieldset: RWBT_NMI_MAP - name: RWBLE_NMI_MAP description: rwble_nmi intr map register. byte_offset: 40 fieldset: RWBLE_NMI_MAP - name: I2C_MST_INT_MAP description: i2c intr map register. byte_offset: 44 fieldset: I2C_MST_INT_MAP - name: SLC0_INTR_MAP description: slc0 intr map register. byte_offset: 48 fieldset: SLC0_INTR_MAP - name: SLC1_INTR_MAP description: slc1 intr map register. byte_offset: 52 fieldset: SLC1_INTR_MAP - name: APB_CTRL_INTR_MAP description: apb_ctrl intr map register. byte_offset: 56 fieldset: APB_CTRL_INTR_MAP - name: UHCI0_INTR_MAP description: uchi0 intr map register. byte_offset: 60 fieldset: UHCI0_INTR_MAP - name: GPIO_INTERRUPT_PRO_MAP description: gpio intr map register. byte_offset: 64 fieldset: GPIO_INTERRUPT_PRO_MAP - name: GPIO_INTERRUPT_PRO_NMI_MAP description: gpio_pro intr map register. byte_offset: 68 fieldset: GPIO_INTERRUPT_PRO_NMI_MAP - name: SPI_INTR_1_MAP description: gpio_pro_nmi intr map register. byte_offset: 72 fieldset: SPI_INTR_1_MAP - name: SPI_INTR_2_MAP description: spi1 intr map register. byte_offset: 76 fieldset: SPI_INTR_2_MAP - name: I2S1_INT_MAP description: spi2 intr map register. byte_offset: 80 fieldset: I2S1_INT_MAP - name: UART_INTR_MAP description: i2s1 intr map register. byte_offset: 84 fieldset: UART_INTR_MAP - name: UART1_INTR_MAP description: uart1 intr map register. byte_offset: 88 fieldset: UART1_INTR_MAP - name: LEDC_INT_MAP description: ledc intr map register. byte_offset: 92 fieldset: LEDC_INT_MAP - name: EFUSE_INT_MAP description: efuse intr map register. byte_offset: 96 fieldset: EFUSE_INT_MAP - name: CAN_INT_MAP description: can intr map register. byte_offset: 100 fieldset: CAN_INT_MAP - name: USB_INTR_MAP description: usb intr map register. byte_offset: 104 fieldset: USB_INTR_MAP - name: RTC_CORE_INTR_MAP description: rtc intr map register. byte_offset: 108 fieldset: RTC_CORE_INTR_MAP - name: RMT_INTR_MAP description: rmt intr map register. byte_offset: 112 fieldset: RMT_INTR_MAP - name: I2C_EXT0_INTR_MAP description: i2c intr map register. byte_offset: 116 fieldset: I2C_EXT0_INTR_MAP - name: TIMER_INT1_MAP description: timer1 intr map register. byte_offset: 120 fieldset: TIMER_INT1_MAP - name: TIMER_INT2_MAP description: timer2 intr map register. byte_offset: 124 fieldset: TIMER_INT2_MAP - name: TG_T0_INT_MAP description: tg to intr map register. byte_offset: 128 fieldset: TG_T0_INT_MAP - name: TG_WDT_INT_MAP description: tg wdt intr map register. byte_offset: 132 fieldset: TG_WDT_INT_MAP - name: TG1_T0_INT_MAP description: tg1 to intr map register. byte_offset: 136 fieldset: TG1_T0_INT_MAP - name: TG1_WDT_INT_MAP description: tg1 wdt intr map register. byte_offset: 140 fieldset: TG1_WDT_INT_MAP - name: CACHE_IA_INT_MAP description: cache ia intr map register. byte_offset: 144 fieldset: CACHE_IA_INT_MAP - name: SYSTIMER_TARGET0_INT_MAP description: systimer intr map register. byte_offset: 148 fieldset: SYSTIMER_TARGET0_INT_MAP - name: SYSTIMER_TARGET1_INT_MAP description: systimer target1 intr map register. byte_offset: 152 fieldset: SYSTIMER_TARGET1_INT_MAP - name: SYSTIMER_TARGET2_INT_MAP description: systimer target2 intr map register. byte_offset: 156 fieldset: SYSTIMER_TARGET2_INT_MAP - name: SPI_MEM_REJECT_INTR_MAP description: spi mem reject intr map register. byte_offset: 160 fieldset: SPI_MEM_REJECT_INTR_MAP - name: ICACHE_PRELOAD_INT_MAP description: icache perload intr map register. byte_offset: 164 fieldset: ICACHE_PRELOAD_INT_MAP - name: ICACHE_SYNC_INT_MAP description: icache sync intr map register. byte_offset: 168 fieldset: ICACHE_SYNC_INT_MAP - name: APB_ADC_INT_MAP description: adc intr map register. byte_offset: 172 fieldset: APB_ADC_INT_MAP - name: DMA_CH0_INT_MAP description: dma ch0 intr map register. byte_offset: 176 fieldset: DMA_CH0_INT_MAP - name: DMA_CH1_INT_MAP description: dma ch1 intr map register. byte_offset: 180 fieldset: DMA_CH1_INT_MAP - name: DMA_CH2_INT_MAP description: dma ch2 intr map register. byte_offset: 184 fieldset: DMA_CH2_INT_MAP - name: RSA_INT_MAP description: rsa intr map register. byte_offset: 188 fieldset: RSA_INT_MAP - name: AES_INT_MAP description: aes intr map register. byte_offset: 192 fieldset: AES_INT_MAP - name: SHA_INT_MAP description: sha intr map register. byte_offset: 196 fieldset: SHA_INT_MAP - name: CPU_INTR_FROM_CPU_0_MAP description: cpu from cpu 0 intr map register. byte_offset: 200 fieldset: CPU_INTR_FROM_CPU_0_MAP - name: CPU_INTR_FROM_CPU_1_MAP description: cpu from cpu 0 intr map register. byte_offset: 204 fieldset: CPU_INTR_FROM_CPU_1_MAP - name: CPU_INTR_FROM_CPU_2_MAP description: cpu from cpu 1 intr map register. byte_offset: 208 fieldset: CPU_INTR_FROM_CPU_2_MAP - name: CPU_INTR_FROM_CPU_3_MAP description: cpu from cpu 3 intr map register. byte_offset: 212 fieldset: CPU_INTR_FROM_CPU_3_MAP - name: ASSIST_DEBUG_INTR_MAP description: assist debug intr map register. byte_offset: 216 fieldset: ASSIST_DEBUG_INTR_MAP - name: DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP description: dma pms violatile intr map register. byte_offset: 220 fieldset: DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP - name: CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP description: iram0 pms violatile intr map register. byte_offset: 224 fieldset: CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP - name: CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP description: mac intr map register. byte_offset: 228 fieldset: CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP - name: CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP description: mac intr map register. byte_offset: 232 fieldset: CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP - name: CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP description: mac intr map register. byte_offset: 236 fieldset: CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP - name: BACKUP_PMS_VIOLATE_INTR_MAP description: mac intr map register. byte_offset: 240 fieldset: BACKUP_PMS_VIOLATE_INTR_MAP - name: CACHE_CORE0_ACS_INT_MAP description: mac intr map register. byte_offset: 244 fieldset: CACHE_CORE0_ACS_INT_MAP - name: INTR_STATUS_REG_0 description: mac intr map register. byte_offset: 248 fieldset: INTR_STATUS_REG_0 - name: INTR_STATUS_REG_1 description: mac intr map register. byte_offset: 252 fieldset: INTR_STATUS_REG_1 - name: CLOCK_GATE description: mac intr map register. byte_offset: 256 fieldset: CLOCK_GATE - name: CPU_INT_ENABLE description: mac intr map register. byte_offset: 260 fieldset: CPU_INT_ENABLE - name: CPU_INT_TYPE description: mac intr map register. byte_offset: 264 fieldset: CPU_INT_TYPE - name: CPU_INT_CLEAR description: mac intr map register. byte_offset: 268 fieldset: CPU_INT_CLEAR - name: CPU_INT_EIP_STATUS description: mac intr map register. byte_offset: 272 fieldset: CPU_INT_EIP_STATUS - name: CPU_INT_PRI_0 description: mac intr map register. byte_offset: 276 fieldset: CPU_INT_PRI_0 - name: CPU_INT_PRI_1 description: mac intr map register. byte_offset: 280 fieldset: CPU_INT_PRI_1 - name: CPU_INT_PRI_2 description: mac intr map register. byte_offset: 284 fieldset: CPU_INT_PRI_2 - name: CPU_INT_PRI_3 description: mac intr map register. byte_offset: 288 fieldset: CPU_INT_PRI_3 - name: CPU_INT_PRI_4 description: mac intr map register. byte_offset: 292 fieldset: CPU_INT_PRI_4 - name: CPU_INT_PRI_5 description: mac intr map register. byte_offset: 296 fieldset: CPU_INT_PRI_5 - name: CPU_INT_PRI_6 description: mac intr map register. byte_offset: 300 fieldset: CPU_INT_PRI_6 - name: CPU_INT_PRI_7 description: mac intr map register. byte_offset: 304 fieldset: CPU_INT_PRI_7 - name: CPU_INT_PRI_8 description: mac intr map register. byte_offset: 308 fieldset: CPU_INT_PRI_8 - name: CPU_INT_PRI_9 description: mac intr map register. byte_offset: 312 fieldset: CPU_INT_PRI_9 - name: CPU_INT_PRI_10 description: mac intr map register. byte_offset: 316 fieldset: CPU_INT_PRI_10 - name: CPU_INT_PRI_11 description: mac intr map register. byte_offset: 320 fieldset: CPU_INT_PRI_11 - name: CPU_INT_PRI_12 description: mac intr map register. byte_offset: 324 fieldset: CPU_INT_PRI_12 - name: CPU_INT_PRI_13 description: mac intr map register. byte_offset: 328 fieldset: CPU_INT_PRI_13 - name: CPU_INT_PRI_14 description: mac intr map register. byte_offset: 332 fieldset: CPU_INT_PRI_14 - name: CPU_INT_PRI_15 description: mac intr map register. byte_offset: 336 fieldset: CPU_INT_PRI_15 - name: CPU_INT_PRI_16 description: mac intr map register. byte_offset: 340 fieldset: CPU_INT_PRI_16 - name: CPU_INT_PRI_17 description: mac intr map register. byte_offset: 344 fieldset: CPU_INT_PRI_17 - name: CPU_INT_PRI_18 description: mac intr map register. byte_offset: 348 fieldset: CPU_INT_PRI_18 - name: CPU_INT_PRI_19 description: mac intr map register. byte_offset: 352 fieldset: CPU_INT_PRI_19 - name: CPU_INT_PRI_20 description: mac intr map register. byte_offset: 356 fieldset: CPU_INT_PRI_20 - name: CPU_INT_PRI_21 description: mac intr map register. byte_offset: 360 fieldset: CPU_INT_PRI_21 - name: CPU_INT_PRI_22 description: mac intr map register. byte_offset: 364 fieldset: CPU_INT_PRI_22 - name: CPU_INT_PRI_23 description: mac intr map register. byte_offset: 368 fieldset: CPU_INT_PRI_23 - name: CPU_INT_PRI_24 description: mac intr map register. byte_offset: 372 fieldset: CPU_INT_PRI_24 - name: CPU_INT_PRI_25 description: mac intr map register. byte_offset: 376 fieldset: CPU_INT_PRI_25 - name: CPU_INT_PRI_26 description: mac intr map register. byte_offset: 380 fieldset: CPU_INT_PRI_26 - name: CPU_INT_PRI_27 description: mac intr map register. byte_offset: 384 fieldset: CPU_INT_PRI_27 - name: CPU_INT_PRI_28 description: mac intr map register. byte_offset: 388 fieldset: CPU_INT_PRI_28 - name: CPU_INT_PRI_29 description: mac intr map register. byte_offset: 392 fieldset: CPU_INT_PRI_29 - name: CPU_INT_PRI_30 description: mac intr map register. byte_offset: 396 fieldset: CPU_INT_PRI_30 - name: CPU_INT_PRI_31 description: mac intr map register. byte_offset: 400 fieldset: CPU_INT_PRI_31 - name: CPU_INT_THRESH description: mac intr map register. byte_offset: 404 fieldset: CPU_INT_THRESH - name: INTERRUPT_REG_DATE description: mac intr map register. byte_offset: 2044 fieldset: INTERRUPT_REG_DATE fieldset/AES_INT_MAP: description: aes intr map register. fields: - name: AES_INT_MAP description: reg_core0_aes_int_map. bit_offset: 0 bit_size: 5 fieldset/APB_ADC_INT_MAP: description: adc intr map register. fields: - name: APB_ADC_INT_MAP description: reg_core0_apb_adc_int_map. bit_offset: 0 bit_size: 5 fieldset/APB_CTRL_INTR_MAP: description: apb_ctrl intr map register. fields: - name: APB_CTRL_INTR_MAP description: reg_core0_apb_ctrl_intr_map. bit_offset: 0 bit_size: 5 fieldset/ASSIST_DEBUG_INTR_MAP: description: assist debug intr map register. fields: - name: ASSIST_DEBUG_INTR_MAP description: reg_core0_assist_debug_intr_map. bit_offset: 0 bit_size: 5 fieldset/BACKUP_PMS_VIOLATE_INTR_MAP: description: mac intr map register. fields: - name: BACKUP_PMS_VIOLATE_INTR_MAP description: reg_core0_backup_pms_violate_intr_map. bit_offset: 0 bit_size: 5 fieldset/BB_INT_MAP: description: bb intr map register. fields: - name: BB_INT_MAP description: reg_core0_bb_int_map. bit_offset: 0 bit_size: 5 fieldset/BT_BB_INT_MAP: description: bb_bt intr map register. fields: - name: BT_BB_INT_MAP description: reg_core0_bt_bb_int_map. bit_offset: 0 bit_size: 5 fieldset/BT_BB_NMI_MAP: description: bb_bt_nmi intr map register. fields: - name: BT_BB_NMI_MAP description: reg_core0_bt_bb_nmi_map. bit_offset: 0 bit_size: 5 fieldset/BT_MAC_INT_MAP: description: bt intr map register. fields: - name: BT_MAC_INT_MAP description: reg_core0_bt_mac_int_map. bit_offset: 0 bit_size: 5 fieldset/CACHE_CORE0_ACS_INT_MAP: description: mac intr map register. fields: - name: CACHE_CORE0_ACS_INT_MAP description: reg_core0_cache_core0_acs_int_map. bit_offset: 0 bit_size: 5 fieldset/CACHE_IA_INT_MAP: description: cache ia intr map register. fields: - name: CACHE_IA_INT_MAP description: reg_core0_cache_ia_int_map. bit_offset: 0 bit_size: 5 fieldset/CAN_INT_MAP: description: can intr map register. fields: - name: CAN_INT_MAP description: reg_core0_can_int_map. bit_offset: 0 bit_size: 5 fieldset/CLOCK_GATE: description: mac intr map register. fields: - name: REG_CLK_EN description: reg_core0_reg_clk_en. bit_offset: 0 bit_size: 1 fieldset/CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP: description: mac intr map register. fields: - name: CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP description: reg_core0_core_0_dram0_pms_monitor_violate_intr_map. bit_offset: 0 bit_size: 5 fieldset/CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP: description: iram0 pms violatile intr map register. fields: - name: CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP description: reg_core0_core_0_iram0_pms_monitor_violate_intr_map. bit_offset: 0 bit_size: 5 fieldset/CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP: description: mac intr map register. fields: - name: CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP description: reg_core0_core_0_pif_pms_monitor_violate_intr_map. bit_offset: 0 bit_size: 5 fieldset/CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP: description: mac intr map register. fields: - name: CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP description: reg_core0_core_0_pif_pms_monitor_violate_size_intr_map. bit_offset: 0 bit_size: 5 fieldset/CPU_INTR_FROM_CPU_0_MAP: description: cpu from cpu 0 intr map register. fields: - name: CPU_INTR_FROM_CPU_0_MAP description: reg_core0_cpu_intr_from_cpu_0_map. bit_offset: 0 bit_size: 5 fieldset/CPU_INTR_FROM_CPU_1_MAP: description: cpu from cpu 0 intr map register. fields: - name: CPU_INTR_FROM_CPU_1_MAP description: reg_core0_cpu_intr_from_cpu_1_map. bit_offset: 0 bit_size: 5 fieldset/CPU_INTR_FROM_CPU_2_MAP: description: cpu from cpu 1 intr map register. fields: - name: CPU_INTR_FROM_CPU_2_MAP description: reg_core0_cpu_intr_from_cpu_2_map. bit_offset: 0 bit_size: 5 fieldset/CPU_INTR_FROM_CPU_3_MAP: description: cpu from cpu 3 intr map register. fields: - name: CPU_INTR_FROM_CPU_3_MAP description: reg_core0_cpu_intr_from_cpu_3_map. bit_offset: 0 bit_size: 5 fieldset/CPU_INT_CLEAR: description: mac intr map register. fields: - name: CPU_INT_CLEAR description: reg_core0_cpu_int_clear. bit_offset: 0 bit_size: 32 fieldset/CPU_INT_EIP_STATUS: description: mac intr map register. fields: - name: CPU_INT_EIP_STATUS description: reg_core0_cpu_int_eip_status. bit_offset: 0 bit_size: 32 fieldset/CPU_INT_ENABLE: description: mac intr map register. fields: - name: CPU_INT_ENABLE description: reg_core0_cpu_int_enable. bit_offset: 0 bit_size: 32 fieldset/CPU_INT_PRI_0: description: mac intr map register. fields: - name: CPU_PRI_0_MAP description: reg_core0_cpu_pri_0_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_1: description: mac intr map register. fields: - name: CPU_PRI_1_MAP description: reg_core0_cpu_pri_1_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_10: description: mac intr map register. fields: - name: CPU_PRI_10_MAP description: reg_core0_cpu_pri_10_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_11: description: mac intr map register. fields: - name: CPU_PRI_11_MAP description: reg_core0_cpu_pri_11_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_12: description: mac intr map register. fields: - name: CPU_PRI_12_MAP description: reg_core0_cpu_pri_12_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_13: description: mac intr map register. fields: - name: CPU_PRI_13_MAP description: reg_core0_cpu_pri_13_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_14: description: mac intr map register. fields: - name: CPU_PRI_14_MAP description: reg_core0_cpu_pri_14_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_15: description: mac intr map register. fields: - name: CPU_PRI_15_MAP description: reg_core0_cpu_pri_15_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_16: description: mac intr map register. fields: - name: CPU_PRI_16_MAP description: reg_core0_cpu_pri_16_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_17: description: mac intr map register. fields: - name: CPU_PRI_17_MAP description: reg_core0_cpu_pri_17_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_18: description: mac intr map register. fields: - name: CPU_PRI_18_MAP description: reg_core0_cpu_pri_18_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_19: description: mac intr map register. fields: - name: CPU_PRI_19_MAP description: reg_core0_cpu_pri_19_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_2: description: mac intr map register. fields: - name: CPU_PRI_2_MAP description: reg_core0_cpu_pri_2_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_20: description: mac intr map register. fields: - name: CPU_PRI_20_MAP description: reg_core0_cpu_pri_20_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_21: description: mac intr map register. fields: - name: CPU_PRI_21_MAP description: reg_core0_cpu_pri_21_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_22: description: mac intr map register. fields: - name: CPU_PRI_22_MAP description: reg_core0_cpu_pri_22_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_23: description: mac intr map register. fields: - name: CPU_PRI_23_MAP description: reg_core0_cpu_pri_23_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_24: description: mac intr map register. fields: - name: CPU_PRI_24_MAP description: reg_core0_cpu_pri_24_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_25: description: mac intr map register. fields: - name: CPU_PRI_25_MAP description: reg_core0_cpu_pri_25_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_26: description: mac intr map register. fields: - name: CPU_PRI_26_MAP description: reg_core0_cpu_pri_26_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_27: description: mac intr map register. fields: - name: CPU_PRI_27_MAP description: reg_core0_cpu_pri_27_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_28: description: mac intr map register. fields: - name: CPU_PRI_28_MAP description: reg_core0_cpu_pri_28_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_29: description: mac intr map register. fields: - name: CPU_PRI_29_MAP description: reg_core0_cpu_pri_29_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_3: description: mac intr map register. fields: - name: CPU_PRI_3_MAP description: reg_core0_cpu_pri_3_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_30: description: mac intr map register. fields: - name: CPU_PRI_30_MAP description: reg_core0_cpu_pri_30_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_31: description: mac intr map register. fields: - name: CPU_PRI_31_MAP description: reg_core0_cpu_pri_31_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_4: description: mac intr map register. fields: - name: CPU_PRI_4_MAP description: reg_core0_cpu_pri_4_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_5: description: mac intr map register. fields: - name: CPU_PRI_5_MAP description: reg_core0_cpu_pri_5_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_6: description: mac intr map register. fields: - name: CPU_PRI_6_MAP description: reg_core0_cpu_pri_6_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_7: description: mac intr map register. fields: - name: CPU_PRI_7_MAP description: reg_core0_cpu_pri_7_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_8: description: mac intr map register. fields: - name: CPU_PRI_8_MAP description: reg_core0_cpu_pri_8_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_PRI_9: description: mac intr map register. fields: - name: CPU_PRI_9_MAP description: reg_core0_cpu_pri_9_map. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_THRESH: description: mac intr map register. fields: - name: CPU_INT_THRESH description: reg_core0_cpu_int_thresh. bit_offset: 0 bit_size: 4 fieldset/CPU_INT_TYPE: description: mac intr map register. fields: - name: CPU_INT_TYPE description: reg_core0_cpu_int_type. bit_offset: 0 bit_size: 32 fieldset/DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP: description: dma pms violatile intr map register. fields: - name: DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP description: reg_core0_dma_apbperi_pms_monitor_violate_intr_map. bit_offset: 0 bit_size: 5 fieldset/DMA_CH0_INT_MAP: description: dma ch0 intr map register. fields: - name: DMA_CH0_INT_MAP description: reg_core0_dma_ch0_int_map. bit_offset: 0 bit_size: 5 fieldset/DMA_CH1_INT_MAP: description: dma ch1 intr map register. fields: - name: DMA_CH1_INT_MAP description: reg_core0_dma_ch1_int_map. bit_offset: 0 bit_size: 5 fieldset/DMA_CH2_INT_MAP: description: dma ch2 intr map register. fields: - name: DMA_CH2_INT_MAP description: reg_core0_dma_ch2_int_map. bit_offset: 0 bit_size: 5 fieldset/EFUSE_INT_MAP: description: efuse intr map register. fields: - name: EFUSE_INT_MAP description: reg_core0_efuse_int_map. bit_offset: 0 bit_size: 5 fieldset/GPIO_INTERRUPT_PRO_MAP: description: gpio intr map register. fields: - name: GPIO_INTERRUPT_PRO_MAP description: reg_core0_gpio_interrupt_pro_map. bit_offset: 0 bit_size: 5 fieldset/GPIO_INTERRUPT_PRO_NMI_MAP: description: gpio_pro intr map register. fields: - name: GPIO_INTERRUPT_PRO_NMI_MAP description: reg_core0_gpio_interrupt_pro_nmi_map. bit_offset: 0 bit_size: 5 fieldset/I2C_EXT0_INTR_MAP: description: i2c intr map register. fields: - name: I2C_EXT0_INTR_MAP description: reg_core0_i2c_ext0_intr_map. bit_offset: 0 bit_size: 5 fieldset/I2C_MST_INT_MAP: description: i2c intr map register. fields: - name: I2C_MST_INT_MAP description: reg_core0_i2c_mst_int_map. bit_offset: 0 bit_size: 5 fieldset/I2S1_INT_MAP: description: spi2 intr map register. fields: - name: I2S1_INT_MAP description: reg_core0_i2s1_int_map. bit_offset: 0 bit_size: 5 fieldset/ICACHE_PRELOAD_INT_MAP: description: icache perload intr map register. fields: - name: ICACHE_PRELOAD_INT_MAP description: reg_core0_icache_preload_int_map. bit_offset: 0 bit_size: 5 fieldset/ICACHE_SYNC_INT_MAP: description: icache sync intr map register. fields: - name: ICACHE_SYNC_INT_MAP description: reg_core0_icache_sync_int_map. bit_offset: 0 bit_size: 5 fieldset/INTERRUPT_REG_DATE: description: mac intr map register. fields: - name: INTERRUPT_REG_DATE description: reg_core0_interrupt_reg_date. bit_offset: 0 bit_size: 28 fieldset/INTR_STATUS_REG_0: description: mac intr map register. fields: - name: INTR_STATUS_0 description: reg_core0_intr_status_0. bit_offset: 0 bit_size: 32 fieldset/INTR_STATUS_REG_1: description: mac intr map register. fields: - name: INTR_STATUS_1 description: reg_core0_intr_status_1. bit_offset: 0 bit_size: 32 fieldset/LEDC_INT_MAP: description: ledc intr map register. fields: - name: LEDC_INT_MAP description: reg_core0_ledc_int_map. bit_offset: 0 bit_size: 5 fieldset/MAC_INTR_MAP: description: mac intr map register. fields: - name: MAC_INTR_MAP description: core0_mac_intr_map. bit_offset: 0 bit_size: 5 fieldset/MAC_NMI_MAP: description: mac nmi_intr map register. fields: - name: MAC_NMI_MAP description: reg_core0_mac_nmi_map. bit_offset: 0 bit_size: 5 fieldset/PWR_INTR_MAP: description: pwr intr map register. fields: - name: PWR_INTR_MAP description: reg_core0_pwr_intr_map. bit_offset: 0 bit_size: 5 fieldset/RMT_INTR_MAP: description: rmt intr map register. fields: - name: RMT_INTR_MAP description: reg_core0_rmt_intr_map. bit_offset: 0 bit_size: 5 fieldset/RSA_INT_MAP: description: rsa intr map register. fields: - name: RSA_INT_MAP description: reg_core0_rsa_int_map. bit_offset: 0 bit_size: 5 fieldset/RTC_CORE_INTR_MAP: description: rtc intr map register. fields: - name: RTC_CORE_INTR_MAP description: reg_core0_rtc_core_intr_map. bit_offset: 0 bit_size: 5 fieldset/RWBLE_IRQ_MAP: description: rwble intr map register. fields: - name: RWBLE_IRQ_MAP description: reg_core0_rwble_irq_map. bit_offset: 0 bit_size: 5 fieldset/RWBLE_NMI_MAP: description: rwble_nmi intr map register. fields: - name: RWBLE_NMI_MAP description: reg_core0_rwble_nmi_map. bit_offset: 0 bit_size: 5 fieldset/RWBT_IRQ_MAP: description: rwbt intr map register. fields: - name: RWBT_IRQ_MAP description: reg_core0_rwbt_irq_map. bit_offset: 0 bit_size: 5 fieldset/RWBT_NMI_MAP: description: rwbt_nmi intr map register. fields: - name: RWBT_NMI_MAP description: reg_core0_rwbt_nmi_map. bit_offset: 0 bit_size: 5 fieldset/SHA_INT_MAP: description: sha intr map register. fields: - name: SHA_INT_MAP description: reg_core0_sha_int_map. bit_offset: 0 bit_size: 5 fieldset/SLC0_INTR_MAP: description: slc0 intr map register. fields: - name: SLC0_INTR_MAP description: reg_core0_slc0_intr_map. bit_offset: 0 bit_size: 5 fieldset/SLC1_INTR_MAP: description: slc1 intr map register. fields: - name: SLC1_INTR_MAP description: reg_core0_slc1_intr_map. bit_offset: 0 bit_size: 5 fieldset/SPI_INTR_1_MAP: description: gpio_pro_nmi intr map register. fields: - name: SPI_INTR_1_MAP description: reg_core0_spi_intr_1_map. bit_offset: 0 bit_size: 5 fieldset/SPI_INTR_2_MAP: description: spi1 intr map register. fields: - name: SPI_INTR_2_MAP description: reg_core0_spi_intr_2_map. bit_offset: 0 bit_size: 5 fieldset/SPI_MEM_REJECT_INTR_MAP: description: spi mem reject intr map register. fields: - name: SPI_MEM_REJECT_INTR_MAP description: reg_core0_spi_mem_reject_intr_map. bit_offset: 0 bit_size: 5 fieldset/SYSTIMER_TARGET0_INT_MAP: description: systimer intr map register. fields: - name: SYSTIMER_TARGET0_INT_MAP description: reg_core0_systimer_target0_int_map. bit_offset: 0 bit_size: 5 fieldset/SYSTIMER_TARGET1_INT_MAP: description: systimer target1 intr map register. fields: - name: SYSTIMER_TARGET1_INT_MAP description: reg_core0_systimer_target1_int_map. bit_offset: 0 bit_size: 5 fieldset/SYSTIMER_TARGET2_INT_MAP: description: systimer target2 intr map register. fields: - name: SYSTIMER_TARGET2_INT_MAP description: reg_core0_systimer_target2_int_map. bit_offset: 0 bit_size: 5 fieldset/TG1_T0_INT_MAP: description: tg1 to intr map register. fields: - name: TG1_T0_INT_MAP description: reg_core0_tg1_t0_int_map. bit_offset: 0 bit_size: 5 fieldset/TG1_WDT_INT_MAP: description: tg1 wdt intr map register. fields: - name: TG1_WDT_INT_MAP description: reg_core0_tg1_wdt_int_map. bit_offset: 0 bit_size: 5 fieldset/TG_T0_INT_MAP: description: tg to intr map register. fields: - name: TG_T0_INT_MAP description: reg_core0_tg_t0_int_map. bit_offset: 0 bit_size: 5 fieldset/TG_WDT_INT_MAP: description: tg wdt intr map register. fields: - name: TG_WDT_INT_MAP description: reg_core0_tg_wdt_int_map. bit_offset: 0 bit_size: 5 fieldset/TIMER_INT1_MAP: description: timer1 intr map register. fields: - name: TIMER_INT1_MAP description: reg_core0_timer_int1_map. bit_offset: 0 bit_size: 5 fieldset/TIMER_INT2_MAP: description: timer2 intr map register. fields: - name: TIMER_INT2_MAP description: reg_core0_timer_int2_map. bit_offset: 0 bit_size: 5 fieldset/UART1_INTR_MAP: description: uart1 intr map register. fields: - name: UART1_INTR_MAP description: reg_core0_uart1_intr_map. bit_offset: 0 bit_size: 5 fieldset/UART_INTR_MAP: description: i2s1 intr map register. fields: - name: UART_INTR_MAP description: reg_core0_uart_intr_map. bit_offset: 0 bit_size: 5 fieldset/UHCI0_INTR_MAP: description: uchi0 intr map register. fields: - name: UHCI0_INTR_MAP description: reg_core0_uhci0_intr_map. bit_offset: 0 bit_size: 5 fieldset/USB_INTR_MAP: description: usb intr map register. fields: - name: USB_INTR_MAP description: reg_core0_usb_intr_map. bit_offset: 0 bit_size: 5