block/TIM13:
  description: TIM13.
  items:
  - name: _CR1
    description: TIM13 control register 1.
    byte_offset: 0
    bit_size: 16
    fieldset: _CR1
  - name: _DIER
    description: TIM13 Interrupt enable register.
    byte_offset: 12
    bit_size: 16
    fieldset: _DIER
  - name: _SR
    description: TIM13 status register.
    byte_offset: 16
    bit_size: 16
    fieldset: _SR
  - name: _EGR
    description: TIM13 event generation register.
    byte_offset: 20
    access: Write
    bit_size: 16
    fieldset: _EGR
  - name: _CCMR1
    description: The channels can be used in input (capture mode) or in output (compare mode). The direction of a channel is defined by configuring the corresponding CCxS bits. All the other bits of this register have a different function in input and in output mode. For a given bit, OCxx describes its function when the channel is configured in output, ICxx describes its function when the channel is configured in input. So one must take care that the same bit can have a different meaning for the input stage and for the output stage. Output compare mode.
    byte_offset: 24
    fieldset: _CCMR1
  - name: _CCER
    description: TIM13 capture/compare enable register.
    byte_offset: 32
    bit_size: 16
    fieldset: _CCER
  - name: _CNT
    description: TIM13 counter.
    byte_offset: 36
    fieldset: _CNT
  - name: _PSC
    description: TIM13 prescaler.
    byte_offset: 40
    bit_size: 16
    fieldset: _PSC
  - name: _ARR
    description: TIM13 auto-reload register.
    byte_offset: 44
    bit_size: 16
    fieldset: _ARR
  - name: _CCR1
    description: TIM13 capture/compare register 1.
    byte_offset: 52
    bit_size: 16
    fieldset: _CCR1
  - name: _TISEL
    description: TIM13 timer input selection register.
    byte_offset: 104
    bit_size: 16
    fieldset: _TISEL
fieldset/_ARR:
  description: TIM13 auto-reload register.
  bit_size: 16
  fields:
  - name: ARR
    description: ARR.
    bit_offset: 0
    bit_size: 16
fieldset/_CCER:
  description: TIM13 capture/compare enable register.
  bit_size: 16
  fields:
  - name: CC1E
    description: CC1E.
    bit_offset: 0
    bit_size: 1
  - name: CC1P
    description: CC1P.
    bit_offset: 1
    bit_size: 1
  - name: CC1NP
    description: CC1NP.
    bit_offset: 3
    bit_size: 1
fieldset/_CCMR1:
  description: The channels can be used in input (capture mode) or in output (compare mode). The direction of a channel is defined by configuring the corresponding CCxS bits. All the other bits of this register have a different function in input and in output mode. For a given bit, OCxx describes its function when the channel is configured in output, ICxx describes its function when the channel is configured in input. So one must take care that the same bit can have a different meaning for the input stage and for the output stage. Output compare mode.
  fields:
  - name: CC1S
    description: CC1S.
    bit_offset: 0
    bit_size: 2
  - name: OC1FE
    description: OC1FE.
    bit_offset: 2
    bit_size: 1
  - name: OC1PE
    description: OC1PE.
    bit_offset: 3
    bit_size: 1
  - name: OC1M
    description: OC1M.
    bit_offset: 4
    bit_size: 3
  - name: OC1M3
    description: OC1M3.
    bit_offset: 16
    bit_size: 1
fieldset/_CCR1:
  description: TIM13 capture/compare register 1.
  bit_size: 16
  fields:
  - name: CCR1
    description: CCR1.
    bit_offset: 0
    bit_size: 16
fieldset/_CNT:
  description: TIM13 counter.
  fields:
  - name: CNT
    description: CNT.
    bit_offset: 0
    bit_size: 16
  - name: UIFCPY
    description: UIFCPY.
    bit_offset: 31
    bit_size: 1
fieldset/_CR1:
  description: TIM13 control register 1.
  bit_size: 16
  fields:
  - name: CEN
    description: CEN.
    bit_offset: 0
    bit_size: 1
  - name: UDIS
    description: UDIS.
    bit_offset: 1
    bit_size: 1
  - name: URS
    description: URS.
    bit_offset: 2
    bit_size: 1
  - name: OPM
    description: OPM.
    bit_offset: 3
    bit_size: 1
  - name: ARPE
    description: ARPE.
    bit_offset: 7
    bit_size: 1
  - name: CKD
    description: CKD.
    bit_offset: 8
    bit_size: 2
  - name: UIFREMAP
    description: UIFREMAP.
    bit_offset: 11
    bit_size: 1
fieldset/_DIER:
  description: TIM13 Interrupt enable register.
  bit_size: 16
  fields:
  - name: UIE
    description: UIE.
    bit_offset: 0
    bit_size: 1
  - name: CC1IE
    description: CC1IE.
    bit_offset: 1
    bit_size: 1
fieldset/_EGR:
  description: TIM13 event generation register.
  bit_size: 16
  fields:
  - name: UG
    description: UG.
    bit_offset: 0
    bit_size: 1
  - name: CC1G
    description: CC1G.
    bit_offset: 1
    bit_size: 1
fieldset/_PSC:
  description: TIM13 prescaler.
  bit_size: 16
  fields:
  - name: PSC
    description: PSC.
    bit_offset: 0
    bit_size: 16
fieldset/_SR:
  description: TIM13 status register.
  bit_size: 16
  fields:
  - name: UIF
    description: UIF.
    bit_offset: 0
    bit_size: 1
  - name: CC1IF
    description: CC1IF.
    bit_offset: 1
    bit_size: 1
  - name: CC1OF
    description: CC1OF.
    bit_offset: 9
    bit_size: 1
fieldset/_TISEL:
  description: TIM13 timer input selection register.
  bit_size: 16
  fields:
  - name: TI1SEL
    description: TI1SEL.
    bit_offset: 0
    bit_size: 4