diff --git a/data/chips/STM32C011D6.json b/data/chips/STM32C011D6.json index f75ab66..f25c180 100644 --- a/data/chips/STM32C011D6.json +++ b/data/chips/STM32C011D6.json @@ -920,7 +920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1187,7 +1187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1279,7 +1279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1376,7 +1376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011F4.json b/data/chips/STM32C011F4.json index a736d39..907846d 100644 --- a/data/chips/STM32C011F4.json +++ b/data/chips/STM32C011F4.json @@ -1088,7 +1088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1355,7 +1355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1447,7 +1447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1544,7 +1544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011F6.json b/data/chips/STM32C011F6.json index 9741f57..f488ffa 100644 --- a/data/chips/STM32C011F6.json +++ b/data/chips/STM32C011F6.json @@ -1088,7 +1088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1355,7 +1355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1447,7 +1447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1544,7 +1544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011J4.json b/data/chips/STM32C011J4.json index c2d127d..73aff29 100644 --- a/data/chips/STM32C011J4.json +++ b/data/chips/STM32C011J4.json @@ -823,7 +823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1045,7 +1045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1132,7 +1132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011J6.json b/data/chips/STM32C011J6.json index 3806fd7..fffa219 100644 --- a/data/chips/STM32C011J6.json +++ b/data/chips/STM32C011J6.json @@ -823,7 +823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1045,7 +1045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1132,7 +1132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031C4.json b/data/chips/STM32C031C4.json index 8da3676..d683ef8 100644 --- a/data/chips/STM32C031C4.json +++ b/data/chips/STM32C031C4.json @@ -1561,7 +1561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1908,7 +1908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031C6.json b/data/chips/STM32C031C6.json index c0c91c9..9011e30 100644 --- a/data/chips/STM32C031C6.json +++ b/data/chips/STM32C031C6.json @@ -1561,7 +1561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1908,7 +1908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031F4.json b/data/chips/STM32C031F4.json index 928e2e0..9ab5a57 100644 --- a/data/chips/STM32C031F4.json +++ b/data/chips/STM32C031F4.json @@ -981,7 +981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1248,7 +1248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1340,7 +1340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1437,7 +1437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031F6.json b/data/chips/STM32C031F6.json index 9215586..f5d88fc 100644 --- a/data/chips/STM32C031F6.json +++ b/data/chips/STM32C031F6.json @@ -981,7 +981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1248,7 +1248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1340,7 +1340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1437,7 +1437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031G4.json b/data/chips/STM32C031G4.json index b6fc751..aa675c4 100644 --- a/data/chips/STM32C031G4.json +++ b/data/chips/STM32C031G4.json @@ -1084,7 +1084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1371,7 +1371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1473,7 +1473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1570,7 +1570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031G6.json b/data/chips/STM32C031G6.json index a8f3e36..fbe7ceb 100644 --- a/data/chips/STM32C031G6.json +++ b/data/chips/STM32C031G6.json @@ -1084,7 +1084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1371,7 +1371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1473,7 +1473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1570,7 +1570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031K4.json b/data/chips/STM32C031K4.json index 20b687f..86ebd0f 100644 --- a/data/chips/STM32C031K4.json +++ b/data/chips/STM32C031K4.json @@ -1340,7 +1340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1739,7 +1739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1846,7 +1846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031K6.json b/data/chips/STM32C031K6.json index 3d63ea8..b208698 100644 --- a/data/chips/STM32C031K6.json +++ b/data/chips/STM32C031K6.json @@ -1340,7 +1340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1739,7 +1739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1846,7 +1846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030C6.json b/data/chips/STM32F030C6.json index 903469d..8b2e46a 100644 --- a/data/chips/STM32F030C6.json +++ b/data/chips/STM32F030C6.json @@ -1294,7 +1294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1494,7 +1494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1577,7 +1577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1660,7 +1660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030C8.json b/data/chips/STM32F030C8.json index dd7104b..9f6a590 100644 --- a/data/chips/STM32F030C8.json +++ b/data/chips/STM32F030C8.json @@ -1364,7 +1364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1564,7 +1564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1657,7 +1657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1740,7 +1740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1823,7 +1823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030CC.json b/data/chips/STM32F030CC.json index cd9a4e9..2a78d1c 100644 --- a/data/chips/STM32F030CC.json +++ b/data/chips/STM32F030CC.json @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1631,7 +1631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1738,7 +1738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1825,7 +1825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1917,7 +1917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030F4.json b/data/chips/STM32F030F4.json index a26c2a8..9d867d4 100644 --- a/data/chips/STM32F030F4.json +++ b/data/chips/STM32F030F4.json @@ -1003,7 +1003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1163,7 +1163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1231,7 +1231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1304,7 +1304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030K6.json b/data/chips/STM32F030K6.json index 880ba72..c1fc918 100644 --- a/data/chips/STM32F030K6.json +++ b/data/chips/STM32F030K6.json @@ -1119,7 +1119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1299,7 +1299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1377,7 +1377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1455,7 +1455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030R8.json b/data/chips/STM32F030R8.json index fa4b90a..67ac294 100644 --- a/data/chips/STM32F030R8.json +++ b/data/chips/STM32F030R8.json @@ -1484,7 +1484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1684,7 +1684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1777,7 +1777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1860,7 +1860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1943,7 +1943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030RC.json b/data/chips/STM32F030RC.json index 47da32f..e01a92a 100644 --- a/data/chips/STM32F030RC.json +++ b/data/chips/STM32F030RC.json @@ -1549,7 +1549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1761,7 +1761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1868,7 +1868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1955,7 +1955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2047,7 +2047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031C4.json b/data/chips/STM32F031C4.json index 773ce96..c8c8da0 100644 --- a/data/chips/STM32F031C4.json +++ b/data/chips/STM32F031C4.json @@ -1313,7 +1313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1513,7 +1513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1596,7 +1596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1679,7 +1679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031C6.json b/data/chips/STM32F031C6.json index 9f2d4d3..c158b9f 100644 --- a/data/chips/STM32F031C6.json +++ b/data/chips/STM32F031C6.json @@ -1313,7 +1313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1513,7 +1513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1596,7 +1596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1679,7 +1679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031E6.json b/data/chips/STM32F031E6.json index ac8d6c6..6794096 100644 --- a/data/chips/STM32F031E6.json +++ b/data/chips/STM32F031E6.json @@ -1060,7 +1060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1308,7 +1308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1386,7 +1386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031F4.json b/data/chips/STM32F031F4.json index 1fde009..00e7351 100644 --- a/data/chips/STM32F031F4.json +++ b/data/chips/STM32F031F4.json @@ -1002,7 +1002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1162,7 +1162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1303,7 +1303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1405,7 +1405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031F6.json b/data/chips/STM32F031F6.json index aa12614..dc58ca1 100644 --- a/data/chips/STM32F031F6.json +++ b/data/chips/STM32F031F6.json @@ -1002,7 +1002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1162,7 +1162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1303,7 +1303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1405,7 +1405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031G4.json b/data/chips/STM32F031G4.json index 701236c..64306c5 100644 --- a/data/chips/STM32F031G4.json +++ b/data/chips/STM32F031G4.json @@ -1114,7 +1114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1284,7 +1284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1362,7 +1362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1440,7 +1440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1557,7 +1557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031G6.json b/data/chips/STM32F031G6.json index 83283aa..6e1a173 100644 --- a/data/chips/STM32F031G6.json +++ b/data/chips/STM32F031G6.json @@ -1114,7 +1114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1284,7 +1284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1362,7 +1362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1440,7 +1440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1557,7 +1557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031K4.json b/data/chips/STM32F031K4.json index de9a929..b884cbd 100644 --- a/data/chips/STM32F031K4.json +++ b/data/chips/STM32F031K4.json @@ -1143,7 +1143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1484,7 +1484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1601,7 +1601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031K6.json b/data/chips/STM32F031K6.json index c8569a8..a5fc329 100644 --- a/data/chips/STM32F031K6.json +++ b/data/chips/STM32F031K6.json @@ -1341,7 +1341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1521,7 +1521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1604,7 +1604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1682,7 +1682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1799,7 +1799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038C6.json b/data/chips/STM32F038C6.json index 9ddf5b1..a19624a 100644 --- a/data/chips/STM32F038C6.json +++ b/data/chips/STM32F038C6.json @@ -1313,7 +1313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1513,7 +1513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1596,7 +1596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1679,7 +1679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038E6.json b/data/chips/STM32F038E6.json index e3e98ca..fac0621 100644 --- a/data/chips/STM32F038E6.json +++ b/data/chips/STM32F038E6.json @@ -1060,7 +1060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1308,7 +1308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1386,7 +1386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038F6.json b/data/chips/STM32F038F6.json index 1fc9b3c..89b4b3e 100644 --- a/data/chips/STM32F038F6.json +++ b/data/chips/STM32F038F6.json @@ -998,7 +998,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1148,7 +1148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1216,7 +1216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1289,7 +1289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1391,7 +1391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038G6.json b/data/chips/STM32F038G6.json index 7a2f2f9..f4cde7e 100644 --- a/data/chips/STM32F038G6.json +++ b/data/chips/STM32F038G6.json @@ -1110,7 +1110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1270,7 +1270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1348,7 +1348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1426,7 +1426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1543,7 +1543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038K6.json b/data/chips/STM32F038K6.json index b546118..870668a 100644 --- a/data/chips/STM32F038K6.json +++ b/data/chips/STM32F038K6.json @@ -1143,7 +1143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1484,7 +1484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1601,7 +1601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042C4.json b/data/chips/STM32F042C4.json index 3527a68..b5a1800 100644 --- a/data/chips/STM32F042C4.json +++ b/data/chips/STM32F042C4.json @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2097,7 +2097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2185,7 +2185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042C6.json b/data/chips/STM32F042C6.json index a773e40..f919956 100644 --- a/data/chips/STM32F042C6.json +++ b/data/chips/STM32F042C6.json @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2097,7 +2097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2185,7 +2185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042F4.json b/data/chips/STM32F042F4.json index 0ebdf9a..29618dc 100644 --- a/data/chips/STM32F042F4.json +++ b/data/chips/STM32F042F4.json @@ -1153,7 +1153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1396,7 +1396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1469,7 +1469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1571,7 +1571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042F6.json b/data/chips/STM32F042F6.json index 47f4a63..a8dcb56 100644 --- a/data/chips/STM32F042F6.json +++ b/data/chips/STM32F042F6.json @@ -1153,7 +1153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1396,7 +1396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1469,7 +1469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1571,7 +1571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042G4.json b/data/chips/STM32F042G4.json index 59dabc6..eb1c02d 100644 --- a/data/chips/STM32F042G4.json +++ b/data/chips/STM32F042G4.json @@ -1260,7 +1260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1435,7 +1435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1518,7 +1518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1601,7 +1601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042G6.json b/data/chips/STM32F042G6.json index 8e261d6..46f008b 100644 --- a/data/chips/STM32F042G6.json +++ b/data/chips/STM32F042G6.json @@ -1260,7 +1260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1435,7 +1435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1518,7 +1518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1601,7 +1601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042K4.json b/data/chips/STM32F042K4.json index 0c108b6..1cfe1fa 100644 --- a/data/chips/STM32F042K4.json +++ b/data/chips/STM32F042K4.json @@ -1495,7 +1495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1675,7 +1675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1841,7 +1841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1958,7 +1958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042K6.json b/data/chips/STM32F042K6.json index 3766f1e..92ae136 100644 --- a/data/chips/STM32F042K6.json +++ b/data/chips/STM32F042K6.json @@ -1495,7 +1495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1675,7 +1675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1841,7 +1841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1958,7 +1958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042T6.json b/data/chips/STM32F042T6.json index 9c4f084..75e2a31 100644 --- a/data/chips/STM32F042T6.json +++ b/data/chips/STM32F042T6.json @@ -1345,7 +1345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1608,7 +1608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1691,7 +1691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1808,7 +1808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048C6.json b/data/chips/STM32F048C6.json index 5fcb9ba..93375c4 100644 --- a/data/chips/STM32F048C6.json +++ b/data/chips/STM32F048C6.json @@ -1453,7 +1453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1653,7 +1653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1736,7 +1736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1824,7 +1824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1951,7 +1951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048G6.json b/data/chips/STM32F048G6.json index f5a21b4..9ca9389 100644 --- a/data/chips/STM32F048G6.json +++ b/data/chips/STM32F048G6.json @@ -1194,7 +1194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1359,7 +1359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1442,7 +1442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1642,7 +1642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048T6.json b/data/chips/STM32F048T6.json index cccc706..4f27e15 100644 --- a/data/chips/STM32F048T6.json +++ b/data/chips/STM32F048T6.json @@ -1283,7 +1283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1463,7 +1463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1546,7 +1546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1629,7 +1629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1746,7 +1746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C4.json b/data/chips/STM32F051C4.json index f7b9245..9c00507 100644 --- a/data/chips/STM32F051C4.json +++ b/data/chips/STM32F051C4.json @@ -1741,7 +1741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1941,7 +1941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2034,7 +2034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2200,7 +2200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2327,7 +2327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C6.json b/data/chips/STM32F051C6.json index 9121622..07c9782 100644 --- a/data/chips/STM32F051C6.json +++ b/data/chips/STM32F051C6.json @@ -1741,7 +1741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1941,7 +1941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2034,7 +2034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2200,7 +2200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2327,7 +2327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C8.json b/data/chips/STM32F051C8.json index 161a081..7ae2973 100644 --- a/data/chips/STM32F051C8.json +++ b/data/chips/STM32F051C8.json @@ -1861,7 +1861,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2061,7 +2061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2154,7 +2154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2237,7 +2237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2320,7 +2320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2447,7 +2447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K4.json b/data/chips/STM32F051K4.json index 0a6548b..840bced 100644 --- a/data/chips/STM32F051K4.json +++ b/data/chips/STM32F051K4.json @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1695,7 +1695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1856,7 +1856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2051,7 +2051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K6.json b/data/chips/STM32F051K6.json index 491548f..554dc8c 100644 --- a/data/chips/STM32F051K6.json +++ b/data/chips/STM32F051K6.json @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1695,7 +1695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1856,7 +1856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2051,7 +2051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K8.json b/data/chips/STM32F051K8.json index 5b06e81..234f428 100644 --- a/data/chips/STM32F051K8.json +++ b/data/chips/STM32F051K8.json @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1695,7 +1695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1856,7 +1856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2051,7 +2051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R4.json b/data/chips/STM32F051R4.json index 6ccac84..8d6c38c 100644 --- a/data/chips/STM32F051R4.json +++ b/data/chips/STM32F051R4.json @@ -1626,7 +1626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1919,7 +1919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2212,7 +2212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R6.json b/data/chips/STM32F051R6.json index 565ad20..c5eab49 100644 --- a/data/chips/STM32F051R6.json +++ b/data/chips/STM32F051R6.json @@ -1626,7 +1626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1919,7 +1919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2212,7 +2212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R8.json b/data/chips/STM32F051R8.json index be34f43..6ad6774 100644 --- a/data/chips/STM32F051R8.json +++ b/data/chips/STM32F051R8.json @@ -2077,7 +2077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2277,7 +2277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2453,7 +2453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2536,7 +2536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2663,7 +2663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051T8.json b/data/chips/STM32F051T8.json index d6a7687..fffbf43 100644 --- a/data/chips/STM32F051T8.json +++ b/data/chips/STM32F051T8.json @@ -1354,7 +1354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1534,7 +1534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1612,7 +1612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1690,7 +1690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1768,7 +1768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1885,7 +1885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058C8.json b/data/chips/STM32F058C8.json index 0c43347..805ea08 100644 --- a/data/chips/STM32F058C8.json +++ b/data/chips/STM32F058C8.json @@ -1567,7 +1567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1767,7 +1767,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1860,7 +1860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1943,7 +1943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2026,7 +2026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2153,7 +2153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058R8.json b/data/chips/STM32F058R8.json index 5fa66d7..0429a90 100644 --- a/data/chips/STM32F058R8.json +++ b/data/chips/STM32F058R8.json @@ -2077,7 +2077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2277,7 +2277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2453,7 +2453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2536,7 +2536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2663,7 +2663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058T8.json b/data/chips/STM32F058T8.json index 31493f4..77e09c7 100644 --- a/data/chips/STM32F058T8.json +++ b/data/chips/STM32F058T8.json @@ -1354,7 +1354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1534,7 +1534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1612,7 +1612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1690,7 +1690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1768,7 +1768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1885,7 +1885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070C6.json b/data/chips/STM32F070C6.json index 164abf3..4582a69 100644 --- a/data/chips/STM32F070C6.json +++ b/data/chips/STM32F070C6.json @@ -1268,7 +1268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1468,7 +1468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1551,7 +1551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1639,7 +1639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070CB.json b/data/chips/STM32F070CB.json index a51a56c..fd58e76 100644 --- a/data/chips/STM32F070CB.json +++ b/data/chips/STM32F070CB.json @@ -1380,7 +1380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1584,7 +1584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1687,7 +1687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1770,7 +1770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1858,7 +1858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070F6.json b/data/chips/STM32F070F6.json index 0840442..23fc7e6 100644 --- a/data/chips/STM32F070F6.json +++ b/data/chips/STM32F070F6.json @@ -1025,7 +1025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1195,7 +1195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1263,7 +1263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1336,7 +1336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070RB.json b/data/chips/STM32F070RB.json index 883fb47..3b85f3e 100644 --- a/data/chips/STM32F070RB.json +++ b/data/chips/STM32F070RB.json @@ -1510,7 +1510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1817,7 +1817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071C8.json b/data/chips/STM32F071C8.json index 3ebe2e1..314c0c8 100644 --- a/data/chips/STM32F071C8.json +++ b/data/chips/STM32F071C8.json @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2290,7 +2290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2381,7 +2381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2477,7 +2477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2612,7 +2612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071CB.json b/data/chips/STM32F071CB.json index e8cd869..715c5be 100644 --- a/data/chips/STM32F071CB.json +++ b/data/chips/STM32F071CB.json @@ -2283,7 +2283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2499,7 +2499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2789,7 +2789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2924,7 +2924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071RB.json b/data/chips/STM32F071RB.json index 44a6c02..62d5611 100644 --- a/data/chips/STM32F071RB.json +++ b/data/chips/STM32F071RB.json @@ -1829,7 +1829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2045,7 +2045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2239,7 +2239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2470,7 +2470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071V8.json b/data/chips/STM32F071V8.json index 8dc405d..7b7ac09 100644 --- a/data/chips/STM32F071V8.json +++ b/data/chips/STM32F071V8.json @@ -2734,7 +2734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2995,7 +2995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3108,7 +3108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3305,7 +3305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3440,7 +3440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071VB.json b/data/chips/STM32F071VB.json index 9037fcb..bb09ccb 100644 --- a/data/chips/STM32F071VB.json +++ b/data/chips/STM32F071VB.json @@ -2740,7 +2740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3001,7 +3001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3114,7 +3114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3210,7 +3210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3311,7 +3311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3446,7 +3446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072C8.json b/data/chips/STM32F072C8.json index 5022f4e..2c97823 100644 --- a/data/chips/STM32F072C8.json +++ b/data/chips/STM32F072C8.json @@ -2056,7 +2056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2272,7 +2272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2375,7 +2375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2562,7 +2562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2697,7 +2697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072CB.json b/data/chips/STM32F072CB.json index 1b27449..d26a25f 100644 --- a/data/chips/STM32F072CB.json +++ b/data/chips/STM32F072CB.json @@ -2356,7 +2356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2572,7 +2572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2675,7 +2675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2766,7 +2766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2862,7 +2862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2997,7 +2997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072R8.json b/data/chips/STM32F072R8.json index c4d2e69..c0a3760 100644 --- a/data/chips/STM32F072R8.json +++ b/data/chips/STM32F072R8.json @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2408,7 +2408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072RB.json b/data/chips/STM32F072RB.json index fc5fa2b..b0d07ae 100644 --- a/data/chips/STM32F072RB.json +++ b/data/chips/STM32F072RB.json @@ -2682,7 +2682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2898,7 +2898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3001,7 +3001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3092,7 +3092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3188,7 +3188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3323,7 +3323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072V8.json b/data/chips/STM32F072V8.json index 0c67878..8eedaa6 100644 --- a/data/chips/STM32F072V8.json +++ b/data/chips/STM32F072V8.json @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3293,7 +3293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3529,7 +3529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072VB.json b/data/chips/STM32F072VB.json index 32d330c..c0d6d9c 100644 --- a/data/chips/STM32F072VB.json +++ b/data/chips/STM32F072VB.json @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3293,7 +3293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3529,7 +3529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078CB.json b/data/chips/STM32F078CB.json index afc1af5..2ec38fd 100644 --- a/data/chips/STM32F078CB.json +++ b/data/chips/STM32F078CB.json @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2511,7 +2511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2614,7 +2614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2801,7 +2801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078RB.json b/data/chips/STM32F078RB.json index 2bd4f1a..c8b78aa 100644 --- a/data/chips/STM32F078RB.json +++ b/data/chips/STM32F078RB.json @@ -2231,7 +2231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2447,7 +2447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2550,7 +2550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2641,7 +2641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2737,7 +2737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2872,7 +2872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078VB.json b/data/chips/STM32F078VB.json index 942ae0e..8fb021b 100644 --- a/data/chips/STM32F078VB.json +++ b/data/chips/STM32F078VB.json @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3013,7 +3013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3126,7 +3126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3323,7 +3323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3458,7 +3458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091CB.json b/data/chips/STM32F091CB.json index a53ccfb..78d1170 100644 --- a/data/chips/STM32F091CB.json +++ b/data/chips/STM32F091CB.json @@ -2169,7 +2169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2702,7 +2702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091CC.json b/data/chips/STM32F091CC.json index d5d4f77..c369471 100644 --- a/data/chips/STM32F091CC.json +++ b/data/chips/STM32F091CC.json @@ -2169,7 +2169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2702,7 +2702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091RB.json b/data/chips/STM32F091RB.json index c991f49..7bdcf82 100644 --- a/data/chips/STM32F091RB.json +++ b/data/chips/STM32F091RB.json @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2242,7 +2242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2349,7 +2349,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2446,7 +2446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2690,7 +2690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091RC.json b/data/chips/STM32F091RC.json index c0caa92..a18624d 100644 --- a/data/chips/STM32F091RC.json +++ b/data/chips/STM32F091RC.json @@ -2795,7 +2795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3022,7 +3022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3328,7 +3328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091VB.json b/data/chips/STM32F091VB.json index a3994d1..78ea118 100644 --- a/data/chips/STM32F091VB.json +++ b/data/chips/STM32F091VB.json @@ -2330,7 +2330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2821,7 +2821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2928,7 +2928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3070,7 +3070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091VC.json b/data/chips/STM32F091VC.json index 9c6f9b5..32f2d2f 100644 --- a/data/chips/STM32F091VC.json +++ b/data/chips/STM32F091VC.json @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3427,7 +3427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098CC.json b/data/chips/STM32F098CC.json index bb07550..6485cfc 100644 --- a/data/chips/STM32F098CC.json +++ b/data/chips/STM32F098CC.json @@ -2169,7 +2169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2702,7 +2702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098RC.json b/data/chips/STM32F098RC.json index 290211e..5e879fb 100644 --- a/data/chips/STM32F098RC.json +++ b/data/chips/STM32F098RC.json @@ -2795,7 +2795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3022,7 +3022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3328,7 +3328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098VC.json b/data/chips/STM32F098VC.json index 0a54357..439e541 100644 --- a/data/chips/STM32F098VC.json +++ b/data/chips/STM32F098VC.json @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3427,7 +3427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C4.json b/data/chips/STM32F100C4.json index 771efda..60adfc3 100644 --- a/data/chips/STM32F100C4.json +++ b/data/chips/STM32F100C4.json @@ -1278,7 +1278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1417,7 +1417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1504,7 +1504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1575,7 +1575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1646,7 +1646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1753,7 +1753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C6.json b/data/chips/STM32F100C6.json index 0f637fc..2afe143 100644 --- a/data/chips/STM32F100C6.json +++ b/data/chips/STM32F100C6.json @@ -1278,7 +1278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1417,7 +1417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1504,7 +1504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1575,7 +1575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1646,7 +1646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1753,7 +1753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C8.json b/data/chips/STM32F100C8.json index c53f752..6f4ac9c 100644 --- a/data/chips/STM32F100C8.json +++ b/data/chips/STM32F100C8.json @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1614,7 +1614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1685,7 +1685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1756,7 +1756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1863,7 +1863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1954,7 +1954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100CB.json b/data/chips/STM32F100CB.json index 6d19fbe..745baf0 100644 --- a/data/chips/STM32F100CB.json +++ b/data/chips/STM32F100CB.json @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1614,7 +1614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1685,7 +1685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1756,7 +1756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1863,7 +1863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1954,7 +1954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R4.json b/data/chips/STM32F100R4.json index fee7028..6eb10f6 100644 --- a/data/chips/STM32F100R4.json +++ b/data/chips/STM32F100R4.json @@ -1788,7 +1788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1927,7 +1927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2263,7 +2263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R6.json b/data/chips/STM32F100R6.json index e1a9f0b..f03d71c 100644 --- a/data/chips/STM32F100R6.json +++ b/data/chips/STM32F100R6.json @@ -1788,7 +1788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1927,7 +1927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2263,7 +2263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R8.json b/data/chips/STM32F100R8.json index 728f584..f469372 100644 --- a/data/chips/STM32F100R8.json +++ b/data/chips/STM32F100R8.json @@ -1898,7 +1898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2037,7 +2037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RB.json b/data/chips/STM32F100RB.json index 4a0cc18..2523a8a 100644 --- a/data/chips/STM32F100RB.json +++ b/data/chips/STM32F100RB.json @@ -1898,7 +1898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2037,7 +2037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RC.json b/data/chips/STM32F100RC.json index 19abc01..d6abc44 100644 --- a/data/chips/STM32F100RC.json +++ b/data/chips/STM32F100RC.json @@ -1652,7 +1652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1958,7 +1958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2045,7 +2045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2116,7 +2116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RD.json b/data/chips/STM32F100RD.json index 7045148..b520173 100644 --- a/data/chips/STM32F100RD.json +++ b/data/chips/STM32F100RD.json @@ -1652,7 +1652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1958,7 +1958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2045,7 +2045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2116,7 +2116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RE.json b/data/chips/STM32F100RE.json index a61061f..432f988 100644 --- a/data/chips/STM32F100RE.json +++ b/data/chips/STM32F100RE.json @@ -1652,7 +1652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1958,7 +1958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2045,7 +2045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2116,7 +2116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100V8.json b/data/chips/STM32F100V8.json index e2dd5c2..9a55860 100644 --- a/data/chips/STM32F100V8.json +++ b/data/chips/STM32F100V8.json @@ -1716,7 +1716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1978,7 +1978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2120,7 +2120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2227,7 +2227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2338,7 +2338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VB.json b/data/chips/STM32F100VB.json index ddb431c..f03ad90 100644 --- a/data/chips/STM32F100VB.json +++ b/data/chips/STM32F100VB.json @@ -1716,7 +1716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1978,7 +1978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2120,7 +2120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2227,7 +2227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2338,7 +2338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VC.json b/data/chips/STM32F100VC.json index 9e29dc6..7939372 100644 --- a/data/chips/STM32F100VC.json +++ b/data/chips/STM32F100VC.json @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2500,7 +2500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2571,7 +2571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2642,7 +2642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VD.json b/data/chips/STM32F100VD.json index 8f732a1..26e0930 100644 --- a/data/chips/STM32F100VD.json +++ b/data/chips/STM32F100VD.json @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2500,7 +2500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2571,7 +2571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2642,7 +2642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VE.json b/data/chips/STM32F100VE.json index 158e0e4..27e0458 100644 --- a/data/chips/STM32F100VE.json +++ b/data/chips/STM32F100VE.json @@ -2071,7 +2071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2500,7 +2500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2571,7 +2571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2642,7 +2642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2749,7 +2749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2860,7 +2860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZC.json b/data/chips/STM32F100ZC.json index 16110ee..a510df0 100644 --- a/data/chips/STM32F100ZC.json +++ b/data/chips/STM32F100ZC.json @@ -2419,7 +2419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2848,7 +2848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2919,7 +2919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZD.json b/data/chips/STM32F100ZD.json index 9f840f9..da2fd1e 100644 --- a/data/chips/STM32F100ZD.json +++ b/data/chips/STM32F100ZD.json @@ -2419,7 +2419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2848,7 +2848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2919,7 +2919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZE.json b/data/chips/STM32F100ZE.json index cfa98a2..559e065 100644 --- a/data/chips/STM32F100ZE.json +++ b/data/chips/STM32F100ZE.json @@ -2419,7 +2419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2848,7 +2848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2919,7 +2919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C4.json b/data/chips/STM32F101C4.json index 065fd78..5f79717 100644 --- a/data/chips/STM32F101C4.json +++ b/data/chips/STM32F101C4.json @@ -1189,7 +1189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C6.json b/data/chips/STM32F101C6.json index c708508..591a00f 100644 --- a/data/chips/STM32F101C6.json +++ b/data/chips/STM32F101C6.json @@ -1195,7 +1195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1302,7 +1302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C8.json b/data/chips/STM32F101C8.json index d332cd0..5776b3b 100644 --- a/data/chips/STM32F101C8.json +++ b/data/chips/STM32F101C8.json @@ -1620,7 +1620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1727,7 +1727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101CB.json b/data/chips/STM32F101CB.json index 856dd04..47bc2ce 100644 --- a/data/chips/STM32F101CB.json +++ b/data/chips/STM32F101CB.json @@ -1614,7 +1614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1721,7 +1721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1812,7 +1812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R4.json b/data/chips/STM32F101R4.json index 01e6cbb..66ce50f 100644 --- a/data/chips/STM32F101R4.json +++ b/data/chips/STM32F101R4.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1422,7 +1422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R6.json b/data/chips/STM32F101R6.json index d1b597a..92e349c 100644 --- a/data/chips/STM32F101R6.json +++ b/data/chips/STM32F101R6.json @@ -1321,7 +1321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1428,7 +1428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R8.json b/data/chips/STM32F101R8.json index 5638fa3..486a63d 100644 --- a/data/chips/STM32F101R8.json +++ b/data/chips/STM32F101R8.json @@ -1452,7 +1452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1559,7 +1559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1670,7 +1670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RB.json b/data/chips/STM32F101RB.json index 4c6c359..64c1ec7 100644 --- a/data/chips/STM32F101RB.json +++ b/data/chips/STM32F101RB.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1949,7 +1949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RC.json b/data/chips/STM32F101RC.json index f796500..35f4fbe 100644 --- a/data/chips/STM32F101RC.json +++ b/data/chips/STM32F101RC.json @@ -1635,7 +1635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1853,7 +1853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1932,7 +1932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RD.json b/data/chips/STM32F101RD.json index ef1e41e..fb396eb 100644 --- a/data/chips/STM32F101RD.json +++ b/data/chips/STM32F101RD.json @@ -1635,7 +1635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1853,7 +1853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1932,7 +1932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RE.json b/data/chips/STM32F101RE.json index b7ef470..b9004ac 100644 --- a/data/chips/STM32F101RE.json +++ b/data/chips/STM32F101RE.json @@ -1635,7 +1635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1853,7 +1853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1932,7 +1932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RF.json b/data/chips/STM32F101RF.json index e0adf0b..873c922 100644 --- a/data/chips/STM32F101RF.json +++ b/data/chips/STM32F101RF.json @@ -1901,7 +1901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2008,7 +2008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2198,7 +2198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RG.json b/data/chips/STM32F101RG.json index a026663..92ec988 100644 --- a/data/chips/STM32F101RG.json +++ b/data/chips/STM32F101RG.json @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1990,7 +1990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2101,7 +2101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2180,7 +2180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T4.json b/data/chips/STM32F101T4.json index 14cfebe..eabf9fc 100644 --- a/data/chips/STM32F101T4.json +++ b/data/chips/STM32F101T4.json @@ -1091,7 +1091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1190,7 +1190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T6.json b/data/chips/STM32F101T6.json index 08e0751..020160c 100644 --- a/data/chips/STM32F101T6.json +++ b/data/chips/STM32F101T6.json @@ -1091,7 +1091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1190,7 +1190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T8.json b/data/chips/STM32F101T8.json index 9573420..11d232f 100644 --- a/data/chips/STM32F101T8.json +++ b/data/chips/STM32F101T8.json @@ -1118,7 +1118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1217,7 +1217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1308,7 +1308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101TB.json b/data/chips/STM32F101TB.json index 6af1fae..830b962 100644 --- a/data/chips/STM32F101TB.json +++ b/data/chips/STM32F101TB.json @@ -1106,7 +1106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1205,7 +1205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101V8.json b/data/chips/STM32F101V8.json index d3ea032..9781af7 100644 --- a/data/chips/STM32F101V8.json +++ b/data/chips/STM32F101V8.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1761,7 +1761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1872,7 +1872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VB.json b/data/chips/STM32F101VB.json index a427624..37ce625 100644 --- a/data/chips/STM32F101VB.json +++ b/data/chips/STM32F101VB.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1761,7 +1761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1872,7 +1872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VC.json b/data/chips/STM32F101VC.json index 9b64e1d..94e4042 100644 --- a/data/chips/STM32F101VC.json +++ b/data/chips/STM32F101VC.json @@ -2066,7 +2066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2173,7 +2173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VD.json b/data/chips/STM32F101VD.json index 15c6195..fe9994d 100644 --- a/data/chips/STM32F101VD.json +++ b/data/chips/STM32F101VD.json @@ -2066,7 +2066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2173,7 +2173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VE.json b/data/chips/STM32F101VE.json index 93111fa..797083f 100644 --- a/data/chips/STM32F101VE.json +++ b/data/chips/STM32F101VE.json @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2167,7 +2167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VF.json b/data/chips/STM32F101VF.json index da203dd..b770a49 100644 --- a/data/chips/STM32F101VF.json +++ b/data/chips/STM32F101VF.json @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VG.json b/data/chips/STM32F101VG.json index 64899ab..1a95206 100644 --- a/data/chips/STM32F101VG.json +++ b/data/chips/STM32F101VG.json @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZC.json b/data/chips/STM32F101ZC.json index 7960d58..17527c8 100644 --- a/data/chips/STM32F101ZC.json +++ b/data/chips/STM32F101ZC.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZD.json b/data/chips/STM32F101ZD.json index 2caab54..aa568d5 100644 --- a/data/chips/STM32F101ZD.json +++ b/data/chips/STM32F101ZD.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZE.json b/data/chips/STM32F101ZE.json index 57220ac..fbf84b1 100644 --- a/data/chips/STM32F101ZE.json +++ b/data/chips/STM32F101ZE.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZF.json b/data/chips/STM32F101ZF.json index 12feb3a..8bf1d08 100644 --- a/data/chips/STM32F101ZF.json +++ b/data/chips/STM32F101ZF.json @@ -2698,7 +2698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2916,7 +2916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZG.json b/data/chips/STM32F101ZG.json index 1f7c46b..1a7974b 100644 --- a/data/chips/STM32F101ZG.json +++ b/data/chips/STM32F101ZG.json @@ -2722,7 +2722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2829,7 +2829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2940,7 +2940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3039,7 +3039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C4.json b/data/chips/STM32F102C4.json index 6e116a3..69ac3ea 100644 --- a/data/chips/STM32F102C4.json +++ b/data/chips/STM32F102C4.json @@ -1189,7 +1189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C6.json b/data/chips/STM32F102C6.json index 764b5cc..4edb02b 100644 --- a/data/chips/STM32F102C6.json +++ b/data/chips/STM32F102C6.json @@ -1189,7 +1189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C8.json b/data/chips/STM32F102C8.json index 67a7edd..824989b 100644 --- a/data/chips/STM32F102C8.json +++ b/data/chips/STM32F102C8.json @@ -1299,7 +1299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1497,7 +1497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102CB.json b/data/chips/STM32F102CB.json index c376e4e..b01120d 100644 --- a/data/chips/STM32F102CB.json +++ b/data/chips/STM32F102CB.json @@ -1299,7 +1299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1497,7 +1497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R4.json b/data/chips/STM32F102R4.json index 8de3e10..a3f3f6f 100644 --- a/data/chips/STM32F102R4.json +++ b/data/chips/STM32F102R4.json @@ -1309,7 +1309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1416,7 +1416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R6.json b/data/chips/STM32F102R6.json index 0baab8d..323d66e 100644 --- a/data/chips/STM32F102R6.json +++ b/data/chips/STM32F102R6.json @@ -1309,7 +1309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1416,7 +1416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R8.json b/data/chips/STM32F102R8.json index e2380e8..58da4bd 100644 --- a/data/chips/STM32F102R8.json +++ b/data/chips/STM32F102R8.json @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1526,7 +1526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102RB.json b/data/chips/STM32F102RB.json index e3d5936..7f8ff99 100644 --- a/data/chips/STM32F102RB.json +++ b/data/chips/STM32F102RB.json @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1526,7 +1526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C4.json b/data/chips/STM32F103C4.json index a640f0c..dd7e0d5 100644 --- a/data/chips/STM32F103C4.json +++ b/data/chips/STM32F103C4.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1442,7 +1442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1549,7 +1549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C6.json b/data/chips/STM32F103C6.json index bc5cbb2..88e31b4 100644 --- a/data/chips/STM32F103C6.json +++ b/data/chips/STM32F103C6.json @@ -1615,7 +1615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C8.json b/data/chips/STM32F103C8.json index 7e502fb..313fe96 100644 --- a/data/chips/STM32F103C8.json +++ b/data/chips/STM32F103C8.json @@ -1452,7 +1452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1579,7 +1579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1686,7 +1686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1777,7 +1777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103CB.json b/data/chips/STM32F103CB.json index 38a335e..678843f 100644 --- a/data/chips/STM32F103CB.json +++ b/data/chips/STM32F103CB.json @@ -1740,7 +1740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1867,7 +1867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1974,7 +1974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2065,7 +2065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R4.json b/data/chips/STM32F103R4.json index 629a90a..7c0435d 100644 --- a/data/chips/STM32F103R4.json +++ b/data/chips/STM32F103R4.json @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1976,7 +1976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2083,7 +2083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R6.json b/data/chips/STM32F103R6.json index ee903b4..aaefd28 100644 --- a/data/chips/STM32F103R6.json +++ b/data/chips/STM32F103R6.json @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1982,7 +1982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2089,7 +2089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R8.json b/data/chips/STM32F103R8.json index 1b1b2ec..ef78ddc 100644 --- a/data/chips/STM32F103R8.json +++ b/data/chips/STM32F103R8.json @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2113,7 +2113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2220,7 +2220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2331,7 +2331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103RB.json b/data/chips/STM32F103RB.json index 877196a..bf68c2b 100644 --- a/data/chips/STM32F103RB.json +++ b/data/chips/STM32F103RB.json @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2113,7 +2113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2220,7 +2220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2331,7 +2331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103RC.json b/data/chips/STM32F103RC.json index 27498bb..00cbcd5 100644 --- a/data/chips/STM32F103RC.json +++ b/data/chips/STM32F103RC.json @@ -2333,7 +2333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2678,7 +2678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2942,7 +2942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RD.json b/data/chips/STM32F103RD.json index e5b6939..47e5a40 100644 --- a/data/chips/STM32F103RD.json +++ b/data/chips/STM32F103RD.json @@ -2333,7 +2333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2678,7 +2678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2942,7 +2942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RE.json b/data/chips/STM32F103RE.json index 074fffa..01b07c9 100644 --- a/data/chips/STM32F103RE.json +++ b/data/chips/STM32F103RE.json @@ -2333,7 +2333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2678,7 +2678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2942,7 +2942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RF.json b/data/chips/STM32F103RF.json index 891e234..f00c0f7 100644 --- a/data/chips/STM32F103RF.json +++ b/data/chips/STM32F103RF.json @@ -1948,7 +1948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2621,7 +2621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2806,7 +2806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RG.json b/data/chips/STM32F103RG.json index ddc1ac0..3aad1d5 100644 --- a/data/chips/STM32F103RG.json +++ b/data/chips/STM32F103RG.json @@ -1948,7 +1948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2621,7 +2621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2806,7 +2806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103T4.json b/data/chips/STM32F103T4.json index 267aed2..4e5a0da 100644 --- a/data/chips/STM32F103T4.json +++ b/data/chips/STM32F103T4.json @@ -1209,7 +1209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1320,7 +1320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103T6.json b/data/chips/STM32F103T6.json index 8e986d7..9ab5f06 100644 --- a/data/chips/STM32F103T6.json +++ b/data/chips/STM32F103T6.json @@ -1209,7 +1209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1320,7 +1320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103T8.json b/data/chips/STM32F103T8.json index 8a2c796..042e105 100644 --- a/data/chips/STM32F103T8.json +++ b/data/chips/STM32F103T8.json @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1341,7 +1341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1440,7 +1440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1531,7 +1531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103TB.json b/data/chips/STM32F103TB.json index 73b4c3b..67b57e0 100644 --- a/data/chips/STM32F103TB.json +++ b/data/chips/STM32F103TB.json @@ -1224,7 +1224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1335,7 +1335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1434,7 +1434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103V8.json b/data/chips/STM32F103V8.json index bcbe13c..f6711a4 100644 --- a/data/chips/STM32F103V8.json +++ b/data/chips/STM32F103V8.json @@ -2418,7 +2418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2581,7 +2581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2688,7 +2688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2799,7 +2799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103VB.json b/data/chips/STM32F103VB.json index b8026a8..3656162 100644 --- a/data/chips/STM32F103VB.json +++ b/data/chips/STM32F103VB.json @@ -3024,7 +3024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3187,7 +3187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3294,7 +3294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3405,7 +3405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103VC.json b/data/chips/STM32F103VC.json index 37519a3..2dfcafc 100644 --- a/data/chips/STM32F103VC.json +++ b/data/chips/STM32F103VC.json @@ -2994,7 +2994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3157,7 +3157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3375,7 +3375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3474,7 +3474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3659,7 +3659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VD.json b/data/chips/STM32F103VD.json index 8059d4b..84ffc2e 100644 --- a/data/chips/STM32F103VD.json +++ b/data/chips/STM32F103VD.json @@ -2994,7 +2994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3157,7 +3157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3375,7 +3375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3474,7 +3474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3659,7 +3659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VE.json b/data/chips/STM32F103VE.json index d3d5081..3726322 100644 --- a/data/chips/STM32F103VE.json +++ b/data/chips/STM32F103VE.json @@ -2994,7 +2994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3157,7 +3157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3375,7 +3375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3474,7 +3474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3659,7 +3659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VF.json b/data/chips/STM32F103VF.json index 05b57f6..e4922e1 100644 --- a/data/chips/STM32F103VF.json +++ b/data/chips/STM32F103VF.json @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2912,7 +2912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3023,7 +3023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VG.json b/data/chips/STM32F103VG.json index 42d553e..6b37ec0 100644 --- a/data/chips/STM32F103VG.json +++ b/data/chips/STM32F103VG.json @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2912,7 +2912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3023,7 +3023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZC.json b/data/chips/STM32F103ZC.json index 1e43a61..6115775 100644 --- a/data/chips/STM32F103ZC.json +++ b/data/chips/STM32F103ZC.json @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3940,7 +3940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4051,7 +4051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4150,7 +4150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4335,7 +4335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZD.json b/data/chips/STM32F103ZD.json index 09b6cb0..47bd3f7 100644 --- a/data/chips/STM32F103ZD.json +++ b/data/chips/STM32F103ZD.json @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3940,7 +3940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4051,7 +4051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4150,7 +4150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4335,7 +4335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZE.json b/data/chips/STM32F103ZE.json index 15e1d93..26f437e 100644 --- a/data/chips/STM32F103ZE.json +++ b/data/chips/STM32F103ZE.json @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3940,7 +3940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4051,7 +4051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4150,7 +4150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4335,7 +4335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZF.json b/data/chips/STM32F103ZF.json index dca5a44..3639e3f 100644 --- a/data/chips/STM32F103ZF.json +++ b/data/chips/STM32F103ZF.json @@ -3675,7 +3675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4420,7 +4420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4605,7 +4605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZG.json b/data/chips/STM32F103ZG.json index 27dc98a..51cbfc4 100644 --- a/data/chips/STM32F103ZG.json +++ b/data/chips/STM32F103ZG.json @@ -3675,7 +3675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4420,7 +4420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4605,7 +4605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F105R8.json b/data/chips/STM32F105R8.json index 34d4063..ed49f2c 100644 --- a/data/chips/STM32F105R8.json +++ b/data/chips/STM32F105R8.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2076,7 +2076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105RB.json b/data/chips/STM32F105RB.json index 1d41dee..786f6cd 100644 --- a/data/chips/STM32F105RB.json +++ b/data/chips/STM32F105RB.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2076,7 +2076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105RC.json b/data/chips/STM32F105RC.json index 4e29409..5b5e88a 100644 --- a/data/chips/STM32F105RC.json +++ b/data/chips/STM32F105RC.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2076,7 +2076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105V8.json b/data/chips/STM32F105V8.json index 622b92b..fdd25b3 100644 --- a/data/chips/STM32F105V8.json +++ b/data/chips/STM32F105V8.json @@ -2664,7 +2664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2827,7 +2827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2934,7 +2934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3144,7 +3144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105VB.json b/data/chips/STM32F105VB.json index 1a8725b..c4838cf 100644 --- a/data/chips/STM32F105VB.json +++ b/data/chips/STM32F105VB.json @@ -2664,7 +2664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2827,7 +2827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2934,7 +2934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3144,7 +3144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105VC.json b/data/chips/STM32F105VC.json index 5074d07..1841e8b 100644 --- a/data/chips/STM32F105VC.json +++ b/data/chips/STM32F105VC.json @@ -2058,7 +2058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2439,7 +2439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2538,7 +2538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107RB.json b/data/chips/STM32F107RB.json index 1d27388..ec5afa4 100644 --- a/data/chips/STM32F107RB.json +++ b/data/chips/STM32F107RB.json @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2027,7 +2027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2134,7 +2134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2245,7 +2245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107RC.json b/data/chips/STM32F107RC.json index a14ca5e..0407913 100644 --- a/data/chips/STM32F107RC.json +++ b/data/chips/STM32F107RC.json @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2027,7 +2027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2134,7 +2134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2245,7 +2245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107VB.json b/data/chips/STM32F107VB.json index 6d6ea22..1f30b30 100644 --- a/data/chips/STM32F107VB.json +++ b/data/chips/STM32F107VB.json @@ -2140,7 +2140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2410,7 +2410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2620,7 +2620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107VC.json b/data/chips/STM32F107VC.json index e2a3db5..9607b73 100644 --- a/data/chips/STM32F107VC.json +++ b/data/chips/STM32F107VC.json @@ -2746,7 +2746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2909,7 +2909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3016,7 +3016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3127,7 +3127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F205RB.json b/data/chips/STM32F205RB.json index 84a27e0..b20c1a2 100644 --- a/data/chips/STM32F205RB.json +++ b/data/chips/STM32F205RB.json @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2812,7 +2812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2954,7 +2954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3086,7 +3086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3173,7 +3173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RC.json b/data/chips/STM32F205RC.json index b8a5c9b..eb8f49d 100644 --- a/data/chips/STM32F205RC.json +++ b/data/chips/STM32F205RC.json @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3184,7 +3184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RE.json b/data/chips/STM32F205RE.json index 6e89eb1..005b2d2 100644 --- a/data/chips/STM32F205RE.json +++ b/data/chips/STM32F205RE.json @@ -2798,7 +2798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3225,7 +3225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3367,7 +3367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3499,7 +3499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3586,7 +3586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3803,7 +3803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RF.json b/data/chips/STM32F205RF.json index 29f11cb..9050f9c 100644 --- a/data/chips/STM32F205RF.json +++ b/data/chips/STM32F205RF.json @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3184,7 +3184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RG.json b/data/chips/STM32F205RG.json index b814ff7..32a912f 100644 --- a/data/chips/STM32F205RG.json +++ b/data/chips/STM32F205RG.json @@ -3200,7 +3200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3627,7 +3627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3901,7 +3901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3988,7 +3988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4205,7 +4205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VB.json b/data/chips/STM32F205VB.json index 8ee30ee..8d1d2f3 100644 --- a/data/chips/STM32F205VB.json +++ b/data/chips/STM32F205VB.json @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3367,7 +3367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3641,7 +3641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3753,7 +3753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3970,7 +3970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VC.json b/data/chips/STM32F205VC.json index 88dbb20..a9b391d 100644 --- a/data/chips/STM32F205VC.json +++ b/data/chips/STM32F205VC.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3764,7 +3764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VE.json b/data/chips/STM32F205VE.json index 3bb3ea3..3af9866 100644 --- a/data/chips/STM32F205VE.json +++ b/data/chips/STM32F205VE.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3764,7 +3764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VF.json b/data/chips/STM32F205VF.json index ac48e65..9d1e97c 100644 --- a/data/chips/STM32F205VF.json +++ b/data/chips/STM32F205VF.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3764,7 +3764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VG.json b/data/chips/STM32F205VG.json index 837e10b..1c70224 100644 --- a/data/chips/STM32F205VG.json +++ b/data/chips/STM32F205VG.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3764,7 +3764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZC.json b/data/chips/STM32F205ZC.json index f65d922..7cd3ca6 100644 --- a/data/chips/STM32F205ZC.json +++ b/data/chips/STM32F205ZC.json @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4467,7 +4467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZE.json b/data/chips/STM32F205ZE.json index 7761cf9..7a704d5 100644 --- a/data/chips/STM32F205ZE.json +++ b/data/chips/STM32F205ZE.json @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4467,7 +4467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZF.json b/data/chips/STM32F205ZF.json index d6d259a..53d0c96 100644 --- a/data/chips/STM32F205ZF.json +++ b/data/chips/STM32F205ZF.json @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4467,7 +4467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZG.json b/data/chips/STM32F205ZG.json index 5db53f2..4339138 100644 --- a/data/chips/STM32F205ZG.json +++ b/data/chips/STM32F205ZG.json @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4467,7 +4467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IC.json b/data/chips/STM32F207IC.json index 0f12592..fae60d3 100644 --- a/data/chips/STM32F207IC.json +++ b/data/chips/STM32F207IC.json @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IE.json b/data/chips/STM32F207IE.json index 5d45a40..8a672fb 100644 --- a/data/chips/STM32F207IE.json +++ b/data/chips/STM32F207IE.json @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IF.json b/data/chips/STM32F207IF.json index f5c7b78..4729552 100644 --- a/data/chips/STM32F207IF.json +++ b/data/chips/STM32F207IF.json @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IG.json b/data/chips/STM32F207IG.json index 6975c99..f646c3c 100644 --- a/data/chips/STM32F207IG.json +++ b/data/chips/STM32F207IG.json @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VC.json b/data/chips/STM32F207VC.json index da9cf18..d67a1bc 100644 --- a/data/chips/STM32F207VC.json +++ b/data/chips/STM32F207VC.json @@ -3195,7 +3195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3809,7 +3809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VE.json b/data/chips/STM32F207VE.json index ba4ed7a..c9226fc 100644 --- a/data/chips/STM32F207VE.json +++ b/data/chips/STM32F207VE.json @@ -3195,7 +3195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3809,7 +3809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VF.json b/data/chips/STM32F207VF.json index fd73648..04b3eed 100644 --- a/data/chips/STM32F207VF.json +++ b/data/chips/STM32F207VF.json @@ -3195,7 +3195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3809,7 +3809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VG.json b/data/chips/STM32F207VG.json index cd9c282..6cb9f55 100644 --- a/data/chips/STM32F207VG.json +++ b/data/chips/STM32F207VG.json @@ -3195,7 +3195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3809,7 +3809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZC.json b/data/chips/STM32F207ZC.json index b1399df..290d0c2 100644 --- a/data/chips/STM32F207ZC.json +++ b/data/chips/STM32F207ZC.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZE.json b/data/chips/STM32F207ZE.json index aa32b93..fc5d9d1 100644 --- a/data/chips/STM32F207ZE.json +++ b/data/chips/STM32F207ZE.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZF.json b/data/chips/STM32F207ZF.json index 34c6087..2124059 100644 --- a/data/chips/STM32F207ZF.json +++ b/data/chips/STM32F207ZF.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZG.json b/data/chips/STM32F207ZG.json index 985a127..4d66d27 100644 --- a/data/chips/STM32F207ZG.json +++ b/data/chips/STM32F207ZG.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215RE.json b/data/chips/STM32F215RE.json index 5353add..499841d 100644 --- a/data/chips/STM32F215RE.json +++ b/data/chips/STM32F215RE.json @@ -2465,7 +2465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3034,7 +3034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3166,7 +3166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215RG.json b/data/chips/STM32F215RG.json index 0c0c2ba..5ccc631 100644 --- a/data/chips/STM32F215RG.json +++ b/data/chips/STM32F215RG.json @@ -2465,7 +2465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3034,7 +3034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3166,7 +3166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215VE.json b/data/chips/STM32F215VE.json index 59a12cc..859a080 100644 --- a/data/chips/STM32F215VE.json +++ b/data/chips/STM32F215VE.json @@ -2975,7 +2975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3447,7 +3447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3721,7 +3721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4050,7 +4050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215VG.json b/data/chips/STM32F215VG.json index b7d9736..49eb2ad 100644 --- a/data/chips/STM32F215VG.json +++ b/data/chips/STM32F215VG.json @@ -2975,7 +2975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3447,7 +3447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3721,7 +3721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4050,7 +4050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215ZE.json b/data/chips/STM32F215ZE.json index dd52199..6373df4 100644 --- a/data/chips/STM32F215ZE.json +++ b/data/chips/STM32F215ZE.json @@ -3441,7 +3441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3933,7 +3933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4319,7 +4319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4536,7 +4536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215ZG.json b/data/chips/STM32F215ZG.json index ea886db..f72b418 100644 --- a/data/chips/STM32F215ZG.json +++ b/data/chips/STM32F215ZG.json @@ -3441,7 +3441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3933,7 +3933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4319,7 +4319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4536,7 +4536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217IE.json b/data/chips/STM32F217IE.json index 4be6baf..a57b48d 100644 --- a/data/chips/STM32F217IE.json +++ b/data/chips/STM32F217IE.json @@ -5344,7 +5344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5846,7 +5846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5988,7 +5988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6232,7 +6232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6469,7 +6469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217IG.json b/data/chips/STM32F217IG.json index 1b24d97..f5c02ed 100644 --- a/data/chips/STM32F217IG.json +++ b/data/chips/STM32F217IG.json @@ -5344,7 +5344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5846,7 +5846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5988,7 +5988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6232,7 +6232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6469,7 +6469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217VE.json b/data/chips/STM32F217VE.json index 5bf02f7..3796a4c 100644 --- a/data/chips/STM32F217VE.json +++ b/data/chips/STM32F217VE.json @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3736,7 +3736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3878,7 +3878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4122,7 +4122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4339,7 +4339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217VG.json b/data/chips/STM32F217VG.json index 2d47b91..e5ae3ca 100644 --- a/data/chips/STM32F217VG.json +++ b/data/chips/STM32F217VG.json @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3736,7 +3736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3878,7 +3878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4122,7 +4122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4339,7 +4339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217ZE.json b/data/chips/STM32F217ZE.json index 9ea782c..5ec6737 100644 --- a/data/chips/STM32F217ZE.json +++ b/data/chips/STM32F217ZE.json @@ -3760,7 +3760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4526,7 +4526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217ZG.json b/data/chips/STM32F217ZG.json index 7552007..720f9a1 100644 --- a/data/chips/STM32F217ZG.json +++ b/data/chips/STM32F217ZG.json @@ -3760,7 +3760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4526,7 +4526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F301C6.json b/data/chips/STM32F301C6.json index cb6a782..b95a5b3 100644 --- a/data/chips/STM32F301C6.json +++ b/data/chips/STM32F301C6.json @@ -1732,7 +1732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1915,7 +1915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2016,7 +2016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2213,7 +2213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301C8.json b/data/chips/STM32F301C8.json index 76310fa..ac6bf09 100644 --- a/data/chips/STM32F301C8.json +++ b/data/chips/STM32F301C8.json @@ -2038,7 +2038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2423,7 +2423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301K6.json b/data/chips/STM32F301K6.json index 31c1b57..086c506 100644 --- a/data/chips/STM32F301K6.json +++ b/data/chips/STM32F301K6.json @@ -1696,7 +1696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1935,7 +1935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2122,7 +2122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301K8.json b/data/chips/STM32F301K8.json index c0eb389..16643aa 100644 --- a/data/chips/STM32F301K8.json +++ b/data/chips/STM32F301K8.json @@ -1702,7 +1702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1941,7 +1941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2037,7 +2037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2128,7 +2128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301R6.json b/data/chips/STM32F301R6.json index a9dfc40..09926bf 100644 --- a/data/chips/STM32F301R6.json +++ b/data/chips/STM32F301R6.json @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2115,7 +2115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2418,7 +2418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301R8.json b/data/chips/STM32F301R8.json index 3f36999..4e4d96e 100644 --- a/data/chips/STM32F301R8.json +++ b/data/chips/STM32F301R8.json @@ -1908,7 +1908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2121,7 +2121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2227,7 +2227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2424,7 +2424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302C6.json b/data/chips/STM32F302C6.json index 66f223c..77bcbc1 100644 --- a/data/chips/STM32F302C6.json +++ b/data/chips/STM32F302C6.json @@ -1805,7 +1805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2089,7 +2089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2190,7 +2190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2286,7 +2286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302C8.json b/data/chips/STM32F302C8.json index 7e43805..a8c2027 100644 --- a/data/chips/STM32F302C8.json +++ b/data/chips/STM32F302C8.json @@ -2105,7 +2105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2288,7 +2288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2389,7 +2389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2490,7 +2490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302CB.json b/data/chips/STM32F302CB.json index cabcdb2..bf0d98e 100644 --- a/data/chips/STM32F302CB.json +++ b/data/chips/STM32F302CB.json @@ -2038,7 +2038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2423,7 +2423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2659,7 +2659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2771,7 +2771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302CC.json b/data/chips/STM32F302CC.json index b8cbf46..75f9638 100644 --- a/data/chips/STM32F302CC.json +++ b/data/chips/STM32F302CC.json @@ -2038,7 +2038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2423,7 +2423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2659,7 +2659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2771,7 +2771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302K6.json b/data/chips/STM32F302K6.json index 151d54c..f51b917 100644 --- a/data/chips/STM32F302K6.json +++ b/data/chips/STM32F302K6.json @@ -1552,7 +1552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1700,7 +1700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302K8.json b/data/chips/STM32F302K8.json index 2769bee..38d1a0b 100644 --- a/data/chips/STM32F302K8.json +++ b/data/chips/STM32F302K8.json @@ -1552,7 +1552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1700,7 +1700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302R6.json b/data/chips/STM32F302R6.json index 567ea43..585c117 100644 --- a/data/chips/STM32F302R6.json +++ b/data/chips/STM32F302R6.json @@ -1975,7 +1975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2188,7 +2188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2395,7 +2395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2491,7 +2491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302R8.json b/data/chips/STM32F302R8.json index a07d102..61c64cb 100644 --- a/data/chips/STM32F302R8.json +++ b/data/chips/STM32F302R8.json @@ -1975,7 +1975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2188,7 +2188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2395,7 +2395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2491,7 +2491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RB.json b/data/chips/STM32F302RB.json index 3249126..352ec6a 100644 --- a/data/chips/STM32F302RB.json +++ b/data/chips/STM32F302RB.json @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2533,7 +2533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2634,7 +2634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2730,7 +2730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2870,7 +2870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3007,7 +3007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RC.json b/data/chips/STM32F302RC.json index 179d1b4..c6b09f9 100644 --- a/data/chips/STM32F302RC.json +++ b/data/chips/STM32F302RC.json @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2533,7 +2533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2634,7 +2634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2730,7 +2730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2870,7 +2870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3007,7 +3007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RD.json b/data/chips/STM32F302RD.json index 672b178..f431906 100644 --- a/data/chips/STM32F302RD.json +++ b/data/chips/STM32F302RD.json @@ -2376,7 +2376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2589,7 +2589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3169,7 +3169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RE.json b/data/chips/STM32F302RE.json index cee71bd..6bd2cac 100644 --- a/data/chips/STM32F302RE.json +++ b/data/chips/STM32F302RE.json @@ -2376,7 +2376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2589,7 +2589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3169,7 +3169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VB.json b/data/chips/STM32F302VB.json index 3ed509a..a2c9d79 100644 --- a/data/chips/STM32F302VB.json +++ b/data/chips/STM32F302VB.json @@ -2526,7 +2526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2764,7 +2764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2875,7 +2875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2981,7 +2981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3082,7 +3082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3247,7 +3247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VC.json b/data/chips/STM32F302VC.json index d944a33..999b7c5 100644 --- a/data/chips/STM32F302VC.json +++ b/data/chips/STM32F302VC.json @@ -3132,7 +3132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3370,7 +3370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3481,7 +3481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3587,7 +3587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VD.json b/data/chips/STM32F302VD.json index c2791be..e2c6403 100644 --- a/data/chips/STM32F302VD.json +++ b/data/chips/STM32F302VD.json @@ -3621,7 +3621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3884,7 +3884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4000,7 +4000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4106,7 +4106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4372,7 +4372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VE.json b/data/chips/STM32F302VE.json index f6a3391..281e736 100644 --- a/data/chips/STM32F302VE.json +++ b/data/chips/STM32F302VE.json @@ -3621,7 +3621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3884,7 +3884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4000,7 +4000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4106,7 +4106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4372,7 +4372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302ZD.json b/data/chips/STM32F302ZD.json index 4a4039d..99bf8c4 100644 --- a/data/chips/STM32F302ZD.json +++ b/data/chips/STM32F302ZD.json @@ -3423,7 +3423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3686,7 +3686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3908,7 +3908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4009,7 +4009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4174,7 +4174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4331,7 +4331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302ZE.json b/data/chips/STM32F302ZE.json index 286f1fe..bf55081 100644 --- a/data/chips/STM32F302ZE.json +++ b/data/chips/STM32F302ZE.json @@ -3423,7 +3423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3686,7 +3686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3908,7 +3908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4009,7 +4009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4174,7 +4174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4331,7 +4331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303C6.json b/data/chips/STM32F303C6.json index 5814149..21c7c51 100644 --- a/data/chips/STM32F303C6.json +++ b/data/chips/STM32F303C6.json @@ -1703,7 +1703,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1901,7 +1901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2007,7 +2007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2108,7 +2108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2204,7 +2204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303C8.json b/data/chips/STM32F303C8.json index 251c7cf..27c6aad 100644 --- a/data/chips/STM32F303C8.json +++ b/data/chips/STM32F303C8.json @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2307,7 +2307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2408,7 +2408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2644,7 +2644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303CB.json b/data/chips/STM32F303CB.json index e88e24a..7c527b6 100644 --- a/data/chips/STM32F303CB.json +++ b/data/chips/STM32F303CB.json @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2588,7 +2588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2689,7 +2689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2790,7 +2790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2886,7 +2886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3138,7 +3138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3352,7 +3352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303CC.json b/data/chips/STM32F303CC.json index 6fa5079..891dcea 100644 --- a/data/chips/STM32F303CC.json +++ b/data/chips/STM32F303CC.json @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2588,7 +2588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2689,7 +2689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2790,7 +2790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2886,7 +2886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3138,7 +3138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3352,7 +3352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303K6.json b/data/chips/STM32F303K6.json index 6ed0e3e..1c8815a 100644 --- a/data/chips/STM32F303K6.json +++ b/data/chips/STM32F303K6.json @@ -1667,7 +1667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1820,7 +1820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1906,7 +1906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2093,7 +2093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2223,7 +2223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303K8.json b/data/chips/STM32F303K8.json index ee74d7e..9a09860 100644 --- a/data/chips/STM32F303K8.json +++ b/data/chips/STM32F303K8.json @@ -1667,7 +1667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1820,7 +1820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1906,7 +1906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2093,7 +2093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2223,7 +2223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303R6.json b/data/chips/STM32F303R6.json index 20afa0f..0b61ca0 100644 --- a/data/chips/STM32F303R6.json +++ b/data/chips/STM32F303R6.json @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2248,7 +2248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303R8.json b/data/chips/STM32F303R8.json index 449d5d6..672e89d 100644 --- a/data/chips/STM32F303R8.json +++ b/data/chips/STM32F303R8.json @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2248,7 +2248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303RB.json b/data/chips/STM32F303RB.json index cf86cde..c8c59ba 100644 --- a/data/chips/STM32F303RB.json +++ b/data/chips/STM32F303RB.json @@ -2634,7 +2634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2923,7 +2923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3024,7 +3024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3120,7 +3120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3260,7 +3260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3397,7 +3397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RC.json b/data/chips/STM32F303RC.json index b8ca3f9..765f93f 100644 --- a/data/chips/STM32F303RC.json +++ b/data/chips/STM32F303RC.json @@ -2640,7 +2640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2828,7 +2828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2929,7 +2929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3030,7 +3030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3126,7 +3126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3266,7 +3266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3403,7 +3403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3617,7 +3617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RD.json b/data/chips/STM32F303RD.json index 107761f..53a57f3 100644 --- a/data/chips/STM32F303RD.json +++ b/data/chips/STM32F303RD.json @@ -2762,7 +2762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2975,7 +2975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3081,7 +3081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3182,7 +3182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3418,7 +3418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3555,7 +3555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RE.json b/data/chips/STM32F303RE.json index ae43e92..b837244 100644 --- a/data/chips/STM32F303RE.json +++ b/data/chips/STM32F303RE.json @@ -2762,7 +2762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2975,7 +2975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3081,7 +3081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3182,7 +3182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3418,7 +3418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3555,7 +3555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VB.json b/data/chips/STM32F303VB.json index 3d6f438..0766f91 100644 --- a/data/chips/STM32F303VB.json +++ b/data/chips/STM32F303VB.json @@ -3036,7 +3036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3274,7 +3274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3385,7 +3385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3592,7 +3592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3914,7 +3914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4158,7 +4158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VC.json b/data/chips/STM32F303VC.json index 1892a1c..00e9f93 100644 --- a/data/chips/STM32F303VC.json +++ b/data/chips/STM32F303VC.json @@ -3642,7 +3642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4097,7 +4097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4198,7 +4198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4363,7 +4363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4520,7 +4520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4764,7 +4764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VD.json b/data/chips/STM32F303VD.json index 38e0c6f..4c9d40d 100644 --- a/data/chips/STM32F303VD.json +++ b/data/chips/STM32F303VD.json @@ -4119,7 +4119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4382,7 +4382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4498,7 +4498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4705,7 +4705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4870,7 +4870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4998,7 +4998,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5155,7 +5155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5399,7 +5399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VE.json b/data/chips/STM32F303VE.json index 8b1aa81..447d6a2 100644 --- a/data/chips/STM32F303VE.json +++ b/data/chips/STM32F303VE.json @@ -4725,7 +4725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4988,7 +4988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5104,7 +5104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5311,7 +5311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5476,7 +5476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5604,7 +5604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5761,7 +5761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6005,7 +6005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303ZD.json b/data/chips/STM32F303ZD.json index b62ca2c..194285f 100644 --- a/data/chips/STM32F303ZD.json +++ b/data/chips/STM32F303ZD.json @@ -3921,7 +3921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4184,7 +4184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4300,7 +4300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4507,7 +4507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4672,7 +4672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5047,7 +5047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5291,7 +5291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303ZE.json b/data/chips/STM32F303ZE.json index b6e75a6..c1cb0b2 100644 --- a/data/chips/STM32F303ZE.json +++ b/data/chips/STM32F303ZE.json @@ -3921,7 +3921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4184,7 +4184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4300,7 +4300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4507,7 +4507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4672,7 +4672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5047,7 +5047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5291,7 +5291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F318C8.json b/data/chips/STM32F318C8.json index 60f85ca..9622f69 100644 --- a/data/chips/STM32F318C8.json +++ b/data/chips/STM32F318C8.json @@ -2028,7 +2028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2509,7 +2509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F318K8.json b/data/chips/STM32F318K8.json index 0b18dfe..8a80afb 100644 --- a/data/chips/STM32F318K8.json +++ b/data/chips/STM32F318K8.json @@ -1484,7 +1484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1632,7 +1632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F328C8.json b/data/chips/STM32F328C8.json index b8be71a..50152b8 100644 --- a/data/chips/STM32F328C8.json +++ b/data/chips/STM32F328C8.json @@ -1647,7 +1647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1830,7 +1830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1931,7 +1931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2032,7 +2032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2128,7 +2128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C4.json b/data/chips/STM32F334C4.json index e89411d..461bc5c 100644 --- a/data/chips/STM32F334C4.json +++ b/data/chips/STM32F334C4.json @@ -1910,7 +1910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2108,7 +2108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2315,7 +2315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2551,7 +2551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C6.json b/data/chips/STM32F334C6.json index d4a4d02..09478cf 100644 --- a/data/chips/STM32F334C6.json +++ b/data/chips/STM32F334C6.json @@ -1910,7 +1910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2108,7 +2108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2315,7 +2315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2551,7 +2551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C8.json b/data/chips/STM32F334C8.json index f658189..4f63f10 100644 --- a/data/chips/STM32F334C8.json +++ b/data/chips/STM32F334C8.json @@ -2210,7 +2210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2408,7 +2408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2514,7 +2514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2615,7 +2615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2711,7 +2711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2851,7 +2851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K4.json b/data/chips/STM32F334K4.json index ebf0ec3..e63b0db 100644 --- a/data/chips/STM32F334K4.json +++ b/data/chips/STM32F334K4.json @@ -1824,7 +1824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1977,7 +1977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2159,7 +2159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2250,7 +2250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2380,7 +2380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K6.json b/data/chips/STM32F334K6.json index 329c9a4..dc0ad7c 100644 --- a/data/chips/STM32F334K6.json +++ b/data/chips/STM32F334K6.json @@ -1824,7 +1824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1977,7 +1977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2159,7 +2159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2250,7 +2250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2380,7 +2380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K8.json b/data/chips/STM32F334K8.json index 7cbf5d9..e0bd78e 100644 --- a/data/chips/STM32F334K8.json +++ b/data/chips/STM32F334K8.json @@ -1824,7 +1824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1977,7 +1977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2159,7 +2159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2250,7 +2250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2380,7 +2380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334R6.json b/data/chips/STM32F334R6.json index 8747625..5c11e7a 100644 --- a/data/chips/STM32F334R6.json +++ b/data/chips/STM32F334R6.json @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2379,7 +2379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2576,7 +2576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2716,7 +2716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334R8.json b/data/chips/STM32F334R8.json index 2d76011..4f60925 100644 --- a/data/chips/STM32F334R8.json +++ b/data/chips/STM32F334R8.json @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2379,7 +2379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2576,7 +2576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2716,7 +2716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F358CC.json b/data/chips/STM32F358CC.json index ceb7fab..3d4b295 100644 --- a/data/chips/STM32F358CC.json +++ b/data/chips/STM32F358CC.json @@ -2353,7 +2353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2536,7 +2536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2637,7 +2637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2738,7 +2738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2834,7 +2834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2974,7 +2974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3086,7 +3086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3300,7 +3300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F358RC.json b/data/chips/STM32F358RC.json index 2634e7b..d4fb47c 100644 --- a/data/chips/STM32F358RC.json +++ b/data/chips/STM32F358RC.json @@ -2582,7 +2582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2770,7 +2770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2871,7 +2871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2972,7 +2972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3068,7 +3068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3345,7 +3345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3559,7 +3559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F358VC.json b/data/chips/STM32F358VC.json index 30891eb..257a59d 100644 --- a/data/chips/STM32F358VC.json +++ b/data/chips/STM32F358VC.json @@ -2984,7 +2984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3333,7 +3333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3439,7 +3439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3862,7 +3862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4106,7 +4106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F373C8.json b/data/chips/STM32F373C8.json index 64da06a..4f82f11 100644 --- a/data/chips/STM32F373C8.json +++ b/data/chips/STM32F373C8.json @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2493,7 +2493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2594,7 +2594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2746,7 +2746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2858,7 +2858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2988,7 +2988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3105,7 +3105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3218,7 +3218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373CB.json b/data/chips/STM32F373CB.json index f3877f6..aaae199 100644 --- a/data/chips/STM32F373CB.json +++ b/data/chips/STM32F373CB.json @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2493,7 +2493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2594,7 +2594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2746,7 +2746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2858,7 +2858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2988,7 +2988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3105,7 +3105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3218,7 +3218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373CC.json b/data/chips/STM32F373CC.json index 3bc1d75..5f6de30 100644 --- a/data/chips/STM32F373CC.json +++ b/data/chips/STM32F373CC.json @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2493,7 +2493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2594,7 +2594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2746,7 +2746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2858,7 +2858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2988,7 +2988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3105,7 +3105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3218,7 +3218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373R8.json b/data/chips/STM32F373R8.json index ad59a3e..57b47ec 100644 --- a/data/chips/STM32F373R8.json +++ b/data/chips/STM32F373R8.json @@ -2616,7 +2616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2732,7 +2732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2833,7 +2833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3117,7 +3117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3247,7 +3247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3507,7 +3507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373RB.json b/data/chips/STM32F373RB.json index 91dab38..3b7fc44 100644 --- a/data/chips/STM32F373RB.json +++ b/data/chips/STM32F373RB.json @@ -2616,7 +2616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2732,7 +2732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2833,7 +2833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3117,7 +3117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3247,7 +3247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3507,7 +3507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373RC.json b/data/chips/STM32F373RC.json index d2e0749..2b1d393 100644 --- a/data/chips/STM32F373RC.json +++ b/data/chips/STM32F373RC.json @@ -2616,7 +2616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2732,7 +2732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2833,7 +2833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2990,7 +2990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3117,7 +3117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3247,7 +3247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3507,7 +3507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373V8.json b/data/chips/STM32F373V8.json index 165feff..1b43fae 100644 --- a/data/chips/STM32F373V8.json +++ b/data/chips/STM32F373V8.json @@ -3615,7 +3615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3731,7 +3731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3832,7 +3832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3989,7 +3989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4126,7 +4126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4408,7 +4408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373VB.json b/data/chips/STM32F373VB.json index ab295fc..4d4633e 100644 --- a/data/chips/STM32F373VB.json +++ b/data/chips/STM32F373VB.json @@ -3615,7 +3615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3731,7 +3731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3832,7 +3832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3989,7 +3989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4126,7 +4126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4408,7 +4408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373VC.json b/data/chips/STM32F373VC.json index f7dcaa7..20f1319 100644 --- a/data/chips/STM32F373VC.json +++ b/data/chips/STM32F373VC.json @@ -3615,7 +3615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3731,7 +3731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3832,7 +3832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3989,7 +3989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4126,7 +4126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4408,7 +4408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378CC.json b/data/chips/STM32F378CC.json index 51d2e2f..efa6b8d 100644 --- a/data/chips/STM32F378CC.json +++ b/data/chips/STM32F378CC.json @@ -2326,7 +2326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2442,7 +2442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2807,7 +2807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2937,7 +2937,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3054,7 +3054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3167,7 +3167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378RC.json b/data/chips/STM32F378RC.json index 4b208da..8bad134 100644 --- a/data/chips/STM32F378RC.json +++ b/data/chips/STM32F378RC.json @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3083,7 +3083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3184,7 +3184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3468,7 +3468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3598,7 +3598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3745,7 +3745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3858,7 +3858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378VC.json b/data/chips/STM32F378VC.json index 3f721bf..0b057fd 100644 --- a/data/chips/STM32F378VC.json +++ b/data/chips/STM32F378VC.json @@ -3564,7 +3564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3680,7 +3680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3781,7 +3781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4357,7 +4357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4495,7 +4495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F398VE.json b/data/chips/STM32F398VE.json index 8e6c09a..678d640 100644 --- a/data/chips/STM32F398VE.json +++ b/data/chips/STM32F398VE.json @@ -3467,7 +3467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3730,7 +3730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3846,7 +3846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3952,7 +3952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4218,7 +4218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4346,7 +4346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4503,7 +4503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4747,7 +4747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F401CB.json b/data/chips/STM32F401CB.json index 5f68d73..71fcc92 100644 --- a/data/chips/STM32F401CB.json +++ b/data/chips/STM32F401CB.json @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2264,7 +2264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2401,7 +2401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2595,7 +2595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CC.json b/data/chips/STM32F401CC.json index debdab0..b4b76bb 100644 --- a/data/chips/STM32F401CC.json +++ b/data/chips/STM32F401CC.json @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2575,7 +2575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2819,7 +2819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CD.json b/data/chips/STM32F401CD.json index 07dd9ee..47a0678 100644 --- a/data/chips/STM32F401CD.json +++ b/data/chips/STM32F401CD.json @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2275,7 +2275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2606,7 +2606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CE.json b/data/chips/STM32F401CE.json index 380f4fe..ce12e2c 100644 --- a/data/chips/STM32F401CE.json +++ b/data/chips/STM32F401CE.json @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2275,7 +2275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2606,7 +2606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RB.json b/data/chips/STM32F401RB.json index 57ebcf0..29747ea 100644 --- a/data/chips/STM32F401RB.json +++ b/data/chips/STM32F401RB.json @@ -1996,7 +1996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2537,7 +2537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2624,7 +2624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RC.json b/data/chips/STM32F401RC.json index 5d23a58..4996ab0 100644 --- a/data/chips/STM32F401RC.json +++ b/data/chips/STM32F401RC.json @@ -2007,7 +2007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2279,7 +2279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RD.json b/data/chips/STM32F401RD.json index e6c9063..5ed9c8e 100644 --- a/data/chips/STM32F401RD.json +++ b/data/chips/STM32F401RD.json @@ -2007,7 +2007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2279,7 +2279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RE.json b/data/chips/STM32F401RE.json index cbc5759..4cf4420 100644 --- a/data/chips/STM32F401RE.json +++ b/data/chips/STM32F401RE.json @@ -2007,7 +2007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2279,7 +2279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VB.json b/data/chips/STM32F401VB.json index 66de285..55f2263 100644 --- a/data/chips/STM32F401VB.json +++ b/data/chips/STM32F401VB.json @@ -2934,7 +2934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3251,7 +3251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3393,7 +3393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3525,7 +3525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3637,7 +3637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VC.json b/data/chips/STM32F401VC.json index 68c4768..1dcfd49 100644 --- a/data/chips/STM32F401VC.json +++ b/data/chips/STM32F401VC.json @@ -2945,7 +2945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3536,7 +3536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3648,7 +3648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VD.json b/data/chips/STM32F401VD.json index 352d19c..e60ffa0 100644 --- a/data/chips/STM32F401VD.json +++ b/data/chips/STM32F401VD.json @@ -2945,7 +2945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3536,7 +3536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3648,7 +3648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VE.json b/data/chips/STM32F401VE.json index 7b5fb37..ea43f0b 100644 --- a/data/chips/STM32F401VE.json +++ b/data/chips/STM32F401VE.json @@ -2945,7 +2945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3536,7 +3536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3648,7 +3648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F405OE.json b/data/chips/STM32F405OE.json index 1c3e1d6..cf8a2e4 100644 --- a/data/chips/STM32F405OE.json +++ b/data/chips/STM32F405OE.json @@ -2843,7 +2843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3315,7 +3315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3457,7 +3457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3913,7 +3913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405OG.json b/data/chips/STM32F405OG.json index 8d73614..b6f744d 100644 --- a/data/chips/STM32F405OG.json +++ b/data/chips/STM32F405OG.json @@ -2843,7 +2843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3315,7 +3315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3457,7 +3457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3913,7 +3913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405RG.json b/data/chips/STM32F405RG.json index 1cf54c0..f9f56a3 100644 --- a/data/chips/STM32F405RG.json +++ b/data/chips/STM32F405RG.json @@ -2446,7 +2446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2873,7 +2873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3147,7 +3147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3234,7 +3234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3451,7 +3451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405VG.json b/data/chips/STM32F405VG.json index 033410a..e14dc95 100644 --- a/data/chips/STM32F405VG.json +++ b/data/chips/STM32F405VG.json @@ -2956,7 +2956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3428,7 +3428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3570,7 +3570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3702,7 +3702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3814,7 +3814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4031,7 +4031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405ZG.json b/data/chips/STM32F405ZG.json index 90702e8..4f95bb4 100644 --- a/data/chips/STM32F405ZG.json +++ b/data/chips/STM32F405ZG.json @@ -3422,7 +3422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3914,7 +3914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4188,7 +4188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4300,7 +4300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4517,7 +4517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407IE.json b/data/chips/STM32F407IE.json index 077ecee..3df3757 100644 --- a/data/chips/STM32F407IE.json +++ b/data/chips/STM32F407IE.json @@ -5342,7 +5342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5844,7 +5844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6118,7 +6118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6230,7 +6230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6467,7 +6467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407IG.json b/data/chips/STM32F407IG.json index 90daa31..ddbe7b6 100644 --- a/data/chips/STM32F407IG.json +++ b/data/chips/STM32F407IG.json @@ -5342,7 +5342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5844,7 +5844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6118,7 +6118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6230,7 +6230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6467,7 +6467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407VE.json b/data/chips/STM32F407VE.json index 4b203c3..f78887b 100644 --- a/data/chips/STM32F407VE.json +++ b/data/chips/STM32F407VE.json @@ -3257,7 +3257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4003,7 +4003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4115,7 +4115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407VG.json b/data/chips/STM32F407VG.json index 2161557..f545aec 100644 --- a/data/chips/STM32F407VG.json +++ b/data/chips/STM32F407VG.json @@ -3257,7 +3257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4003,7 +4003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4115,7 +4115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407ZE.json b/data/chips/STM32F407ZE.json index 348f27d..f74ed38 100644 --- a/data/chips/STM32F407ZE.json +++ b/data/chips/STM32F407ZE.json @@ -3753,7 +3753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4245,7 +4245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4387,7 +4387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4519,7 +4519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4631,7 +4631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407ZG.json b/data/chips/STM32F407ZG.json index dbc25ca..a63709f 100644 --- a/data/chips/STM32F407ZG.json +++ b/data/chips/STM32F407ZG.json @@ -3753,7 +3753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4245,7 +4245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4387,7 +4387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4519,7 +4519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4631,7 +4631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F410C8.json b/data/chips/STM32F410C8.json index cdda2a5..a42f0bf 100644 --- a/data/chips/STM32F410C8.json +++ b/data/chips/STM32F410C8.json @@ -2113,7 +2113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410CB.json b/data/chips/STM32F410CB.json index 4cd2a93..10979e0 100644 --- a/data/chips/STM32F410CB.json +++ b/data/chips/STM32F410CB.json @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2346,7 +2346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410R8.json b/data/chips/STM32F410R8.json index 101acfa..c4b4c61 100644 --- a/data/chips/STM32F410R8.json +++ b/data/chips/STM32F410R8.json @@ -2414,7 +2414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2641,7 +2641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410RB.json b/data/chips/STM32F410RB.json index 378d0bf..4e0f89a 100644 --- a/data/chips/STM32F410RB.json +++ b/data/chips/STM32F410RB.json @@ -2425,7 +2425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2652,7 +2652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410T8.json b/data/chips/STM32F410T8.json index bedbc92..5f54cc9 100644 --- a/data/chips/STM32F410T8.json +++ b/data/chips/STM32F410T8.json @@ -1461,7 +1461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1626,7 +1626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410TB.json b/data/chips/STM32F410TB.json index 2160e1e..7a2f972 100644 --- a/data/chips/STM32F410TB.json +++ b/data/chips/STM32F410TB.json @@ -1472,7 +1472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411CC.json b/data/chips/STM32F411CC.json index 55cb767..1d8f2df 100644 --- a/data/chips/STM32F411CC.json +++ b/data/chips/STM32F411CC.json @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2655,7 +2655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2792,7 +2792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2899,7 +2899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2986,7 +2986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411CE.json b/data/chips/STM32F411CE.json index 043b3fe..131a3e8 100644 --- a/data/chips/STM32F411CE.json +++ b/data/chips/STM32F411CE.json @@ -2389,7 +2389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2661,7 +2661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2798,7 +2798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2905,7 +2905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411RC.json b/data/chips/STM32F411RC.json index df5abf4..95f1277 100644 --- a/data/chips/STM32F411RC.json +++ b/data/chips/STM32F411RC.json @@ -2323,7 +2323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2595,7 +2595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2732,7 +2732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2864,7 +2864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2951,7 +2951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411RE.json b/data/chips/STM32F411RE.json index dee04b5..0056718 100644 --- a/data/chips/STM32F411RE.json +++ b/data/chips/STM32F411RE.json @@ -2329,7 +2329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2738,7 +2738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2870,7 +2870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2957,7 +2957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411VC.json b/data/chips/STM32F411VC.json index aa481b5..56b1002 100644 --- a/data/chips/STM32F411VC.json +++ b/data/chips/STM32F411VC.json @@ -3310,7 +3310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3627,7 +3627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3901,7 +3901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4013,7 +4013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411VE.json b/data/chips/STM32F411VE.json index 37156ea..ecc9c1d 100644 --- a/data/chips/STM32F411VE.json +++ b/data/chips/STM32F411VE.json @@ -3316,7 +3316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3633,7 +3633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3775,7 +3775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4019,7 +4019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F412CE.json b/data/chips/STM32F412CE.json index f1ba61d..119c467 100644 --- a/data/chips/STM32F412CE.json +++ b/data/chips/STM32F412CE.json @@ -2369,7 +2369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2933,7 +2933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3040,7 +3040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3127,7 +3127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3344,7 +3344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412CG.json b/data/chips/STM32F412CG.json index eed55b9..d77270e 100644 --- a/data/chips/STM32F412CG.json +++ b/data/chips/STM32F412CG.json @@ -2369,7 +2369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2933,7 +2933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3040,7 +3040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3127,7 +3127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3344,7 +3344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412RE.json b/data/chips/STM32F412RE.json index 94c8158..12fdd43 100644 --- a/data/chips/STM32F412RE.json +++ b/data/chips/STM32F412RE.json @@ -3674,7 +3674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4238,7 +4238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4370,7 +4370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4674,7 +4674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412RG.json b/data/chips/STM32F412RG.json index 4442200..18dae9e 100644 --- a/data/chips/STM32F412RG.json +++ b/data/chips/STM32F412RG.json @@ -3674,7 +3674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4238,7 +4238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4370,7 +4370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4674,7 +4674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412VE.json b/data/chips/STM32F412VE.json index 6bf8a12..f9838ce 100644 --- a/data/chips/STM32F412VE.json +++ b/data/chips/STM32F412VE.json @@ -4272,7 +4272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4744,7 +4744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5018,7 +5018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5130,7 +5130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412VG.json b/data/chips/STM32F412VG.json index 21946db..ebfcba5 100644 --- a/data/chips/STM32F412VG.json +++ b/data/chips/STM32F412VG.json @@ -4272,7 +4272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4744,7 +4744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5018,7 +5018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5130,7 +5130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412ZE.json b/data/chips/STM32F412ZE.json index df66a79..c0eb3d4 100644 --- a/data/chips/STM32F412ZE.json +++ b/data/chips/STM32F412ZE.json @@ -5032,7 +5032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5529,7 +5529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5671,7 +5671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5803,7 +5803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5915,7 +5915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6152,7 +6152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412ZG.json b/data/chips/STM32F412ZG.json index bb22c4b..daa5fd5 100644 --- a/data/chips/STM32F412ZG.json +++ b/data/chips/STM32F412ZG.json @@ -5032,7 +5032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5529,7 +5529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5671,7 +5671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5803,7 +5803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5915,7 +5915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6152,7 +6152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413CG.json b/data/chips/STM32F413CG.json index 50086a4..36768c9 100644 --- a/data/chips/STM32F413CG.json +++ b/data/chips/STM32F413CG.json @@ -2886,7 +2886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3313,7 +3313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3450,7 +3450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3557,7 +3557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3644,7 +3644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3861,7 +3861,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413CH.json b/data/chips/STM32F413CH.json index d03386d..52e846c 100644 --- a/data/chips/STM32F413CH.json +++ b/data/chips/STM32F413CH.json @@ -2886,7 +2886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3313,7 +3313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3450,7 +3450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3557,7 +3557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3644,7 +3644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3861,7 +3861,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413MG.json b/data/chips/STM32F413MG.json index 661083e..cfd9142 100644 --- a/data/chips/STM32F413MG.json +++ b/data/chips/STM32F413MG.json @@ -3832,7 +3832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4431,7 +4431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4563,7 +4563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4650,7 +4650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4867,7 +4867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413MH.json b/data/chips/STM32F413MH.json index 5094f62..1f56421 100644 --- a/data/chips/STM32F413MH.json +++ b/data/chips/STM32F413MH.json @@ -3832,7 +3832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4431,7 +4431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4563,7 +4563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4650,7 +4650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4867,7 +4867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413RG.json b/data/chips/STM32F413RG.json index 81ff839..1956811 100644 --- a/data/chips/STM32F413RG.json +++ b/data/chips/STM32F413RG.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3922,7 +3922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4059,7 +4059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4191,7 +4191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4278,7 +4278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4495,7 +4495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413RH.json b/data/chips/STM32F413RH.json index 29012c5..f94e83f 100644 --- a/data/chips/STM32F413RH.json +++ b/data/chips/STM32F413RH.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3922,7 +3922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4059,7 +4059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4191,7 +4191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4278,7 +4278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4495,7 +4495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413VG.json b/data/chips/STM32F413VG.json index 410b51b..b2963b8 100644 --- a/data/chips/STM32F413VG.json +++ b/data/chips/STM32F413VG.json @@ -4952,7 +4952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5566,7 +5566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5698,7 +5698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5810,7 +5810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6027,7 +6027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413VH.json b/data/chips/STM32F413VH.json index d064856..a9a8efe 100644 --- a/data/chips/STM32F413VH.json +++ b/data/chips/STM32F413VH.json @@ -4952,7 +4952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5566,7 +5566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5698,7 +5698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5810,7 +5810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6027,7 +6027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413ZG.json b/data/chips/STM32F413ZG.json index 084a0b0..cd7eee1 100644 --- a/data/chips/STM32F413ZG.json +++ b/data/chips/STM32F413ZG.json @@ -5690,7 +5690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6187,7 +6187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6329,7 +6329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6810,7 +6810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413ZH.json b/data/chips/STM32F413ZH.json index d47d104..aa0f16f 100644 --- a/data/chips/STM32F413ZH.json +++ b/data/chips/STM32F413ZH.json @@ -5690,7 +5690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6187,7 +6187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6329,7 +6329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6810,7 +6810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415OG.json b/data/chips/STM32F415OG.json index f658b36..f830426 100644 --- a/data/chips/STM32F415OG.json +++ b/data/chips/STM32F415OG.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3754,7 +3754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3976,7 +3976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415RG.json b/data/chips/STM32F415RG.json index b91516f..ba48b64 100644 --- a/data/chips/STM32F415RG.json +++ b/data/chips/STM32F415RG.json @@ -2509,7 +2509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3078,7 +3078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3210,7 +3210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3297,7 +3297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3514,7 +3514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415VG.json b/data/chips/STM32F415VG.json index 52f6d6a..35ee877 100644 --- a/data/chips/STM32F415VG.json +++ b/data/chips/STM32F415VG.json @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3633,7 +3633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3765,7 +3765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3877,7 +3877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4094,7 +4094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415ZG.json b/data/chips/STM32F415ZG.json index 47e7eee..0d577ad 100644 --- a/data/chips/STM32F415ZG.json +++ b/data/chips/STM32F415ZG.json @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3977,7 +3977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4119,7 +4119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4251,7 +4251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4363,7 +4363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4580,7 +4580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417IE.json b/data/chips/STM32F417IE.json index 645c438..90f0610 100644 --- a/data/chips/STM32F417IE.json +++ b/data/chips/STM32F417IE.json @@ -5405,7 +5405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5907,7 +5907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6181,7 +6181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417IG.json b/data/chips/STM32F417IG.json index d89397f..ba6b3ca 100644 --- a/data/chips/STM32F417IG.json +++ b/data/chips/STM32F417IG.json @@ -5405,7 +5405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5907,7 +5907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6181,7 +6181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417VE.json b/data/chips/STM32F417VE.json index 18f1c1c..379410d 100644 --- a/data/chips/STM32F417VE.json +++ b/data/chips/STM32F417VE.json @@ -3320,7 +3320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3792,7 +3792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3934,7 +3934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4066,7 +4066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4178,7 +4178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4395,7 +4395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417VG.json b/data/chips/STM32F417VG.json index 6d9163a..946b6e8 100644 --- a/data/chips/STM32F417VG.json +++ b/data/chips/STM32F417VG.json @@ -3320,7 +3320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3792,7 +3792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3934,7 +3934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4066,7 +4066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4178,7 +4178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4395,7 +4395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417ZE.json b/data/chips/STM32F417ZE.json index 1890c1f..18411dc 100644 --- a/data/chips/STM32F417ZE.json +++ b/data/chips/STM32F417ZE.json @@ -3816,7 +3816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4308,7 +4308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4450,7 +4450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4694,7 +4694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4911,7 +4911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417ZG.json b/data/chips/STM32F417ZG.json index 24b32d1..5fbba9a 100644 --- a/data/chips/STM32F417ZG.json +++ b/data/chips/STM32F417ZG.json @@ -3816,7 +3816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4308,7 +4308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4450,7 +4450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4694,7 +4694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4911,7 +4911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423CH.json b/data/chips/STM32F423CH.json index f7e272a..8a06fce 100644 --- a/data/chips/STM32F423CH.json +++ b/data/chips/STM32F423CH.json @@ -2913,7 +2913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3340,7 +3340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3477,7 +3477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3584,7 +3584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3671,7 +3671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3888,7 +3888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423MH.json b/data/chips/STM32F423MH.json index ee73ad4..14ff348 100644 --- a/data/chips/STM32F423MH.json +++ b/data/chips/STM32F423MH.json @@ -3859,7 +3859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4458,7 +4458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4590,7 +4590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4677,7 +4677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4894,7 +4894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423RH.json b/data/chips/STM32F423RH.json index d4c8770..bf45e99 100644 --- a/data/chips/STM32F423RH.json +++ b/data/chips/STM32F423RH.json @@ -3522,7 +3522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4086,7 +4086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4218,7 +4218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4305,7 +4305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423VH.json b/data/chips/STM32F423VH.json index c422878..85b6763 100644 --- a/data/chips/STM32F423VH.json +++ b/data/chips/STM32F423VH.json @@ -4979,7 +4979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5451,7 +5451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5593,7 +5593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5725,7 +5725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5837,7 +5837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6054,7 +6054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423ZH.json b/data/chips/STM32F423ZH.json index 4648a2c..c91a6fa 100644 --- a/data/chips/STM32F423ZH.json +++ b/data/chips/STM32F423ZH.json @@ -5717,7 +5717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6214,7 +6214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6356,7 +6356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6488,7 +6488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6600,7 +6600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6837,7 +6837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427AG.json b/data/chips/STM32F427AG.json index e276946..b6d80c3 100644 --- a/data/chips/STM32F427AG.json +++ b/data/chips/STM32F427AG.json @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5003,7 +5003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5145,7 +5145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5277,7 +5277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5389,7 +5389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5626,7 +5626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427AI.json b/data/chips/STM32F427AI.json index 7f592a5..2a43f01 100644 --- a/data/chips/STM32F427AI.json +++ b/data/chips/STM32F427AI.json @@ -4554,7 +4554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5036,7 +5036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5178,7 +5178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5310,7 +5310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5422,7 +5422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5659,7 +5659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427IG.json b/data/chips/STM32F427IG.json index 3f21c66..a5e658d 100644 --- a/data/chips/STM32F427IG.json +++ b/data/chips/STM32F427IG.json @@ -5988,7 +5988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6490,7 +6490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6764,7 +6764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6876,7 +6876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7113,7 +7113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427II.json b/data/chips/STM32F427II.json index 1428f32..a7f15cf 100644 --- a/data/chips/STM32F427II.json +++ b/data/chips/STM32F427II.json @@ -6021,7 +6021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6523,7 +6523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6665,7 +6665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6797,7 +6797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6909,7 +6909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7146,7 +7146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427VG.json b/data/chips/STM32F427VG.json index f15e79f..87f1bb0 100644 --- a/data/chips/STM32F427VG.json +++ b/data/chips/STM32F427VG.json @@ -3552,7 +3552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4024,7 +4024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4166,7 +4166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4298,7 +4298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4627,7 +4627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427VI.json b/data/chips/STM32F427VI.json index 63ac484..9822ec4 100644 --- a/data/chips/STM32F427VI.json +++ b/data/chips/STM32F427VI.json @@ -3585,7 +3585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4057,7 +4057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4199,7 +4199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4331,7 +4331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4443,7 +4443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4660,7 +4660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427ZG.json b/data/chips/STM32F427ZG.json index 8a9af23..e44d6fb 100644 --- a/data/chips/STM32F427ZG.json +++ b/data/chips/STM32F427ZG.json @@ -4260,7 +4260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4752,7 +4752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4894,7 +4894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5026,7 +5026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5138,7 +5138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5355,7 +5355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427ZI.json b/data/chips/STM32F427ZI.json index 8647200..709e626 100644 --- a/data/chips/STM32F427ZI.json +++ b/data/chips/STM32F427ZI.json @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4785,7 +4785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4927,7 +4927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5059,7 +5059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5171,7 +5171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5388,7 +5388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429AG.json b/data/chips/STM32F429AG.json index 438edc7..00e21ae 100644 --- a/data/chips/STM32F429AG.json +++ b/data/chips/STM32F429AG.json @@ -4831,7 +4831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5313,7 +5313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5455,7 +5455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5587,7 +5587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5699,7 +5699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5936,7 +5936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429AI.json b/data/chips/STM32F429AI.json index 4159099..af89ffe 100644 --- a/data/chips/STM32F429AI.json +++ b/data/chips/STM32F429AI.json @@ -4864,7 +4864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5346,7 +5346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5488,7 +5488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5620,7 +5620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5732,7 +5732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5969,7 +5969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BE.json b/data/chips/STM32F429BE.json index fe685e7..67c2809 100644 --- a/data/chips/STM32F429BE.json +++ b/data/chips/STM32F429BE.json @@ -5406,7 +5406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5908,7 +5908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6050,7 +6050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6182,7 +6182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6294,7 +6294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6531,7 +6531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BG.json b/data/chips/STM32F429BG.json index 3239338..3d5291a 100644 --- a/data/chips/STM32F429BG.json +++ b/data/chips/STM32F429BG.json @@ -5412,7 +5412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5914,7 +5914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6056,7 +6056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6188,7 +6188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6537,7 +6537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BI.json b/data/chips/STM32F429BI.json index 95b403b..18d706a 100644 --- a/data/chips/STM32F429BI.json +++ b/data/chips/STM32F429BI.json @@ -5445,7 +5445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5947,7 +5947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6089,7 +6089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6221,7 +6221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6333,7 +6333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6570,7 +6570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429IE.json b/data/chips/STM32F429IE.json index 502224a..dee6248 100644 --- a/data/chips/STM32F429IE.json +++ b/data/chips/STM32F429IE.json @@ -6286,7 +6286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6788,7 +6788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6930,7 +6930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7062,7 +7062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7174,7 +7174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7411,7 +7411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429IG.json b/data/chips/STM32F429IG.json index 47dbf54..0fa91fb 100644 --- a/data/chips/STM32F429IG.json +++ b/data/chips/STM32F429IG.json @@ -6298,7 +6298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6800,7 +6800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6942,7 +6942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7074,7 +7074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7186,7 +7186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7423,7 +7423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429II.json b/data/chips/STM32F429II.json index b93ee0b..a2cecf3 100644 --- a/data/chips/STM32F429II.json +++ b/data/chips/STM32F429II.json @@ -6331,7 +6331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6833,7 +6833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6975,7 +6975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7219,7 +7219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7456,7 +7456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NE.json b/data/chips/STM32F429NE.json index d602f0b..2f1942f 100644 --- a/data/chips/STM32F429NE.json +++ b/data/chips/STM32F429NE.json @@ -5454,7 +5454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5956,7 +5956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6098,7 +6098,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6230,7 +6230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6342,7 +6342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6579,7 +6579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NG.json b/data/chips/STM32F429NG.json index 87113f3..7e58bcd 100644 --- a/data/chips/STM32F429NG.json +++ b/data/chips/STM32F429NG.json @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5962,7 +5962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6104,7 +6104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6236,7 +6236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6348,7 +6348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6585,7 +6585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NI.json b/data/chips/STM32F429NI.json index db71d8f..42db300 100644 --- a/data/chips/STM32F429NI.json +++ b/data/chips/STM32F429NI.json @@ -5493,7 +5493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6137,7 +6137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6269,7 +6269,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6381,7 +6381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6618,7 +6618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VE.json b/data/chips/STM32F429VE.json index 7a37b30..1f0ed99 100644 --- a/data/chips/STM32F429VE.json +++ b/data/chips/STM32F429VE.json @@ -3690,7 +3690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4162,7 +4162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4304,7 +4304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4436,7 +4436,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4548,7 +4548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4765,7 +4765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VG.json b/data/chips/STM32F429VG.json index 98662c0..0215b0c 100644 --- a/data/chips/STM32F429VG.json +++ b/data/chips/STM32F429VG.json @@ -3696,7 +3696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4168,7 +4168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4310,7 +4310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4554,7 +4554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4771,7 +4771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VI.json b/data/chips/STM32F429VI.json index 897fb6a..185090f 100644 --- a/data/chips/STM32F429VI.json +++ b/data/chips/STM32F429VI.json @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4201,7 +4201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4343,7 +4343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4475,7 +4475,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4587,7 +4587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4804,7 +4804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZE.json b/data/chips/STM32F429ZE.json index 02b24c3..7a9435e 100644 --- a/data/chips/STM32F429ZE.json +++ b/data/chips/STM32F429ZE.json @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4955,7 +4955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5097,7 +5097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5229,7 +5229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5341,7 +5341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5558,7 +5558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZG.json b/data/chips/STM32F429ZG.json index 12dea26..2522ce7 100644 --- a/data/chips/STM32F429ZG.json +++ b/data/chips/STM32F429ZG.json @@ -5333,7 +5333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5825,7 +5825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5967,7 +5967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6099,7 +6099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6211,7 +6211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6428,7 +6428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZI.json b/data/chips/STM32F429ZI.json index f0b2737..edfc022 100644 --- a/data/chips/STM32F429ZI.json +++ b/data/chips/STM32F429ZI.json @@ -5366,7 +5366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5858,7 +5858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6000,7 +6000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6132,7 +6132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6244,7 +6244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437AI.json b/data/chips/STM32F437AI.json index 3dffc7f..99ce5ed 100644 --- a/data/chips/STM32F437AI.json +++ b/data/chips/STM32F437AI.json @@ -4623,7 +4623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5105,7 +5105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5247,7 +5247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5491,7 +5491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5728,7 +5728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437IG.json b/data/chips/STM32F437IG.json index e8615ba..76c2143 100644 --- a/data/chips/STM32F437IG.json +++ b/data/chips/STM32F437IG.json @@ -6057,7 +6057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6559,7 +6559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6701,7 +6701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6833,7 +6833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6945,7 +6945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7182,7 +7182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437II.json b/data/chips/STM32F437II.json index 45679a1..585280a 100644 --- a/data/chips/STM32F437II.json +++ b/data/chips/STM32F437II.json @@ -6090,7 +6090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6592,7 +6592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6734,7 +6734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6866,7 +6866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6978,7 +6978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7215,7 +7215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437VG.json b/data/chips/STM32F437VG.json index 6f5672c..354789d 100644 --- a/data/chips/STM32F437VG.json +++ b/data/chips/STM32F437VG.json @@ -3621,7 +3621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4093,7 +4093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4367,7 +4367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4479,7 +4479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4696,7 +4696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437VI.json b/data/chips/STM32F437VI.json index e7edc1a..19562ab 100644 --- a/data/chips/STM32F437VI.json +++ b/data/chips/STM32F437VI.json @@ -3654,7 +3654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4126,7 +4126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4268,7 +4268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4400,7 +4400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4512,7 +4512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4729,7 +4729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437ZG.json b/data/chips/STM32F437ZG.json index f602032..4c2780a 100644 --- a/data/chips/STM32F437ZG.json +++ b/data/chips/STM32F437ZG.json @@ -4329,7 +4329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4963,7 +4963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5095,7 +5095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5207,7 +5207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437ZI.json b/data/chips/STM32F437ZI.json index 7342a06..3061d6b 100644 --- a/data/chips/STM32F437ZI.json +++ b/data/chips/STM32F437ZI.json @@ -4362,7 +4362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4854,7 +4854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4996,7 +4996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5128,7 +5128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5240,7 +5240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5457,7 +5457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439AI.json b/data/chips/STM32F439AI.json index dfd506d..4293706 100644 --- a/data/chips/STM32F439AI.json +++ b/data/chips/STM32F439AI.json @@ -4933,7 +4933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5415,7 +5415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5557,7 +5557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5689,7 +5689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5801,7 +5801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6038,7 +6038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439BG.json b/data/chips/STM32F439BG.json index 4766bc1..74207d1 100644 --- a/data/chips/STM32F439BG.json +++ b/data/chips/STM32F439BG.json @@ -5481,7 +5481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5983,7 +5983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6125,7 +6125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6257,7 +6257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6369,7 +6369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6606,7 +6606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439BI.json b/data/chips/STM32F439BI.json index fd2ce91..ab05e00 100644 --- a/data/chips/STM32F439BI.json +++ b/data/chips/STM32F439BI.json @@ -5514,7 +5514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6016,7 +6016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6158,7 +6158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6290,7 +6290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6402,7 +6402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6639,7 +6639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439IG.json b/data/chips/STM32F439IG.json index f2b372a..b37c4c5 100644 --- a/data/chips/STM32F439IG.json +++ b/data/chips/STM32F439IG.json @@ -6367,7 +6367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6869,7 +6869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7011,7 +7011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7143,7 +7143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7255,7 +7255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7492,7 +7492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439II.json b/data/chips/STM32F439II.json index 9822b03..abc1a62 100644 --- a/data/chips/STM32F439II.json +++ b/data/chips/STM32F439II.json @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7176,7 +7176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7288,7 +7288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7525,7 +7525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439NG.json b/data/chips/STM32F439NG.json index a7fda7e..41ca8da 100644 --- a/data/chips/STM32F439NG.json +++ b/data/chips/STM32F439NG.json @@ -5529,7 +5529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6031,7 +6031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6173,7 +6173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6305,7 +6305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6417,7 +6417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6654,7 +6654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439NI.json b/data/chips/STM32F439NI.json index f019337..eeac3f3 100644 --- a/data/chips/STM32F439NI.json +++ b/data/chips/STM32F439NI.json @@ -5562,7 +5562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6064,7 +6064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6206,7 +6206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6338,7 +6338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6450,7 +6450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6687,7 +6687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439VG.json b/data/chips/STM32F439VG.json index a65b9ec..3965900 100644 --- a/data/chips/STM32F439VG.json +++ b/data/chips/STM32F439VG.json @@ -3765,7 +3765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4237,7 +4237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4379,7 +4379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4511,7 +4511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4623,7 +4623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4840,7 +4840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439VI.json b/data/chips/STM32F439VI.json index 6fe769e..55ab103 100644 --- a/data/chips/STM32F439VI.json +++ b/data/chips/STM32F439VI.json @@ -3798,7 +3798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4412,7 +4412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4544,7 +4544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4656,7 +4656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4873,7 +4873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439ZG.json b/data/chips/STM32F439ZG.json index ff86316..b9bb671 100644 --- a/data/chips/STM32F439ZG.json +++ b/data/chips/STM32F439ZG.json @@ -5402,7 +5402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5894,7 +5894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6036,7 +6036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6168,7 +6168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6280,7 +6280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6497,7 +6497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439ZI.json b/data/chips/STM32F439ZI.json index 57ff6fb..55043d3 100644 --- a/data/chips/STM32F439ZI.json +++ b/data/chips/STM32F439ZI.json @@ -5435,7 +5435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5927,7 +5927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6069,7 +6069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6201,7 +6201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6313,7 +6313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446MC.json b/data/chips/STM32F446MC.json index c01b70e..ae48fa8 100644 --- a/data/chips/STM32F446MC.json +++ b/data/chips/STM32F446MC.json @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3700,7 +3700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3857,7 +3857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3989,7 +3989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4086,7 +4086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4303,7 +4303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ME.json b/data/chips/STM32F446ME.json index a9b46a0..2b41030 100644 --- a/data/chips/STM32F446ME.json +++ b/data/chips/STM32F446ME.json @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3700,7 +3700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3857,7 +3857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3989,7 +3989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4086,7 +4086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4303,7 +4303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446RC.json b/data/chips/STM32F446RC.json index a7fc4da..204552c 100644 --- a/data/chips/STM32F446RC.json +++ b/data/chips/STM32F446RC.json @@ -2925,7 +2925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3352,7 +3352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3641,7 +3641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3728,7 +3728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3945,7 +3945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446RE.json b/data/chips/STM32F446RE.json index f65d1e6..ac7f8db 100644 --- a/data/chips/STM32F446RE.json +++ b/data/chips/STM32F446RE.json @@ -2925,7 +2925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3352,7 +3352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3641,7 +3641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3728,7 +3728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3945,7 +3945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446VC.json b/data/chips/STM32F446VC.json index 14c4293..24e0f7e 100644 --- a/data/chips/STM32F446VC.json +++ b/data/chips/STM32F446VC.json @@ -3851,7 +3851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4323,7 +4323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4480,7 +4480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4612,7 +4612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4724,7 +4724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4941,7 +4941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446VE.json b/data/chips/STM32F446VE.json index ec63fca..6a025e6 100644 --- a/data/chips/STM32F446VE.json +++ b/data/chips/STM32F446VE.json @@ -3851,7 +3851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4323,7 +4323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4480,7 +4480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4612,7 +4612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4724,7 +4724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4941,7 +4941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ZC.json b/data/chips/STM32F446ZC.json index 99013af..52d06e6 100644 --- a/data/chips/STM32F446ZC.json +++ b/data/chips/STM32F446ZC.json @@ -6225,7 +6225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6717,7 +6717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6879,7 +6879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7011,7 +7011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7123,7 +7123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7340,7 +7340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ZE.json b/data/chips/STM32F446ZE.json index 65ff151..6e3cafe 100644 --- a/data/chips/STM32F446ZE.json +++ b/data/chips/STM32F446ZE.json @@ -6225,7 +6225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6717,7 +6717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6879,7 +6879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7011,7 +7011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7123,7 +7123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7340,7 +7340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AE.json b/data/chips/STM32F469AE.json index b203987..6bd67f3 100644 --- a/data/chips/STM32F469AE.json +++ b/data/chips/STM32F469AE.json @@ -5845,7 +5845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6322,7 +6322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6464,7 +6464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6708,7 +6708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6945,7 +6945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AG.json b/data/chips/STM32F469AG.json index 2afd315..efb9f91 100644 --- a/data/chips/STM32F469AG.json +++ b/data/chips/STM32F469AG.json @@ -5845,7 +5845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6322,7 +6322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6464,7 +6464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6708,7 +6708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6945,7 +6945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AI.json b/data/chips/STM32F469AI.json index d863771..ef9d3a5 100644 --- a/data/chips/STM32F469AI.json +++ b/data/chips/STM32F469AI.json @@ -5878,7 +5878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6355,7 +6355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6497,7 +6497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6629,7 +6629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6741,7 +6741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6978,7 +6978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BE.json b/data/chips/STM32F469BE.json index c733836..fe90fa7 100644 --- a/data/chips/STM32F469BE.json +++ b/data/chips/STM32F469BE.json @@ -5653,7 +5653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6155,7 +6155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6297,7 +6297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6541,7 +6541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BG.json b/data/chips/STM32F469BG.json index b3788a5..1f8130e 100644 --- a/data/chips/STM32F469BG.json +++ b/data/chips/STM32F469BG.json @@ -5653,7 +5653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6155,7 +6155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6297,7 +6297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6541,7 +6541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BI.json b/data/chips/STM32F469BI.json index f6cf9e0..683aebc 100644 --- a/data/chips/STM32F469BI.json +++ b/data/chips/STM32F469BI.json @@ -5686,7 +5686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6188,7 +6188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6330,7 +6330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6462,7 +6462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6574,7 +6574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6811,7 +6811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469IE.json b/data/chips/STM32F469IE.json index 6c4f9cb..12d3c98 100644 --- a/data/chips/STM32F469IE.json +++ b/data/chips/STM32F469IE.json @@ -6398,7 +6398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6895,7 +6895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7037,7 +7037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7281,7 +7281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7503,7 +7503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469IG.json b/data/chips/STM32F469IG.json index c581ac6..95debf9 100644 --- a/data/chips/STM32F469IG.json +++ b/data/chips/STM32F469IG.json @@ -6398,7 +6398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6895,7 +6895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7037,7 +7037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7281,7 +7281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7503,7 +7503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469II.json b/data/chips/STM32F469II.json index ab3bcf3..fcae529 100644 --- a/data/chips/STM32F469II.json +++ b/data/chips/STM32F469II.json @@ -6431,7 +6431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6928,7 +6928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7202,7 +7202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7314,7 +7314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7536,7 +7536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NE.json b/data/chips/STM32F469NE.json index afed99b..0d8b813 100644 --- a/data/chips/STM32F469NE.json +++ b/data/chips/STM32F469NE.json @@ -5701,7 +5701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6345,7 +6345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6477,7 +6477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6589,7 +6589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6826,7 +6826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NG.json b/data/chips/STM32F469NG.json index 4a65646..b18d020 100644 --- a/data/chips/STM32F469NG.json +++ b/data/chips/STM32F469NG.json @@ -5701,7 +5701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6345,7 +6345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6477,7 +6477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6589,7 +6589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6826,7 +6826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NI.json b/data/chips/STM32F469NI.json index 001637b..9a1c52b 100644 --- a/data/chips/STM32F469NI.json +++ b/data/chips/STM32F469NI.json @@ -5734,7 +5734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6236,7 +6236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6378,7 +6378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6510,7 +6510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6622,7 +6622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6859,7 +6859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VE.json b/data/chips/STM32F469VE.json index 9973c99..8ddb1f1 100644 --- a/data/chips/STM32F469VE.json +++ b/data/chips/STM32F469VE.json @@ -3623,7 +3623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4237,7 +4237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VG.json b/data/chips/STM32F469VG.json index bd5ff5b..d8bfdbc 100644 --- a/data/chips/STM32F469VG.json +++ b/data/chips/STM32F469VG.json @@ -3623,7 +3623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4237,7 +4237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VI.json b/data/chips/STM32F469VI.json index 2ddf3d1..5787526 100644 --- a/data/chips/STM32F469VI.json +++ b/data/chips/STM32F469VI.json @@ -3656,7 +3656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4128,7 +4128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4402,7 +4402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4499,7 +4499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4716,7 +4716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZE.json b/data/chips/STM32F469ZE.json index d8e3594..a994031 100644 --- a/data/chips/STM32F469ZE.json +++ b/data/chips/STM32F469ZE.json @@ -4304,7 +4304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4776,7 +4776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5050,7 +5050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZG.json b/data/chips/STM32F469ZG.json index bd0a31a..6fd2c26 100644 --- a/data/chips/STM32F469ZG.json +++ b/data/chips/STM32F469ZG.json @@ -4304,7 +4304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4776,7 +4776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5050,7 +5050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZI.json b/data/chips/STM32F469ZI.json index f11aed1..8453be6 100644 --- a/data/chips/STM32F469ZI.json +++ b/data/chips/STM32F469ZI.json @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4809,7 +4809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4951,7 +4951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5190,7 +5190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5407,7 +5407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479AG.json b/data/chips/STM32F479AG.json index e16506b..3f6d583 100644 --- a/data/chips/STM32F479AG.json +++ b/data/chips/STM32F479AG.json @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6386,7 +6386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6528,7 +6528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6660,7 +6660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6772,7 +6772,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7009,7 +7009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479AI.json b/data/chips/STM32F479AI.json index 6e1160c..f796673 100644 --- a/data/chips/STM32F479AI.json +++ b/data/chips/STM32F479AI.json @@ -5942,7 +5942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6419,7 +6419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6561,7 +6561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6693,7 +6693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6805,7 +6805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7042,7 +7042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479BG.json b/data/chips/STM32F479BG.json index 52d8091..416baf7 100644 --- a/data/chips/STM32F479BG.json +++ b/data/chips/STM32F479BG.json @@ -5717,7 +5717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6219,7 +6219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6361,7 +6361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6493,7 +6493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6605,7 +6605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6842,7 +6842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479BI.json b/data/chips/STM32F479BI.json index 154973a..dad4064 100644 --- a/data/chips/STM32F479BI.json +++ b/data/chips/STM32F479BI.json @@ -5750,7 +5750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6252,7 +6252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6394,7 +6394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6526,7 +6526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6638,7 +6638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6875,7 +6875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479IG.json b/data/chips/STM32F479IG.json index 29444ec..2420db4 100644 --- a/data/chips/STM32F479IG.json +++ b/data/chips/STM32F479IG.json @@ -6462,7 +6462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6959,7 +6959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7101,7 +7101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7233,7 +7233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7345,7 +7345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7567,7 +7567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479II.json b/data/chips/STM32F479II.json index 7eb82e9..3534b99 100644 --- a/data/chips/STM32F479II.json +++ b/data/chips/STM32F479II.json @@ -6495,7 +6495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6992,7 +6992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7134,7 +7134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7266,7 +7266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7378,7 +7378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7600,7 +7600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479NG.json b/data/chips/STM32F479NG.json index aad8308..c8d01ae 100644 --- a/data/chips/STM32F479NG.json +++ b/data/chips/STM32F479NG.json @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6267,7 +6267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6541,7 +6541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6653,7 +6653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6890,7 +6890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479NI.json b/data/chips/STM32F479NI.json index 2e8513f..dad5fbd 100644 --- a/data/chips/STM32F479NI.json +++ b/data/chips/STM32F479NI.json @@ -5798,7 +5798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6442,7 +6442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6574,7 +6574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6686,7 +6686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6923,7 +6923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479VG.json b/data/chips/STM32F479VG.json index 620eaa5..5bd2862 100644 --- a/data/chips/STM32F479VG.json +++ b/data/chips/STM32F479VG.json @@ -3687,7 +3687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4159,7 +4159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4301,7 +4301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4433,7 +4433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4530,7 +4530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4747,7 +4747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479VI.json b/data/chips/STM32F479VI.json index cf5267c..709376a 100644 --- a/data/chips/STM32F479VI.json +++ b/data/chips/STM32F479VI.json @@ -3720,7 +3720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4192,7 +4192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4334,7 +4334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4563,7 +4563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4780,7 +4780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479ZG.json b/data/chips/STM32F479ZG.json index 8a67aca..f8d35c4 100644 --- a/data/chips/STM32F479ZG.json +++ b/data/chips/STM32F479ZG.json @@ -4368,7 +4368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4840,7 +4840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5114,7 +5114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5438,7 +5438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479ZI.json b/data/chips/STM32F479ZI.json index 3477dfe..24c17c2 100644 --- a/data/chips/STM32F479ZI.json +++ b/data/chips/STM32F479ZI.json @@ -4401,7 +4401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4873,7 +4873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5015,7 +5015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5147,7 +5147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5254,7 +5254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722IC.json b/data/chips/STM32F722IC.json index 469061f..3419474 100644 --- a/data/chips/STM32F722IC.json +++ b/data/chips/STM32F722IC.json @@ -5902,7 +5902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6683,7 +6683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6795,7 +6795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7032,7 +7032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722IE.json b/data/chips/STM32F722IE.json index d32edfc..741c460 100644 --- a/data/chips/STM32F722IE.json +++ b/data/chips/STM32F722IE.json @@ -5902,7 +5902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6683,7 +6683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6795,7 +6795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7032,7 +7032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722RC.json b/data/chips/STM32F722RC.json index 267b298..42abeba 100644 --- a/data/chips/STM32F722RC.json +++ b/data/chips/STM32F722RC.json @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3358,7 +3358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3445,7 +3445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722RE.json b/data/chips/STM32F722RE.json index 5eb89e0..4ad8501 100644 --- a/data/chips/STM32F722RE.json +++ b/data/chips/STM32F722RE.json @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3358,7 +3358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3445,7 +3445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722VC.json b/data/chips/STM32F722VC.json index 2153c76..19c3bd3 100644 --- a/data/chips/STM32F722VC.json +++ b/data/chips/STM32F722VC.json @@ -3603,7 +3603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4354,7 +4354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722VE.json b/data/chips/STM32F722VE.json index 042acc9..9f05f9c 100644 --- a/data/chips/STM32F722VE.json +++ b/data/chips/STM32F722VE.json @@ -3603,7 +3603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4354,7 +4354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722ZC.json b/data/chips/STM32F722ZC.json index 2b85cc4..1dffd9b 100644 --- a/data/chips/STM32F722ZC.json +++ b/data/chips/STM32F722ZC.json @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4732,7 +4732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4874,7 +4874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5006,7 +5006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5335,7 +5335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722ZE.json b/data/chips/STM32F722ZE.json index 7b7bf35..5f3107e 100644 --- a/data/chips/STM32F722ZE.json +++ b/data/chips/STM32F722ZE.json @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4732,7 +4732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4874,7 +4874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5006,7 +5006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5335,7 +5335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723IC.json b/data/chips/STM32F723IC.json index 0e9f9c2..aac94fc 100644 --- a/data/chips/STM32F723IC.json +++ b/data/chips/STM32F723IC.json @@ -5867,7 +5867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6354,7 +6354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6496,7 +6496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6628,7 +6628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6740,7 +6740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6977,7 +6977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723IE.json b/data/chips/STM32F723IE.json index 68d517d..b3f5238 100644 --- a/data/chips/STM32F723IE.json +++ b/data/chips/STM32F723IE.json @@ -5867,7 +5867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6354,7 +6354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6496,7 +6496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6628,7 +6628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6740,7 +6740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6977,7 +6977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723VC.json b/data/chips/STM32F723VC.json index 4d510a1..b856994 100644 --- a/data/chips/STM32F723VC.json +++ b/data/chips/STM32F723VC.json @@ -4045,7 +4045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4599,7 +4599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4731,7 +4731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4843,7 +4843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723VE.json b/data/chips/STM32F723VE.json index ff7d6d5..0042e6f 100644 --- a/data/chips/STM32F723VE.json +++ b/data/chips/STM32F723VE.json @@ -4045,7 +4045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4599,7 +4599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4731,7 +4731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4843,7 +4843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723ZC.json b/data/chips/STM32F723ZC.json index c7a64e2..d6e6193 100644 --- a/data/chips/STM32F723ZC.json +++ b/data/chips/STM32F723ZC.json @@ -5070,7 +5070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5502,7 +5502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5644,7 +5644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5776,7 +5776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5888,7 +5888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6105,7 +6105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723ZE.json b/data/chips/STM32F723ZE.json index 42a7ddc..9845ea7 100644 --- a/data/chips/STM32F723ZE.json +++ b/data/chips/STM32F723ZE.json @@ -5070,7 +5070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5502,7 +5502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5644,7 +5644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5776,7 +5776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5888,7 +5888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6105,7 +6105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730I8.json b/data/chips/STM32F730I8.json index e568c8a..75e2ced 100644 --- a/data/chips/STM32F730I8.json +++ b/data/chips/STM32F730I8.json @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5439,7 +5439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5571,7 +5571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5683,7 +5683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5920,7 +5920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730R8.json b/data/chips/STM32F730R8.json index 2a5469c..43773a2 100644 --- a/data/chips/STM32F730R8.json +++ b/data/chips/STM32F730R8.json @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3089,7 +3089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3231,7 +3231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3363,7 +3363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3450,7 +3450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730V8.json b/data/chips/STM32F730V8.json index 97118ff..16e7e44 100644 --- a/data/chips/STM32F730V8.json +++ b/data/chips/STM32F730V8.json @@ -3608,7 +3608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4085,7 +4085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4227,7 +4227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4359,7 +4359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4471,7 +4471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4688,7 +4688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730Z8.json b/data/chips/STM32F730Z8.json index bfcb177..a36fc11 100644 --- a/data/chips/STM32F730Z8.json +++ b/data/chips/STM32F730Z8.json @@ -4205,7 +4205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4637,7 +4637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4779,7 +4779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4911,7 +4911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5023,7 +5023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5240,7 +5240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732IE.json b/data/chips/STM32F732IE.json index 4bf81ae..fb664b8 100644 --- a/data/chips/STM32F732IE.json +++ b/data/chips/STM32F732IE.json @@ -5941,7 +5941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6448,7 +6448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6590,7 +6590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6722,7 +6722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6834,7 +6834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7071,7 +7071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732RE.json b/data/chips/STM32F732RE.json index 51a7de2..0f4b903 100644 --- a/data/chips/STM32F732RE.json +++ b/data/chips/STM32F732RE.json @@ -2696,7 +2696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3123,7 +3123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3265,7 +3265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3397,7 +3397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3484,7 +3484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3701,7 +3701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732VE.json b/data/chips/STM32F732VE.json index cf77450..40fa2a1 100644 --- a/data/chips/STM32F732VE.json +++ b/data/chips/STM32F732VE.json @@ -3642,7 +3642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4119,7 +4119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4505,7 +4505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4722,7 +4722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732ZE.json b/data/chips/STM32F732ZE.json index ca6f4f2..563a9b2 100644 --- a/data/chips/STM32F732ZE.json +++ b/data/chips/STM32F732ZE.json @@ -4274,7 +4274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4771,7 +4771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4913,7 +4913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5045,7 +5045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733IE.json b/data/chips/STM32F733IE.json index d249087..b872999 100644 --- a/data/chips/STM32F733IE.json +++ b/data/chips/STM32F733IE.json @@ -5906,7 +5906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6393,7 +6393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6535,7 +6535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6667,7 +6667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6779,7 +6779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7016,7 +7016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733VE.json b/data/chips/STM32F733VE.json index 3c92861..a5f21f0 100644 --- a/data/chips/STM32F733VE.json +++ b/data/chips/STM32F733VE.json @@ -4084,7 +4084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4770,7 +4770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4882,7 +4882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733ZE.json b/data/chips/STM32F733ZE.json index 52da3af..f917e3c 100644 --- a/data/chips/STM32F733ZE.json +++ b/data/chips/STM32F733ZE.json @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5541,7 +5541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5683,7 +5683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5815,7 +5815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5927,7 +5927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6144,7 +6144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745IE.json b/data/chips/STM32F745IE.json index 51c722c..fd7cc76 100644 --- a/data/chips/STM32F745IE.json +++ b/data/chips/STM32F745IE.json @@ -6693,7 +6693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7200,7 +7200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7342,7 +7342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7474,7 +7474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7586,7 +7586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7823,7 +7823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745IG.json b/data/chips/STM32F745IG.json index 858d1d3..2064032 100644 --- a/data/chips/STM32F745IG.json +++ b/data/chips/STM32F745IG.json @@ -6693,7 +6693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7200,7 +7200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7342,7 +7342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7474,7 +7474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7586,7 +7586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7823,7 +7823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745VE.json b/data/chips/STM32F745VE.json index b68bdcc..9ea6063 100644 --- a/data/chips/STM32F745VE.json +++ b/data/chips/STM32F745VE.json @@ -4744,7 +4744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5495,7 +5495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5607,7 +5607,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5824,7 +5824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745VG.json b/data/chips/STM32F745VG.json index 7758d90..4598b17 100644 --- a/data/chips/STM32F745VG.json +++ b/data/chips/STM32F745VG.json @@ -4744,7 +4744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5495,7 +5495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5607,7 +5607,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5824,7 +5824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745ZE.json b/data/chips/STM32F745ZE.json index a4df638..f31eda9 100644 --- a/data/chips/STM32F745ZE.json +++ b/data/chips/STM32F745ZE.json @@ -4906,7 +4906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5403,7 +5403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5545,7 +5545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5677,7 +5677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5789,7 +5789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6006,7 +6006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745ZG.json b/data/chips/STM32F745ZG.json index f135aa7..d766e52 100644 --- a/data/chips/STM32F745ZG.json +++ b/data/chips/STM32F745ZG.json @@ -4906,7 +4906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5403,7 +5403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5545,7 +5545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5677,7 +5677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5789,7 +5789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6006,7 +6006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746BE.json b/data/chips/STM32F746BE.json index df90387..0efcfe8 100644 --- a/data/chips/STM32F746BE.json +++ b/data/chips/STM32F746BE.json @@ -6147,7 +6147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6654,7 +6654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6796,7 +6796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6928,7 +6928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7040,7 +7040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7277,7 +7277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746BG.json b/data/chips/STM32F746BG.json index 532eab3..4955277 100644 --- a/data/chips/STM32F746BG.json +++ b/data/chips/STM32F746BG.json @@ -6147,7 +6147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6654,7 +6654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6796,7 +6796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6928,7 +6928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7040,7 +7040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7277,7 +7277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746IE.json b/data/chips/STM32F746IE.json index 30cacac..c5e1e5a 100644 --- a/data/chips/STM32F746IE.json +++ b/data/chips/STM32F746IE.json @@ -7027,7 +7027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7534,7 +7534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7676,7 +7676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7808,7 +7808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7920,7 +7920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8157,7 +8157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746IG.json b/data/chips/STM32F746IG.json index eba0275..91c1902 100644 --- a/data/chips/STM32F746IG.json +++ b/data/chips/STM32F746IG.json @@ -7027,7 +7027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7534,7 +7534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7676,7 +7676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7808,7 +7808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7920,7 +7920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8157,7 +8157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746NE.json b/data/chips/STM32F746NE.json index e2e95a1..7c22fe1 100644 --- a/data/chips/STM32F746NE.json +++ b/data/chips/STM32F746NE.json @@ -6195,7 +6195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6702,7 +6702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6844,7 +6844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6976,7 +6976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7088,7 +7088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7325,7 +7325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746NG.json b/data/chips/STM32F746NG.json index a72e185..082ed14 100644 --- a/data/chips/STM32F746NG.json +++ b/data/chips/STM32F746NG.json @@ -6195,7 +6195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6702,7 +6702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6844,7 +6844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6976,7 +6976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7088,7 +7088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7325,7 +7325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746VE.json b/data/chips/STM32F746VE.json index 6c074b5..9ac2c0f 100644 --- a/data/chips/STM32F746VE.json +++ b/data/chips/STM32F746VE.json @@ -4933,7 +4933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5410,7 +5410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5552,7 +5552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5684,7 +5684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5796,7 +5796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6013,7 +6013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746VG.json b/data/chips/STM32F746VG.json index 00cebb3..a66ddb5 100644 --- a/data/chips/STM32F746VG.json +++ b/data/chips/STM32F746VG.json @@ -4933,7 +4933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5410,7 +5410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5552,7 +5552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5684,7 +5684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5796,7 +5796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6013,7 +6013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746ZE.json b/data/chips/STM32F746ZE.json index 7cb1692..7ebb10b 100644 --- a/data/chips/STM32F746ZE.json +++ b/data/chips/STM32F746ZE.json @@ -6009,7 +6009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6506,7 +6506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6648,7 +6648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6780,7 +6780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6892,7 +6892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7109,7 +7109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746ZG.json b/data/chips/STM32F746ZG.json index 9c1edd9..faeb3b9 100644 --- a/data/chips/STM32F746ZG.json +++ b/data/chips/STM32F746ZG.json @@ -6009,7 +6009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6506,7 +6506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6648,7 +6648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6780,7 +6780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6892,7 +6892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7109,7 +7109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750N8.json b/data/chips/STM32F750N8.json index 224d8d0..8751139 100644 --- a/data/chips/STM32F750N8.json +++ b/data/chips/STM32F750N8.json @@ -6218,7 +6218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6725,7 +6725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6867,7 +6867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6999,7 +6999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7111,7 +7111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7348,7 +7348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750V8.json b/data/chips/STM32F750V8.json index d628b9a..7898c3c 100644 --- a/data/chips/STM32F750V8.json +++ b/data/chips/STM32F750V8.json @@ -4350,7 +4350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4827,7 +4827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4969,7 +4969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5101,7 +5101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5213,7 +5213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5430,7 +5430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750Z8.json b/data/chips/STM32F750Z8.json index 7a483b7..98c61ff 100644 --- a/data/chips/STM32F750Z8.json +++ b/data/chips/STM32F750Z8.json @@ -5168,7 +5168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5665,7 +5665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5807,7 +5807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5939,7 +5939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6268,7 +6268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756BG.json b/data/chips/STM32F756BG.json index b521d58..fd16b50 100644 --- a/data/chips/STM32F756BG.json +++ b/data/chips/STM32F756BG.json @@ -6216,7 +6216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6723,7 +6723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6865,7 +6865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6997,7 +6997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7109,7 +7109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7346,7 +7346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756IG.json b/data/chips/STM32F756IG.json index bccd751..56caa59 100644 --- a/data/chips/STM32F756IG.json +++ b/data/chips/STM32F756IG.json @@ -7096,7 +7096,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7603,7 +7603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7745,7 +7745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7877,7 +7877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7989,7 +7989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8226,7 +8226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756NG.json b/data/chips/STM32F756NG.json index f16656a..e3369bc 100644 --- a/data/chips/STM32F756NG.json +++ b/data/chips/STM32F756NG.json @@ -6264,7 +6264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6771,7 +6771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6913,7 +6913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7045,7 +7045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7157,7 +7157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7394,7 +7394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756VG.json b/data/chips/STM32F756VG.json index 723fbfb..f34e327 100644 --- a/data/chips/STM32F756VG.json +++ b/data/chips/STM32F756VG.json @@ -5002,7 +5002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5479,7 +5479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5621,7 +5621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5753,7 +5753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5865,7 +5865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6082,7 +6082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756ZG.json b/data/chips/STM32F756ZG.json index c4fe68c..9d8578d 100644 --- a/data/chips/STM32F756ZG.json +++ b/data/chips/STM32F756ZG.json @@ -6078,7 +6078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6575,7 +6575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6717,7 +6717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6961,7 +6961,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7178,7 +7178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765BG.json b/data/chips/STM32F765BG.json index 41d2d54..d0f36d4 100644 --- a/data/chips/STM32F765BG.json +++ b/data/chips/STM32F765BG.json @@ -6398,7 +6398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6905,7 +6905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7047,7 +7047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7179,7 +7179,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7291,7 +7291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7528,7 +7528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765BI.json b/data/chips/STM32F765BI.json index 858644a..9c42bfa 100644 --- a/data/chips/STM32F765BI.json +++ b/data/chips/STM32F765BI.json @@ -6404,7 +6404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6911,7 +6911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7053,7 +7053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7185,7 +7185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7297,7 +7297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7534,7 +7534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765IG.json b/data/chips/STM32F765IG.json index e73387a..09abe13 100644 --- a/data/chips/STM32F765IG.json +++ b/data/chips/STM32F765IG.json @@ -7424,7 +7424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7931,7 +7931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8073,7 +8073,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8205,7 +8205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8317,7 +8317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8554,7 +8554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765II.json b/data/chips/STM32F765II.json index 016ccc2..689f687 100644 --- a/data/chips/STM32F765II.json +++ b/data/chips/STM32F765II.json @@ -7424,7 +7424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7931,7 +7931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8073,7 +8073,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8205,7 +8205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8317,7 +8317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8554,7 +8554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765NG.json b/data/chips/STM32F765NG.json index bed8b7b..1b64836 100644 --- a/data/chips/STM32F765NG.json +++ b/data/chips/STM32F765NG.json @@ -6452,7 +6452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6959,7 +6959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7101,7 +7101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7233,7 +7233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7345,7 +7345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7582,7 +7582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765NI.json b/data/chips/STM32F765NI.json index 4e831bd..beeddb4 100644 --- a/data/chips/STM32F765NI.json +++ b/data/chips/STM32F765NI.json @@ -6452,7 +6452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6959,7 +6959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7101,7 +7101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7233,7 +7233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7345,7 +7345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7582,7 +7582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765VG.json b/data/chips/STM32F765VG.json index fc32973..ca5bdec 100644 --- a/data/chips/STM32F765VG.json +++ b/data/chips/STM32F765VG.json @@ -5441,7 +5441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5918,7 +5918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6060,7 +6060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6192,7 +6192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6304,7 +6304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6521,7 +6521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765VI.json b/data/chips/STM32F765VI.json index ed6fe6e..2b2cec5 100644 --- a/data/chips/STM32F765VI.json +++ b/data/chips/STM32F765VI.json @@ -5441,7 +5441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5918,7 +5918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6060,7 +6060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6192,7 +6192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6304,7 +6304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6521,7 +6521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765ZG.json b/data/chips/STM32F765ZG.json index a32fb46..01fd6c9 100644 --- a/data/chips/STM32F765ZG.json +++ b/data/chips/STM32F765ZG.json @@ -5632,7 +5632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6129,7 +6129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6403,7 +6403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6515,7 +6515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6732,7 +6732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765ZI.json b/data/chips/STM32F765ZI.json index eb58b9e..3ccce14 100644 --- a/data/chips/STM32F765ZI.json +++ b/data/chips/STM32F765ZI.json @@ -5632,7 +5632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6129,7 +6129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6403,7 +6403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6515,7 +6515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6732,7 +6732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767BG.json b/data/chips/STM32F767BG.json index fcb44c1..10d9be2 100644 --- a/data/chips/STM32F767BG.json +++ b/data/chips/STM32F767BG.json @@ -7013,7 +7013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7520,7 +7520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7662,7 +7662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7794,7 +7794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7906,7 +7906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8143,7 +8143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767BI.json b/data/chips/STM32F767BI.json index bf33c0b..5b1f8df 100644 --- a/data/chips/STM32F767BI.json +++ b/data/chips/STM32F767BI.json @@ -7013,7 +7013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7520,7 +7520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7662,7 +7662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7794,7 +7794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7906,7 +7906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8143,7 +8143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767IG.json b/data/chips/STM32F767IG.json index 751dae6..22eee0f 100644 --- a/data/chips/STM32F767IG.json +++ b/data/chips/STM32F767IG.json @@ -7873,7 +7873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8380,7 +8380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8522,7 +8522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8654,7 +8654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8766,7 +8766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9003,7 +9003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767II.json b/data/chips/STM32F767II.json index ddfe783..e20a603 100644 --- a/data/chips/STM32F767II.json +++ b/data/chips/STM32F767II.json @@ -7873,7 +7873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8380,7 +8380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8522,7 +8522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8654,7 +8654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8766,7 +8766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9003,7 +9003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767NG.json b/data/chips/STM32F767NG.json index 7e55161..32ddd1c 100644 --- a/data/chips/STM32F767NG.json +++ b/data/chips/STM32F767NG.json @@ -7061,7 +7061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7568,7 +7568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7710,7 +7710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7842,7 +7842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7954,7 +7954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8191,7 +8191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767NI.json b/data/chips/STM32F767NI.json index 50b1be6..69e3b91 100644 --- a/data/chips/STM32F767NI.json +++ b/data/chips/STM32F767NI.json @@ -7061,7 +7061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7568,7 +7568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7710,7 +7710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7842,7 +7842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7954,7 +7954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8191,7 +8191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767VG.json b/data/chips/STM32F767VG.json index 8e62596..a737b22 100644 --- a/data/chips/STM32F767VG.json +++ b/data/chips/STM32F767VG.json @@ -5725,7 +5725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6202,7 +6202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6476,7 +6476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6588,7 +6588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6805,7 +6805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767VI.json b/data/chips/STM32F767VI.json index 086024a..5ac0a93 100644 --- a/data/chips/STM32F767VI.json +++ b/data/chips/STM32F767VI.json @@ -5725,7 +5725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6202,7 +6202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6476,7 +6476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6588,7 +6588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6805,7 +6805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767ZG.json b/data/chips/STM32F767ZG.json index 82d06c8..92b2f89 100644 --- a/data/chips/STM32F767ZG.json +++ b/data/chips/STM32F767ZG.json @@ -5971,7 +5971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6468,7 +6468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6610,7 +6610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6742,7 +6742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6854,7 +6854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7071,7 +7071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767ZI.json b/data/chips/STM32F767ZI.json index d06434b..f173db5 100644 --- a/data/chips/STM32F767ZI.json +++ b/data/chips/STM32F767ZI.json @@ -5971,7 +5971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6468,7 +6468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6610,7 +6610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6742,7 +6742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6854,7 +6854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7071,7 +7071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F768AI.json b/data/chips/STM32F768AI.json index 788f091..9294077 100644 --- a/data/chips/STM32F768AI.json +++ b/data/chips/STM32F768AI.json @@ -5932,7 +5932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6414,7 +6414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6556,7 +6556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6688,7 +6688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6800,7 +6800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7037,7 +7037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769AG.json b/data/chips/STM32F769AG.json index 6c06750..2b682e6 100644 --- a/data/chips/STM32F769AG.json +++ b/data/chips/STM32F769AG.json @@ -5932,7 +5932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6414,7 +6414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6556,7 +6556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6688,7 +6688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6800,7 +6800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7037,7 +7037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769AI.json b/data/chips/STM32F769AI.json index 7a01edf..3bee6e5 100644 --- a/data/chips/STM32F769AI.json +++ b/data/chips/STM32F769AI.json @@ -6221,7 +6221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6703,7 +6703,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6845,7 +6845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6977,7 +6977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7089,7 +7089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7326,7 +7326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769BG.json b/data/chips/STM32F769BG.json index 1416f9d..3ea7b6e 100644 --- a/data/chips/STM32F769BG.json +++ b/data/chips/STM32F769BG.json @@ -7022,7 +7022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7529,7 +7529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7671,7 +7671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7803,7 +7803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7915,7 +7915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8152,7 +8152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769BI.json b/data/chips/STM32F769BI.json index 1ef4f4f..6d4abd5 100644 --- a/data/chips/STM32F769BI.json +++ b/data/chips/STM32F769BI.json @@ -7022,7 +7022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7529,7 +7529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7671,7 +7671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7803,7 +7803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7915,7 +7915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8152,7 +8152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769IG.json b/data/chips/STM32F769IG.json index ad5448f..31c83fb 100644 --- a/data/chips/STM32F769IG.json +++ b/data/chips/STM32F769IG.json @@ -6540,7 +6540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7042,7 +7042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7184,7 +7184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7316,7 +7316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7428,7 +7428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7650,7 +7650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769II.json b/data/chips/STM32F769II.json index 014a446..913c8bb 100644 --- a/data/chips/STM32F769II.json +++ b/data/chips/STM32F769II.json @@ -6540,7 +6540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7042,7 +7042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7184,7 +7184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7316,7 +7316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7428,7 +7428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7650,7 +7650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769NG.json b/data/chips/STM32F769NG.json index b1d7b37..90999b3 100644 --- a/data/chips/STM32F769NG.json +++ b/data/chips/STM32F769NG.json @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7577,7 +7577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7719,7 +7719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7851,7 +7851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7963,7 +7963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8200,7 +8200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769NI.json b/data/chips/STM32F769NI.json index cb1f55b..2c1c797 100644 --- a/data/chips/STM32F769NI.json +++ b/data/chips/STM32F769NI.json @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7577,7 +7577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7719,7 +7719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7851,7 +7851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7963,7 +7963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8200,7 +8200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777BI.json b/data/chips/STM32F777BI.json index e1d73b2..73c6346 100644 --- a/data/chips/STM32F777BI.json +++ b/data/chips/STM32F777BI.json @@ -7088,7 +7088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7595,7 +7595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7737,7 +7737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7869,7 +7869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7981,7 +7981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8218,7 +8218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777II.json b/data/chips/STM32F777II.json index 4be0835..936f13e 100644 --- a/data/chips/STM32F777II.json +++ b/data/chips/STM32F777II.json @@ -7948,7 +7948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8455,7 +8455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8597,7 +8597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8729,7 +8729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8841,7 +8841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9078,7 +9078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777NI.json b/data/chips/STM32F777NI.json index 9533439..a4569ec 100644 --- a/data/chips/STM32F777NI.json +++ b/data/chips/STM32F777NI.json @@ -7136,7 +7136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7643,7 +7643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7785,7 +7785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7917,7 +7917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8029,7 +8029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8266,7 +8266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777VI.json b/data/chips/STM32F777VI.json index af62f4b..b7c08f0 100644 --- a/data/chips/STM32F777VI.json +++ b/data/chips/STM32F777VI.json @@ -5800,7 +5800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6277,7 +6277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6419,7 +6419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6663,7 +6663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6880,7 +6880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777ZI.json b/data/chips/STM32F777ZI.json index bd268b7..4c6d35f 100644 --- a/data/chips/STM32F777ZI.json +++ b/data/chips/STM32F777ZI.json @@ -6046,7 +6046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6543,7 +6543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6685,7 +6685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6817,7 +6817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6929,7 +6929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7146,7 +7146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F778AI.json b/data/chips/STM32F778AI.json index 3722821..48aa8f9 100644 --- a/data/chips/STM32F778AI.json +++ b/data/chips/STM32F778AI.json @@ -6284,7 +6284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6766,7 +6766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7040,7 +7040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7152,7 +7152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7389,7 +7389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779AI.json b/data/chips/STM32F779AI.json index 766cd12..1e9c5f7 100644 --- a/data/chips/STM32F779AI.json +++ b/data/chips/STM32F779AI.json @@ -6290,7 +6290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6772,7 +6772,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6914,7 +6914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7046,7 +7046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7158,7 +7158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7395,7 +7395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779BI.json b/data/chips/STM32F779BI.json index 335b8db..461f772 100644 --- a/data/chips/STM32F779BI.json +++ b/data/chips/STM32F779BI.json @@ -7091,7 +7091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7598,7 +7598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7740,7 +7740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7872,7 +7872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7984,7 +7984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8221,7 +8221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779II.json b/data/chips/STM32F779II.json index 748f14a..11c0455 100644 --- a/data/chips/STM32F779II.json +++ b/data/chips/STM32F779II.json @@ -6609,7 +6609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7111,7 +7111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7253,7 +7253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7385,7 +7385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7497,7 +7497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7719,7 +7719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779NI.json b/data/chips/STM32F779NI.json index 1431771..5e85c4f 100644 --- a/data/chips/STM32F779NI.json +++ b/data/chips/STM32F779NI.json @@ -7139,7 +7139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7646,7 +7646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7788,7 +7788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7920,7 +7920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8032,7 +8032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8269,7 +8269,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G030C6.json b/data/chips/STM32G030C6.json index 8ff7c52..722b378 100644 --- a/data/chips/STM32G030C6.json +++ b/data/chips/STM32G030C6.json @@ -1565,7 +1565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1810,7 +1810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1897,7 +1897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1989,7 +1989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030C8.json b/data/chips/STM32G030C8.json index 7a3c168..b8a4295 100644 --- a/data/chips/STM32G030C8.json +++ b/data/chips/STM32G030C8.json @@ -1565,7 +1565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1810,7 +1810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1897,7 +1897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1989,7 +1989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030F6.json b/data/chips/STM32G030F6.json index 8050719..087e870 100644 --- a/data/chips/STM32G030F6.json +++ b/data/chips/STM32G030F6.json @@ -1318,7 +1318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1523,7 +1523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1605,7 +1605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1692,7 +1692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030J6.json b/data/chips/STM32G030J6.json index 8e95c4b..ee9a500 100644 --- a/data/chips/STM32G030J6.json +++ b/data/chips/STM32G030J6.json @@ -1120,7 +1120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1300,7 +1300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1377,7 +1377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1454,7 +1454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030K6.json b/data/chips/STM32G030K6.json index 02a8d89..9c74ab0 100644 --- a/data/chips/STM32G030K6.json +++ b/data/chips/STM32G030K6.json @@ -1383,7 +1383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1588,7 +1588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1670,7 +1670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1757,7 +1757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030K8.json b/data/chips/STM32G030K8.json index e0c6b4f..f6a7fd7 100644 --- a/data/chips/STM32G030K8.json +++ b/data/chips/STM32G030K8.json @@ -1383,7 +1383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1588,7 +1588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1670,7 +1670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1757,7 +1757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C4.json b/data/chips/STM32G031C4.json index 6d7fae2..6d99da7 100644 --- a/data/chips/STM32G031C4.json +++ b/data/chips/STM32G031C4.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2650,7 +2650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C6.json b/data/chips/STM32G031C6.json index 8f2365c..4de5bb0 100644 --- a/data/chips/STM32G031C6.json +++ b/data/chips/STM32G031C6.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2650,7 +2650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C8.json b/data/chips/STM32G031C8.json index dd63dcc..1d961b0 100644 --- a/data/chips/STM32G031C8.json +++ b/data/chips/STM32G031C8.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2650,7 +2650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F4.json b/data/chips/STM32G031F4.json index 9f1fc2b..cb9c149 100644 --- a/data/chips/STM32G031F4.json +++ b/data/chips/STM32G031F4.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F6.json b/data/chips/STM32G031F6.json index 5af9efe..e0d2ed0 100644 --- a/data/chips/STM32G031F6.json +++ b/data/chips/STM32G031F6.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F8.json b/data/chips/STM32G031F8.json index c16524c..2eaa6da 100644 --- a/data/chips/STM32G031F8.json +++ b/data/chips/STM32G031F8.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G4.json b/data/chips/STM32G031G4.json index 8e3f7a5..f89db26 100644 --- a/data/chips/STM32G031G4.json +++ b/data/chips/STM32G031G4.json @@ -1524,7 +1524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1729,7 +1729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2025,7 +2025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G6.json b/data/chips/STM32G031G6.json index 2f98ad5..e858054 100644 --- a/data/chips/STM32G031G6.json +++ b/data/chips/STM32G031G6.json @@ -1524,7 +1524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1729,7 +1729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2025,7 +2025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G8.json b/data/chips/STM32G031G8.json index 9a15289..ddfdbad 100644 --- a/data/chips/STM32G031G8.json +++ b/data/chips/STM32G031G8.json @@ -1524,7 +1524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1729,7 +1729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2025,7 +2025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031J4.json b/data/chips/STM32G031J4.json index 88a49ee..3a3a8c9 100644 --- a/data/chips/STM32G031J4.json +++ b/data/chips/STM32G031J4.json @@ -1286,7 +1286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1466,7 +1466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1543,7 +1543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1620,7 +1620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1727,7 +1727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031J6.json b/data/chips/STM32G031J6.json index ba3b489..d57acfd 100644 --- a/data/chips/STM32G031J6.json +++ b/data/chips/STM32G031J6.json @@ -1286,7 +1286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1466,7 +1466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1543,7 +1543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1620,7 +1620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1727,7 +1727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K4.json b/data/chips/STM32G031K4.json index 1c21048..1c5c612 100644 --- a/data/chips/STM32G031K4.json +++ b/data/chips/STM32G031K4.json @@ -1776,7 +1776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1981,7 +1981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2150,7 +2150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K6.json b/data/chips/STM32G031K6.json index ea7dfe2..a2ffba4 100644 --- a/data/chips/STM32G031K6.json +++ b/data/chips/STM32G031K6.json @@ -1776,7 +1776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1981,7 +1981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2150,7 +2150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K8.json b/data/chips/STM32G031K8.json index ddde704..8bfdb8f 100644 --- a/data/chips/STM32G031K8.json +++ b/data/chips/STM32G031K8.json @@ -1776,7 +1776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1981,7 +1981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2150,7 +2150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031Y8.json b/data/chips/STM32G031Y8.json index f3611ce..4e8e838 100644 --- a/data/chips/STM32G031Y8.json +++ b/data/chips/STM32G031Y8.json @@ -1499,7 +1499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1704,7 +1704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1873,7 +1873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2000,7 +2000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041C6.json b/data/chips/STM32G041C6.json index 0d03566..ec20989 100644 --- a/data/chips/STM32G041C6.json +++ b/data/chips/STM32G041C6.json @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2572,7 +2572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041C8.json b/data/chips/STM32G041C8.json index 0fb5bd2..6bb21ff 100644 --- a/data/chips/STM32G041C8.json +++ b/data/chips/STM32G041C8.json @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2572,7 +2572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041F6.json b/data/chips/STM32G041F6.json index fbc0984..4e386b9 100644 --- a/data/chips/STM32G041F6.json +++ b/data/chips/STM32G041F6.json @@ -1578,7 +1578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1783,7 +1783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1865,7 +1865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1952,7 +1952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041F8.json b/data/chips/STM32G041F8.json index 03cf423..a90ed5f 100644 --- a/data/chips/STM32G041F8.json +++ b/data/chips/STM32G041F8.json @@ -1578,7 +1578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1783,7 +1783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1865,7 +1865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1952,7 +1952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041G6.json b/data/chips/STM32G041G6.json index c60a9bb..7e99d78 100644 --- a/data/chips/STM32G041G6.json +++ b/data/chips/STM32G041G6.json @@ -1593,7 +1593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1798,7 +1798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1880,7 +1880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1962,7 +1962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2094,7 +2094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041G8.json b/data/chips/STM32G041G8.json index 48371e3..b722971 100644 --- a/data/chips/STM32G041G8.json +++ b/data/chips/STM32G041G8.json @@ -1593,7 +1593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1798,7 +1798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1880,7 +1880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1962,7 +1962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2094,7 +2094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041J6.json b/data/chips/STM32G041J6.json index c71e9e3..e375d01 100644 --- a/data/chips/STM32G041J6.json +++ b/data/chips/STM32G041J6.json @@ -1355,7 +1355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1535,7 +1535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1612,7 +1612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1689,7 +1689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041K6.json b/data/chips/STM32G041K6.json index d72873d..27723a3 100644 --- a/data/chips/STM32G041K6.json +++ b/data/chips/STM32G041K6.json @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2050,7 +2050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2132,7 +2132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2351,7 +2351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041K8.json b/data/chips/STM32G041K8.json index 5212b26..fd16871 100644 --- a/data/chips/STM32G041K8.json +++ b/data/chips/STM32G041K8.json @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2050,7 +2050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2132,7 +2132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2351,7 +2351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041Y8.json b/data/chips/STM32G041Y8.json index 24347b1..82926e0 100644 --- a/data/chips/STM32G041Y8.json +++ b/data/chips/STM32G041Y8.json @@ -1568,7 +1568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1942,7 +1942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2069,7 +2069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050C6.json b/data/chips/STM32G050C6.json index a427eb5..c4dfd8c 100644 --- a/data/chips/STM32G050C6.json +++ b/data/chips/STM32G050C6.json @@ -1756,7 +1756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2218,7 +2218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2310,7 +2310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050C8.json b/data/chips/STM32G050C8.json index 5d33d26..a1aabf1 100644 --- a/data/chips/STM32G050C8.json +++ b/data/chips/STM32G050C8.json @@ -1756,7 +1756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2218,7 +2218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2310,7 +2310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050F6.json b/data/chips/STM32G050F6.json index 61f4066..2017e3c 100644 --- a/data/chips/STM32G050F6.json +++ b/data/chips/STM32G050F6.json @@ -1513,7 +1513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1987,7 +1987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050K6.json b/data/chips/STM32G050K6.json index bb77725..3953d15 100644 --- a/data/chips/STM32G050K6.json +++ b/data/chips/STM32G050K6.json @@ -1578,7 +1578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1783,7 +1783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1965,7 +1965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2052,7 +2052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050K8.json b/data/chips/STM32G050K8.json index ae75255..477c2bf 100644 --- a/data/chips/STM32G050K8.json +++ b/data/chips/STM32G050K8.json @@ -1578,7 +1578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1783,7 +1783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1965,7 +1965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2052,7 +2052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051C6.json b/data/chips/STM32G051C6.json index b36a86d..492bb94 100644 --- a/data/chips/STM32G051C6.json +++ b/data/chips/STM32G051C6.json @@ -2438,7 +2438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2900,7 +2900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051C8.json b/data/chips/STM32G051C8.json index 78b4141..dfab75c 100644 --- a/data/chips/STM32G051C8.json +++ b/data/chips/STM32G051C8.json @@ -2438,7 +2438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2900,7 +2900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051F6.json b/data/chips/STM32G051F6.json index 4d51303..4d32872 100644 --- a/data/chips/STM32G051F6.json +++ b/data/chips/STM32G051F6.json @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2167,7 +2167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2249,7 +2249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2463,7 +2463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051F8.json b/data/chips/STM32G051F8.json index 9bde55c..3bd7d39 100644 --- a/data/chips/STM32G051F8.json +++ b/data/chips/STM32G051F8.json @@ -1999,7 +1999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2204,7 +2204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2304,7 +2304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2386,7 +2386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2473,7 +2473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051G6.json b/data/chips/STM32G051G6.json index 5a1da8e..6854c6e 100644 --- a/data/chips/STM32G051G6.json +++ b/data/chips/STM32G051G6.json @@ -1873,7 +1873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2078,7 +2078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2178,7 +2178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2260,7 +2260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2342,7 +2342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051G8.json b/data/chips/STM32G051G8.json index f1a8c58..02bd03d 100644 --- a/data/chips/STM32G051G8.json +++ b/data/chips/STM32G051G8.json @@ -1873,7 +1873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2078,7 +2078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2178,7 +2178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2260,7 +2260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2342,7 +2342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051K6.json b/data/chips/STM32G051K6.json index 650c30d..424fb39 100644 --- a/data/chips/STM32G051K6.json +++ b/data/chips/STM32G051K6.json @@ -2129,7 +2129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2434,7 +2434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2516,7 +2516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2603,7 +2603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2735,7 +2735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051K8.json b/data/chips/STM32G051K8.json index cb02a29..bace5b9 100644 --- a/data/chips/STM32G051K8.json +++ b/data/chips/STM32G051K8.json @@ -2129,7 +2129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2434,7 +2434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2516,7 +2516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2603,7 +2603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2735,7 +2735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061C6.json b/data/chips/STM32G061C6.json index 80477f2..edf468d 100644 --- a/data/chips/STM32G061C6.json +++ b/data/chips/STM32G061C6.json @@ -2507,7 +2507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2969,7 +2969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3061,7 +3061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061C8.json b/data/chips/STM32G061C8.json index de77849..4c8b18a 100644 --- a/data/chips/STM32G061C8.json +++ b/data/chips/STM32G061C8.json @@ -2507,7 +2507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2969,7 +2969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3061,7 +3061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061F6.json b/data/chips/STM32G061F6.json index 5823e72..f2b9e24 100644 --- a/data/chips/STM32G061F6.json +++ b/data/chips/STM32G061F6.json @@ -1931,7 +1931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2136,7 +2136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2236,7 +2236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2318,7 +2318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061F8.json b/data/chips/STM32G061F8.json index 2b7a0fc..54f1bff 100644 --- a/data/chips/STM32G061F8.json +++ b/data/chips/STM32G061F8.json @@ -2068,7 +2068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2455,7 +2455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2669,7 +2669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061G6.json b/data/chips/STM32G061G6.json index 047c529..631114f 100644 --- a/data/chips/STM32G061G6.json +++ b/data/chips/STM32G061G6.json @@ -1942,7 +1942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2247,7 +2247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2329,7 +2329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061G8.json b/data/chips/STM32G061G8.json index 2d8c3c0..b41e744 100644 --- a/data/chips/STM32G061G8.json +++ b/data/chips/STM32G061G8.json @@ -1942,7 +1942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2247,7 +2247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2329,7 +2329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061K6.json b/data/chips/STM32G061K6.json index b253807..82b6776 100644 --- a/data/chips/STM32G061K6.json +++ b/data/chips/STM32G061K6.json @@ -2198,7 +2198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2403,7 +2403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2585,7 +2585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2672,7 +2672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061K8.json b/data/chips/STM32G061K8.json index ee511b2..c07544a 100644 --- a/data/chips/STM32G061K8.json +++ b/data/chips/STM32G061K8.json @@ -2198,7 +2198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2403,7 +2403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2585,7 +2585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2672,7 +2672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070CB.json b/data/chips/STM32G070CB.json index 13ae1c9..0139eb3 100644 --- a/data/chips/STM32G070CB.json +++ b/data/chips/STM32G070CB.json @@ -1565,7 +1565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1810,7 +1810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1940,7 +1940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2027,7 +2027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070KB.json b/data/chips/STM32G070KB.json index 657797f..9a606e4 100644 --- a/data/chips/STM32G070KB.json +++ b/data/chips/STM32G070KB.json @@ -1371,7 +1371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1576,7 +1576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1676,7 +1676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070RB.json b/data/chips/STM32G070RB.json index 2016abd..428ec75 100644 --- a/data/chips/STM32G070RB.json +++ b/data/chips/STM32G070RB.json @@ -1724,7 +1724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2009,7 +2009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2149,7 +2149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2236,7 +2236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071C6.json b/data/chips/STM32G071C6.json index 0f20dfa..b0d2313 100644 --- a/data/chips/STM32G071C6.json +++ b/data/chips/STM32G071C6.json @@ -2107,7 +2107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2569,7 +2569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2661,7 +2661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071C8.json b/data/chips/STM32G071C8.json index 5063f06..a8070b2 100644 --- a/data/chips/STM32G071C8.json +++ b/data/chips/STM32G071C8.json @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2527,7 +2527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2744,7 +2744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2836,7 +2836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2983,7 +2983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071CB.json b/data/chips/STM32G071CB.json index f325bbf..aabe020 100644 --- a/data/chips/STM32G071CB.json +++ b/data/chips/STM32G071CB.json @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2527,7 +2527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2744,7 +2744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2836,7 +2836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2983,7 +2983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071EB.json b/data/chips/STM32G071EB.json index e234e38..93c6e24 100644 --- a/data/chips/STM32G071EB.json +++ b/data/chips/STM32G071EB.json @@ -1655,7 +1655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1955,7 +1955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2037,7 +2037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2114,7 +2114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2236,7 +2236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071G6.json b/data/chips/STM32G071G6.json index feb8f32..13ca646 100644 --- a/data/chips/STM32G071G6.json +++ b/data/chips/STM32G071G6.json @@ -1550,7 +1550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1770,7 +1770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1880,7 +1880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1967,7 +1967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2054,7 +2054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071G8.json b/data/chips/STM32G071G8.json index 81d4f0c..aa88843 100644 --- a/data/chips/STM32G071G8.json +++ b/data/chips/STM32G071G8.json @@ -1901,7 +1901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2121,7 +2121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2231,7 +2231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2318,7 +2318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2537,7 +2537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071GB.json b/data/chips/STM32G071GB.json index 4b99ac8..33d275f 100644 --- a/data/chips/STM32G071GB.json +++ b/data/chips/STM32G071GB.json @@ -1901,7 +1901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2121,7 +2121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2231,7 +2231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2318,7 +2318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2537,7 +2537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071K6.json b/data/chips/STM32G071K6.json index c49706b..7132e07 100644 --- a/data/chips/STM32G071K6.json +++ b/data/chips/STM32G071K6.json @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2026,7 +2026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2136,7 +2136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2223,7 +2223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2315,7 +2315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2447,7 +2447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071K8.json b/data/chips/STM32G071K8.json index 82a1305..31b9bca 100644 --- a/data/chips/STM32G071K8.json +++ b/data/chips/STM32G071K8.json @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2605,7 +2605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2715,7 +2715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2802,7 +2802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071KB.json b/data/chips/STM32G071KB.json index 848b15d..bd59a99 100644 --- a/data/chips/STM32G071KB.json +++ b/data/chips/STM32G071KB.json @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2605,7 +2605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2715,7 +2715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2802,7 +2802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071R6.json b/data/chips/STM32G071R6.json index 8d7dc91..75c29d6 100644 --- a/data/chips/STM32G071R6.json +++ b/data/chips/STM32G071R6.json @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2316,7 +2316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2456,7 +2456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2797,7 +2797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071R8.json b/data/chips/STM32G071R8.json index 870fc6a..15a112f 100644 --- a/data/chips/STM32G071R8.json +++ b/data/chips/STM32G071R8.json @@ -2206,7 +2206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2491,7 +2491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2718,7 +2718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2810,7 +2810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2972,7 +2972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071RB.json b/data/chips/STM32G071RB.json index 1c02647..b6bfafb 100644 --- a/data/chips/STM32G071RB.json +++ b/data/chips/STM32G071RB.json @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2885,7 +2885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3025,7 +3025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3112,7 +3112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3366,7 +3366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081CB.json b/data/chips/STM32G081CB.json index 9dabf22..3961627 100644 --- a/data/chips/STM32G081CB.json +++ b/data/chips/STM32G081CB.json @@ -2351,7 +2351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2596,7 +2596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2726,7 +2726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2905,7 +2905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3052,7 +3052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081EB.json b/data/chips/STM32G081EB.json index ffc73fb..31c5e58 100644 --- a/data/chips/STM32G081EB.json +++ b/data/chips/STM32G081EB.json @@ -1724,7 +1724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1924,7 +1924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2024,7 +2024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2106,7 +2106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2305,7 +2305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081GB.json b/data/chips/STM32G081GB.json index e6ee6c9..6bc7ace 100644 --- a/data/chips/STM32G081GB.json +++ b/data/chips/STM32G081GB.json @@ -1970,7 +1970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2190,7 +2190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2300,7 +2300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2387,7 +2387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2606,7 +2606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081KB.json b/data/chips/STM32G081KB.json index eb5f535..0419aba 100644 --- a/data/chips/STM32G081KB.json +++ b/data/chips/STM32G081KB.json @@ -2454,7 +2454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2674,7 +2674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2784,7 +2784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2871,7 +2871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2963,7 +2963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3095,7 +3095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081RB.json b/data/chips/STM32G081RB.json index 588eca5..703ff6c 100644 --- a/data/chips/STM32G081RB.json +++ b/data/chips/STM32G081RB.json @@ -2669,7 +2669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2954,7 +2954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3094,7 +3094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3273,7 +3273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0CE.json b/data/chips/STM32G0B0CE.json index 9669a03..b9864ad 100644 --- a/data/chips/STM32G0B0CE.json +++ b/data/chips/STM32G0B0CE.json @@ -2091,7 +2091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2553,7 +2553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2645,7 +2645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2767,7 +2767,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0KE.json b/data/chips/STM32G0B0KE.json index 92949fc..a12a2e6 100644 --- a/data/chips/STM32G0B0KE.json +++ b/data/chips/STM32G0B0KE.json @@ -1851,7 +1851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2056,7 +2056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2238,7 +2238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2437,7 +2437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0RE.json b/data/chips/STM32G0B0RE.json index 2bc4f75..90a7001 100644 --- a/data/chips/STM32G0B0RE.json +++ b/data/chips/STM32G0B0RE.json @@ -2290,7 +2290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2575,7 +2575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2715,7 +2715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2802,7 +2802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0VE.json b/data/chips/STM32G0B0VE.json index f894056..85dcc73 100644 --- a/data/chips/STM32G0B0VE.json +++ b/data/chips/STM32G0B0VE.json @@ -2560,7 +2560,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3137,7 +3137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3234,7 +3234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3391,7 +3391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CB.json b/data/chips/STM32G0B1CB.json index 688c07d..44622b7 100644 --- a/data/chips/STM32G0B1CB.json +++ b/data/chips/STM32G0B1CB.json @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4068,7 +4068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4155,7 +4155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CC.json b/data/chips/STM32G0B1CC.json index ce2b972..bd2be5a 100644 --- a/data/chips/STM32G0B1CC.json +++ b/data/chips/STM32G0B1CC.json @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4068,7 +4068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4155,7 +4155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CE.json b/data/chips/STM32G0B1CE.json index ec5c002..5f4f03e 100644 --- a/data/chips/STM32G0B1CE.json +++ b/data/chips/STM32G0B1CE.json @@ -3704,7 +3704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4079,7 +4079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4166,7 +4166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4258,7 +4258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4405,7 +4405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4527,7 +4527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KB.json b/data/chips/STM32G0B1KB.json index 832c619..c486387 100644 --- a/data/chips/STM32G0B1KB.json +++ b/data/chips/STM32G0B1KB.json @@ -3159,7 +3159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3379,7 +3379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3576,7 +3576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3800,7 +3800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KC.json b/data/chips/STM32G0B1KC.json index d4aa3e8..9412f6d 100644 --- a/data/chips/STM32G0B1KC.json +++ b/data/chips/STM32G0B1KC.json @@ -3159,7 +3159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3379,7 +3379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3576,7 +3576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3800,7 +3800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KE.json b/data/chips/STM32G0B1KE.json index 2ccf942..e1ee673 100644 --- a/data/chips/STM32G0B1KE.json +++ b/data/chips/STM32G0B1KE.json @@ -3170,7 +3170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3500,7 +3500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3587,7 +3587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3811,7 +3811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3928,7 +3928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1MB.json b/data/chips/STM32G0B1MB.json index bb5b852..87a9e09 100644 --- a/data/chips/STM32G0B1MB.json +++ b/data/chips/STM32G0B1MB.json @@ -3288,7 +3288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3733,7 +3733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3825,7 +3825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3922,7 +3922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4084,7 +4084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4221,7 +4221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1MC.json b/data/chips/STM32G0B1MC.json index 9099b5d..650eaf0 100644 --- a/data/chips/STM32G0B1MC.json +++ b/data/chips/STM32G0B1MC.json @@ -3288,7 +3288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3733,7 +3733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3825,7 +3825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3922,7 +3922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4084,7 +4084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4221,7 +4221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1ME.json b/data/chips/STM32G0B1ME.json index 077b995..334bed3 100644 --- a/data/chips/STM32G0B1ME.json +++ b/data/chips/STM32G0B1ME.json @@ -3299,7 +3299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3604,7 +3604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3744,7 +3744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3836,7 +3836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3933,7 +3933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4232,7 +4232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1NE.json b/data/chips/STM32G0B1NE.json index 23c1ad5..0e75e87 100644 --- a/data/chips/STM32G0B1NE.json +++ b/data/chips/STM32G0B1NE.json @@ -2505,7 +2505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2750,7 +2750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2880,7 +2880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3059,7 +3059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3221,7 +3221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3343,7 +3343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RB.json b/data/chips/STM32G0B1RB.json index 05f397c..21549f3 100644 --- a/data/chips/STM32G0B1RB.json +++ b/data/chips/STM32G0B1RB.json @@ -3912,7 +3912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4197,7 +4197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4678,7 +4678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RC.json b/data/chips/STM32G0B1RC.json index e82289c..71c9590 100644 --- a/data/chips/STM32G0B1RC.json +++ b/data/chips/STM32G0B1RC.json @@ -3912,7 +3912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4197,7 +4197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4678,7 +4678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RE.json b/data/chips/STM32G0B1RE.json index d1c285e..f8fa19d 100644 --- a/data/chips/STM32G0B1RE.json +++ b/data/chips/STM32G0B1RE.json @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4208,7 +4208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4348,7 +4348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4435,7 +4435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4527,7 +4527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4689,7 +4689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VB.json b/data/chips/STM32G0B1VB.json index 2112bb5..5210a1d 100644 --- a/data/chips/STM32G0B1VB.json +++ b/data/chips/STM32G0B1VB.json @@ -4092,7 +4092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4427,7 +4427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4766,7 +4766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4928,7 +4928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5085,7 +5085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VC.json b/data/chips/STM32G0B1VC.json index a8370a9..1341ed1 100644 --- a/data/chips/STM32G0B1VC.json +++ b/data/chips/STM32G0B1VC.json @@ -4092,7 +4092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4427,7 +4427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4766,7 +4766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4928,7 +4928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5085,7 +5085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VE.json b/data/chips/STM32G0B1VE.json index 3b56801..c29e560 100644 --- a/data/chips/STM32G0B1VE.json +++ b/data/chips/STM32G0B1VE.json @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4438,7 +4438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4588,7 +4588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4680,7 +4680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4777,7 +4777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4939,7 +4939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5096,7 +5096,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1CC.json b/data/chips/STM32G0C1CC.json index eaec4b6..4cef8ea 100644 --- a/data/chips/STM32G0C1CC.json +++ b/data/chips/STM32G0C1CC.json @@ -3762,7 +3762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4007,7 +4007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4137,7 +4137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4585,7 +4585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1CE.json b/data/chips/STM32G0C1CE.json index fb87639..5bfa139 100644 --- a/data/chips/STM32G0C1CE.json +++ b/data/chips/STM32G0C1CE.json @@ -3773,7 +3773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4018,7 +4018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4148,7 +4148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4327,7 +4327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4474,7 +4474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1KC.json b/data/chips/STM32G0C1KC.json index 9af6115..63c588e 100644 --- a/data/chips/STM32G0C1KC.json +++ b/data/chips/STM32G0C1KC.json @@ -3228,7 +3228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3448,7 +3448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3558,7 +3558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3645,7 +3645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3737,7 +3737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3869,7 +3869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3986,7 +3986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1KE.json b/data/chips/STM32G0C1KE.json index f983327..6d94c67 100644 --- a/data/chips/STM32G0C1KE.json +++ b/data/chips/STM32G0C1KE.json @@ -3239,7 +3239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3459,7 +3459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3569,7 +3569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3656,7 +3656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3748,7 +3748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3997,7 +3997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1MC.json b/data/chips/STM32G0C1MC.json index 124e01c..ecfaf5e 100644 --- a/data/chips/STM32G0C1MC.json +++ b/data/chips/STM32G0C1MC.json @@ -3357,7 +3357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3894,7 +3894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4153,7 +4153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4290,7 +4290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1ME.json b/data/chips/STM32G0C1ME.json index cd2318b..f997657 100644 --- a/data/chips/STM32G0C1ME.json +++ b/data/chips/STM32G0C1ME.json @@ -3368,7 +3368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3813,7 +3813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3905,7 +3905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4002,7 +4002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4164,7 +4164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4301,7 +4301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1NE.json b/data/chips/STM32G0C1NE.json index bfbb572..9142459 100644 --- a/data/chips/STM32G0C1NE.json +++ b/data/chips/STM32G0C1NE.json @@ -2574,7 +2574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2819,7 +2819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2949,7 +2949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3036,7 +3036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3128,7 +3128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3290,7 +3290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3412,7 +3412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1RC.json b/data/chips/STM32G0C1RC.json index b8ded23..317696a 100644 --- a/data/chips/STM32G0C1RC.json +++ b/data/chips/STM32G0C1RC.json @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4266,7 +4266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4493,7 +4493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4585,7 +4585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4747,7 +4747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4879,7 +4879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1RE.json b/data/chips/STM32G0C1RE.json index b7670f8..e37311f 100644 --- a/data/chips/STM32G0C1RE.json +++ b/data/chips/STM32G0C1RE.json @@ -3992,7 +3992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4417,7 +4417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4504,7 +4504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4758,7 +4758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1VC.json b/data/chips/STM32G0C1VC.json index d2d538f..792498c 100644 --- a/data/chips/STM32G0C1VC.json +++ b/data/chips/STM32G0C1VC.json @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4646,7 +4646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4738,7 +4738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4835,7 +4835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4997,7 +4997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5154,7 +5154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1VE.json b/data/chips/STM32G0C1VE.json index fe36855..5a031a7 100644 --- a/data/chips/STM32G0C1VE.json +++ b/data/chips/STM32G0C1VE.json @@ -4172,7 +4172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4507,7 +4507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4657,7 +4657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4749,7 +4749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4846,7 +4846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5008,7 +5008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5165,7 +5165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G431C6.json b/data/chips/STM32G431C6.json index e790316..9707a00 100644 --- a/data/chips/STM32G431C6.json +++ b/data/chips/STM32G431C6.json @@ -3095,7 +3095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3302,7 +3302,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3583,7 +3583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3725,7 +3725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3852,7 +3852,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4069,7 +4069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431C8.json b/data/chips/STM32G431C8.json index ad610af..c34f040 100644 --- a/data/chips/STM32G431C8.json +++ b/data/chips/STM32G431C8.json @@ -3095,7 +3095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3302,7 +3302,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3583,7 +3583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3725,7 +3725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3852,7 +3852,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4069,7 +4069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431CB.json b/data/chips/STM32G431CB.json index 19864a9..b19c4de 100644 --- a/data/chips/STM32G431CB.json +++ b/data/chips/STM32G431CB.json @@ -3395,7 +3395,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3602,7 +3602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3704,7 +3704,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3796,7 +3796,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3883,7 +3883,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4025,7 +4025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4152,7 +4152,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431K6.json b/data/chips/STM32G431K6.json index 1442b0a..bccf564 100644 --- a/data/chips/STM32G431K6.json +++ b/data/chips/STM32G431K6.json @@ -2629,7 +2629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2786,7 +2786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2873,7 +2873,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3047,7 +3047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3508,7 +3508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431K8.json b/data/chips/STM32G431K8.json index 4c465b7..69eb983 100644 --- a/data/chips/STM32G431K8.json +++ b/data/chips/STM32G431K8.json @@ -2629,7 +2629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2786,7 +2786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2873,7 +2873,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3047,7 +3047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3508,7 +3508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431KB.json b/data/chips/STM32G431KB.json index 686cd53..34b0ff1 100644 --- a/data/chips/STM32G431KB.json +++ b/data/chips/STM32G431KB.json @@ -2629,7 +2629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2786,7 +2786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2873,7 +2873,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3047,7 +3047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3508,7 +3508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431M6.json b/data/chips/STM32G431M6.json index 31cc7d1..a26be25 100644 --- a/data/chips/STM32G431M6.json +++ b/data/chips/STM32G431M6.json @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3471,7 +3471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4046,7 +4046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431M8.json b/data/chips/STM32G431M8.json index e0f6851..ade0591 100644 --- a/data/chips/STM32G431M8.json +++ b/data/chips/STM32G431M8.json @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3471,7 +3471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4046,7 +4046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431MB.json b/data/chips/STM32G431MB.json index 8cbc04e..1fa1e40 100644 --- a/data/chips/STM32G431MB.json +++ b/data/chips/STM32G431MB.json @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3471,7 +3471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4046,7 +4046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431R6.json b/data/chips/STM32G431R6.json index ee2658c..31d60cb 100644 --- a/data/chips/STM32G431R6.json +++ b/data/chips/STM32G431R6.json @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3779,7 +3779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3958,7 +3958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4464,7 +4464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431R8.json b/data/chips/STM32G431R8.json index 0849c94..04becdd 100644 --- a/data/chips/STM32G431R8.json +++ b/data/chips/STM32G431R8.json @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3779,7 +3779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3958,7 +3958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4464,7 +4464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431RB.json b/data/chips/STM32G431RB.json index d3bb2c1..310953e 100644 --- a/data/chips/STM32G431RB.json +++ b/data/chips/STM32G431RB.json @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3779,7 +3779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3958,7 +3958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4464,7 +4464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431V6.json b/data/chips/STM32G431V6.json index 970f9f3..5d3acc9 100644 --- a/data/chips/STM32G431V6.json +++ b/data/chips/STM32G431V6.json @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3994,7 +3994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431V8.json b/data/chips/STM32G431V8.json index a973505..1f6dc6f 100644 --- a/data/chips/STM32G431V8.json +++ b/data/chips/STM32G431V8.json @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3994,7 +3994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431VB.json b/data/chips/STM32G431VB.json index d8b587b..5716258 100644 --- a/data/chips/STM32G431VB.json +++ b/data/chips/STM32G431VB.json @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3994,7 +3994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441CB.json b/data/chips/STM32G441CB.json index 5d90fb4..1a05ad8 100644 --- a/data/chips/STM32G441CB.json +++ b/data/chips/STM32G441CB.json @@ -3428,7 +3428,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3635,7 +3635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3737,7 +3737,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3829,7 +3829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3916,7 +3916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4185,7 +4185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4402,7 +4402,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441KB.json b/data/chips/STM32G441KB.json index 9417c22..9b4815b 100644 --- a/data/chips/STM32G441KB.json +++ b/data/chips/STM32G441KB.json @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2819,7 +2819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2998,7 +2998,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3080,7 +3080,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3212,7 +3212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3329,7 +3329,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3541,7 +3541,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441MB.json b/data/chips/STM32G441MB.json index 25dbe99..34abdeb 100644 --- a/data/chips/STM32G441MB.json +++ b/data/chips/STM32G441MB.json @@ -3212,7 +3212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3504,7 +3504,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3703,7 +3703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3790,7 +3790,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4079,7 +4079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4296,7 +4296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441RB.json b/data/chips/STM32G441RB.json index f80bec4..d71dba3 100644 --- a/data/chips/STM32G441RB.json +++ b/data/chips/STM32G441RB.json @@ -3468,7 +3468,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3812,7 +3812,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3904,7 +3904,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4133,7 +4133,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4280,7 +4280,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4497,7 +4497,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441VB.json b/data/chips/STM32G441VB.json index 0427775..7de616b 100644 --- a/data/chips/STM32G441VB.json +++ b/data/chips/STM32G441VB.json @@ -3429,7 +3429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3721,7 +3721,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3838,7 +3838,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3935,7 +3935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4027,7 +4027,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4194,7 +4194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4361,7 +4361,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471CC.json b/data/chips/STM32G471CC.json index 09f79d6..944edd2 100644 --- a/data/chips/STM32G471CC.json +++ b/data/chips/STM32G471CC.json @@ -3175,7 +3175,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3382,7 +3382,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3484,7 +3484,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3576,7 +3576,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3663,7 +3663,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4019,7 +4019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4236,7 +4236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471CE.json b/data/chips/STM32G471CE.json index f6f168f..1ac742e 100644 --- a/data/chips/STM32G471CE.json +++ b/data/chips/STM32G471CE.json @@ -3175,7 +3175,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3382,7 +3382,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3484,7 +3484,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3576,7 +3576,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3663,7 +3663,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4019,7 +4019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4236,7 +4236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471MC.json b/data/chips/STM32G471MC.json index 3e85667..8ad4486 100644 --- a/data/chips/STM32G471MC.json +++ b/data/chips/STM32G471MC.json @@ -3411,7 +3411,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3703,7 +3703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3989,7 +3989,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4131,7 +4131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4228,7 +4228,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4592,7 +4592,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471ME.json b/data/chips/STM32G471ME.json index f1c00b7..1d0b6aa 100644 --- a/data/chips/STM32G471ME.json +++ b/data/chips/STM32G471ME.json @@ -3903,7 +3903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4195,7 +4195,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4302,7 +4302,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4481,7 +4481,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4623,7 +4623,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4720,7 +4720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4867,7 +4867,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5084,7 +5084,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471QC.json b/data/chips/STM32G471QC.json index db6ae29..23b1f6c 100644 --- a/data/chips/STM32G471QC.json +++ b/data/chips/STM32G471QC.json @@ -4018,7 +4018,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4310,7 +4310,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4432,7 +4432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4621,7 +4621,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5030,7 +5030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5197,7 +5197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5444,7 +5444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471QE.json b/data/chips/STM32G471QE.json index 926f198..fc14190 100644 --- a/data/chips/STM32G471QE.json +++ b/data/chips/STM32G471QE.json @@ -4018,7 +4018,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4310,7 +4310,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4432,7 +4432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4621,7 +4621,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5030,7 +5030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5197,7 +5197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5444,7 +5444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471RC.json b/data/chips/STM32G471RC.json index 3f242ef..90755d3 100644 --- a/data/chips/STM32G471RC.json +++ b/data/chips/STM32G471RC.json @@ -3145,7 +3145,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3382,7 +3382,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3581,7 +3581,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4054,7 +4054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4271,7 +4271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471RE.json b/data/chips/STM32G471RE.json index 3d17dec..27b5fe9 100644 --- a/data/chips/STM32G471RE.json +++ b/data/chips/STM32G471RE.json @@ -3145,7 +3145,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3382,7 +3382,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3581,7 +3581,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4054,7 +4054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4271,7 +4271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471VC.json b/data/chips/STM32G471VC.json index f30969e..62ec3dd 100644 --- a/data/chips/STM32G471VC.json +++ b/data/chips/STM32G471VC.json @@ -4912,7 +4912,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5204,7 +5204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5321,7 +5321,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5418,7 +5418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5510,7 +5510,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5677,7 +5677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5829,7 +5829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6238,7 +6238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471VE.json b/data/chips/STM32G471VE.json index f3b41c9..38f592f 100644 --- a/data/chips/STM32G471VE.json +++ b/data/chips/STM32G471VE.json @@ -4912,7 +4912,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5204,7 +5204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5321,7 +5321,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5418,7 +5418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5510,7 +5510,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5677,7 +5677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5829,7 +5829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6238,7 +6238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CB.json b/data/chips/STM32G473CB.json index 3faa752..45054d1 100644 --- a/data/chips/STM32G473CB.json +++ b/data/chips/STM32G473CB.json @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4201,7 +4201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4380,7 +4380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4609,7 +4609,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4853,7 +4853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CC.json b/data/chips/STM32G473CC.json index aeeb18a..5b129d3 100644 --- a/data/chips/STM32G473CC.json +++ b/data/chips/STM32G473CC.json @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4201,7 +4201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4380,7 +4380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4609,7 +4609,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4853,7 +4853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CE.json b/data/chips/STM32G473CE.json index ef2941d..8565d69 100644 --- a/data/chips/STM32G473CE.json +++ b/data/chips/STM32G473CE.json @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4201,7 +4201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4380,7 +4380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4609,7 +4609,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4853,7 +4853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473MB.json b/data/chips/STM32G473MB.json index 14bde9e..ca79637 100644 --- a/data/chips/STM32G473MB.json +++ b/data/chips/STM32G473MB.json @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4653,7 +4653,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4745,7 +4745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4832,7 +4832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4974,7 +4974,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5071,7 +5071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5218,7 +5218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5335,7 +5335,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5562,7 +5562,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473MC.json b/data/chips/STM32G473MC.json index 862ef91..904caab 100644 --- a/data/chips/STM32G473MC.json +++ b/data/chips/STM32G473MC.json @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4653,7 +4653,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4745,7 +4745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4832,7 +4832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4974,7 +4974,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5071,7 +5071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5218,7 +5218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5335,7 +5335,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5562,7 +5562,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473ME.json b/data/chips/STM32G473ME.json index 453ac41..c4b192d 100644 --- a/data/chips/STM32G473ME.json +++ b/data/chips/STM32G473ME.json @@ -4746,7 +4746,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5038,7 +5038,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5145,7 +5145,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5237,7 +5237,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5324,7 +5324,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5466,7 +5466,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5563,7 +5563,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5710,7 +5710,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5827,7 +5827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6054,7 +6054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PB.json b/data/chips/STM32G473PB.json index 138a0e8..4e49edd 100644 --- a/data/chips/STM32G473PB.json +++ b/data/chips/STM32G473PB.json @@ -5168,7 +5168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5674,7 +5674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5766,7 +5766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6332,7 +6332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6479,7 +6479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PC.json b/data/chips/STM32G473PC.json index 7a7540e..d385616 100644 --- a/data/chips/STM32G473PC.json +++ b/data/chips/STM32G473PC.json @@ -5168,7 +5168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5674,7 +5674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5766,7 +5766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6332,7 +6332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6479,7 +6479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PE.json b/data/chips/STM32G473PE.json index 8cd8b07..6992f55 100644 --- a/data/chips/STM32G473PE.json +++ b/data/chips/STM32G473PE.json @@ -5168,7 +5168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5674,7 +5674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5766,7 +5766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6332,7 +6332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6479,7 +6479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QB.json b/data/chips/STM32G473QB.json index 0e85b3f..201ae9a 100644 --- a/data/chips/STM32G473QB.json +++ b/data/chips/STM32G473QB.json @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5598,7 +5598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6076,7 +6076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6318,7 +6318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6884,7 +6884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QC.json b/data/chips/STM32G473QC.json index b24a97d..953775f 100644 --- a/data/chips/STM32G473QC.json +++ b/data/chips/STM32G473QC.json @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5598,7 +5598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6076,7 +6076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6318,7 +6318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6884,7 +6884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QE.json b/data/chips/STM32G473QE.json index 0f651cd..6422341 100644 --- a/data/chips/STM32G473QE.json +++ b/data/chips/STM32G473QE.json @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5598,7 +5598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6076,7 +6076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6318,7 +6318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6884,7 +6884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RB.json b/data/chips/STM32G473RB.json index 4038b19..af869e3 100644 --- a/data/chips/STM32G473RB.json +++ b/data/chips/STM32G473RB.json @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4545,7 +4545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4789,7 +4789,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4906,7 +4906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RC.json b/data/chips/STM32G473RC.json index 9b03c7b..50fbe22 100644 --- a/data/chips/STM32G473RC.json +++ b/data/chips/STM32G473RC.json @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4545,7 +4545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4789,7 +4789,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4906,7 +4906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RE.json b/data/chips/STM32G473RE.json index ac01a0c..cd83f0e 100644 --- a/data/chips/STM32G473RE.json +++ b/data/chips/STM32G473RE.json @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4545,7 +4545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4789,7 +4789,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4906,7 +4906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VB.json b/data/chips/STM32G473VB.json index 7c5c9b2..de957c7 100644 --- a/data/chips/STM32G473VB.json +++ b/data/chips/STM32G473VB.json @@ -5489,7 +5489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5781,7 +5781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5898,7 +5898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6087,7 +6087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6254,7 +6254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6406,7 +6406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6715,7 +6715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VC.json b/data/chips/STM32G473VC.json index f505016..1d23c42 100644 --- a/data/chips/STM32G473VC.json +++ b/data/chips/STM32G473VC.json @@ -5489,7 +5489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5781,7 +5781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5898,7 +5898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6087,7 +6087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6254,7 +6254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6406,7 +6406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6715,7 +6715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VE.json b/data/chips/STM32G473VE.json index 3fe3a62..80a2409 100644 --- a/data/chips/STM32G473VE.json +++ b/data/chips/STM32G473VE.json @@ -5489,7 +5489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5781,7 +5781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5898,7 +5898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6087,7 +6087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6254,7 +6254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6406,7 +6406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6715,7 +6715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CB.json b/data/chips/STM32G474CB.json index d94b1c4..d65211b 100644 --- a/data/chips/STM32G474CB.json +++ b/data/chips/STM32G474CB.json @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4345,7 +4345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4626,7 +4626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CC.json b/data/chips/STM32G474CC.json index ef23bd9..72a911c 100644 --- a/data/chips/STM32G474CC.json +++ b/data/chips/STM32G474CC.json @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4345,7 +4345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4626,7 +4626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CE.json b/data/chips/STM32G474CE.json index ac51487..d236f11 100644 --- a/data/chips/STM32G474CE.json +++ b/data/chips/STM32G474CE.json @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4345,7 +4345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4626,7 +4626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474MB.json b/data/chips/STM32G474MB.json index 673dec6..4d4f847 100644 --- a/data/chips/STM32G474MB.json +++ b/data/chips/STM32G474MB.json @@ -4530,7 +4530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4822,7 +4822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5021,7 +5021,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5108,7 +5108,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5494,7 +5494,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5611,7 +5611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5838,7 +5838,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474MC.json b/data/chips/STM32G474MC.json index edbf479..5e14238 100644 --- a/data/chips/STM32G474MC.json +++ b/data/chips/STM32G474MC.json @@ -4530,7 +4530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4822,7 +4822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5021,7 +5021,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5108,7 +5108,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5494,7 +5494,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5611,7 +5611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5838,7 +5838,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474ME.json b/data/chips/STM32G474ME.json index 4a7226f..005af31 100644 --- a/data/chips/STM32G474ME.json +++ b/data/chips/STM32G474ME.json @@ -5022,7 +5022,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5421,7 +5421,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5513,7 +5513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5600,7 +5600,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5742,7 +5742,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5839,7 +5839,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6103,7 +6103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6330,7 +6330,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PB.json b/data/chips/STM32G474PB.json index 6bc3fba..31ed9f3 100644 --- a/data/chips/STM32G474PB.json +++ b/data/chips/STM32G474PB.json @@ -5432,7 +5432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5724,7 +5724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5841,7 +5841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6030,7 +6030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6995,7 +6995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PC.json b/data/chips/STM32G474PC.json index cdadc39..62474c8 100644 --- a/data/chips/STM32G474PC.json +++ b/data/chips/STM32G474PC.json @@ -5432,7 +5432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5724,7 +5724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5841,7 +5841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6030,7 +6030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6995,7 +6995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PE.json b/data/chips/STM32G474PE.json index 9b3c7eb..b950a3f 100644 --- a/data/chips/STM32G474PE.json +++ b/data/chips/STM32G474PE.json @@ -5432,7 +5432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5724,7 +5724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5841,7 +5841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6030,7 +6030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6995,7 +6995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QB.json b/data/chips/STM32G474QB.json index aa5726b..14e996a 100644 --- a/data/chips/STM32G474QB.json +++ b/data/chips/STM32G474QB.json @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5874,7 +5874,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6185,7 +6185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6352,7 +6352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6761,7 +6761,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7160,7 +7160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QC.json b/data/chips/STM32G474QC.json index 5ece220..3069be8 100644 --- a/data/chips/STM32G474QC.json +++ b/data/chips/STM32G474QC.json @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5874,7 +5874,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6185,7 +6185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6352,7 +6352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6761,7 +6761,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7160,7 +7160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QE.json b/data/chips/STM32G474QE.json index d61cdd8..52e40b8 100644 --- a/data/chips/STM32G474QE.json +++ b/data/chips/STM32G474QE.json @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5874,7 +5874,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6185,7 +6185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6352,7 +6352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6761,7 +6761,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7160,7 +7160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RB.json b/data/chips/STM32G474RB.json index c20eb08..2d240c8 100644 --- a/data/chips/STM32G474RB.json +++ b/data/chips/STM32G474RB.json @@ -4156,7 +4156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4592,7 +4592,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5065,7 +5065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5182,7 +5182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RC.json b/data/chips/STM32G474RC.json index 3941461..98a6b8f 100644 --- a/data/chips/STM32G474RC.json +++ b/data/chips/STM32G474RC.json @@ -4156,7 +4156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4592,7 +4592,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5065,7 +5065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5182,7 +5182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RE.json b/data/chips/STM32G474RE.json index f1b2cb5..db991e1 100644 --- a/data/chips/STM32G474RE.json +++ b/data/chips/STM32G474RE.json @@ -4156,7 +4156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4592,7 +4592,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5065,7 +5065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5182,7 +5182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VB.json b/data/chips/STM32G474VB.json index 5e1d244..068dd68 100644 --- a/data/chips/STM32G474VB.json +++ b/data/chips/STM32G474VB.json @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6057,7 +6057,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6174,7 +6174,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6682,7 +6682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7223,7 +7223,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VC.json b/data/chips/STM32G474VC.json index 8d731fa..4c2efc8 100644 --- a/data/chips/STM32G474VC.json +++ b/data/chips/STM32G474VC.json @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6057,7 +6057,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6174,7 +6174,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6682,7 +6682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7223,7 +7223,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VE.json b/data/chips/STM32G474VE.json index 2ee9324..d002468 100644 --- a/data/chips/STM32G474VE.json +++ b/data/chips/STM32G474VE.json @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6057,7 +6057,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6174,7 +6174,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6682,7 +6682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7223,7 +7223,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483CE.json b/data/chips/STM32G483CE.json index 82b15b6..1829f8c 100644 --- a/data/chips/STM32G483CE.json +++ b/data/chips/STM32G483CE.json @@ -3931,7 +3931,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4240,7 +4240,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4419,7 +4419,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4561,7 +4561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4648,7 +4648,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4775,7 +4775,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4892,7 +4892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483ME.json b/data/chips/STM32G483ME.json index 54365c0..3966e15 100644 --- a/data/chips/STM32G483ME.json +++ b/data/chips/STM32G483ME.json @@ -4785,7 +4785,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5077,7 +5077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5184,7 +5184,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5276,7 +5276,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5505,7 +5505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5749,7 +5749,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5866,7 +5866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483PE.json b/data/chips/STM32G483PE.json index 4d18ede..21a641f 100644 --- a/data/chips/STM32G483PE.json +++ b/data/chips/STM32G483PE.json @@ -5207,7 +5207,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5499,7 +5499,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5616,7 +5616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5713,7 +5713,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5805,7 +5805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5972,7 +5972,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6204,7 +6204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6371,7 +6371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6518,7 +6518,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6770,7 +6770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483QE.json b/data/chips/STM32G483QE.json index c55c24c..2367c9c 100644 --- a/data/chips/STM32G483QE.json +++ b/data/chips/STM32G483QE.json @@ -5345,7 +5345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5637,7 +5637,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5856,7 +5856,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5948,7 +5948,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6115,7 +6115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6357,7 +6357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6524,7 +6524,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6671,7 +6671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6923,7 +6923,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483RE.json b/data/chips/STM32G483RE.json index e101824..6597f94 100644 --- a/data/chips/STM32G483RE.json +++ b/data/chips/STM32G483RE.json @@ -3919,7 +3919,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4156,7 +4156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4355,7 +4355,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4584,7 +4584,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4681,7 +4681,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4828,7 +4828,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4945,7 +4945,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483VE.json b/data/chips/STM32G483VE.json index a7de701..9d773e3 100644 --- a/data/chips/STM32G483VE.json +++ b/data/chips/STM32G483VE.json @@ -5528,7 +5528,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5820,7 +5820,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5937,7 +5937,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6034,7 +6034,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6126,7 +6126,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6445,7 +6445,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6612,7 +6612,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6754,7 +6754,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6986,7 +6986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484CE.json b/data/chips/STM32G484CE.json index aa3aa00..ab4aea5 100644 --- a/data/chips/STM32G484CE.json +++ b/data/chips/STM32G484CE.json @@ -4171,7 +4171,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4378,7 +4378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4480,7 +4480,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4659,7 +4659,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4801,7 +4801,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4888,7 +4888,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5015,7 +5015,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5132,7 +5132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5339,7 +5339,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484ME.json b/data/chips/STM32G484ME.json index 07314ec..af0d277 100644 --- a/data/chips/STM32G484ME.json +++ b/data/chips/STM32G484ME.json @@ -5055,7 +5055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5454,7 +5454,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5546,7 +5546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5633,7 +5633,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5775,7 +5775,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5872,7 +5872,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6019,7 +6019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6136,7 +6136,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484PE.json b/data/chips/STM32G484PE.json index c858694..d306445 100644 --- a/data/chips/STM32G484PE.json +++ b/data/chips/STM32G484PE.json @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5763,7 +5763,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5880,7 +5880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5977,7 +5977,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6069,7 +6069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6236,7 +6236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6468,7 +6468,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6635,7 +6635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6782,7 +6782,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7034,7 +7034,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484QE.json b/data/chips/STM32G484QE.json index f7e771c..c38ccd1 100644 --- a/data/chips/STM32G484QE.json +++ b/data/chips/STM32G484QE.json @@ -5615,7 +5615,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5907,7 +5907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6029,7 +6029,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6126,7 +6126,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6218,7 +6218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6385,7 +6385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6627,7 +6627,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6794,7 +6794,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6941,7 +6941,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7193,7 +7193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484RE.json b/data/chips/STM32G484RE.json index e5a9397..500e665 100644 --- a/data/chips/STM32G484RE.json +++ b/data/chips/STM32G484RE.json @@ -4189,7 +4189,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4426,7 +4426,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4533,7 +4533,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4625,7 +4625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4712,7 +4712,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4854,7 +4854,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4951,7 +4951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5098,7 +5098,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5215,7 +5215,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5427,7 +5427,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484VE.json b/data/chips/STM32G484VE.json index 06fa015..c01dfb8 100644 --- a/data/chips/STM32G484VE.json +++ b/data/chips/STM32G484VE.json @@ -5798,7 +5798,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6090,7 +6090,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6207,7 +6207,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6304,7 +6304,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6396,7 +6396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6563,7 +6563,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6715,7 +6715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6882,7 +6882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7024,7 +7024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7256,7 +7256,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491CC.json b/data/chips/STM32G491CC.json index 5de9f43..ed8e696 100644 --- a/data/chips/STM32G491CC.json +++ b/data/chips/STM32G491CC.json @@ -3370,7 +3370,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3577,7 +3577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3771,7 +3771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3858,7 +3858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4000,7 +4000,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4092,7 +4092,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4219,7 +4219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4436,7 +4436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491CE.json b/data/chips/STM32G491CE.json index 8bb0545..d8f2860 100644 --- a/data/chips/STM32G491CE.json +++ b/data/chips/STM32G491CE.json @@ -3370,7 +3370,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3577,7 +3577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3771,7 +3771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3858,7 +3858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4000,7 +4000,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4092,7 +4092,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4219,7 +4219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4436,7 +4436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491KC.json b/data/chips/STM32G491KC.json index 9fabcb1..d7d5547 100644 --- a/data/chips/STM32G491KC.json +++ b/data/chips/STM32G491KC.json @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2788,7 +2788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2875,7 +2875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3049,7 +3049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3268,7 +3268,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3385,7 +3385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3597,7 +3597,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491KE.json b/data/chips/STM32G491KE.json index 19e4dcb..fa2b78b 100644 --- a/data/chips/STM32G491KE.json +++ b/data/chips/STM32G491KE.json @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2788,7 +2788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2875,7 +2875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3049,7 +3049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3268,7 +3268,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3385,7 +3385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3597,7 +3597,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491MC.json b/data/chips/STM32G491MC.json index a93fd99..ac99f48 100644 --- a/data/chips/STM32G491MC.json +++ b/data/chips/STM32G491MC.json @@ -4025,7 +4025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4317,7 +4317,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4745,7 +4745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4847,7 +4847,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4994,7 +4994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5211,7 +5211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491ME.json b/data/chips/STM32G491ME.json index 66eacd9..220acd6 100644 --- a/data/chips/STM32G491ME.json +++ b/data/chips/STM32G491ME.json @@ -4025,7 +4025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4317,7 +4317,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4745,7 +4745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4847,7 +4847,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4994,7 +4994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5211,7 +5211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491RC.json b/data/chips/STM32G491RC.json index 4225b18..7e69eb6 100644 --- a/data/chips/STM32G491RC.json +++ b/data/chips/STM32G491RC.json @@ -3725,7 +3725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3962,7 +3962,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4069,7 +4069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4248,7 +4248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4390,7 +4390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4492,7 +4492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4639,7 +4639,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4856,7 +4856,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491RE.json b/data/chips/STM32G491RE.json index a123ea3..04e2c20 100644 --- a/data/chips/STM32G491RE.json +++ b/data/chips/STM32G491RE.json @@ -4115,7 +4115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4352,7 +4352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4551,7 +4551,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4780,7 +4780,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4882,7 +4882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5029,7 +5029,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5246,7 +5246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491VC.json b/data/chips/STM32G491VC.json index 897e005..d6007a3 100644 --- a/data/chips/STM32G491VC.json +++ b/data/chips/STM32G491VC.json @@ -3807,7 +3807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4216,7 +4216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4313,7 +4313,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4405,7 +4405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4729,7 +4729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4896,7 +4896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5138,7 +5138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491VE.json b/data/chips/STM32G491VE.json index 626b048..8656ae4 100644 --- a/data/chips/STM32G491VE.json +++ b/data/chips/STM32G491VE.json @@ -3807,7 +3807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4216,7 +4216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4313,7 +4313,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4405,7 +4405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4729,7 +4729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4896,7 +4896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5138,7 +5138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1CE.json b/data/chips/STM32G4A1CE.json index 77e090e..50029c6 100644 --- a/data/chips/STM32G4A1CE.json +++ b/data/chips/STM32G4A1CE.json @@ -3409,7 +3409,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3616,7 +3616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3718,7 +3718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3897,7 +3897,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4039,7 +4039,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4131,7 +4131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4258,7 +4258,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4475,7 +4475,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1KE.json b/data/chips/STM32G4A1KE.json index 0f256d6..4911b29 100644 --- a/data/chips/STM32G4A1KE.json +++ b/data/chips/STM32G4A1KE.json @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2827,7 +2827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2914,7 +2914,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3006,7 +3006,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3088,7 +3088,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3220,7 +3220,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3424,7 +3424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3636,7 +3636,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1ME.json b/data/chips/STM32G4A1ME.json index 26c891c..c4bae29 100644 --- a/data/chips/STM32G4A1ME.json +++ b/data/chips/STM32G4A1ME.json @@ -4064,7 +4064,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4356,7 +4356,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4784,7 +4784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5033,7 +5033,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1RE.json b/data/chips/STM32G4A1RE.json index 866a3fb..ef6459e 100644 --- a/data/chips/STM32G4A1RE.json +++ b/data/chips/STM32G4A1RE.json @@ -4154,7 +4154,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4391,7 +4391,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4498,7 +4498,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4590,7 +4590,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4677,7 +4677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4819,7 +4819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4921,7 +4921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5068,7 +5068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5285,7 +5285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1VE.json b/data/chips/STM32G4A1VE.json index bd0890a..e5773b0 100644 --- a/data/chips/STM32G4A1VE.json +++ b/data/chips/STM32G4A1VE.json @@ -3846,7 +3846,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4255,7 +4255,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4352,7 +4352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4444,7 +4444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4611,7 +4611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4935,7 +4935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5177,7 +5177,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H503CB.json b/data/chips/STM32H503CB.json index d9cbe02..1d8dcbe 100644 --- a/data/chips/STM32H503CB.json +++ b/data/chips/STM32H503CB.json @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3588,7 +3588,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3755,7 +3755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503EB.json b/data/chips/STM32H503EB.json index 2c4eaaa..b03e2b1 100644 --- a/data/chips/STM32H503EB.json +++ b/data/chips/STM32H503EB.json @@ -2403,7 +2403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2620,7 +2620,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2762,7 +2762,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503KB.json b/data/chips/STM32H503KB.json index 3ada9c1..3a4c2ac 100644 --- a/data/chips/STM32H503KB.json +++ b/data/chips/STM32H503KB.json @@ -2685,7 +2685,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2952,7 +2952,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3109,7 +3109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503RB.json b/data/chips/STM32H503RB.json index 97d87eb..e2cec7b 100644 --- a/data/chips/STM32H503RB.json +++ b/data/chips/STM32H503RB.json @@ -3514,7 +3514,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3851,7 +3851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4043,7 +4043,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H523CC.json b/data/chips/STM32H523CC.json index 6e3587d..8aed7c3 100644 --- a/data/chips/STM32H523CC.json +++ b/data/chips/STM32H523CC.json @@ -3202,7 +3202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3439,7 +3439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3546,7 +3546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3698,7 +3698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3947,7 +3947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4189,7 +4189,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523CE.json b/data/chips/STM32H523CE.json index 83d38be..380b822 100644 --- a/data/chips/STM32H523CE.json +++ b/data/chips/STM32H523CE.json @@ -3202,7 +3202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3439,7 +3439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3546,7 +3546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3698,7 +3698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3947,7 +3947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4189,7 +4189,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523HE.json b/data/chips/STM32H523HE.json index b50de9e..d9729be 100644 --- a/data/chips/STM32H523HE.json +++ b/data/chips/STM32H523HE.json @@ -2615,7 +2615,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2929,7 +2929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3076,7 +3076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3315,7 +3315,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3557,7 +3557,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523RC.json b/data/chips/STM32H523RC.json index 08cc8fb..40c3a6f 100644 --- a/data/chips/STM32H523RC.json +++ b/data/chips/STM32H523RC.json @@ -3697,7 +3697,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3939,7 +3939,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4213,7 +4213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4492,7 +4492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4734,7 +4734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523RE.json b/data/chips/STM32H523RE.json index d5895ea..b0fca49 100644 --- a/data/chips/STM32H523RE.json +++ b/data/chips/STM32H523RE.json @@ -3697,7 +3697,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3939,7 +3939,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4213,7 +4213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4492,7 +4492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4734,7 +4734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523VC.json b/data/chips/STM32H523VC.json index e2a4d91..d0890cb 100644 --- a/data/chips/STM32H523VC.json +++ b/data/chips/STM32H523VC.json @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5616,7 +5616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5753,7 +5753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6072,7 +6072,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6219,7 +6219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523VE.json b/data/chips/STM32H523VE.json index 72a361f..b29fa8b 100644 --- a/data/chips/STM32H523VE.json +++ b/data/chips/STM32H523VE.json @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5616,7 +5616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5753,7 +5753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6072,7 +6072,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6219,7 +6219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523ZC.json b/data/chips/STM32H523ZC.json index 6ae84ce..9dbb32e 100644 --- a/data/chips/STM32H523ZC.json +++ b/data/chips/STM32H523ZC.json @@ -6279,7 +6279,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6591,7 +6591,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6728,7 +6728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6885,7 +6885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7047,7 +7047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7194,7 +7194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7436,7 +7436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523ZE.json b/data/chips/STM32H523ZE.json index 12c4787..2e959a7 100644 --- a/data/chips/STM32H523ZE.json +++ b/data/chips/STM32H523ZE.json @@ -6279,7 +6279,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6591,7 +6591,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6728,7 +6728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6885,7 +6885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7047,7 +7047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7194,7 +7194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7436,7 +7436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533CE.json b/data/chips/STM32H533CE.json index 33a6eb1..2148306 100644 --- a/data/chips/STM32H533CE.json +++ b/data/chips/STM32H533CE.json @@ -3327,7 +3327,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3564,7 +3564,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3671,7 +3671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3823,7 +3823,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3960,7 +3960,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4072,7 +4072,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4314,7 +4314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533HE.json b/data/chips/STM32H533HE.json index 22d1c58..955035e 100644 --- a/data/chips/STM32H533HE.json +++ b/data/chips/STM32H533HE.json @@ -2740,7 +2740,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2947,7 +2947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3054,7 +3054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3201,7 +3201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3333,7 +3333,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3440,7 +3440,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3682,7 +3682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533RE.json b/data/chips/STM32H533RE.json index 938dfca..88d5d2b 100644 --- a/data/chips/STM32H533RE.json +++ b/data/chips/STM32H533RE.json @@ -3822,7 +3822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4064,7 +4064,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4181,7 +4181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4338,7 +4338,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4617,7 +4617,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4859,7 +4859,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533VE.json b/data/chips/STM32H533VE.json index 4ce756c..16713e8 100644 --- a/data/chips/STM32H533VE.json +++ b/data/chips/STM32H533VE.json @@ -5439,7 +5439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5741,7 +5741,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5878,7 +5878,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6035,7 +6035,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6586,7 +6586,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533ZE.json b/data/chips/STM32H533ZE.json index bc8a4dd..da53299 100644 --- a/data/chips/STM32H533ZE.json +++ b/data/chips/STM32H533ZE.json @@ -6404,7 +6404,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6716,7 +6716,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6853,7 +6853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7010,7 +7010,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7172,7 +7172,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7319,7 +7319,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7561,7 +7561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562AG.json b/data/chips/STM32H562AG.json index b502edd..09ee7b4 100644 --- a/data/chips/STM32H562AG.json +++ b/data/chips/STM32H562AG.json @@ -6953,7 +6953,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7410,7 +7410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7547,7 +7547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7649,7 +7649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7751,7 +7751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7913,7 +7913,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8075,7 +8075,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8222,7 +8222,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8489,7 +8489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562AI.json b/data/chips/STM32H562AI.json index b6252ad..9c1eb82 100644 --- a/data/chips/STM32H562AI.json +++ b/data/chips/STM32H562AI.json @@ -6953,7 +6953,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7410,7 +7410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7547,7 +7547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7649,7 +7649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7751,7 +7751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7913,7 +7913,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8075,7 +8075,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8222,7 +8222,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8489,7 +8489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562IG.json b/data/chips/STM32H562IG.json index 4eb40ca..fa50394 100644 --- a/data/chips/STM32H562IG.json +++ b/data/chips/STM32H562IG.json @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8724,7 +8724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8861,7 +8861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9065,7 +9065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9227,7 +9227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9389,7 +9389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9536,7 +9536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9803,7 +9803,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562II.json b/data/chips/STM32H562II.json index 90ed181..4b002b9 100644 --- a/data/chips/STM32H562II.json +++ b/data/chips/STM32H562II.json @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8724,7 +8724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8861,7 +8861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9065,7 +9065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9227,7 +9227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9389,7 +9389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9536,7 +9536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9803,7 +9803,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562RG.json b/data/chips/STM32H562RG.json index 05628b5..730dd3f 100644 --- a/data/chips/STM32H562RG.json +++ b/data/chips/STM32H562RG.json @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5384,7 +5384,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5546,7 +5546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5708,7 +5708,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5840,7 +5840,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6082,7 +6082,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562RI.json b/data/chips/STM32H562RI.json index a9719c7..3faea8c 100644 --- a/data/chips/STM32H562RI.json +++ b/data/chips/STM32H562RI.json @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5384,7 +5384,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5546,7 +5546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5708,7 +5708,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5840,7 +5840,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6082,7 +6082,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562VG.json b/data/chips/STM32H562VG.json index d114dbb..7e76367 100644 --- a/data/chips/STM32H562VG.json +++ b/data/chips/STM32H562VG.json @@ -5357,7 +5357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5896,7 +5896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5983,7 +5983,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6536,7 +6536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562VI.json b/data/chips/STM32H562VI.json index dff483a..7600203 100644 --- a/data/chips/STM32H562VI.json +++ b/data/chips/STM32H562VI.json @@ -5357,7 +5357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5896,7 +5896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5983,7 +5983,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6536,7 +6536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562ZG.json b/data/chips/STM32H562ZG.json index 37eebb5..9843266 100644 --- a/data/chips/STM32H562ZG.json +++ b/data/chips/STM32H562ZG.json @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6766,7 +6766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6903,7 +6903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7005,7 +7005,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7264,7 +7264,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7426,7 +7426,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7573,7 +7573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562ZI.json b/data/chips/STM32H562ZI.json index 6c6a171..c49ddec 100644 --- a/data/chips/STM32H562ZI.json +++ b/data/chips/STM32H562ZI.json @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6766,7 +6766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6903,7 +6903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7005,7 +7005,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7264,7 +7264,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7426,7 +7426,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7573,7 +7573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563AG.json b/data/chips/STM32H563AG.json index dbb33f6..9d48673 100644 --- a/data/chips/STM32H563AG.json +++ b/data/chips/STM32H563AG.json @@ -7363,7 +7363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7820,7 +7820,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7957,7 +7957,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8059,7 +8059,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8161,7 +8161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8323,7 +8323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8485,7 +8485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8632,7 +8632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8899,7 +8899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563AI.json b/data/chips/STM32H563AI.json index c5aad63..373edc2 100644 --- a/data/chips/STM32H563AI.json +++ b/data/chips/STM32H563AI.json @@ -8418,7 +8418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8885,7 +8885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9022,7 +9022,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9124,7 +9124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9226,7 +9226,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9388,7 +9388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9550,7 +9550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9697,7 +9697,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9964,7 +9964,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563IG.json b/data/chips/STM32H563IG.json index dbcb3d0..643c813 100644 --- a/data/chips/STM32H563IG.json +++ b/data/chips/STM32H563IG.json @@ -8672,7 +8672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9139,7 +9139,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9276,7 +9276,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9378,7 +9378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9480,7 +9480,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9642,7 +9642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9804,7 +9804,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9951,7 +9951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10218,7 +10218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563II.json b/data/chips/STM32H563II.json index 326ec72..96ca089 100644 --- a/data/chips/STM32H563II.json +++ b/data/chips/STM32H563II.json @@ -10946,7 +10946,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11413,7 +11413,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11550,7 +11550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11652,7 +11652,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11754,7 +11754,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11916,7 +11916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12078,7 +12078,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12225,7 +12225,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12492,7 +12492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563MI.json b/data/chips/STM32H563MI.json index d1b2dfe..a70a932 100644 --- a/data/chips/STM32H563MI.json +++ b/data/chips/STM32H563MI.json @@ -4715,7 +4715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5077,7 +5077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5194,7 +5194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5281,7 +5281,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5520,7 +5520,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5682,7 +5682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5809,7 +5809,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563RG.json b/data/chips/STM32H563RG.json index 768e332..ca84c69 100644 --- a/data/chips/STM32H563RG.json +++ b/data/chips/STM32H563RG.json @@ -4969,7 +4969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5311,7 +5311,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5428,7 +5428,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5515,7 +5515,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5764,7 +5764,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5926,7 +5926,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6058,7 +6058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563RI.json b/data/chips/STM32H563RI.json index b8c26bf..17eb452 100644 --- a/data/chips/STM32H563RI.json +++ b/data/chips/STM32H563RI.json @@ -4969,7 +4969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5311,7 +5311,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5428,7 +5428,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5515,7 +5515,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5764,7 +5764,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5926,7 +5926,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6058,7 +6058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563VG.json b/data/chips/STM32H563VG.json index 9c4de4c..0b5609b 100644 --- a/data/chips/STM32H563VG.json +++ b/data/chips/STM32H563VG.json @@ -5580,7 +5580,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5982,7 +5982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6119,7 +6119,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6206,7 +6206,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6450,7 +6450,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6612,7 +6612,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6759,7 +6759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7001,7 +7001,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563VI.json b/data/chips/STM32H563VI.json index 96ea2fa..2ba9588 100644 --- a/data/chips/STM32H563VI.json +++ b/data/chips/STM32H563VI.json @@ -6216,7 +6216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6618,7 +6618,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6755,7 +6755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6842,7 +6842,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6929,7 +6929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7091,7 +7091,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7253,7 +7253,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7400,7 +7400,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7642,7 +7642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563ZG.json b/data/chips/STM32H563ZG.json index 9e3cb96..e281ea1 100644 --- a/data/chips/STM32H563ZG.json +++ b/data/chips/STM32H563ZG.json @@ -6729,7 +6729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7151,7 +7151,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7288,7 +7288,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7390,7 +7390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7492,7 +7492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7649,7 +7649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7811,7 +7811,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7958,7 +7958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8200,7 +8200,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563ZI.json b/data/chips/STM32H563ZI.json index 76450c2..d7bdae6 100644 --- a/data/chips/STM32H563ZI.json +++ b/data/chips/STM32H563ZI.json @@ -7654,7 +7654,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8076,7 +8076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8213,7 +8213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8315,7 +8315,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8417,7 +8417,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8579,7 +8579,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8741,7 +8741,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8888,7 +8888,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9130,7 +9130,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573AI.json b/data/chips/STM32H573AI.json index d806720..bad5e26 100644 --- a/data/chips/STM32H573AI.json +++ b/data/chips/STM32H573AI.json @@ -8543,7 +8543,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9010,7 +9010,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9147,7 +9147,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9249,7 +9249,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9351,7 +9351,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9513,7 +9513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9675,7 +9675,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9822,7 +9822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10089,7 +10089,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573II.json b/data/chips/STM32H573II.json index d8c50bb..82c22db 100644 --- a/data/chips/STM32H573II.json +++ b/data/chips/STM32H573II.json @@ -11071,7 +11071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11538,7 +11538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11675,7 +11675,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11777,7 +11777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11879,7 +11879,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12041,7 +12041,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12203,7 +12203,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12350,7 +12350,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12617,7 +12617,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573MI.json b/data/chips/STM32H573MI.json index 37b9a25..409d969 100644 --- a/data/chips/STM32H573MI.json +++ b/data/chips/STM32H573MI.json @@ -4840,7 +4840,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5202,7 +5202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5319,7 +5319,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5406,7 +5406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5488,7 +5488,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5645,7 +5645,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5807,7 +5807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5934,7 +5934,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6176,7 +6176,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573RI.json b/data/chips/STM32H573RI.json index cc917c7..f76d135 100644 --- a/data/chips/STM32H573RI.json +++ b/data/chips/STM32H573RI.json @@ -5094,7 +5094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5436,7 +5436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5553,7 +5553,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5640,7 +5640,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5727,7 +5727,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5889,7 +5889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6183,7 +6183,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6425,7 +6425,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573VI.json b/data/chips/STM32H573VI.json index 4187367..9d49e77 100644 --- a/data/chips/STM32H573VI.json +++ b/data/chips/STM32H573VI.json @@ -6341,7 +6341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6880,7 +6880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6967,7 +6967,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7054,7 +7054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7216,7 +7216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7378,7 +7378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7525,7 +7525,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7767,7 +7767,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573ZI.json b/data/chips/STM32H573ZI.json index a61bca9..b0ec1a7 100644 --- a/data/chips/STM32H573ZI.json +++ b/data/chips/STM32H573ZI.json @@ -7779,7 +7779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8201,7 +8201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8338,7 +8338,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8440,7 +8440,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8542,7 +8542,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8704,7 +8704,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8866,7 +8866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9013,7 +9013,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9255,7 +9255,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723VE.json b/data/chips/STM32H723VE.json index f1a7963..e86da82 100644 --- a/data/chips/STM32H723VE.json +++ b/data/chips/STM32H723VE.json @@ -7051,7 +7051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7448,7 +7448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7565,7 +7565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7637,7 +7637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7709,7 +7709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7841,7 +7841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7923,7 +7923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8005,7 +8005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8137,7 +8137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8249,7 +8249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8451,7 +8451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723VG.json b/data/chips/STM32H723VG.json index 10003af..7961905 100644 --- a/data/chips/STM32H723VG.json +++ b/data/chips/STM32H723VG.json @@ -7051,7 +7051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7448,7 +7448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7565,7 +7565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7637,7 +7637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7709,7 +7709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7841,7 +7841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7923,7 +7923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8005,7 +8005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8137,7 +8137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8249,7 +8249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8451,7 +8451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723ZE.json b/data/chips/STM32H723ZE.json index 595e5ba..b0da2bd 100644 --- a/data/chips/STM32H723ZE.json +++ b/data/chips/STM32H723ZE.json @@ -8474,7 +8474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8901,7 +8901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9018,7 +9018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9105,7 +9105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9192,7 +9192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9324,7 +9324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9466,7 +9466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9573,7 +9573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9705,7 +9705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9817,7 +9817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10019,7 +10019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723ZG.json b/data/chips/STM32H723ZG.json index 42bf3b8..dceb8ca 100644 --- a/data/chips/STM32H723ZG.json +++ b/data/chips/STM32H723ZG.json @@ -8474,7 +8474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8901,7 +8901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9018,7 +9018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9105,7 +9105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9192,7 +9192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9324,7 +9324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9466,7 +9466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9573,7 +9573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9705,7 +9705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9817,7 +9817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10019,7 +10019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725AE.json b/data/chips/STM32H725AE.json index d4d1450..dbd47f7 100644 --- a/data/chips/STM32H725AE.json +++ b/data/chips/STM32H725AE.json @@ -7954,7 +7954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8381,7 +8381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8498,7 +8498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8585,7 +8585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8672,7 +8672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8804,7 +8804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8946,7 +8946,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9053,7 +9053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9185,7 +9185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9297,7 +9297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9514,7 +9514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725AG.json b/data/chips/STM32H725AG.json index b565772..40562f6 100644 --- a/data/chips/STM32H725AG.json +++ b/data/chips/STM32H725AG.json @@ -7960,7 +7960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8387,7 +8387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8504,7 +8504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8591,7 +8591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8678,7 +8678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8810,7 +8810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8952,7 +8952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9059,7 +9059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9191,7 +9191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9303,7 +9303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9520,7 +9520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725IE.json b/data/chips/STM32H725IE.json index 239e135..207759b 100644 --- a/data/chips/STM32H725IE.json +++ b/data/chips/STM32H725IE.json @@ -9440,7 +9440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9922,7 +9922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10039,7 +10039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10126,7 +10126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10213,7 +10213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10345,7 +10345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10487,7 +10487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10594,7 +10594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10726,7 +10726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10838,7 +10838,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11060,7 +11060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725IG.json b/data/chips/STM32H725IG.json index e04e902..e53a0ab 100644 --- a/data/chips/STM32H725IG.json +++ b/data/chips/STM32H725IG.json @@ -9446,7 +9446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9928,7 +9928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10045,7 +10045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10132,7 +10132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10219,7 +10219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10351,7 +10351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10493,7 +10493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10600,7 +10600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10732,7 +10732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10844,7 +10844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11066,7 +11066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725RE.json b/data/chips/STM32H725RE.json index beb0f61..59c83e5 100644 --- a/data/chips/STM32H725RE.json +++ b/data/chips/STM32H725RE.json @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4923,7 +4923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5020,7 +5020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5092,7 +5092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5164,7 +5164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5291,7 +5291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5373,7 +5373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5455,7 +5455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5669,7 +5669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5871,7 +5871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725RG.json b/data/chips/STM32H725RG.json index e071b8e..3197e6c 100644 --- a/data/chips/STM32H725RG.json +++ b/data/chips/STM32H725RG.json @@ -4602,7 +4602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5026,7 +5026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5098,7 +5098,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5170,7 +5170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5461,7 +5461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5588,7 +5588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5675,7 +5675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5877,7 +5877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725VE.json b/data/chips/STM32H725VE.json index a377189..4070ab3 100644 --- a/data/chips/STM32H725VE.json +++ b/data/chips/STM32H725VE.json @@ -6896,7 +6896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7258,7 +7258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7375,7 +7375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7447,7 +7447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7519,7 +7519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7651,7 +7651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7733,7 +7733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7947,7 +7947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8059,7 +8059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8261,7 +8261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725VG.json b/data/chips/STM32H725VG.json index 1d2949f..667fdf4 100644 --- a/data/chips/STM32H725VG.json +++ b/data/chips/STM32H725VG.json @@ -7598,7 +7598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7960,7 +7960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8077,7 +8077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8149,7 +8149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8221,7 +8221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8353,7 +8353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8435,7 +8435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8517,7 +8517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8649,7 +8649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8761,7 +8761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725ZE.json b/data/chips/STM32H725ZE.json index 4670728..5944912 100644 --- a/data/chips/STM32H725ZE.json +++ b/data/chips/STM32H725ZE.json @@ -7341,7 +7341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7748,7 +7748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7865,7 +7865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7952,7 +7952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8039,7 +8039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8171,7 +8171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8288,7 +8288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8380,7 +8380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8512,7 +8512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8624,7 +8624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8826,7 +8826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725ZG.json b/data/chips/STM32H725ZG.json index 0283f7e..a5553ca 100644 --- a/data/chips/STM32H725ZG.json +++ b/data/chips/STM32H725ZG.json @@ -7347,7 +7347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7754,7 +7754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7871,7 +7871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7958,7 +7958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8045,7 +8045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8177,7 +8177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8294,7 +8294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8386,7 +8386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8518,7 +8518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8630,7 +8630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8832,7 +8832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730AB.json b/data/chips/STM32H730AB.json index 34d1538..e91834c 100644 --- a/data/chips/STM32H730AB.json +++ b/data/chips/STM32H730AB.json @@ -8075,7 +8075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8502,7 +8502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8619,7 +8619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8706,7 +8706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8793,7 +8793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8925,7 +8925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9067,7 +9067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9174,7 +9174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9306,7 +9306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9418,7 +9418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9635,7 +9635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730IB.json b/data/chips/STM32H730IB.json index 15dbb79..231a8cf 100644 --- a/data/chips/STM32H730IB.json +++ b/data/chips/STM32H730IB.json @@ -9561,7 +9561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10043,7 +10043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10160,7 +10160,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10247,7 +10247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10334,7 +10334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10466,7 +10466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10608,7 +10608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10715,7 +10715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10847,7 +10847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10959,7 +10959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11181,7 +11181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730VB.json b/data/chips/STM32H730VB.json index 06498bb..9db8dd0 100644 --- a/data/chips/STM32H730VB.json +++ b/data/chips/STM32H730VB.json @@ -7166,7 +7166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7563,7 +7563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7680,7 +7680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7752,7 +7752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7824,7 +7824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7956,7 +7956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8038,7 +8038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8120,7 +8120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8252,7 +8252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8364,7 +8364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8566,7 +8566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730ZB.json b/data/chips/STM32H730ZB.json index 6485f17..b8e9d0a 100644 --- a/data/chips/STM32H730ZB.json +++ b/data/chips/STM32H730ZB.json @@ -8589,7 +8589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9016,7 +9016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9133,7 +9133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9220,7 +9220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9307,7 +9307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9439,7 +9439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9581,7 +9581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9688,7 +9688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9820,7 +9820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9932,7 +9932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10134,7 +10134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H733VG.json b/data/chips/STM32H733VG.json index d0db201..52d2d45 100644 --- a/data/chips/STM32H733VG.json +++ b/data/chips/STM32H733VG.json @@ -7166,7 +7166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7563,7 +7563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7680,7 +7680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7752,7 +7752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7824,7 +7824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7956,7 +7956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8038,7 +8038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8120,7 +8120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8252,7 +8252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8364,7 +8364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8566,7 +8566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H733ZG.json b/data/chips/STM32H733ZG.json index 3d7799e..7af1e69 100644 --- a/data/chips/STM32H733ZG.json +++ b/data/chips/STM32H733ZG.json @@ -8589,7 +8589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9016,7 +9016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9133,7 +9133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9220,7 +9220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9307,7 +9307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9439,7 +9439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9581,7 +9581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9688,7 +9688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9820,7 +9820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9932,7 +9932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10134,7 +10134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735AG.json b/data/chips/STM32H735AG.json index a6a1b73..cd2cd4c 100644 --- a/data/chips/STM32H735AG.json +++ b/data/chips/STM32H735AG.json @@ -8080,7 +8080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8507,7 +8507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8624,7 +8624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8711,7 +8711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8798,7 +8798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8930,7 +8930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9072,7 +9072,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9179,7 +9179,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9311,7 +9311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9423,7 +9423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9640,7 +9640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735IG.json b/data/chips/STM32H735IG.json index 9fbe68d..3d3c5a7 100644 --- a/data/chips/STM32H735IG.json +++ b/data/chips/STM32H735IG.json @@ -9566,7 +9566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10048,7 +10048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10165,7 +10165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10252,7 +10252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10339,7 +10339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10471,7 +10471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10613,7 +10613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10720,7 +10720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10852,7 +10852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10964,7 +10964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11186,7 +11186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735RG.json b/data/chips/STM32H735RG.json index eb94f90..101bcc2 100644 --- a/data/chips/STM32H735RG.json +++ b/data/chips/STM32H735RG.json @@ -4627,7 +4627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4954,7 +4954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5051,7 +5051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5123,7 +5123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5195,7 +5195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5322,7 +5322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5404,7 +5404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5486,7 +5486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5613,7 +5613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5700,7 +5700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5902,7 +5902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735VG.json b/data/chips/STM32H735VG.json index 6ede043..e3e1a80 100644 --- a/data/chips/STM32H735VG.json +++ b/data/chips/STM32H735VG.json @@ -7718,7 +7718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8080,7 +8080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8197,7 +8197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8269,7 +8269,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8341,7 +8341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8473,7 +8473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8555,7 +8555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8637,7 +8637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8769,7 +8769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8881,7 +8881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9083,7 +9083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735ZG.json b/data/chips/STM32H735ZG.json index b9b1bab..c583d7b 100644 --- a/data/chips/STM32H735ZG.json +++ b/data/chips/STM32H735ZG.json @@ -7467,7 +7467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7874,7 +7874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7991,7 +7991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8078,7 +8078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8165,7 +8165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8297,7 +8297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8414,7 +8414,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8506,7 +8506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8638,7 +8638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8750,7 +8750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8952,7 +8952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742AG.json b/data/chips/STM32H742AG.json index f27a73d..137ee84 100644 --- a/data/chips/STM32H742AG.json +++ b/data/chips/STM32H742AG.json @@ -7108,7 +7108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7530,7 +7530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7637,7 +7637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7724,7 +7724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7811,7 +7811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7943,7 +7943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8075,7 +8075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8187,7 +8187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8409,7 +8409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742AI.json b/data/chips/STM32H742AI.json index 758a542..68b0976 100644 --- a/data/chips/STM32H742AI.json +++ b/data/chips/STM32H742AI.json @@ -7108,7 +7108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7530,7 +7530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7637,7 +7637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7724,7 +7724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7811,7 +7811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7943,7 +7943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8075,7 +8075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8187,7 +8187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8409,7 +8409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742BG.json b/data/chips/STM32H742BG.json index fc61e96..e758ef4 100644 --- a/data/chips/STM32H742BG.json +++ b/data/chips/STM32H742BG.json @@ -7535,7 +7535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8012,7 +8012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8119,7 +8119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8206,7 +8206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8293,7 +8293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8425,7 +8425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8557,7 +8557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8669,7 +8669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8896,7 +8896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742BI.json b/data/chips/STM32H742BI.json index 83ed46e..9eee457 100644 --- a/data/chips/STM32H742BI.json +++ b/data/chips/STM32H742BI.json @@ -7535,7 +7535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8012,7 +8012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8119,7 +8119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8206,7 +8206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8293,7 +8293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8425,7 +8425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8557,7 +8557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8669,7 +8669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8896,7 +8896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742IG.json b/data/chips/STM32H742IG.json index 8eb31a4..6ed985c 100644 --- a/data/chips/STM32H742IG.json +++ b/data/chips/STM32H742IG.json @@ -8530,7 +8530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8962,7 +8962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9069,7 +9069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9156,7 +9156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9243,7 +9243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9375,7 +9375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9507,7 +9507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9619,7 +9619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9846,7 +9846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742II.json b/data/chips/STM32H742II.json index f251738..cdd648d 100644 --- a/data/chips/STM32H742II.json +++ b/data/chips/STM32H742II.json @@ -8530,7 +8530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8962,7 +8962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9069,7 +9069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9156,7 +9156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9243,7 +9243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9375,7 +9375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9507,7 +9507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9619,7 +9619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9846,7 +9846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742VG.json b/data/chips/STM32H742VG.json index 430f2f0..e25faee 100644 --- a/data/chips/STM32H742VG.json +++ b/data/chips/STM32H742VG.json @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6801,7 +6801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6980,7 +6980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7052,7 +7052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7184,7 +7184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7316,7 +7316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7428,7 +7428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7630,7 +7630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742VI.json b/data/chips/STM32H742VI.json index 0c1e2be..82743ba 100644 --- a/data/chips/STM32H742VI.json +++ b/data/chips/STM32H742VI.json @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6801,7 +6801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6980,7 +6980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7052,7 +7052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7184,7 +7184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7316,7 +7316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7428,7 +7428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7630,7 +7630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742XG.json b/data/chips/STM32H742XG.json index 2cb70cf..3f374ee 100644 --- a/data/chips/STM32H742XG.json +++ b/data/chips/STM32H742XG.json @@ -7941,7 +7941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8418,7 +8418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8525,7 +8525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8612,7 +8612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8699,7 +8699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8831,7 +8831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9075,7 +9075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9302,7 +9302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742XI.json b/data/chips/STM32H742XI.json index 15cc501..e4c59f1 100644 --- a/data/chips/STM32H742XI.json +++ b/data/chips/STM32H742XI.json @@ -7941,7 +7941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8418,7 +8418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8525,7 +8525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8612,7 +8612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8699,7 +8699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8831,7 +8831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9075,7 +9075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9302,7 +9302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742ZG.json b/data/chips/STM32H742ZG.json index 6c23562..0e728d0 100644 --- a/data/chips/STM32H742ZG.json +++ b/data/chips/STM32H742ZG.json @@ -6701,7 +6701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7123,7 +7123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7230,7 +7230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7317,7 +7317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7404,7 +7404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7536,7 +7536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7668,7 +7668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7780,7 +7780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7982,7 +7982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742ZI.json b/data/chips/STM32H742ZI.json index 227aee8..ef48742 100644 --- a/data/chips/STM32H742ZI.json +++ b/data/chips/STM32H742ZI.json @@ -6701,7 +6701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7123,7 +7123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7230,7 +7230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7317,7 +7317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7404,7 +7404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7536,7 +7536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7668,7 +7668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7780,7 +7780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7982,7 +7982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743AG.json b/data/chips/STM32H743AG.json index 3e95264..8f7a422 100644 --- a/data/chips/STM32H743AG.json +++ b/data/chips/STM32H743AG.json @@ -7537,7 +7537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7959,7 +7959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8066,7 +8066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8153,7 +8153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8240,7 +8240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8372,7 +8372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8504,7 +8504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8616,7 +8616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8838,7 +8838,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743AI.json b/data/chips/STM32H743AI.json index 3f619e5..7285f4c 100644 --- a/data/chips/STM32H743AI.json +++ b/data/chips/STM32H743AI.json @@ -7537,7 +7537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7959,7 +7959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8066,7 +8066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8153,7 +8153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8240,7 +8240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8372,7 +8372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8504,7 +8504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8616,7 +8616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8838,7 +8838,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743BG.json b/data/chips/STM32H743BG.json index 68d1d23..da99405 100644 --- a/data/chips/STM32H743BG.json +++ b/data/chips/STM32H743BG.json @@ -8144,7 +8144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8621,7 +8621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8728,7 +8728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8815,7 +8815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8902,7 +8902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9034,7 +9034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9166,7 +9166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9278,7 +9278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9505,7 +9505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743BI.json b/data/chips/STM32H743BI.json index c9bd94b..103b2a8 100644 --- a/data/chips/STM32H743BI.json +++ b/data/chips/STM32H743BI.json @@ -8144,7 +8144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8621,7 +8621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8728,7 +8728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8815,7 +8815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8902,7 +8902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9034,7 +9034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9166,7 +9166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9278,7 +9278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9505,7 +9505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743IG.json b/data/chips/STM32H743IG.json index 980870a..e0bd1c8 100644 --- a/data/chips/STM32H743IG.json +++ b/data/chips/STM32H743IG.json @@ -8979,7 +8979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9411,7 +9411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9518,7 +9518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9605,7 +9605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9692,7 +9692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9824,7 +9824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9956,7 +9956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10068,7 +10068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10295,7 +10295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743II.json b/data/chips/STM32H743II.json index 331f9d0..c53421f 100644 --- a/data/chips/STM32H743II.json +++ b/data/chips/STM32H743II.json @@ -8979,7 +8979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9411,7 +9411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9518,7 +9518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9605,7 +9605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9692,7 +9692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9824,7 +9824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9956,7 +9956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10068,7 +10068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10295,7 +10295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743VG.json b/data/chips/STM32H743VG.json index 9bdf36b..3bc053a 100644 --- a/data/chips/STM32H743VG.json +++ b/data/chips/STM32H743VG.json @@ -6693,7 +6693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7085,7 +7085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7192,7 +7192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7264,7 +7264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7336,7 +7336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7468,7 +7468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7600,7 +7600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7712,7 +7712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7914,7 +7914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743VI.json b/data/chips/STM32H743VI.json index 55fea77..f96d2e3 100644 --- a/data/chips/STM32H743VI.json +++ b/data/chips/STM32H743VI.json @@ -6693,7 +6693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7085,7 +7085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7192,7 +7192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7264,7 +7264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7336,7 +7336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7468,7 +7468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7600,7 +7600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7712,7 +7712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7914,7 +7914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743XG.json b/data/chips/STM32H743XG.json index 5b1a354..9254533 100644 --- a/data/chips/STM32H743XG.json +++ b/data/chips/STM32H743XG.json @@ -8550,7 +8550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9027,7 +9027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9134,7 +9134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9221,7 +9221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9308,7 +9308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9440,7 +9440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9572,7 +9572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9684,7 +9684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9911,7 +9911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743XI.json b/data/chips/STM32H743XI.json index 5880f12..b159670 100644 --- a/data/chips/STM32H743XI.json +++ b/data/chips/STM32H743XI.json @@ -8550,7 +8550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9027,7 +9027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9134,7 +9134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9221,7 +9221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9308,7 +9308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9440,7 +9440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9572,7 +9572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9684,7 +9684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9911,7 +9911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743ZG.json b/data/chips/STM32H743ZG.json index 3227b0c..12dc21c 100644 --- a/data/chips/STM32H743ZG.json +++ b/data/chips/STM32H743ZG.json @@ -7040,7 +7040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7462,7 +7462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7569,7 +7569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7656,7 +7656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7743,7 +7743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7875,7 +7875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8007,7 +8007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8119,7 +8119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8321,7 +8321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743ZI.json b/data/chips/STM32H743ZI.json index ab01820..45d2185 100644 --- a/data/chips/STM32H743ZI.json +++ b/data/chips/STM32H743ZI.json @@ -7040,7 +7040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7462,7 +7462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7569,7 +7569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7656,7 +7656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7743,7 +7743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7875,7 +7875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8007,7 +8007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8119,7 +8119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8321,7 +8321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745BG.json b/data/chips/STM32H745BG.json index ad2be16..368add0 100644 --- a/data/chips/STM32H745BG.json +++ b/data/chips/STM32H745BG.json @@ -8025,7 +8025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8502,7 +8502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8609,7 +8609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8696,7 +8696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8783,7 +8783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8915,7 +8915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9047,7 +9047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9159,7 +9159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9386,7 +9386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18029,7 +18029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18506,7 +18506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18613,7 +18613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18700,7 +18700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18787,7 +18787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18919,7 +18919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19051,7 +19051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19163,7 +19163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19390,7 +19390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745BI.json b/data/chips/STM32H745BI.json index b019a90..06041d6 100644 --- a/data/chips/STM32H745BI.json +++ b/data/chips/STM32H745BI.json @@ -8025,7 +8025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8502,7 +8502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8609,7 +8609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8696,7 +8696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8783,7 +8783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8915,7 +8915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9047,7 +9047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9159,7 +9159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9386,7 +9386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18029,7 +18029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18506,7 +18506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18613,7 +18613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18700,7 +18700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18787,7 +18787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18919,7 +18919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19051,7 +19051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19163,7 +19163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19390,7 +19390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745IG.json b/data/chips/STM32H745IG.json index e78be96..a496a40 100644 --- a/data/chips/STM32H745IG.json +++ b/data/chips/STM32H745IG.json @@ -8867,7 +8867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9344,7 +9344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9451,7 +9451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9538,7 +9538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9625,7 +9625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9757,7 +9757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9889,7 +9889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10001,7 +10001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10223,7 +10223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18613,7 +18613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19090,7 +19090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19197,7 +19197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19284,7 +19284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19371,7 +19371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19503,7 +19503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19635,7 +19635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19747,7 +19747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19969,7 +19969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745II.json b/data/chips/STM32H745II.json index 4aaf3c5..c1db513 100644 --- a/data/chips/STM32H745II.json +++ b/data/chips/STM32H745II.json @@ -8867,7 +8867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9344,7 +9344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9451,7 +9451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9538,7 +9538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9625,7 +9625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9757,7 +9757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9889,7 +9889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10001,7 +10001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10223,7 +10223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18613,7 +18613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19090,7 +19090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19197,7 +19197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19284,7 +19284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19371,7 +19371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19503,7 +19503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19635,7 +19635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19747,7 +19747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19969,7 +19969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745XG.json b/data/chips/STM32H745XG.json index f943fcb..641cf70 100644 --- a/data/chips/STM32H745XG.json +++ b/data/chips/STM32H745XG.json @@ -8541,7 +8541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9018,7 +9018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9125,7 +9125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9212,7 +9212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9299,7 +9299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9431,7 +9431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9563,7 +9563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9675,7 +9675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9902,7 +9902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18719,7 +18719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19196,7 +19196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19303,7 +19303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19390,7 +19390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19477,7 +19477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19609,7 +19609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19741,7 +19741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19853,7 +19853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20080,7 +20080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745XI.json b/data/chips/STM32H745XI.json index 5279c3d..3ee3fae 100644 --- a/data/chips/STM32H745XI.json +++ b/data/chips/STM32H745XI.json @@ -8541,7 +8541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9018,7 +9018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9125,7 +9125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9212,7 +9212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9299,7 +9299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9431,7 +9431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9563,7 +9563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9675,7 +9675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9902,7 +9902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18719,7 +18719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19196,7 +19196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19303,7 +19303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19390,7 +19390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19477,7 +19477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19609,7 +19609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19741,7 +19741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19853,7 +19853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20080,7 +20080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745ZG.json b/data/chips/STM32H745ZG.json index d13af01..465291c 100644 --- a/data/chips/STM32H745ZG.json +++ b/data/chips/STM32H745ZG.json @@ -6876,7 +6876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7278,7 +7278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7385,7 +7385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7472,7 +7472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7559,7 +7559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7691,7 +7691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7823,7 +7823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7935,7 +7935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8137,7 +8137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15815,7 +15815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16217,7 +16217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16324,7 +16324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16411,7 +16411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16498,7 +16498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16630,7 +16630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16762,7 +16762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16874,7 +16874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17076,7 +17076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745ZI.json b/data/chips/STM32H745ZI.json index 9e8f9d7..6923e09 100644 --- a/data/chips/STM32H745ZI.json +++ b/data/chips/STM32H745ZI.json @@ -6876,7 +6876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7278,7 +7278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7385,7 +7385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7472,7 +7472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7559,7 +7559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7691,7 +7691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7823,7 +7823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7935,7 +7935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8137,7 +8137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15815,7 +15815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16217,7 +16217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16324,7 +16324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16411,7 +16411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16498,7 +16498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16630,7 +16630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16762,7 +16762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16874,7 +16874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17076,7 +17076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747AG.json b/data/chips/STM32H747AG.json index 0700de1..18a07e1 100644 --- a/data/chips/STM32H747AG.json +++ b/data/chips/STM32H747AG.json @@ -7229,7 +7229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7651,7 +7651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7758,7 +7758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7845,7 +7845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7932,7 +7932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8064,7 +8064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8196,7 +8196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8308,7 +8308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8510,7 +8510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16429,7 +16429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16851,7 +16851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16958,7 +16958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17045,7 +17045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17132,7 +17132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17264,7 +17264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17396,7 +17396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17508,7 +17508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17710,7 +17710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747AI.json b/data/chips/STM32H747AI.json index 069936d..80c8533 100644 --- a/data/chips/STM32H747AI.json +++ b/data/chips/STM32H747AI.json @@ -7229,7 +7229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7651,7 +7651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7758,7 +7758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7845,7 +7845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7932,7 +7932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8064,7 +8064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8196,7 +8196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8308,7 +8308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8510,7 +8510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16429,7 +16429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16851,7 +16851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16958,7 +16958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17045,7 +17045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17132,7 +17132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17264,7 +17264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17396,7 +17396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17508,7 +17508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17710,7 +17710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747BG.json b/data/chips/STM32H747BG.json index 856aa5c..9e556be 100644 --- a/data/chips/STM32H747BG.json +++ b/data/chips/STM32H747BG.json @@ -8008,7 +8008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8440,7 +8440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8547,7 +8547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8634,7 +8634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8721,7 +8721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8853,7 +8853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8985,7 +8985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9097,7 +9097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9324,7 +9324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17883,7 +17883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18315,7 +18315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18422,7 +18422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18509,7 +18509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18596,7 +18596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18728,7 +18728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18860,7 +18860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18972,7 +18972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19199,7 +19199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747BI.json b/data/chips/STM32H747BI.json index 0681886..11dd14c 100644 --- a/data/chips/STM32H747BI.json +++ b/data/chips/STM32H747BI.json @@ -8008,7 +8008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8440,7 +8440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8547,7 +8547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8634,7 +8634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8721,7 +8721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8853,7 +8853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8985,7 +8985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9097,7 +9097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9324,7 +9324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17883,7 +17883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18315,7 +18315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18422,7 +18422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18509,7 +18509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18596,7 +18596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18728,7 +18728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18860,7 +18860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18972,7 +18972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19199,7 +19199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747IG.json b/data/chips/STM32H747IG.json index 94871f4..84b17ca 100644 --- a/data/chips/STM32H747IG.json +++ b/data/chips/STM32H747IG.json @@ -7271,7 +7271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7693,7 +7693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7800,7 +7800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7887,7 +7887,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7974,7 +7974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8106,7 +8106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8238,7 +8238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8350,7 +8350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8552,7 +8552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16471,7 +16471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16893,7 +16893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17000,7 +17000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17087,7 +17087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17174,7 +17174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17306,7 +17306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17438,7 +17438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17550,7 +17550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17752,7 +17752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747II.json b/data/chips/STM32H747II.json index cdf1d27..4f30d57 100644 --- a/data/chips/STM32H747II.json +++ b/data/chips/STM32H747II.json @@ -7271,7 +7271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7693,7 +7693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7800,7 +7800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7887,7 +7887,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7974,7 +7974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8106,7 +8106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8238,7 +8238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8350,7 +8350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8552,7 +8552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16471,7 +16471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16893,7 +16893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17000,7 +17000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17087,7 +17087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17174,7 +17174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17306,7 +17306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17438,7 +17438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17550,7 +17550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17752,7 +17752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747XG.json b/data/chips/STM32H747XG.json index 8f21c31..a17bf8b 100644 --- a/data/chips/STM32H747XG.json +++ b/data/chips/STM32H747XG.json @@ -8594,7 +8594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9071,7 +9071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9178,7 +9178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9265,7 +9265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9352,7 +9352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9484,7 +9484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9616,7 +9616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9728,7 +9728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9955,7 +9955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18823,7 +18823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19300,7 +19300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19407,7 +19407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19494,7 +19494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19581,7 +19581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19713,7 +19713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19845,7 +19845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19957,7 +19957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20184,7 +20184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747XI.json b/data/chips/STM32H747XI.json index 77296c3..18438a6 100644 --- a/data/chips/STM32H747XI.json +++ b/data/chips/STM32H747XI.json @@ -8594,7 +8594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9071,7 +9071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9178,7 +9178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9265,7 +9265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9352,7 +9352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9484,7 +9484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9616,7 +9616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9728,7 +9728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9955,7 +9955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18823,7 +18823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19300,7 +19300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19407,7 +19407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19494,7 +19494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19581,7 +19581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19713,7 +19713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19845,7 +19845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19957,7 +19957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20184,7 +20184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747ZI.json b/data/chips/STM32H747ZI.json index a767654..e26d83b 100644 --- a/data/chips/STM32H747ZI.json +++ b/data/chips/STM32H747ZI.json @@ -6690,7 +6690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7102,7 +7102,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7209,7 +7209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7281,7 +7281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7485,7 +7485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7617,7 +7617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7729,7 +7729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7931,7 +7931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15329,7 +15329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15741,7 +15741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15848,7 +15848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15920,7 +15920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15992,7 +15992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16124,7 +16124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16256,7 +16256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16368,7 +16368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16570,7 +16570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750IB.json b/data/chips/STM32H750IB.json index 2504458..7e808a1 100644 --- a/data/chips/STM32H750IB.json +++ b/data/chips/STM32H750IB.json @@ -9024,7 +9024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9456,7 +9456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9563,7 +9563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9650,7 +9650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9737,7 +9737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9869,7 +9869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10001,7 +10001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10113,7 +10113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10340,7 +10340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750VB.json b/data/chips/STM32H750VB.json index 9565a47..7345ec0 100644 --- a/data/chips/STM32H750VB.json +++ b/data/chips/STM32H750VB.json @@ -6132,7 +6132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6524,7 +6524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6631,7 +6631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6703,7 +6703,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6775,7 +6775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6907,7 +6907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7039,7 +7039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7151,7 +7151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750XB.json b/data/chips/STM32H750XB.json index b3ca884..a305e72 100644 --- a/data/chips/STM32H750XB.json +++ b/data/chips/STM32H750XB.json @@ -8595,7 +8595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9072,7 +9072,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9179,7 +9179,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9266,7 +9266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9353,7 +9353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9485,7 +9485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9617,7 +9617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9729,7 +9729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9956,7 +9956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750ZB.json b/data/chips/STM32H750ZB.json index e7428bc..812c0f3 100644 --- a/data/chips/STM32H750ZB.json +++ b/data/chips/STM32H750ZB.json @@ -7073,7 +7073,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7495,7 +7495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7602,7 +7602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7689,7 +7689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7776,7 +7776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7908,7 +7908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8040,7 +8040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8152,7 +8152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8354,7 +8354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753AI.json b/data/chips/STM32H753AI.json index cca4a9e..7096394 100644 --- a/data/chips/STM32H753AI.json +++ b/data/chips/STM32H753AI.json @@ -7616,7 +7616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8038,7 +8038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8145,7 +8145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8232,7 +8232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8319,7 +8319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8451,7 +8451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8583,7 +8583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8695,7 +8695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8917,7 +8917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753BI.json b/data/chips/STM32H753BI.json index fd6ab76..e74b51d 100644 --- a/data/chips/STM32H753BI.json +++ b/data/chips/STM32H753BI.json @@ -8223,7 +8223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8700,7 +8700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8807,7 +8807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8894,7 +8894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8981,7 +8981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9113,7 +9113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9245,7 +9245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9357,7 +9357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9584,7 +9584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753II.json b/data/chips/STM32H753II.json index 11880c2..f6d4b5f 100644 --- a/data/chips/STM32H753II.json +++ b/data/chips/STM32H753II.json @@ -9058,7 +9058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9490,7 +9490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9597,7 +9597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9684,7 +9684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9771,7 +9771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9903,7 +9903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10035,7 +10035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10147,7 +10147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10374,7 +10374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753VI.json b/data/chips/STM32H753VI.json index c58988c..7a62abe 100644 --- a/data/chips/STM32H753VI.json +++ b/data/chips/STM32H753VI.json @@ -6772,7 +6772,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7164,7 +7164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7271,7 +7271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7343,7 +7343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7415,7 +7415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7547,7 +7547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7679,7 +7679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7993,7 +7993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753XI.json b/data/chips/STM32H753XI.json index d96ac80..8a256f4 100644 --- a/data/chips/STM32H753XI.json +++ b/data/chips/STM32H753XI.json @@ -8629,7 +8629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9106,7 +9106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9213,7 +9213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9300,7 +9300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9387,7 +9387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9519,7 +9519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9651,7 +9651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9763,7 +9763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9990,7 +9990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753ZI.json b/data/chips/STM32H753ZI.json index dbdb8ac..58f4b9c 100644 --- a/data/chips/STM32H753ZI.json +++ b/data/chips/STM32H753ZI.json @@ -7119,7 +7119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7541,7 +7541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7648,7 +7648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7735,7 +7735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7822,7 +7822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7954,7 +7954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8086,7 +8086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8198,7 +8198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8400,7 +8400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755BI.json b/data/chips/STM32H755BI.json index fa8a25e..5662e80 100644 --- a/data/chips/STM32H755BI.json +++ b/data/chips/STM32H755BI.json @@ -8104,7 +8104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8581,7 +8581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8688,7 +8688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8775,7 +8775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8862,7 +8862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8994,7 +8994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9126,7 +9126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9238,7 +9238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9465,7 +9465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18185,7 +18185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18662,7 +18662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18769,7 +18769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18856,7 +18856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18943,7 +18943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19075,7 +19075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19207,7 +19207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19319,7 +19319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19546,7 +19546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755II.json b/data/chips/STM32H755II.json index dc172ac..ca976b7 100644 --- a/data/chips/STM32H755II.json +++ b/data/chips/STM32H755II.json @@ -8946,7 +8946,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9423,7 +9423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9530,7 +9530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9617,7 +9617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9704,7 +9704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9836,7 +9836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9968,7 +9968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10080,7 +10080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10302,7 +10302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18769,7 +18769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19246,7 +19246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19353,7 +19353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19440,7 +19440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19527,7 +19527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19659,7 +19659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19791,7 +19791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19903,7 +19903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20125,7 +20125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755XI.json b/data/chips/STM32H755XI.json index 76cba0d..8b44bbf 100644 --- a/data/chips/STM32H755XI.json +++ b/data/chips/STM32H755XI.json @@ -8620,7 +8620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9097,7 +9097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9204,7 +9204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9291,7 +9291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9378,7 +9378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9510,7 +9510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9642,7 +9642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9754,7 +9754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9981,7 +9981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18875,7 +18875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19352,7 +19352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19459,7 +19459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19546,7 +19546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19633,7 +19633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19765,7 +19765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19897,7 +19897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20009,7 +20009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20236,7 +20236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755ZI.json b/data/chips/STM32H755ZI.json index ab57d75..f6aca3f 100644 --- a/data/chips/STM32H755ZI.json +++ b/data/chips/STM32H755ZI.json @@ -6955,7 +6955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7357,7 +7357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7464,7 +7464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7551,7 +7551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7638,7 +7638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7770,7 +7770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7902,7 +7902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8014,7 +8014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8216,7 +8216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15971,7 +15971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16373,7 +16373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16480,7 +16480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16567,7 +16567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16654,7 +16654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16786,7 +16786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16918,7 +16918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17030,7 +17030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17232,7 +17232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757AI.json b/data/chips/STM32H757AI.json index 3f95035..8a6885b 100644 --- a/data/chips/STM32H757AI.json +++ b/data/chips/STM32H757AI.json @@ -7308,7 +7308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7730,7 +7730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7837,7 +7837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7924,7 +7924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8011,7 +8011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8143,7 +8143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8275,7 +8275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8387,7 +8387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8589,7 +8589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16585,7 +16585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17007,7 +17007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17114,7 +17114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17201,7 +17201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17288,7 +17288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17420,7 +17420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17552,7 +17552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17664,7 +17664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17866,7 +17866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757BI.json b/data/chips/STM32H757BI.json index 78c46a3..adfcf2f 100644 --- a/data/chips/STM32H757BI.json +++ b/data/chips/STM32H757BI.json @@ -8087,7 +8087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8519,7 +8519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8626,7 +8626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8713,7 +8713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8800,7 +8800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8932,7 +8932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9064,7 +9064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9176,7 +9176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9403,7 +9403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18039,7 +18039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18471,7 +18471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18578,7 +18578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18665,7 +18665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18752,7 +18752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18884,7 +18884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19016,7 +19016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19128,7 +19128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19355,7 +19355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757II.json b/data/chips/STM32H757II.json index cf60e40..1ace116 100644 --- a/data/chips/STM32H757II.json +++ b/data/chips/STM32H757II.json @@ -7350,7 +7350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7772,7 +7772,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7879,7 +7879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7966,7 +7966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8053,7 +8053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8185,7 +8185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8317,7 +8317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8429,7 +8429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8631,7 +8631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16627,7 +16627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17049,7 +17049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17156,7 +17156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17243,7 +17243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17330,7 +17330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17462,7 +17462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17594,7 +17594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17706,7 +17706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17908,7 +17908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757XI.json b/data/chips/STM32H757XI.json index da3955c..a8c3c45 100644 --- a/data/chips/STM32H757XI.json +++ b/data/chips/STM32H757XI.json @@ -8673,7 +8673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9150,7 +9150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9257,7 +9257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9344,7 +9344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9431,7 +9431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9563,7 +9563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9695,7 +9695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9807,7 +9807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10034,7 +10034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18979,7 +18979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19456,7 +19456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19563,7 +19563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19650,7 +19650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19737,7 +19737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19869,7 +19869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20001,7 +20001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -20113,7 +20113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20340,7 +20340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757ZI.json b/data/chips/STM32H757ZI.json index 39391bf..020e808 100644 --- a/data/chips/STM32H757ZI.json +++ b/data/chips/STM32H757ZI.json @@ -6769,7 +6769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7181,7 +7181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7288,7 +7288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7360,7 +7360,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7432,7 +7432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7564,7 +7564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7696,7 +7696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7808,7 +7808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8010,7 +8010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15485,7 +15485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15897,7 +15897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16004,7 +16004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16076,7 +16076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16148,7 +16148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16280,7 +16280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16412,7 +16412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16524,7 +16524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16726,7 +16726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3AG.json b/data/chips/STM32H7A3AG.json index 9bea4c9..8f0244b 100644 --- a/data/chips/STM32H7A3AG.json +++ b/data/chips/STM32H7A3AG.json @@ -7403,7 +7403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7825,7 +7825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7942,7 +7942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8029,7 +8029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8116,7 +8116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8248,7 +8248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8380,7 +8380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8492,7 +8492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8709,7 +8709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3AI.json b/data/chips/STM32H7A3AI.json index b292366..fa133d2 100644 --- a/data/chips/STM32H7A3AI.json +++ b/data/chips/STM32H7A3AI.json @@ -7403,7 +7403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7825,7 +7825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7942,7 +7942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8029,7 +8029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8116,7 +8116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8248,7 +8248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8380,7 +8380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8492,7 +8492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8709,7 +8709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3IG.json b/data/chips/STM32H7A3IG.json index 4f3a1f1..726abff 100644 --- a/data/chips/STM32H7A3IG.json +++ b/data/chips/STM32H7A3IG.json @@ -11427,7 +11427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11904,7 +11904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12021,7 +12021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12108,7 +12108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12195,7 +12195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12327,7 +12327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12459,7 +12459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12571,7 +12571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12798,7 +12798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3II.json b/data/chips/STM32H7A3II.json index 2d46125..d58b750 100644 --- a/data/chips/STM32H7A3II.json +++ b/data/chips/STM32H7A3II.json @@ -11427,7 +11427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11904,7 +11904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12021,7 +12021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12108,7 +12108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12195,7 +12195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12327,7 +12327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12459,7 +12459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12571,7 +12571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12798,7 +12798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3LG.json b/data/chips/STM32H7A3LG.json index 17ed009..f3f5926 100644 --- a/data/chips/STM32H7A3LG.json +++ b/data/chips/STM32H7A3LG.json @@ -8399,7 +8399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8876,7 +8876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8993,7 +8993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9080,7 +9080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9167,7 +9167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9299,7 +9299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9431,7 +9431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9543,7 +9543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9770,7 +9770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3LI.json b/data/chips/STM32H7A3LI.json index a840657..d54fdfa 100644 --- a/data/chips/STM32H7A3LI.json +++ b/data/chips/STM32H7A3LI.json @@ -8405,7 +8405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8882,7 +8882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8999,7 +8999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9086,7 +9086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9173,7 +9173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9305,7 +9305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9437,7 +9437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9549,7 +9549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9776,7 +9776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3NG.json b/data/chips/STM32H7A3NG.json index c2d85c0..aaf30b7 100644 --- a/data/chips/STM32H7A3NG.json +++ b/data/chips/STM32H7A3NG.json @@ -8307,7 +8307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8784,7 +8784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8901,7 +8901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8988,7 +8988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9075,7 +9075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9207,7 +9207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9339,7 +9339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9451,7 +9451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9678,7 +9678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3NI.json b/data/chips/STM32H7A3NI.json index 1e77d15..84949d5 100644 --- a/data/chips/STM32H7A3NI.json +++ b/data/chips/STM32H7A3NI.json @@ -8307,7 +8307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8784,7 +8784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8901,7 +8901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8988,7 +8988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9075,7 +9075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9207,7 +9207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9339,7 +9339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9451,7 +9451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9678,7 +9678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3QI.json b/data/chips/STM32H7A3QI.json index 062d931..c5f2ebd 100644 --- a/data/chips/STM32H7A3QI.json +++ b/data/chips/STM32H7A3QI.json @@ -6494,7 +6494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6886,7 +6886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7003,7 +7003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7075,7 +7075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7147,7 +7147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7279,7 +7279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7406,7 +7406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7518,7 +7518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7720,7 +7720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3RG.json b/data/chips/STM32H7A3RG.json index 32b2aa4..0d6c505 100644 --- a/data/chips/STM32H7A3RG.json +++ b/data/chips/STM32H7A3RG.json @@ -4646,7 +4646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4958,7 +4958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5055,7 +5055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5127,7 +5127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5199,7 +5199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5326,7 +5326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5453,7 +5453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5540,7 +5540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5742,7 +5742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3RI.json b/data/chips/STM32H7A3RI.json index 72f4da6..250f621 100644 --- a/data/chips/STM32H7A3RI.json +++ b/data/chips/STM32H7A3RI.json @@ -4646,7 +4646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4958,7 +4958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5055,7 +5055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5127,7 +5127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5199,7 +5199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5326,7 +5326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5453,7 +5453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5540,7 +5540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5742,7 +5742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3VG.json b/data/chips/STM32H7A3VG.json index 954e54c..3d2d143 100644 --- a/data/chips/STM32H7A3VG.json +++ b/data/chips/STM32H7A3VG.json @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8277,7 +8277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8394,7 +8394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8466,7 +8466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8538,7 +8538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8670,7 +8670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8802,7 +8802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8914,7 +8914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9116,7 +9116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3VI.json b/data/chips/STM32H7A3VI.json index b5526e7..011457b 100644 --- a/data/chips/STM32H7A3VI.json +++ b/data/chips/STM32H7A3VI.json @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8277,7 +8277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8394,7 +8394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8466,7 +8466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8538,7 +8538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8670,7 +8670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8802,7 +8802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8914,7 +8914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9116,7 +9116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3ZG.json b/data/chips/STM32H7A3ZG.json index 272c025..93c8be0 100644 --- a/data/chips/STM32H7A3ZG.json +++ b/data/chips/STM32H7A3ZG.json @@ -7919,7 +7919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8341,7 +8341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8458,7 +8458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8545,7 +8545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8632,7 +8632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8764,7 +8764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8896,7 +8896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9008,7 +9008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9210,7 +9210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3ZI.json b/data/chips/STM32H7A3ZI.json index 9c346fb..f71453f 100644 --- a/data/chips/STM32H7A3ZI.json +++ b/data/chips/STM32H7A3ZI.json @@ -7919,7 +7919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8341,7 +8341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8458,7 +8458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8545,7 +8545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8632,7 +8632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8764,7 +8764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8896,7 +8896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9008,7 +9008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9210,7 +9210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0AB.json b/data/chips/STM32H7B0AB.json index 16980c7..9d947ad 100644 --- a/data/chips/STM32H7B0AB.json +++ b/data/chips/STM32H7B0AB.json @@ -7501,7 +7501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7923,7 +7923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8040,7 +8040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8127,7 +8127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8214,7 +8214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8346,7 +8346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8478,7 +8478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8590,7 +8590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8807,7 +8807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0IB.json b/data/chips/STM32H7B0IB.json index b03cf08..551822a 100644 --- a/data/chips/STM32H7B0IB.json +++ b/data/chips/STM32H7B0IB.json @@ -9196,7 +9196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9628,7 +9628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9745,7 +9745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9832,7 +9832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9919,7 +9919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10051,7 +10051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10183,7 +10183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10295,7 +10295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10522,7 +10522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0RB.json b/data/chips/STM32H7B0RB.json index 4695289..9922c9e 100644 --- a/data/chips/STM32H7B0RB.json +++ b/data/chips/STM32H7B0RB.json @@ -4729,7 +4729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5041,7 +5041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5138,7 +5138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5409,7 +5409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5536,7 +5536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5623,7 +5623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5825,7 +5825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0VB.json b/data/chips/STM32H7B0VB.json index 5636054..64b7907 100644 --- a/data/chips/STM32H7B0VB.json +++ b/data/chips/STM32H7B0VB.json @@ -6150,7 +6150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6542,7 +6542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6659,7 +6659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6803,7 +6803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6935,7 +6935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7067,7 +7067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7179,7 +7179,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7381,7 +7381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0ZB.json b/data/chips/STM32H7B0ZB.json index 9341b88..6516c81 100644 --- a/data/chips/STM32H7B0ZB.json +++ b/data/chips/STM32H7B0ZB.json @@ -7147,7 +7147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7569,7 +7569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7686,7 +7686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7773,7 +7773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7860,7 +7860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7992,7 +7992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8124,7 +8124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8236,7 +8236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8438,7 +8438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3AI.json b/data/chips/STM32H7B3AI.json index d7af8c7..d226db8 100644 --- a/data/chips/STM32H7B3AI.json +++ b/data/chips/STM32H7B3AI.json @@ -7523,7 +7523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7945,7 +7945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8062,7 +8062,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8149,7 +8149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8236,7 +8236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8368,7 +8368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8500,7 +8500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8612,7 +8612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8829,7 +8829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3II.json b/data/chips/STM32H7B3II.json index 633fcbc..b71f2d8 100644 --- a/data/chips/STM32H7B3II.json +++ b/data/chips/STM32H7B3II.json @@ -11547,7 +11547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12024,7 +12024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12141,7 +12141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12228,7 +12228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12315,7 +12315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12447,7 +12447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12579,7 +12579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12691,7 +12691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12918,7 +12918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3LI.json b/data/chips/STM32H7B3LI.json index 78be973..8dc4143 100644 --- a/data/chips/STM32H7B3LI.json +++ b/data/chips/STM32H7B3LI.json @@ -8525,7 +8525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9002,7 +9002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9119,7 +9119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9206,7 +9206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9293,7 +9293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9425,7 +9425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9557,7 +9557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9669,7 +9669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9896,7 +9896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3NI.json b/data/chips/STM32H7B3NI.json index bf1b581..f9eb7f4 100644 --- a/data/chips/STM32H7B3NI.json +++ b/data/chips/STM32H7B3NI.json @@ -8427,7 +8427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8904,7 +8904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9021,7 +9021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9108,7 +9108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9195,7 +9195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9327,7 +9327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9459,7 +9459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9571,7 +9571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9798,7 +9798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3QI.json b/data/chips/STM32H7B3QI.json index af04e22..c616644 100644 --- a/data/chips/STM32H7B3QI.json +++ b/data/chips/STM32H7B3QI.json @@ -6599,7 +6599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7108,7 +7108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7180,7 +7180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7252,7 +7252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7384,7 +7384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7511,7 +7511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7623,7 +7623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7825,7 +7825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3RI.json b/data/chips/STM32H7B3RI.json index ca5c8fd..5da9fda 100644 --- a/data/chips/STM32H7B3RI.json +++ b/data/chips/STM32H7B3RI.json @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5063,7 +5063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5160,7 +5160,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5232,7 +5232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5304,7 +5304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5431,7 +5431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5558,7 +5558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5645,7 +5645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5847,7 +5847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3VI.json b/data/chips/STM32H7B3VI.json index c2d93aa..ef6bd53 100644 --- a/data/chips/STM32H7B3VI.json +++ b/data/chips/STM32H7B3VI.json @@ -7990,7 +7990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8382,7 +8382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8499,7 +8499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8571,7 +8571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8643,7 +8643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8775,7 +8775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8907,7 +8907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9019,7 +9019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9221,7 +9221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3ZI.json b/data/chips/STM32H7B3ZI.json index 88dd043..21f5670 100644 --- a/data/chips/STM32H7B3ZI.json +++ b/data/chips/STM32H7B3ZI.json @@ -8039,7 +8039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8461,7 +8461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8578,7 +8578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8665,7 +8665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8752,7 +8752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8884,7 +8884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9016,7 +9016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9128,7 +9128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9330,7 +9330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7R3A8.json b/data/chips/STM32H7R3A8.json index d42b2d0..d282e9d 100644 --- a/data/chips/STM32H7R3A8.json +++ b/data/chips/STM32H7R3A8.json @@ -6125,7 +6125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6522,7 +6522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6639,7 +6639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6726,7 +6726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6813,7 +6813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6930,7 +6930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7047,7 +7047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7154,7 +7154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3I8.json b/data/chips/STM32H7R3I8.json index 7159f60..bae3669 100644 --- a/data/chips/STM32H7R3I8.json +++ b/data/chips/STM32H7R3I8.json @@ -7531,7 +7531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7938,7 +7938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8055,7 +8055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8147,7 +8147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8234,7 +8234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8351,7 +8351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8468,7 +8468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8575,7 +8575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3L8.json b/data/chips/STM32H7R3L8.json index d22d8cb..68b53e4 100644 --- a/data/chips/STM32H7R3L8.json +++ b/data/chips/STM32H7R3L8.json @@ -8466,7 +8466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8883,7 +8883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9000,7 +9000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9092,7 +9092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9184,7 +9184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9301,7 +9301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9418,7 +9418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9525,7 +9525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3R8.json b/data/chips/STM32H7R3R8.json index d8faf4e..8621da9 100644 --- a/data/chips/STM32H7R3R8.json +++ b/data/chips/STM32H7R3R8.json @@ -3142,7 +3142,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3429,7 +3429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3516,7 +3516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3710,7 +3710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3V8.json b/data/chips/STM32H7R3V8.json index 9475070..71eb823 100644 --- a/data/chips/STM32H7R3V8.json +++ b/data/chips/STM32H7R3V8.json @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5385,7 +5385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5477,7 +5477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5554,7 +5554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5631,7 +5631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5748,7 +5748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3Z8.json b/data/chips/STM32H7R3Z8.json index da22252..2598aa6 100644 --- a/data/chips/STM32H7R3Z8.json +++ b/data/chips/STM32H7R3Z8.json @@ -6591,7 +6591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6938,7 +6938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7055,7 +7055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7132,7 +7132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7209,7 +7209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7326,7 +7326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7443,7 +7443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7A8.json b/data/chips/STM32H7R7A8.json index 8c01ebe..f5ba789 100644 --- a/data/chips/STM32H7R7A8.json +++ b/data/chips/STM32H7R7A8.json @@ -6288,7 +6288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6685,7 +6685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6802,7 +6802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6889,7 +6889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6976,7 +6976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7093,7 +7093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7210,7 +7210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7297,7 +7297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7I8.json b/data/chips/STM32H7R7I8.json index dce7c64..5be1fca 100644 --- a/data/chips/STM32H7R7I8.json +++ b/data/chips/STM32H7R7I8.json @@ -7666,7 +7666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8063,7 +8063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8180,7 +8180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8272,7 +8272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8359,7 +8359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8476,7 +8476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8593,7 +8593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8680,7 +8680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7L8.json b/data/chips/STM32H7R7L8.json index fc87950..d53c1dc 100644 --- a/data/chips/STM32H7R7L8.json +++ b/data/chips/STM32H7R7L8.json @@ -8754,7 +8754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9171,7 +9171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9288,7 +9288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9380,7 +9380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9472,7 +9472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9589,7 +9589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9706,7 +9706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9813,7 +9813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7Z8.json b/data/chips/STM32H7R7Z8.json index f284bcb..2302ecd 100644 --- a/data/chips/STM32H7R7Z8.json +++ b/data/chips/STM32H7R7Z8.json @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6031,7 +6031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6108,7 +6108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6185,7 +6185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6302,7 +6302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6419,7 +6419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3A8.json b/data/chips/STM32H7S3A8.json index 592fe24..7bbcc60 100644 --- a/data/chips/STM32H7S3A8.json +++ b/data/chips/STM32H7S3A8.json @@ -6250,7 +6250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6647,7 +6647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6764,7 +6764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6851,7 +6851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6938,7 +6938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7055,7 +7055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7172,7 +7172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7279,7 +7279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3I8.json b/data/chips/STM32H7S3I8.json index c6e0a17..6e84db8 100644 --- a/data/chips/STM32H7S3I8.json +++ b/data/chips/STM32H7S3I8.json @@ -7656,7 +7656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8063,7 +8063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8180,7 +8180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8272,7 +8272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8359,7 +8359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8476,7 +8476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8593,7 +8593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8700,7 +8700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3L8.json b/data/chips/STM32H7S3L8.json index e8de5af..b9bb142 100644 --- a/data/chips/STM32H7S3L8.json +++ b/data/chips/STM32H7S3L8.json @@ -8591,7 +8591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9008,7 +9008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9125,7 +9125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9217,7 +9217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9309,7 +9309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9426,7 +9426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9543,7 +9543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9650,7 +9650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3R8.json b/data/chips/STM32H7S3R8.json index e246e13..67fa8a5 100644 --- a/data/chips/STM32H7S3R8.json +++ b/data/chips/STM32H7S3R8.json @@ -3267,7 +3267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3554,7 +3554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3641,7 +3641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3718,7 +3718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3V8.json b/data/chips/STM32H7S3V8.json index 88b4598..a1c6b46 100644 --- a/data/chips/STM32H7S3V8.json +++ b/data/chips/STM32H7S3V8.json @@ -5208,7 +5208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5510,7 +5510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5679,7 +5679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5756,7 +5756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5873,7 +5873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3Z8.json b/data/chips/STM32H7S3Z8.json index b2c8852..6f1c2b3 100644 --- a/data/chips/STM32H7S3Z8.json +++ b/data/chips/STM32H7S3Z8.json @@ -6716,7 +6716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7063,7 +7063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7180,7 +7180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7257,7 +7257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7334,7 +7334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7451,7 +7451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7568,7 +7568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7675,7 +7675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7A8.json b/data/chips/STM32H7S7A8.json index 1a91320..61be622 100644 --- a/data/chips/STM32H7S7A8.json +++ b/data/chips/STM32H7S7A8.json @@ -6413,7 +6413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6810,7 +6810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6927,7 +6927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7014,7 +7014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7101,7 +7101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7218,7 +7218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7335,7 +7335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7422,7 +7422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7I8.json b/data/chips/STM32H7S7I8.json index 9422309..44b4fd4 100644 --- a/data/chips/STM32H7S7I8.json +++ b/data/chips/STM32H7S7I8.json @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8188,7 +8188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8305,7 +8305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8397,7 +8397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8484,7 +8484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8601,7 +8601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8718,7 +8718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8805,7 +8805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7L8.json b/data/chips/STM32H7S7L8.json index b2abaf0..f7efa80 100644 --- a/data/chips/STM32H7S7L8.json +++ b/data/chips/STM32H7S7L8.json @@ -8879,7 +8879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9296,7 +9296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9413,7 +9413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9505,7 +9505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9597,7 +9597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9714,7 +9714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9831,7 +9831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9938,7 +9938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7Z8.json b/data/chips/STM32H7S7Z8.json index 72bf2b9..b124cb8 100644 --- a/data/chips/STM32H7S7Z8.json +++ b/data/chips/STM32H7S7Z8.json @@ -5707,7 +5707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6044,7 +6044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6156,7 +6156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6233,7 +6233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6310,7 +6310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6427,7 +6427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6544,7 +6544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010C6.json b/data/chips/STM32L010C6.json index 2b3e792..eeed9e5 100644 --- a/data/chips/STM32L010C6.json +++ b/data/chips/STM32L010C6.json @@ -1571,7 +1571,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010F4.json b/data/chips/STM32L010F4.json index 3700457..68de49b 100644 --- a/data/chips/STM32L010F4.json +++ b/data/chips/STM32L010F4.json @@ -1267,7 +1267,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010K4.json b/data/chips/STM32L010K4.json index edf6426..5191073 100644 --- a/data/chips/STM32L010K4.json +++ b/data/chips/STM32L010K4.json @@ -1433,7 +1433,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010K8.json b/data/chips/STM32L010K8.json index 5c386af..be78a18 100644 --- a/data/chips/STM32L010K8.json +++ b/data/chips/STM32L010K8.json @@ -1213,7 +1213,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010R8.json b/data/chips/STM32L010R8.json index f5f55a3..96ecda6 100644 --- a/data/chips/STM32L010R8.json +++ b/data/chips/STM32L010R8.json @@ -1638,7 +1638,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010RB.json b/data/chips/STM32L010RB.json index 869d302..6595cbb 100644 --- a/data/chips/STM32L010RB.json +++ b/data/chips/STM32L010RB.json @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011D3.json b/data/chips/STM32L011D3.json index 8487a81..7e76660 100644 --- a/data/chips/STM32L011D3.json +++ b/data/chips/STM32L011D3.json @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011D4.json b/data/chips/STM32L011D4.json index 25613dd..121592f 100644 --- a/data/chips/STM32L011D4.json +++ b/data/chips/STM32L011D4.json @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011E3.json b/data/chips/STM32L011E3.json index 2446801..a217a78 100644 --- a/data/chips/STM32L011E3.json +++ b/data/chips/STM32L011E3.json @@ -1468,7 +1468,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011E4.json b/data/chips/STM32L011E4.json index cf2e476..6476114 100644 --- a/data/chips/STM32L011E4.json +++ b/data/chips/STM32L011E4.json @@ -1468,7 +1468,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011F3.json b/data/chips/STM32L011F3.json index b18b2bc..c34c3c0 100644 --- a/data/chips/STM32L011F3.json +++ b/data/chips/STM32L011F3.json @@ -1536,7 +1536,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011F4.json b/data/chips/STM32L011F4.json index 4f9b104..5a36744 100644 --- a/data/chips/STM32L011F4.json +++ b/data/chips/STM32L011F4.json @@ -1536,7 +1536,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011G3.json b/data/chips/STM32L011G3.json index 9ce6d6d..3cb6ff7 100644 --- a/data/chips/STM32L011G3.json +++ b/data/chips/STM32L011G3.json @@ -1519,7 +1519,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011G4.json b/data/chips/STM32L011G4.json index 411b7a7..b99d92f 100644 --- a/data/chips/STM32L011G4.json +++ b/data/chips/STM32L011G4.json @@ -1519,7 +1519,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011K3.json b/data/chips/STM32L011K3.json index 4f7bb55..6eb019d 100644 --- a/data/chips/STM32L011K3.json +++ b/data/chips/STM32L011K3.json @@ -1781,7 +1781,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011K4.json b/data/chips/STM32L011K4.json index 2fbe805..087a692 100644 --- a/data/chips/STM32L011K4.json +++ b/data/chips/STM32L011K4.json @@ -1781,7 +1781,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021D4.json b/data/chips/STM32L021D4.json index 8174486..09b7131 100644 --- a/data/chips/STM32L021D4.json +++ b/data/chips/STM32L021D4.json @@ -1256,7 +1256,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021F4.json b/data/chips/STM32L021F4.json index c4a83ff..3d2e2f5 100644 --- a/data/chips/STM32L021F4.json +++ b/data/chips/STM32L021F4.json @@ -1573,7 +1573,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021G4.json b/data/chips/STM32L021G4.json index 641e240..fbf3ce7 100644 --- a/data/chips/STM32L021G4.json +++ b/data/chips/STM32L021G4.json @@ -1556,7 +1556,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021K4.json b/data/chips/STM32L021K4.json index cd1c0c7..031cbde 100644 --- a/data/chips/STM32L021K4.json +++ b/data/chips/STM32L021K4.json @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031C4.json b/data/chips/STM32L031C4.json index 3569ae8..15dbe38 100644 --- a/data/chips/STM32L031C4.json +++ b/data/chips/STM32L031C4.json @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031C6.json b/data/chips/STM32L031C6.json index ba617ad..cc391f6 100644 --- a/data/chips/STM32L031C6.json +++ b/data/chips/STM32L031C6.json @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031E4.json b/data/chips/STM32L031E4.json index ac64958..dc1ebc7 100644 --- a/data/chips/STM32L031E4.json +++ b/data/chips/STM32L031E4.json @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031E6.json b/data/chips/STM32L031E6.json index 01bf248..468083f 100644 --- a/data/chips/STM32L031E6.json +++ b/data/chips/STM32L031E6.json @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031F4.json b/data/chips/STM32L031F4.json index bb0392c..8980b8c 100644 --- a/data/chips/STM32L031F4.json +++ b/data/chips/STM32L031F4.json @@ -1302,7 +1302,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031F6.json b/data/chips/STM32L031F6.json index 5c149e8..514c95c 100644 --- a/data/chips/STM32L031F6.json +++ b/data/chips/STM32L031F6.json @@ -1302,7 +1302,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031G4.json b/data/chips/STM32L031G4.json index 898ec59..a11b656 100644 --- a/data/chips/STM32L031G4.json +++ b/data/chips/STM32L031G4.json @@ -1439,7 +1439,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031G6.json b/data/chips/STM32L031G6.json index 10da523..8919fe5 100644 --- a/data/chips/STM32L031G6.json +++ b/data/chips/STM32L031G6.json @@ -1613,7 +1613,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031K4.json b/data/chips/STM32L031K4.json index 21e8410..947176e 100644 --- a/data/chips/STM32L031K4.json +++ b/data/chips/STM32L031K4.json @@ -1691,7 +1691,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031K6.json b/data/chips/STM32L031K6.json index ecff8b3..688cac4 100644 --- a/data/chips/STM32L031K6.json +++ b/data/chips/STM32L031K6.json @@ -1691,7 +1691,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041C4.json b/data/chips/STM32L041C4.json index 51df718..54b65e8 100644 --- a/data/chips/STM32L041C4.json +++ b/data/chips/STM32L041C4.json @@ -1431,7 +1431,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041C6.json b/data/chips/STM32L041C6.json index 83fe38b..dff6297 100644 --- a/data/chips/STM32L041C6.json +++ b/data/chips/STM32L041C6.json @@ -2008,7 +2008,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041E6.json b/data/chips/STM32L041E6.json index 39b1eb3..0b01ba8 100644 --- a/data/chips/STM32L041E6.json +++ b/data/chips/STM32L041E6.json @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041F6.json b/data/chips/STM32L041F6.json index 2dcb186..0cc7ece 100644 --- a/data/chips/STM32L041F6.json +++ b/data/chips/STM32L041F6.json @@ -1339,7 +1339,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041G6.json b/data/chips/STM32L041G6.json index f39d50f..422a3af 100644 --- a/data/chips/STM32L041G6.json +++ b/data/chips/STM32L041G6.json @@ -1650,7 +1650,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041K6.json b/data/chips/STM32L041K6.json index 6f4e246..a3a0b62 100644 --- a/data/chips/STM32L041K6.json +++ b/data/chips/STM32L041K6.json @@ -1728,7 +1728,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051C6.json b/data/chips/STM32L051C6.json index 27a8564..7eb2600 100644 --- a/data/chips/STM32L051C6.json +++ b/data/chips/STM32L051C6.json @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051C8.json b/data/chips/STM32L051C8.json index 49f6f96..ef50d07 100644 --- a/data/chips/STM32L051C8.json +++ b/data/chips/STM32L051C8.json @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051K6.json b/data/chips/STM32L051K6.json index 0c8685c..2e72d98 100644 --- a/data/chips/STM32L051K6.json +++ b/data/chips/STM32L051K6.json @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051K8.json b/data/chips/STM32L051K8.json index fba9040..61aebe1 100644 --- a/data/chips/STM32L051K8.json +++ b/data/chips/STM32L051K8.json @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051R6.json b/data/chips/STM32L051R6.json index 41e0253..568c9a3 100644 --- a/data/chips/STM32L051R6.json +++ b/data/chips/STM32L051R6.json @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051R8.json b/data/chips/STM32L051R8.json index 216d724..4f67d78 100644 --- a/data/chips/STM32L051R8.json +++ b/data/chips/STM32L051R8.json @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051T6.json b/data/chips/STM32L051T6.json index c56789b..2618ce6 100644 --- a/data/chips/STM32L051T6.json +++ b/data/chips/STM32L051T6.json @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051T8.json b/data/chips/STM32L051T8.json index f06ad4c..78f771b 100644 --- a/data/chips/STM32L051T8.json +++ b/data/chips/STM32L051T8.json @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052C6.json b/data/chips/STM32L052C6.json index f0af71f..f804754 100644 --- a/data/chips/STM32L052C6.json +++ b/data/chips/STM32L052C6.json @@ -2155,7 +2155,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052C8.json b/data/chips/STM32L052C8.json index 2b0f3a9..947ea97 100644 --- a/data/chips/STM32L052C8.json +++ b/data/chips/STM32L052C8.json @@ -2155,7 +2155,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052K6.json b/data/chips/STM32L052K6.json index 2b0fdf0..71939fb 100644 --- a/data/chips/STM32L052K6.json +++ b/data/chips/STM32L052K6.json @@ -1638,7 +1638,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052K8.json b/data/chips/STM32L052K8.json index 5825d55..65dcc72 100644 --- a/data/chips/STM32L052K8.json +++ b/data/chips/STM32L052K8.json @@ -1638,7 +1638,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052R6.json b/data/chips/STM32L052R6.json index e089635..8f37bcc 100644 --- a/data/chips/STM32L052R6.json +++ b/data/chips/STM32L052R6.json @@ -2441,7 +2441,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052R8.json b/data/chips/STM32L052R8.json index c420964..af0f4cb 100644 --- a/data/chips/STM32L052R8.json +++ b/data/chips/STM32L052R8.json @@ -2441,7 +2441,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052T6.json b/data/chips/STM32L052T6.json index 63ab84e..828d97c 100644 --- a/data/chips/STM32L052T6.json +++ b/data/chips/STM32L052T6.json @@ -1599,7 +1599,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052T8.json b/data/chips/STM32L052T8.json index 30dd327..7ae7b6b 100644 --- a/data/chips/STM32L052T8.json +++ b/data/chips/STM32L052T8.json @@ -1821,7 +1821,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053C6.json b/data/chips/STM32L053C6.json index a277c7c..7fea048 100644 --- a/data/chips/STM32L053C6.json +++ b/data/chips/STM32L053C6.json @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053C8.json b/data/chips/STM32L053C8.json index 84a8e80..3470d26 100644 --- a/data/chips/STM32L053C8.json +++ b/data/chips/STM32L053C8.json @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053R6.json b/data/chips/STM32L053R6.json index 9a0c111..4c4c1a5 100644 --- a/data/chips/STM32L053R6.json +++ b/data/chips/STM32L053R6.json @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053R8.json b/data/chips/STM32L053R8.json index 1248e21..75a551d 100644 --- a/data/chips/STM32L053R8.json +++ b/data/chips/STM32L053R8.json @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L062C8.json b/data/chips/STM32L062C8.json index 501896c..d0aa5e3 100644 --- a/data/chips/STM32L062C8.json +++ b/data/chips/STM32L062C8.json @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L062K8.json b/data/chips/STM32L062K8.json index c897077..e93b4c0 100644 --- a/data/chips/STM32L062K8.json +++ b/data/chips/STM32L062K8.json @@ -1675,7 +1675,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L063C8.json b/data/chips/STM32L063C8.json index 4113df2..a90a9e1 100644 --- a/data/chips/STM32L063C8.json +++ b/data/chips/STM32L063C8.json @@ -2331,7 +2331,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L063R8.json b/data/chips/STM32L063R8.json index 3f7436c..05793b1 100644 --- a/data/chips/STM32L063R8.json +++ b/data/chips/STM32L063R8.json @@ -2317,7 +2317,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071C8.json b/data/chips/STM32L071C8.json index 2fd604e..ab4fb4f 100644 --- a/data/chips/STM32L071C8.json +++ b/data/chips/STM32L071C8.json @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2465,7 +2465,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071CB.json b/data/chips/STM32L071CB.json index 2e0e553..badffec 100644 --- a/data/chips/STM32L071CB.json +++ b/data/chips/STM32L071CB.json @@ -2540,7 +2540,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071CZ.json b/data/chips/STM32L071CZ.json index 3ac087b..30c4909 100644 --- a/data/chips/STM32L071CZ.json +++ b/data/chips/STM32L071CZ.json @@ -2540,7 +2540,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071K8.json b/data/chips/STM32L071K8.json index da40f8b..dc2d5dc 100644 --- a/data/chips/STM32L071K8.json +++ b/data/chips/STM32L071K8.json @@ -1499,7 +1499,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1746,7 +1746,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071KB.json b/data/chips/STM32L071KB.json index 5b8a88c..16b2fd2 100644 --- a/data/chips/STM32L071KB.json +++ b/data/chips/STM32L071KB.json @@ -1711,7 +1711,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071KZ.json b/data/chips/STM32L071KZ.json index 8e9feb4..64e7426 100644 --- a/data/chips/STM32L071KZ.json +++ b/data/chips/STM32L071KZ.json @@ -1711,7 +1711,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071RB.json b/data/chips/STM32L071RB.json index 828b9ec..1ab7412 100644 --- a/data/chips/STM32L071RB.json +++ b/data/chips/STM32L071RB.json @@ -2494,7 +2494,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071RZ.json b/data/chips/STM32L071RZ.json index 914602e..a49581b 100644 --- a/data/chips/STM32L071RZ.json +++ b/data/chips/STM32L071RZ.json @@ -2494,7 +2494,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071V8.json b/data/chips/STM32L071V8.json index 0e582e4..6796091 100644 --- a/data/chips/STM32L071V8.json +++ b/data/chips/STM32L071V8.json @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071VB.json b/data/chips/STM32L071VB.json index ed719c8..6f660ef 100644 --- a/data/chips/STM32L071VB.json +++ b/data/chips/STM32L071VB.json @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071VZ.json b/data/chips/STM32L071VZ.json index 60a9a3b..3c5127e 100644 --- a/data/chips/STM32L071VZ.json +++ b/data/chips/STM32L071VZ.json @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072CB.json b/data/chips/STM32L072CB.json index ae3681f..bb0c649 100644 --- a/data/chips/STM32L072CB.json +++ b/data/chips/STM32L072CB.json @@ -2659,7 +2659,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2941,7 +2941,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072CZ.json b/data/chips/STM32L072CZ.json index bffea0a..9b5d66c 100644 --- a/data/chips/STM32L072CZ.json +++ b/data/chips/STM32L072CZ.json @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3241,7 +3241,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072KB.json b/data/chips/STM32L072KB.json index e23495e..5467db8 100644 --- a/data/chips/STM32L072KB.json +++ b/data/chips/STM32L072KB.json @@ -1825,7 +1825,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072KZ.json b/data/chips/STM32L072KZ.json index eb0a14f..f29d551 100644 --- a/data/chips/STM32L072KZ.json +++ b/data/chips/STM32L072KZ.json @@ -1825,7 +1825,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072RB.json b/data/chips/STM32L072RB.json index 866b0b4..164f4ac 100644 --- a/data/chips/STM32L072RB.json +++ b/data/chips/STM32L072RB.json @@ -3003,7 +3003,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3305,7 +3305,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072RZ.json b/data/chips/STM32L072RZ.json index e2d4e8c..f9a9392 100644 --- a/data/chips/STM32L072RZ.json +++ b/data/chips/STM32L072RZ.json @@ -3003,7 +3003,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3305,7 +3305,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072V8.json b/data/chips/STM32L072V8.json index de20679..e6e81e7 100644 --- a/data/chips/STM32L072V8.json +++ b/data/chips/STM32L072V8.json @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072VB.json b/data/chips/STM32L072VB.json index ffa81c6..b5b6c47 100644 --- a/data/chips/STM32L072VB.json +++ b/data/chips/STM32L072VB.json @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072VZ.json b/data/chips/STM32L072VZ.json index 5ec1e98..46ce97a 100644 --- a/data/chips/STM32L072VZ.json +++ b/data/chips/STM32L072VZ.json @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073CB.json b/data/chips/STM32L073CB.json index e6b395e..0cae532 100644 --- a/data/chips/STM32L073CB.json +++ b/data/chips/STM32L073CB.json @@ -2513,7 +2513,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2795,7 +2795,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073CZ.json b/data/chips/STM32L073CZ.json index e93441f..5cc9d31 100644 --- a/data/chips/STM32L073CZ.json +++ b/data/chips/STM32L073CZ.json @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3095,7 +3095,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073RB.json b/data/chips/STM32L073RB.json index e561068..46077d7 100644 --- a/data/chips/STM32L073RB.json +++ b/data/chips/STM32L073RB.json @@ -2842,7 +2842,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3144,7 +3144,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073RZ.json b/data/chips/STM32L073RZ.json index 9e6396d..91184a8 100644 --- a/data/chips/STM32L073RZ.json +++ b/data/chips/STM32L073RZ.json @@ -3232,7 +3232,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073V8.json b/data/chips/STM32L073V8.json index 2875bf9..8814e13 100644 --- a/data/chips/STM32L073V8.json +++ b/data/chips/STM32L073V8.json @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073VB.json b/data/chips/STM32L073VB.json index 5b55889..78e257b 100644 --- a/data/chips/STM32L073VB.json +++ b/data/chips/STM32L073VB.json @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073VZ.json b/data/chips/STM32L073VZ.json index 83845a5..b8e8104 100644 --- a/data/chips/STM32L073VZ.json +++ b/data/chips/STM32L073VZ.json @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081CB.json b/data/chips/STM32L081CB.json index 6dc7af9..2881171 100644 --- a/data/chips/STM32L081CB.json +++ b/data/chips/STM32L081CB.json @@ -1920,7 +1920,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081CZ.json b/data/chips/STM32L081CZ.json index 663a025..c7c4f8c 100644 --- a/data/chips/STM32L081CZ.json +++ b/data/chips/STM32L081CZ.json @@ -2220,7 +2220,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2502,7 +2502,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081KZ.json b/data/chips/STM32L081KZ.json index 1eb6540..baba3dd 100644 --- a/data/chips/STM32L081KZ.json +++ b/data/chips/STM32L081KZ.json @@ -1748,7 +1748,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082CZ.json b/data/chips/STM32L082CZ.json index 895233c..32d5cfc 100644 --- a/data/chips/STM32L082CZ.json +++ b/data/chips/STM32L082CZ.json @@ -2402,7 +2402,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2684,7 +2684,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082KB.json b/data/chips/STM32L082KB.json index a6ea629..780d6c8 100644 --- a/data/chips/STM32L082KB.json +++ b/data/chips/STM32L082KB.json @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082KZ.json b/data/chips/STM32L082KZ.json index b63b79f..a4707cb 100644 --- a/data/chips/STM32L082KZ.json +++ b/data/chips/STM32L082KZ.json @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083CB.json b/data/chips/STM32L083CB.json index 038a9cb..b6cd99b 100644 --- a/data/chips/STM32L083CB.json +++ b/data/chips/STM32L083CB.json @@ -2184,7 +2184,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083CZ.json b/data/chips/STM32L083CZ.json index abbbf43..1e0af96 100644 --- a/data/chips/STM32L083CZ.json +++ b/data/chips/STM32L083CZ.json @@ -2478,7 +2478,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2760,7 +2760,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083RB.json b/data/chips/STM32L083RB.json index 6242500..f448767 100644 --- a/data/chips/STM32L083RB.json +++ b/data/chips/STM32L083RB.json @@ -2879,7 +2879,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083RZ.json b/data/chips/STM32L083RZ.json index 4036add..61eaf72 100644 --- a/data/chips/STM32L083RZ.json +++ b/data/chips/STM32L083RZ.json @@ -2879,7 +2879,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083V8.json b/data/chips/STM32L083V8.json index ca34976..c73e78a 100644 --- a/data/chips/STM32L083V8.json +++ b/data/chips/STM32L083V8.json @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3890,7 +3890,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083VB.json b/data/chips/STM32L083VB.json index 34229ac..de4ef52 100644 --- a/data/chips/STM32L083VB.json +++ b/data/chips/STM32L083VB.json @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3890,7 +3890,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083VZ.json b/data/chips/STM32L083VZ.json index 3e0af76..078cbe0 100644 --- a/data/chips/STM32L083VZ.json +++ b/data/chips/STM32L083VZ.json @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3890,7 +3890,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100C6-A.json b/data/chips/STM32L100C6-A.json index a14b0ae..d39bc28 100644 --- a/data/chips/STM32L100C6-A.json +++ b/data/chips/STM32L100C6-A.json @@ -1812,7 +1812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1936,7 +1936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2033,7 +2033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100C6.json b/data/chips/STM32L100C6.json index f45a56d..9ddb10c 100644 --- a/data/chips/STM32L100C6.json +++ b/data/chips/STM32L100C6.json @@ -1797,7 +1797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1922,7 +1922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2019,7 +2019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100R8-A.json b/data/chips/STM32L100R8-A.json index 4759a20..f92ae93 100644 --- a/data/chips/STM32L100R8-A.json +++ b/data/chips/STM32L100R8-A.json @@ -2046,7 +2046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2170,7 +2170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2292,7 +2292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100R8.json b/data/chips/STM32L100R8.json index b2c6888..f6433b6 100644 --- a/data/chips/STM32L100R8.json +++ b/data/chips/STM32L100R8.json @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RB-A.json b/data/chips/STM32L100RB-A.json index 2683133..686d018 100644 --- a/data/chips/STM32L100RB-A.json +++ b/data/chips/STM32L100RB-A.json @@ -2046,7 +2046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2170,7 +2170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2292,7 +2292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RB.json b/data/chips/STM32L100RB.json index 70cfc3c..1db6db4 100644 --- a/data/chips/STM32L100RB.json +++ b/data/chips/STM32L100RB.json @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RC.json b/data/chips/STM32L100RC.json index 5216cb8..5795e1b 100644 --- a/data/chips/STM32L100RC.json +++ b/data/chips/STM32L100RC.json @@ -2249,7 +2249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C6-A.json b/data/chips/STM32L151C6-A.json index c9665b6..88ab0fd 100644 --- a/data/chips/STM32L151C6-A.json +++ b/data/chips/STM32L151C6-A.json @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2209,7 +2209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C6.json b/data/chips/STM32L151C6.json index a7691a9..b1f695d 100644 --- a/data/chips/STM32L151C6.json +++ b/data/chips/STM32L151C6.json @@ -1979,7 +1979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2104,7 +2104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C8-A.json b/data/chips/STM32L151C8-A.json index c0ab76c..c4e90ca 100644 --- a/data/chips/STM32L151C8-A.json +++ b/data/chips/STM32L151C8-A.json @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2209,7 +2209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C8.json b/data/chips/STM32L151C8.json index ba11fcb..1142f12 100644 --- a/data/chips/STM32L151C8.json +++ b/data/chips/STM32L151C8.json @@ -1979,7 +1979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2104,7 +2104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CB-A.json b/data/chips/STM32L151CB-A.json index 7d7895b..2a9f68f 100644 --- a/data/chips/STM32L151CB-A.json +++ b/data/chips/STM32L151CB-A.json @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2209,7 +2209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CB.json b/data/chips/STM32L151CB.json index 70e38a9..b63278c 100644 --- a/data/chips/STM32L151CB.json +++ b/data/chips/STM32L151CB.json @@ -1979,7 +1979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2104,7 +2104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CC.json b/data/chips/STM32L151CC.json index 4dbd031..1b19419 100644 --- a/data/chips/STM32L151CC.json +++ b/data/chips/STM32L151CC.json @@ -2188,7 +2188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2492,7 +2492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QC.json b/data/chips/STM32L151QC.json index 67d95d2..272d810 100644 --- a/data/chips/STM32L151QC.json +++ b/data/chips/STM32L151QC.json @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2843,7 +2843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2980,7 +2980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3088,7 +3088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QD.json b/data/chips/STM32L151QD.json index fe64f51..41579e0 100644 --- a/data/chips/STM32L151QD.json +++ b/data/chips/STM32L151QD.json @@ -3161,7 +3161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3309,7 +3309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3446,7 +3446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3554,7 +3554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QE.json b/data/chips/STM32L151QE.json index 16deb15..dad3b97 100644 --- a/data/chips/STM32L151QE.json +++ b/data/chips/STM32L151QE.json @@ -2726,7 +2726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2874,7 +2874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3011,7 +3011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R6-A.json b/data/chips/STM32L151R6-A.json index 2c86968..34b1851 100644 --- a/data/chips/STM32L151R6-A.json +++ b/data/chips/STM32L151R6-A.json @@ -2228,7 +2228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R6.json b/data/chips/STM32L151R6.json index bfc83c1..4b42c4c 100644 --- a/data/chips/STM32L151R6.json +++ b/data/chips/STM32L151R6.json @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R8-A.json b/data/chips/STM32L151R8-A.json index 00814b9..1b1fea8 100644 --- a/data/chips/STM32L151R8-A.json +++ b/data/chips/STM32L151R8-A.json @@ -2228,7 +2228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R8.json b/data/chips/STM32L151R8.json index 920ba61..57505ea 100644 --- a/data/chips/STM32L151R8.json +++ b/data/chips/STM32L151R8.json @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RB-A.json b/data/chips/STM32L151RB-A.json index 3484c7a..97b1753 100644 --- a/data/chips/STM32L151RB-A.json +++ b/data/chips/STM32L151RB-A.json @@ -2228,7 +2228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RB.json b/data/chips/STM32L151RB.json index 9bf9a3c..ce1e031 100644 --- a/data/chips/STM32L151RB.json +++ b/data/chips/STM32L151RB.json @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RC-A.json b/data/chips/STM32L151RC-A.json index 35b9eb8..36a5013 100644 --- a/data/chips/STM32L151RC-A.json +++ b/data/chips/STM32L151RC-A.json @@ -2109,7 +2109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2233,7 +2233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2355,7 +2355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2438,7 +2438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RC.json b/data/chips/STM32L151RC.json index 86c4cf8..a942ebb 100644 --- a/data/chips/STM32L151RC.json +++ b/data/chips/STM32L151RC.json @@ -2469,7 +2469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2593,7 +2593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2715,7 +2715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2798,7 +2798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RD.json b/data/chips/STM32L151RD.json index 8d0f5fb..2f71e8e 100644 --- a/data/chips/STM32L151RD.json +++ b/data/chips/STM32L151RD.json @@ -2613,7 +2613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2737,7 +2737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2859,7 +2859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2942,7 +2942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RE.json b/data/chips/STM32L151RE.json index 2b0e1ef..81769ff 100644 --- a/data/chips/STM32L151RE.json +++ b/data/chips/STM32L151RE.json @@ -2149,7 +2149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2395,7 +2395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2478,7 +2478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151UC.json b/data/chips/STM32L151UC.json index 9067c2a..d8d3e80 100644 --- a/data/chips/STM32L151UC.json +++ b/data/chips/STM32L151UC.json @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2191,7 +2191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2313,7 +2313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151V8-A.json b/data/chips/STM32L151V8-A.json index 1d7c467..1848269 100644 --- a/data/chips/STM32L151V8-A.json +++ b/data/chips/STM32L151V8-A.json @@ -2747,7 +2747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151V8.json b/data/chips/STM32L151V8.json index c6244a6..d04f8e5 100644 --- a/data/chips/STM32L151V8.json +++ b/data/chips/STM32L151V8.json @@ -2733,7 +2733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VB-A.json b/data/chips/STM32L151VB-A.json index 915dca0..4776b92 100644 --- a/data/chips/STM32L151VB-A.json +++ b/data/chips/STM32L151VB-A.json @@ -2747,7 +2747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VB.json b/data/chips/STM32L151VB.json index 6ad711a..41b45d0 100644 --- a/data/chips/STM32L151VB.json +++ b/data/chips/STM32L151VB.json @@ -2733,7 +2733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VC-A.json b/data/chips/STM32L151VC-A.json index 01d3995..eec3a29 100644 --- a/data/chips/STM32L151VC-A.json +++ b/data/chips/STM32L151VC-A.json @@ -2427,7 +2427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2575,7 +2575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2820,7 +2820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VC.json b/data/chips/STM32L151VC.json index b8c32df..ccea340 100644 --- a/data/chips/STM32L151VC.json +++ b/data/chips/STM32L151VC.json @@ -2997,7 +2997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3145,7 +3145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3282,7 +3282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VD-X.json b/data/chips/STM32L151VD-X.json index aa2d6ca..8a9fea5 100644 --- a/data/chips/STM32L151VD-X.json +++ b/data/chips/STM32L151VD-X.json @@ -3101,7 +3101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3386,7 +3386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3494,7 +3494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VD.json b/data/chips/STM32L151VD.json index 23c7c3b..6c1e0b1 100644 --- a/data/chips/STM32L151VD.json +++ b/data/chips/STM32L151VD.json @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2952,7 +2952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3089,7 +3089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VE.json b/data/chips/STM32L151VE.json index 7dc278a..1719eba 100644 --- a/data/chips/STM32L151VE.json +++ b/data/chips/STM32L151VE.json @@ -3101,7 +3101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3386,7 +3386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3494,7 +3494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZC.json b/data/chips/STM32L151ZC.json index 3531e39..ae241c2 100644 --- a/data/chips/STM32L151ZC.json +++ b/data/chips/STM32L151ZC.json @@ -2783,7 +2783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2931,7 +2931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3068,7 +3068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3176,7 +3176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZD.json b/data/chips/STM32L151ZD.json index 0b13428..aad198c 100644 --- a/data/chips/STM32L151ZD.json +++ b/data/chips/STM32L151ZD.json @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3538,7 +3538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3646,7 +3646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZE.json b/data/chips/STM32L151ZE.json index ce7d56c..06dbf4c 100644 --- a/data/chips/STM32L151ZE.json +++ b/data/chips/STM32L151ZE.json @@ -2815,7 +2815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2963,7 +2963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3100,7 +3100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C6-A.json b/data/chips/STM32L152C6-A.json index e3fe8bb..c0a6d58 100644 --- a/data/chips/STM32L152C6-A.json +++ b/data/chips/STM32L152C6-A.json @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2251,7 +2251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2348,7 +2348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C6.json b/data/chips/STM32L152C6.json index bb626ca..fffbe2d 100644 --- a/data/chips/STM32L152C6.json +++ b/data/chips/STM32L152C6.json @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2243,7 +2243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2340,7 +2340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C8-A.json b/data/chips/STM32L152C8-A.json index 0faf462..7830890 100644 --- a/data/chips/STM32L152C8-A.json +++ b/data/chips/STM32L152C8-A.json @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2251,7 +2251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2348,7 +2348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C8.json b/data/chips/STM32L152C8.json index 774f53c..24fbaed 100644 --- a/data/chips/STM32L152C8.json +++ b/data/chips/STM32L152C8.json @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2243,7 +2243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2340,7 +2340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CB-A.json b/data/chips/STM32L152CB-A.json index 48b0edc..342730b 100644 --- a/data/chips/STM32L152CB-A.json +++ b/data/chips/STM32L152CB-A.json @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2251,7 +2251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2348,7 +2348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CB.json b/data/chips/STM32L152CB.json index 9190d9e..644e31a 100644 --- a/data/chips/STM32L152CB.json +++ b/data/chips/STM32L152CB.json @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2243,7 +2243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2340,7 +2340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CC.json b/data/chips/STM32L152CC.json index 6aeba81..371416c 100644 --- a/data/chips/STM32L152CC.json +++ b/data/chips/STM32L152CC.json @@ -2327,7 +2327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2451,7 +2451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QC.json b/data/chips/STM32L152QC.json index fe92050..855dabe 100644 --- a/data/chips/STM32L152QC.json +++ b/data/chips/STM32L152QC.json @@ -3004,7 +3004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3152,7 +3152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3289,7 +3289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3397,7 +3397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QD.json b/data/chips/STM32L152QD.json index 8056fb4..3145e60 100644 --- a/data/chips/STM32L152QD.json +++ b/data/chips/STM32L152QD.json @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3618,7 +3618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3755,7 +3755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3863,7 +3863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QE.json b/data/chips/STM32L152QE.json index 8f07139..1e31294 100644 --- a/data/chips/STM32L152QE.json +++ b/data/chips/STM32L152QE.json @@ -3035,7 +3035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3183,7 +3183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3320,7 +3320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3428,7 +3428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R6-A.json b/data/chips/STM32L152R6-A.json index 08720d9..3aecc8c 100644 --- a/data/chips/STM32L152R6-A.json +++ b/data/chips/STM32L152R6-A.json @@ -2477,7 +2477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R6.json b/data/chips/STM32L152R6.json index d364a44..46a2573 100644 --- a/data/chips/STM32L152R6.json +++ b/data/chips/STM32L152R6.json @@ -2448,7 +2448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R8-A.json b/data/chips/STM32L152R8-A.json index a20dfc0..5e0cfb3 100644 --- a/data/chips/STM32L152R8-A.json +++ b/data/chips/STM32L152R8-A.json @@ -2477,7 +2477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R8.json b/data/chips/STM32L152R8.json index 6f6e9aa..b3c5cd2 100644 --- a/data/chips/STM32L152R8.json +++ b/data/chips/STM32L152R8.json @@ -2448,7 +2448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RB-A.json b/data/chips/STM32L152RB-A.json index 6fe3a62..a47060c 100644 --- a/data/chips/STM32L152RB-A.json +++ b/data/chips/STM32L152RB-A.json @@ -2477,7 +2477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RB.json b/data/chips/STM32L152RB.json index 261ff7c..e13c86a 100644 --- a/data/chips/STM32L152RB.json +++ b/data/chips/STM32L152RB.json @@ -2448,7 +2448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RC-A.json b/data/chips/STM32L152RC-A.json index cd7c5e4..1494c38 100644 --- a/data/chips/STM32L152RC-A.json +++ b/data/chips/STM32L152RC-A.json @@ -2358,7 +2358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2604,7 +2604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2687,7 +2687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RC.json b/data/chips/STM32L152RC.json index b1eaed4..12da276 100644 --- a/data/chips/STM32L152RC.json +++ b/data/chips/STM32L152RC.json @@ -2308,7 +2308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2554,7 +2554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2637,7 +2637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RD.json b/data/chips/STM32L152RD.json index 90169f0..54afad4 100644 --- a/data/chips/STM32L152RD.json +++ b/data/chips/STM32L152RD.json @@ -2862,7 +2862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2986,7 +2986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3108,7 +3108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3191,7 +3191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RE.json b/data/chips/STM32L152RE.json index 2b0b0cf..19ab3fb 100644 --- a/data/chips/STM32L152RE.json +++ b/data/chips/STM32L152RE.json @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2522,7 +2522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2644,7 +2644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2727,7 +2727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152UC.json b/data/chips/STM32L152UC.json index bfd4f3f..42ed9d1 100644 --- a/data/chips/STM32L152UC.json +++ b/data/chips/STM32L152UC.json @@ -2296,7 +2296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2420,7 +2420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2625,7 +2625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152V8-A.json b/data/chips/STM32L152V8-A.json index 263adfa..cd9fe84 100644 --- a/data/chips/STM32L152V8-A.json +++ b/data/chips/STM32L152V8-A.json @@ -3056,7 +3056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152V8.json b/data/chips/STM32L152V8.json index 52f3395..3b8240f 100644 --- a/data/chips/STM32L152V8.json +++ b/data/chips/STM32L152V8.json @@ -3042,7 +3042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3191,7 +3191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3328,7 +3328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VB-A.json b/data/chips/STM32L152VB-A.json index 4451fb7..5de14f1 100644 --- a/data/chips/STM32L152VB-A.json +++ b/data/chips/STM32L152VB-A.json @@ -3056,7 +3056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VB.json b/data/chips/STM32L152VB.json index 55df078..5e05295 100644 --- a/data/chips/STM32L152VB.json +++ b/data/chips/STM32L152VB.json @@ -3042,7 +3042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3191,7 +3191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3328,7 +3328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VC-A.json b/data/chips/STM32L152VC-A.json index 81c50a5..5c8368a 100644 --- a/data/chips/STM32L152VC-A.json +++ b/data/chips/STM32L152VC-A.json @@ -2736,7 +2736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2884,7 +2884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3021,7 +3021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VC.json b/data/chips/STM32L152VC.json index 3cc1232..ae2a829 100644 --- a/data/chips/STM32L152VC.json +++ b/data/chips/STM32L152VC.json @@ -3312,7 +3312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3460,7 +3460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3597,7 +3597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VD-X.json b/data/chips/STM32L152VD-X.json index 08fe339..1a316bd 100644 --- a/data/chips/STM32L152VD-X.json +++ b/data/chips/STM32L152VD-X.json @@ -2780,7 +2780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2928,7 +2928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3065,7 +3065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3173,7 +3173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VD.json b/data/chips/STM32L152VD.json index f49f750..361501f 100644 --- a/data/chips/STM32L152VD.json +++ b/data/chips/STM32L152VD.json @@ -3113,7 +3113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3261,7 +3261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3398,7 +3398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3506,7 +3506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VE.json b/data/chips/STM32L152VE.json index 8da2f6e..e5aabf1 100644 --- a/data/chips/STM32L152VE.json +++ b/data/chips/STM32L152VE.json @@ -3410,7 +3410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3558,7 +3558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3695,7 +3695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3803,7 +3803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZC.json b/data/chips/STM32L152ZC.json index 83c3603..a3837d0 100644 --- a/data/chips/STM32L152ZC.json +++ b/data/chips/STM32L152ZC.json @@ -3092,7 +3092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3240,7 +3240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3377,7 +3377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZD.json b/data/chips/STM32L152ZD.json index 775473b..819459f 100644 --- a/data/chips/STM32L152ZD.json +++ b/data/chips/STM32L152ZD.json @@ -3562,7 +3562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3710,7 +3710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3847,7 +3847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3955,7 +3955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZE.json b/data/chips/STM32L152ZE.json index 22f80a3..72a2914 100644 --- a/data/chips/STM32L152ZE.json +++ b/data/chips/STM32L152ZE.json @@ -3124,7 +3124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3272,7 +3272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3409,7 +3409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3517,7 +3517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162QC.json b/data/chips/STM32L162QC.json index 17ea9ad..f1637c4 100644 --- a/data/chips/STM32L162QC.json +++ b/data/chips/STM32L162QC.json @@ -3023,7 +3023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3171,7 +3171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3308,7 +3308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3416,7 +3416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162QD.json b/data/chips/STM32L162QD.json index f1b8b87..dd2ddb4 100644 --- a/data/chips/STM32L162QD.json +++ b/data/chips/STM32L162QD.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3643,7 +3643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3780,7 +3780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3888,7 +3888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RC-A.json b/data/chips/STM32L162RC-A.json index 5531bf1..9b3cf18 100644 --- a/data/chips/STM32L162RC-A.json +++ b/data/chips/STM32L162RC-A.json @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2507,7 +2507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2629,7 +2629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RC.json b/data/chips/STM32L162RC.json index bb9cd6d..cd1de1d 100644 --- a/data/chips/STM32L162RC.json +++ b/data/chips/STM32L162RC.json @@ -2327,7 +2327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2451,7 +2451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2656,7 +2656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RD.json b/data/chips/STM32L162RD.json index 777a22f..a653ec9 100644 --- a/data/chips/STM32L162RD.json +++ b/data/chips/STM32L162RD.json @@ -2881,7 +2881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3005,7 +3005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3127,7 +3127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3210,7 +3210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RE.json b/data/chips/STM32L162RE.json index 7432bee..739c0e7 100644 --- a/data/chips/STM32L162RE.json +++ b/data/chips/STM32L162RE.json @@ -2423,7 +2423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2547,7 +2547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2669,7 +2669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VC-A.json b/data/chips/STM32L162VC-A.json index eeb59a0..6384d8b 100644 --- a/data/chips/STM32L162VC-A.json +++ b/data/chips/STM32L162VC-A.json @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2909,7 +2909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3046,7 +3046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3154,7 +3154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VC.json b/data/chips/STM32L162VC.json index c28eba6..fc94d90 100644 --- a/data/chips/STM32L162VC.json +++ b/data/chips/STM32L162VC.json @@ -3331,7 +3331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3479,7 +3479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3616,7 +3616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3724,7 +3724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VD-X.json b/data/chips/STM32L162VD-X.json index 8d50224..0b8f44c 100644 --- a/data/chips/STM32L162VD-X.json +++ b/data/chips/STM32L162VD-X.json @@ -2829,7 +2829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2977,7 +2977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3114,7 +3114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VD.json b/data/chips/STM32L162VD.json index 302b922..593257f 100644 --- a/data/chips/STM32L162VD.json +++ b/data/chips/STM32L162VD.json @@ -3138,7 +3138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3286,7 +3286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3423,7 +3423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3531,7 +3531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VE.json b/data/chips/STM32L162VE.json index 25cae1a..f9d0f43 100644 --- a/data/chips/STM32L162VE.json +++ b/data/chips/STM32L162VE.json @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3583,7 +3583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3720,7 +3720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3828,7 +3828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZC.json b/data/chips/STM32L162ZC.json index e81360e..931a6fd 100644 --- a/data/chips/STM32L162ZC.json +++ b/data/chips/STM32L162ZC.json @@ -3111,7 +3111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3259,7 +3259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3504,7 +3504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZD.json b/data/chips/STM32L162ZD.json index f40c7ba..6acecb0 100644 --- a/data/chips/STM32L162ZD.json +++ b/data/chips/STM32L162ZD.json @@ -3587,7 +3587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3735,7 +3735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3872,7 +3872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3980,7 +3980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZE.json b/data/chips/STM32L162ZE.json index a11598f..67793c1 100644 --- a/data/chips/STM32L162ZE.json +++ b/data/chips/STM32L162ZE.json @@ -3149,7 +3149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3297,7 +3297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3434,7 +3434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3542,7 +3542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412C8.json b/data/chips/STM32L412C8.json index 1df3c8a..eb92b18 100644 --- a/data/chips/STM32L412C8.json +++ b/data/chips/STM32L412C8.json @@ -2517,7 +2517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2674,7 +2674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2781,7 +2781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2868,7 +2868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412CB.json b/data/chips/STM32L412CB.json index c3bf8cf..4a7aef5 100644 --- a/data/chips/STM32L412CB.json +++ b/data/chips/STM32L412CB.json @@ -3105,7 +3105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3369,7 +3369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3456,7 +3456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412K8.json b/data/chips/STM32L412K8.json index 6ddd733..413d6bf 100644 --- a/data/chips/STM32L412K8.json +++ b/data/chips/STM32L412K8.json @@ -2082,7 +2082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2306,7 +2306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2388,7 +2388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412KB.json b/data/chips/STM32L412KB.json index 3a239c4..01c1059 100644 --- a/data/chips/STM32L412KB.json +++ b/data/chips/STM32L412KB.json @@ -2082,7 +2082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2306,7 +2306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2388,7 +2388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412R8.json b/data/chips/STM32L412R8.json index 123b8aa..3c33ee7 100644 --- a/data/chips/STM32L412R8.json +++ b/data/chips/STM32L412R8.json @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2982,7 +2982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3089,7 +3089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3176,7 +3176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412RB.json b/data/chips/STM32L412RB.json index 23f4cc0..86f5d1a 100644 --- a/data/chips/STM32L412RB.json +++ b/data/chips/STM32L412RB.json @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3768,7 +3768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3875,7 +3875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3962,7 +3962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412T8.json b/data/chips/STM32L412T8.json index 8d1f1c0..c8a6dff 100644 --- a/data/chips/STM32L412T8.json +++ b/data/chips/STM32L412T8.json @@ -1952,7 +1952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2089,7 +2089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2176,7 +2176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2263,7 +2263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412TB.json b/data/chips/STM32L412TB.json index bc2439e..92c107d 100644 --- a/data/chips/STM32L412TB.json +++ b/data/chips/STM32L412TB.json @@ -2174,7 +2174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2311,7 +2311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2485,7 +2485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422CB.json b/data/chips/STM32L422CB.json index 71cfc48..42395bc 100644 --- a/data/chips/STM32L422CB.json +++ b/data/chips/STM32L422CB.json @@ -2566,7 +2566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2830,7 +2830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2917,7 +2917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422KB.json b/data/chips/STM32L422KB.json index 8e0e132..1a32d26 100644 --- a/data/chips/STM32L422KB.json +++ b/data/chips/STM32L422KB.json @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2355,7 +2355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2437,7 +2437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422RB.json b/data/chips/STM32L422RB.json index 09a2281..bed12ea 100644 --- a/data/chips/STM32L422RB.json +++ b/data/chips/STM32L422RB.json @@ -2880,7 +2880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3037,7 +3037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3144,7 +3144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3231,7 +3231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422TB.json b/data/chips/STM32L422TB.json index b9845d6..b3f03a2 100644 --- a/data/chips/STM32L422TB.json +++ b/data/chips/STM32L422TB.json @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2138,7 +2138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2225,7 +2225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431CB.json b/data/chips/STM32L431CB.json index e09e1b7..f15b7a6 100644 --- a/data/chips/STM32L431CB.json +++ b/data/chips/STM32L431CB.json @@ -3248,7 +3248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3415,7 +3415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3522,7 +3522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3609,7 +3609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431CC.json b/data/chips/STM32L431CC.json index 4c302a3..b6142aa 100644 --- a/data/chips/STM32L431CC.json +++ b/data/chips/STM32L431CC.json @@ -3248,7 +3248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3415,7 +3415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3522,7 +3522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3609,7 +3609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431KB.json b/data/chips/STM32L431KB.json index d307df8..03cf057 100644 --- a/data/chips/STM32L431KB.json +++ b/data/chips/STM32L431KB.json @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2363,7 +2363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2450,7 +2450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431KC.json b/data/chips/STM32L431KC.json index 832d612..411fe3b 100644 --- a/data/chips/STM32L431KC.json +++ b/data/chips/STM32L431KC.json @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2363,7 +2363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2450,7 +2450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431RB.json b/data/chips/STM32L431RB.json index 9b0c7f1..a537847 100644 --- a/data/chips/STM32L431RB.json +++ b/data/chips/STM32L431RB.json @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3896,7 +3896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4003,7 +4003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4090,7 +4090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431RC.json b/data/chips/STM32L431RC.json index 9de9682..05e4380 100644 --- a/data/chips/STM32L431RC.json +++ b/data/chips/STM32L431RC.json @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3896,7 +3896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4003,7 +4003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4090,7 +4090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431VC.json b/data/chips/STM32L431VC.json index b6fd1d7..3906d01 100644 --- a/data/chips/STM32L431VC.json +++ b/data/chips/STM32L431VC.json @@ -3945,7 +3945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4172,7 +4172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4279,7 +4279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4371,7 +4371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L432KB.json b/data/chips/STM32L432KB.json index 3c8dc28..a44a8ea 100644 --- a/data/chips/STM32L432KB.json +++ b/data/chips/STM32L432KB.json @@ -2192,7 +2192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L432KC.json b/data/chips/STM32L432KC.json index b1b72d5..8795ff6 100644 --- a/data/chips/STM32L432KC.json +++ b/data/chips/STM32L432KC.json @@ -2192,7 +2192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433CB.json b/data/chips/STM32L433CB.json index 325f09e..a964cac 100644 --- a/data/chips/STM32L433CB.json +++ b/data/chips/STM32L433CB.json @@ -3421,7 +3421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3588,7 +3588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3695,7 +3695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3782,7 +3782,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433CC.json b/data/chips/STM32L433CC.json index cc910e0..745ae4f 100644 --- a/data/chips/STM32L433CC.json +++ b/data/chips/STM32L433CC.json @@ -3421,7 +3421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3588,7 +3588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3695,7 +3695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3782,7 +3782,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433RB.json b/data/chips/STM32L433RB.json index 66d6370..e51d8ed 100644 --- a/data/chips/STM32L433RB.json +++ b/data/chips/STM32L433RB.json @@ -4007,7 +4007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4174,7 +4174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4281,7 +4281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4368,7 +4368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433RC.json b/data/chips/STM32L433RC.json index 0fc460d..f76d957 100644 --- a/data/chips/STM32L433RC.json +++ b/data/chips/STM32L433RC.json @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4677,7 +4677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4764,7 +4764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433VC.json b/data/chips/STM32L433VC.json index 07799c0..6eaaf9a 100644 --- a/data/chips/STM32L433VC.json +++ b/data/chips/STM32L433VC.json @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4510,7 +4510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4617,7 +4617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4709,7 +4709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L442KC.json b/data/chips/STM32L442KC.json index f8dc50e..da0cbf9 100644 --- a/data/chips/STM32L442KC.json +++ b/data/chips/STM32L442KC.json @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2470,7 +2470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2552,7 +2552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443CC.json b/data/chips/STM32L443CC.json index 709d400..d4e3487 100644 --- a/data/chips/STM32L443CC.json +++ b/data/chips/STM32L443CC.json @@ -3770,7 +3770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3937,7 +3937,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4044,7 +4044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4131,7 +4131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443RC.json b/data/chips/STM32L443RC.json index 3d6c9c7..b36ed1e 100644 --- a/data/chips/STM32L443RC.json +++ b/data/chips/STM32L443RC.json @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4223,7 +4223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4330,7 +4330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4417,7 +4417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443VC.json b/data/chips/STM32L443VC.json index 05e3271..92d444a 100644 --- a/data/chips/STM32L443VC.json +++ b/data/chips/STM32L443VC.json @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4559,7 +4559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4666,7 +4666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4758,7 +4758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451CC.json b/data/chips/STM32L451CC.json index 01d5587..8285f84 100644 --- a/data/chips/STM32L451CC.json +++ b/data/chips/STM32L451CC.json @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2924,7 +2924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3031,7 +3031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3118,7 +3118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3250,7 +3250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451CE.json b/data/chips/STM32L451CE.json index 4556b65..855486d 100644 --- a/data/chips/STM32L451CE.json +++ b/data/chips/STM32L451CE.json @@ -3051,7 +3051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3218,7 +3218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3412,7 +3412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3544,7 +3544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451RC.json b/data/chips/STM32L451RC.json index c43a139..149b9bd 100644 --- a/data/chips/STM32L451RC.json +++ b/data/chips/STM32L451RC.json @@ -3881,7 +3881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4048,7 +4048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4155,7 +4155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4242,7 +4242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4374,7 +4374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451RE.json b/data/chips/STM32L451RE.json index e3be24d..2553cc3 100644 --- a/data/chips/STM32L451RE.json +++ b/data/chips/STM32L451RE.json @@ -3881,7 +3881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4048,7 +4048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4155,7 +4155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4242,7 +4242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4374,7 +4374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451VC.json b/data/chips/STM32L451VC.json index f1f50e8..283532f 100644 --- a/data/chips/STM32L451VC.json +++ b/data/chips/STM32L451VC.json @@ -4157,7 +4157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4491,7 +4491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4583,7 +4583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4715,7 +4715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451VE.json b/data/chips/STM32L451VE.json index 32af88b..a4fa3ab 100644 --- a/data/chips/STM32L451VE.json +++ b/data/chips/STM32L451VE.json @@ -4157,7 +4157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4491,7 +4491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4583,7 +4583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4715,7 +4715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452CC.json b/data/chips/STM32L452CC.json index 4df03bb..f003324 100644 --- a/data/chips/STM32L452CC.json +++ b/data/chips/STM32L452CC.json @@ -2770,7 +2770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2937,7 +2937,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3044,7 +3044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3131,7 +3131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3263,7 +3263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452CE.json b/data/chips/STM32L452CE.json index b383e39..2a323a3 100644 --- a/data/chips/STM32L452CE.json +++ b/data/chips/STM32L452CE.json @@ -3358,7 +3358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3525,7 +3525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3632,7 +3632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3719,7 +3719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3851,7 +3851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452RC.json b/data/chips/STM32L452RC.json index 4cf9c24..7a81780 100644 --- a/data/chips/STM32L452RC.json +++ b/data/chips/STM32L452RC.json @@ -3894,7 +3894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4061,7 +4061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4168,7 +4168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4255,7 +4255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4387,7 +4387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452RE.json b/data/chips/STM32L452RE.json index 75983b9..a0718c5 100644 --- a/data/chips/STM32L452RE.json +++ b/data/chips/STM32L452RE.json @@ -4680,7 +4680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4847,7 +4847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4954,7 +4954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5041,7 +5041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5173,7 +5173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452VC.json b/data/chips/STM32L452VC.json index 4b7bc2c..3dc3082 100644 --- a/data/chips/STM32L452VC.json +++ b/data/chips/STM32L452VC.json @@ -4170,7 +4170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4504,7 +4504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4728,7 +4728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452VE.json b/data/chips/STM32L452VE.json index 47ce37c..8879355 100644 --- a/data/chips/STM32L452VE.json +++ b/data/chips/STM32L452VE.json @@ -4170,7 +4170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4504,7 +4504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4728,7 +4728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462CE.json b/data/chips/STM32L462CE.json index 60977d5..c9fce2f 100644 --- a/data/chips/STM32L462CE.json +++ b/data/chips/STM32L462CE.json @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3286,7 +3286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3393,7 +3393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3480,7 +3480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3612,7 +3612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462RE.json b/data/chips/STM32L462RE.json index 58e7d91..b3cba7a 100644 --- a/data/chips/STM32L462RE.json +++ b/data/chips/STM32L462RE.json @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4110,7 +4110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4217,7 +4217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4304,7 +4304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4436,7 +4436,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462VE.json b/data/chips/STM32L462VE.json index e191fd8..2f2bbc7 100644 --- a/data/chips/STM32L462VE.json +++ b/data/chips/STM32L462VE.json @@ -4219,7 +4219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4446,7 +4446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4553,7 +4553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4645,7 +4645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4777,7 +4777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L471QE.json b/data/chips/STM32L471QE.json index 4b21279..f541d2e 100644 --- a/data/chips/STM32L471QE.json +++ b/data/chips/STM32L471QE.json @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4791,7 +4791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4980,7 +4980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5112,7 +5112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5264,7 +5264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5376,7 +5376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5588,7 +5588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471QG.json b/data/chips/STM32L471QG.json index 78cc5ae..924838c 100644 --- a/data/chips/STM32L471QG.json +++ b/data/chips/STM32L471QG.json @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4791,7 +4791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4980,7 +4980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5112,7 +5112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5264,7 +5264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5376,7 +5376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5588,7 +5588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471RE.json b/data/chips/STM32L471RE.json index 7fa8006..e96e6fe 100644 --- a/data/chips/STM32L471RE.json +++ b/data/chips/STM32L471RE.json @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3572,7 +3572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3664,7 +3664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3796,7 +3796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471RG.json b/data/chips/STM32L471RG.json index e1c5778..d017b9a 100644 --- a/data/chips/STM32L471RG.json +++ b/data/chips/STM32L471RG.json @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3572,7 +3572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3664,7 +3664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3796,7 +3796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471VE.json b/data/chips/STM32L471VE.json index b5ec697..7eb7042 100644 --- a/data/chips/STM32L471VE.json +++ b/data/chips/STM32L471VE.json @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4170,7 +4170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4598,7 +4598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4750,7 +4750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4862,7 +4862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471VG.json b/data/chips/STM32L471VG.json index b06a041..ab3e636 100644 --- a/data/chips/STM32L471VG.json +++ b/data/chips/STM32L471VG.json @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4170,7 +4170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4598,7 +4598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4750,7 +4750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4862,7 +4862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471ZE.json b/data/chips/STM32L471ZE.json index 47db82c..cfc1582 100644 --- a/data/chips/STM32L471ZE.json +++ b/data/chips/STM32L471ZE.json @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5651,7 +5651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5783,7 +5783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5875,7 +5875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5972,7 +5972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6104,7 +6104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6256,7 +6256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6368,7 +6368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6605,7 +6605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471ZG.json b/data/chips/STM32L471ZG.json index 6ac760f..4049eb4 100644 --- a/data/chips/STM32L471ZG.json +++ b/data/chips/STM32L471ZG.json @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5651,7 +5651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5783,7 +5783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5875,7 +5875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5972,7 +5972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6104,7 +6104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6256,7 +6256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6368,7 +6368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6605,7 +6605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RC.json b/data/chips/STM32L475RC.json index 33a19b8..4844bec 100644 --- a/data/chips/STM32L475RC.json +++ b/data/chips/STM32L475RC.json @@ -3217,7 +3217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3384,7 +3384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3929,7 +3929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4016,7 +4016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4228,7 +4228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RE.json b/data/chips/STM32L475RE.json index 20eaac4..b18b666 100644 --- a/data/chips/STM32L475RE.json +++ b/data/chips/STM32L475RE.json @@ -3217,7 +3217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3384,7 +3384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3929,7 +3929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4016,7 +4016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4228,7 +4228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RG.json b/data/chips/STM32L475RG.json index e8ea066..751f038 100644 --- a/data/chips/STM32L475RG.json +++ b/data/chips/STM32L475RG.json @@ -3217,7 +3217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3384,7 +3384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3929,7 +3929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4016,7 +4016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4228,7 +4228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VC.json b/data/chips/STM32L475VC.json index 09e790f..41e22e9 100644 --- a/data/chips/STM32L475VC.json +++ b/data/chips/STM32L475VC.json @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4472,7 +4472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4756,7 +4756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4868,7 +4868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VE.json b/data/chips/STM32L475VE.json index b2119b9..c874b27 100644 --- a/data/chips/STM32L475VE.json +++ b/data/chips/STM32L475VE.json @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4472,7 +4472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4756,7 +4756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4868,7 +4868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VG.json b/data/chips/STM32L475VG.json index f8ff481..36c70ed 100644 --- a/data/chips/STM32L475VG.json +++ b/data/chips/STM32L475VG.json @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4472,7 +4472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4756,7 +4756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4868,7 +4868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476JE.json b/data/chips/STM32L476JE.json index 202fbea..01da8a4 100644 --- a/data/chips/STM32L476JE.json +++ b/data/chips/STM32L476JE.json @@ -3608,7 +3608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3775,7 +3775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3897,7 +3897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3984,7 +3984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4076,7 +4076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4208,7 +4208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4335,7 +4335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4422,7 +4422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4634,7 +4634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476JG.json b/data/chips/STM32L476JG.json index a6a5241..4edc281 100644 --- a/data/chips/STM32L476JG.json +++ b/data/chips/STM32L476JG.json @@ -4052,7 +4052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4219,7 +4219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4341,7 +4341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4428,7 +4428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4520,7 +4520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4652,7 +4652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4779,7 +4779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4866,7 +4866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5078,7 +5078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ME.json b/data/chips/STM32L476ME.json index 767f0aa..e9dc7a9 100644 --- a/data/chips/STM32L476ME.json +++ b/data/chips/STM32L476ME.json @@ -3722,7 +3722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4021,7 +4021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4108,7 +4108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4200,7 +4200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4758,7 +4758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476MG.json b/data/chips/STM32L476MG.json index 764022e..3f7e4a4 100644 --- a/data/chips/STM32L476MG.json +++ b/data/chips/STM32L476MG.json @@ -3722,7 +3722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4021,7 +4021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4108,7 +4108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4200,7 +4200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4758,7 +4758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476QE.json b/data/chips/STM32L476QE.json index b9ac976..1d575d5 100644 --- a/data/chips/STM32L476QE.json +++ b/data/chips/STM32L476QE.json @@ -4792,7 +4792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5019,7 +5019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5141,7 +5141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5233,7 +5233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5330,7 +5330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5462,7 +5462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5614,7 +5614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476QG.json b/data/chips/STM32L476QG.json index df21c19..49a318a 100644 --- a/data/chips/STM32L476QG.json +++ b/data/chips/STM32L476QG.json @@ -5590,7 +5590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5939,7 +5939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6031,7 +6031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6128,7 +6128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6260,7 +6260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6412,7 +6412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6524,7 +6524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6736,7 +6736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RC.json b/data/chips/STM32L476RC.json index f6501c3..ff19fe3 100644 --- a/data/chips/STM32L476RC.json +++ b/data/chips/STM32L476RC.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3856,7 +3856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RE.json b/data/chips/STM32L476RE.json index 7fc9cc3..838fa5d 100644 --- a/data/chips/STM32L476RE.json +++ b/data/chips/STM32L476RE.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3856,7 +3856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RG.json b/data/chips/STM32L476RG.json index f4ed85e..769291d 100644 --- a/data/chips/STM32L476RG.json +++ b/data/chips/STM32L476RG.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3856,7 +3856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VC.json b/data/chips/STM32L476VC.json index b7660c8..1343f8f 100644 --- a/data/chips/STM32L476VC.json +++ b/data/chips/STM32L476VC.json @@ -4448,7 +4448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4675,7 +4675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4797,7 +4797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4889,7 +4889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4986,7 +4986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5270,7 +5270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5382,7 +5382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5594,7 +5594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VE.json b/data/chips/STM32L476VE.json index 156b4ce..d0544bf 100644 --- a/data/chips/STM32L476VE.json +++ b/data/chips/STM32L476VE.json @@ -4448,7 +4448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4675,7 +4675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4797,7 +4797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4889,7 +4889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4986,7 +4986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5270,7 +5270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5382,7 +5382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5594,7 +5594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VG.json b/data/chips/STM32L476VG.json index 031d6ea..9b15f61 100644 --- a/data/chips/STM32L476VG.json +++ b/data/chips/STM32L476VG.json @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5397,7 +5397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5489,7 +5489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5586,7 +5586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5718,7 +5718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5870,7 +5870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5982,7 +5982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6194,7 +6194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ZE.json b/data/chips/STM32L476ZE.json index 09a3db3..38625f1 100644 --- a/data/chips/STM32L476ZE.json +++ b/data/chips/STM32L476ZE.json @@ -4904,7 +4904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5131,7 +5131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5263,7 +5263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5355,7 +5355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5452,7 +5452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5584,7 +5584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5736,7 +5736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5848,7 +5848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6085,7 +6085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ZG.json b/data/chips/STM32L476ZG.json index de9eac3..3c4cabc 100644 --- a/data/chips/STM32L476ZG.json +++ b/data/chips/STM32L476ZG.json @@ -6650,7 +6650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6877,7 +6877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7009,7 +7009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7101,7 +7101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7198,7 +7198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7330,7 +7330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7482,7 +7482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7594,7 +7594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7831,7 +7831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486JG.json b/data/chips/STM32L486JG.json index c4e5130..e8d4d81 100644 --- a/data/chips/STM32L486JG.json +++ b/data/chips/STM32L486JG.json @@ -3657,7 +3657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3824,7 +3824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3946,7 +3946,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4033,7 +4033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4125,7 +4125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4257,7 +4257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4471,7 +4471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486QG.json b/data/chips/STM32L486QG.json index cd71e88..a6b07b0 100644 --- a/data/chips/STM32L486QG.json +++ b/data/chips/STM32L486QG.json @@ -4841,7 +4841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5068,7 +5068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5190,7 +5190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5511,7 +5511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5663,7 +5663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5775,7 +5775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5987,7 +5987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486RG.json b/data/chips/STM32L486RG.json index 9556dd5..6c5beaf 100644 --- a/data/chips/STM32L486RG.json +++ b/data/chips/STM32L486RG.json @@ -3544,7 +3544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3711,7 +3711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3818,7 +3818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3905,7 +3905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3997,7 +3997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4129,7 +4129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4256,7 +4256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4343,7 +4343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486VG.json b/data/chips/STM32L486VG.json index b1cb716..7472ff0 100644 --- a/data/chips/STM32L486VG.json +++ b/data/chips/STM32L486VG.json @@ -4342,7 +4342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4676,7 +4676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4865,7 +4865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4997,7 +4997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5149,7 +5149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5261,7 +5261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5473,7 +5473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486ZG.json b/data/chips/STM32L486ZG.json index ed0e243..3315630 100644 --- a/data/chips/STM32L486ZG.json +++ b/data/chips/STM32L486ZG.json @@ -4953,7 +4953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5180,7 +5180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5312,7 +5312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5404,7 +5404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5501,7 +5501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5633,7 +5633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5785,7 +5785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5897,7 +5897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6134,7 +6134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496AE.json b/data/chips/STM32L496AE.json index 7c841bf..c713377 100644 --- a/data/chips/STM32L496AE.json +++ b/data/chips/STM32L496AE.json @@ -5836,7 +5836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6063,7 +6063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6190,7 +6190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6282,7 +6282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6379,7 +6379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6511,7 +6511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6663,7 +6663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6775,7 +6775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7007,7 +7007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496AG.json b/data/chips/STM32L496AG.json index 279ff54..60a3037 100644 --- a/data/chips/STM32L496AG.json +++ b/data/chips/STM32L496AG.json @@ -6862,7 +6862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7089,7 +7089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7216,7 +7216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7308,7 +7308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7405,7 +7405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7537,7 +7537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7689,7 +7689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7801,7 +7801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8033,7 +8033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496QE.json b/data/chips/STM32L496QE.json index 972e02a..1eeecad 100644 --- a/data/chips/STM32L496QE.json +++ b/data/chips/STM32L496QE.json @@ -5440,7 +5440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5667,7 +5667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5789,7 +5789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5881,7 +5881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5978,7 +5978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6110,7 +6110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6262,7 +6262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6374,7 +6374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6586,7 +6586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496QG.json b/data/chips/STM32L496QG.json index 07c5afc..78e9e2c 100644 --- a/data/chips/STM32L496QG.json +++ b/data/chips/STM32L496QG.json @@ -7036,7 +7036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7263,7 +7263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7385,7 +7385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7477,7 +7477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7574,7 +7574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7706,7 +7706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7858,7 +7858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7970,7 +7970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8182,7 +8182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496RE.json b/data/chips/STM32L496RE.json index c30559b..3d8da71 100644 --- a/data/chips/STM32L496RE.json +++ b/data/chips/STM32L496RE.json @@ -4032,7 +4032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4199,7 +4199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4306,7 +4306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4485,7 +4485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4617,7 +4617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4744,7 +4744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4831,7 +4831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5043,7 +5043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496RG.json b/data/chips/STM32L496RG.json index e0d66b2..46de853 100644 --- a/data/chips/STM32L496RG.json +++ b/data/chips/STM32L496RG.json @@ -4422,7 +4422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4589,7 +4589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4696,7 +4696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4783,7 +4783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4875,7 +4875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5134,7 +5134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5433,7 +5433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496VE.json b/data/chips/STM32L496VE.json index ee0ebfd..b5807e1 100644 --- a/data/chips/STM32L496VE.json +++ b/data/chips/STM32L496VE.json @@ -4979,7 +4979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5206,7 +5206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5328,7 +5328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5420,7 +5420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5517,7 +5517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5649,7 +5649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5801,7 +5801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5913,7 +5913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6125,7 +6125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496VG.json b/data/chips/STM32L496VG.json index e8d650c..e084c1d 100644 --- a/data/chips/STM32L496VG.json +++ b/data/chips/STM32L496VG.json @@ -6803,7 +6803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7030,7 +7030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7152,7 +7152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7244,7 +7244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7341,7 +7341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7473,7 +7473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7625,7 +7625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7737,7 +7737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7949,7 +7949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496WG.json b/data/chips/STM32L496WG.json index 1954517..65f0805 100644 --- a/data/chips/STM32L496WG.json +++ b/data/chips/STM32L496WG.json @@ -5273,7 +5273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5495,7 +5495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5612,7 +5612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5694,7 +5694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5786,7 +5786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5918,7 +5918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6162,7 +6162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6374,7 +6374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496ZE.json b/data/chips/STM32L496ZE.json index e045bef..69b568d 100644 --- a/data/chips/STM32L496ZE.json +++ b/data/chips/STM32L496ZE.json @@ -5590,7 +5590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5949,7 +5949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6041,7 +6041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6138,7 +6138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6270,7 +6270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6422,7 +6422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6534,7 +6534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6771,7 +6771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496ZG.json b/data/chips/STM32L496ZG.json index 536d5c9..c4ec713 100644 --- a/data/chips/STM32L496ZG.json +++ b/data/chips/STM32L496ZG.json @@ -6466,7 +6466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6693,7 +6693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6825,7 +6825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6917,7 +6917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7014,7 +7014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7146,7 +7146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7298,7 +7298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7410,7 +7410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7647,7 +7647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6AG.json b/data/chips/STM32L4A6AG.json index 0c03e67..3c3e54d 100644 --- a/data/chips/STM32L4A6AG.json +++ b/data/chips/STM32L4A6AG.json @@ -6939,7 +6939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7166,7 +7166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7293,7 +7293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7385,7 +7385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7482,7 +7482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7614,7 +7614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7766,7 +7766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7878,7 +7878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8110,7 +8110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6QG.json b/data/chips/STM32L4A6QG.json index 97ea9e9..9321395 100644 --- a/data/chips/STM32L4A6QG.json +++ b/data/chips/STM32L4A6QG.json @@ -6321,7 +6321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6548,7 +6548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6670,7 +6670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6762,7 +6762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6859,7 +6859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7143,7 +7143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7255,7 +7255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7467,7 +7467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6RG.json b/data/chips/STM32L4A6RG.json index dbae633..77458e5 100644 --- a/data/chips/STM32L4A6RG.json +++ b/data/chips/STM32L4A6RG.json @@ -4505,7 +4505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4672,7 +4672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4779,7 +4779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4866,7 +4866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4958,7 +4958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5090,7 +5090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5217,7 +5217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5304,7 +5304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5516,7 +5516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6VG.json b/data/chips/STM32L4A6VG.json index b62c54d..13bd676 100644 --- a/data/chips/STM32L4A6VG.json +++ b/data/chips/STM32L4A6VG.json @@ -6880,7 +6880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7229,7 +7229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7321,7 +7321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7418,7 +7418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7702,7 +7702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7814,7 +7814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8026,7 +8026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6ZG.json b/data/chips/STM32L4A6ZG.json index 12a3a94..a89fd39 100644 --- a/data/chips/STM32L4A6ZG.json +++ b/data/chips/STM32L4A6ZG.json @@ -6543,7 +6543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6770,7 +6770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6994,7 +6994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7091,7 +7091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7223,7 +7223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7375,7 +7375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7487,7 +7487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7724,7 +7724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5AE.json b/data/chips/STM32L4P5AE.json index 454fec7..61c9b6d 100644 --- a/data/chips/STM32L4P5AE.json +++ b/data/chips/STM32L4P5AE.json @@ -6333,7 +6333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6535,7 +6535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6662,7 +6662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6744,7 +6744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6831,7 +6831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6963,7 +6963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7120,7 +7120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7237,7 +7237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7454,7 +7454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5AG.json b/data/chips/STM32L4P5AG.json index c4cf338..58edabb 100644 --- a/data/chips/STM32L4P5AG.json +++ b/data/chips/STM32L4P5AG.json @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7555,7 +7555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7682,7 +7682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7764,7 +7764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7851,7 +7851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7983,7 +7983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8140,7 +8140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8474,7 +8474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5CE.json b/data/chips/STM32L4P5CE.json index e79e1b4..fb51750 100644 --- a/data/chips/STM32L4P5CE.json +++ b/data/chips/STM32L4P5CE.json @@ -3549,7 +3549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3701,7 +3701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3808,7 +3808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3885,7 +3885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3967,7 +3967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4206,7 +4206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4298,7 +4298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4495,7 +4495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5CG.json b/data/chips/STM32L4P5CG.json index 9578ac1..64ab8ee 100644 --- a/data/chips/STM32L4P5CG.json +++ b/data/chips/STM32L4P5CG.json @@ -4137,7 +4137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4289,7 +4289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4396,7 +4396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4473,7 +4473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4687,7 +4687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4794,7 +4794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5QE.json b/data/chips/STM32L4P5QE.json index da645cb..1669282 100644 --- a/data/chips/STM32L4P5QE.json +++ b/data/chips/STM32L4P5QE.json @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6050,7 +6050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6132,7 +6132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6219,7 +6219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6351,7 +6351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6508,7 +6508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6625,7 +6625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6822,7 +6822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5QG.json b/data/chips/STM32L4P5QG.json index 0f06a54..53053a0 100644 --- a/data/chips/STM32L4P5QG.json +++ b/data/chips/STM32L4P5QG.json @@ -7322,7 +7322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7524,7 +7524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7646,7 +7646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7728,7 +7728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7947,7 +7947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8104,7 +8104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8221,7 +8221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8418,7 +8418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5RE.json b/data/chips/STM32L4P5RE.json index 46bd3a0..ce3e657 100644 --- a/data/chips/STM32L4P5RE.json +++ b/data/chips/STM32L4P5RE.json @@ -4002,7 +4002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4154,7 +4154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4338,7 +4338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4420,7 +4420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4552,7 +4552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4684,7 +4684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4776,7 +4776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4973,7 +4973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5RG.json b/data/chips/STM32L4P5RG.json index 3165899..298756f 100644 --- a/data/chips/STM32L4P5RG.json +++ b/data/chips/STM32L4P5RG.json @@ -4392,7 +4392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4544,7 +4544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4651,7 +4651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4728,7 +4728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4942,7 +4942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5166,7 +5166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5VE.json b/data/chips/STM32L4P5VE.json index 606d631..908e6a6 100644 --- a/data/chips/STM32L4P5VE.json +++ b/data/chips/STM32L4P5VE.json @@ -5755,7 +5755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5957,7 +5957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6079,7 +6079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6161,7 +6161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6248,7 +6248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6380,7 +6380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6537,7 +6537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6654,7 +6654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6851,7 +6851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5VG.json b/data/chips/STM32L4P5VG.json index 656c9f1..c9bcc98 100644 --- a/data/chips/STM32L4P5VG.json +++ b/data/chips/STM32L4P5VG.json @@ -6967,7 +6967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7291,7 +7291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7373,7 +7373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7460,7 +7460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7592,7 +7592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7749,7 +7749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7866,7 +7866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8063,7 +8063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5ZE.json b/data/chips/STM32L4P5ZE.json index 7d3c6b2..aadca9e 100644 --- a/data/chips/STM32L4P5ZE.json +++ b/data/chips/STM32L4P5ZE.json @@ -5868,7 +5868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6202,7 +6202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6284,7 +6284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6371,7 +6371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6503,7 +6503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6660,7 +6660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6777,7 +6777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6999,7 +6999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5ZG.json b/data/chips/STM32L4P5ZG.json index d363b91..e274435 100644 --- a/data/chips/STM32L4P5ZG.json +++ b/data/chips/STM32L4P5ZG.json @@ -6738,7 +6738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6940,7 +6940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7072,7 +7072,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7154,7 +7154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7241,7 +7241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7373,7 +7373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7530,7 +7530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7647,7 +7647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7869,7 +7869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5AG.json b/data/chips/STM32L4Q5AG.json index ca69f96..36e2c3d 100644 --- a/data/chips/STM32L4Q5AG.json +++ b/data/chips/STM32L4Q5AG.json @@ -7419,7 +7419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7621,7 +7621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7748,7 +7748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7830,7 +7830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7917,7 +7917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8049,7 +8049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8206,7 +8206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8323,7 +8323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8540,7 +8540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5CG.json b/data/chips/STM32L4Q5CG.json index 457d74b..486bb76 100644 --- a/data/chips/STM32L4Q5CG.json +++ b/data/chips/STM32L4Q5CG.json @@ -4203,7 +4203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4355,7 +4355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4462,7 +4462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4621,7 +4621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4753,7 +4753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4860,7 +4860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4952,7 +4952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5149,7 +5149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5QG.json b/data/chips/STM32L4Q5QG.json index 19ea4b1..d15e507 100644 --- a/data/chips/STM32L4Q5QG.json +++ b/data/chips/STM32L4Q5QG.json @@ -6590,7 +6590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6792,7 +6792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6914,7 +6914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6996,7 +6996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7083,7 +7083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7215,7 +7215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7372,7 +7372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7489,7 +7489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7686,7 +7686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5RG.json b/data/chips/STM32L4Q5RG.json index ddee416..4878a12 100644 --- a/data/chips/STM32L4Q5RG.json +++ b/data/chips/STM32L4Q5RG.json @@ -4458,7 +4458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4610,7 +4610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4717,7 +4717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4794,7 +4794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4876,7 +4876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5008,7 +5008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5140,7 +5140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5232,7 +5232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5429,7 +5429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5VG.json b/data/chips/STM32L4Q5VG.json index e1a68f2..d506252 100644 --- a/data/chips/STM32L4Q5VG.json +++ b/data/chips/STM32L4Q5VG.json @@ -7033,7 +7033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7235,7 +7235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7357,7 +7357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7439,7 +7439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7526,7 +7526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7658,7 +7658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7932,7 +7932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8129,7 +8129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5ZG.json b/data/chips/STM32L4Q5ZG.json index b17aef7..2a8c038 100644 --- a/data/chips/STM32L4Q5ZG.json +++ b/data/chips/STM32L4Q5ZG.json @@ -6804,7 +6804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7006,7 +7006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7138,7 +7138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7220,7 +7220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7307,7 +7307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7439,7 +7439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7596,7 +7596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7713,7 +7713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7935,7 +7935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5AG.json b/data/chips/STM32L4R5AG.json index 23f5985..5fbbae9 100644 --- a/data/chips/STM32L4R5AG.json +++ b/data/chips/STM32L4R5AG.json @@ -5476,7 +5476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5678,7 +5678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5805,7 +5805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5887,7 +5887,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5974,7 +5974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6106,7 +6106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6263,7 +6263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6380,7 +6380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6597,7 +6597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5AI.json b/data/chips/STM32L4R5AI.json index 63d1253..b9cdd17 100644 --- a/data/chips/STM32L4R5AI.json +++ b/data/chips/STM32L4R5AI.json @@ -6496,7 +6496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6698,7 +6698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6825,7 +6825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6907,7 +6907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6994,7 +6994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7126,7 +7126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7283,7 +7283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7400,7 +7400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7617,7 +7617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5QG.json b/data/chips/STM32L4R5QG.json index 88ca56b..ef766e8 100644 --- a/data/chips/STM32L4R5QG.json +++ b/data/chips/STM32L4R5QG.json @@ -5797,7 +5797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5999,7 +5999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6121,7 +6121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6290,7 +6290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6422,7 +6422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6579,7 +6579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6696,7 +6696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6893,7 +6893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5QI.json b/data/chips/STM32L4R5QI.json index 705754f..4be80a5 100644 --- a/data/chips/STM32L4R5QI.json +++ b/data/chips/STM32L4R5QI.json @@ -5797,7 +5797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5999,7 +5999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6121,7 +6121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6290,7 +6290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6422,7 +6422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6579,7 +6579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6696,7 +6696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6893,7 +6893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5VG.json b/data/chips/STM32L4R5VG.json index 29b1d8c..467b8ff 100644 --- a/data/chips/STM32L4R5VG.json +++ b/data/chips/STM32L4R5VG.json @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4599,7 +4599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4706,7 +4706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4875,7 +4875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5164,7 +5164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5281,7 +5281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5478,7 +5478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5VI.json b/data/chips/STM32L4R5VI.json index d4179c8..fb5bda2 100644 --- a/data/chips/STM32L4R5VI.json +++ b/data/chips/STM32L4R5VI.json @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4599,7 +4599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4706,7 +4706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4875,7 +4875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5164,7 +5164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5281,7 +5281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5478,7 +5478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5ZG.json b/data/chips/STM32L4R5ZG.json index 48be72f..6a37150 100644 --- a/data/chips/STM32L4R5ZG.json +++ b/data/chips/STM32L4R5ZG.json @@ -6001,7 +6001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6335,7 +6335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6417,7 +6417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6504,7 +6504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6636,7 +6636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6793,7 +6793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6910,7 +6910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7132,7 +7132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5ZI.json b/data/chips/STM32L4R5ZI.json index bc1935e..56bf9d2 100644 --- a/data/chips/STM32L4R5ZI.json +++ b/data/chips/STM32L4R5ZI.json @@ -6877,7 +6877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7079,7 +7079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7211,7 +7211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7293,7 +7293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7380,7 +7380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7512,7 +7512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7669,7 +7669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7786,7 +7786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8008,7 +8008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7AI.json b/data/chips/STM32L4R7AI.json index 42e728d..a4fccb3 100644 --- a/data/chips/STM32L4R7AI.json +++ b/data/chips/STM32L4R7AI.json @@ -5731,7 +5731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6060,7 +6060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6142,7 +6142,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6229,7 +6229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6361,7 +6361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6518,7 +6518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6635,7 +6635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6852,7 +6852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7VI.json b/data/chips/STM32L4R7VI.json index 7e20b3e..8a7a276 100644 --- a/data/chips/STM32L4R7VI.json +++ b/data/chips/STM32L4R7VI.json @@ -4612,7 +4612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4814,7 +4814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4921,7 +4921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5003,7 +5003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5090,7 +5090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5222,7 +5222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5496,7 +5496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5693,7 +5693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7ZI.json b/data/chips/STM32L4R7ZI.json index 90be799..0d88f78 100644 --- a/data/chips/STM32L4R7ZI.json +++ b/data/chips/STM32L4R7ZI.json @@ -5386,7 +5386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5588,7 +5588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5802,7 +5802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5889,7 +5889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6021,7 +6021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6178,7 +6178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6295,7 +6295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6517,7 +6517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9AG.json b/data/chips/STM32L4R9AG.json index d9d5e1d..95233e6 100644 --- a/data/chips/STM32L4R9AG.json +++ b/data/chips/STM32L4R9AG.json @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6055,7 +6055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6137,7 +6137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6224,7 +6224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6356,7 +6356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6513,7 +6513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6630,7 +6630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6847,7 +6847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9AI.json b/data/chips/STM32L4R9AI.json index b029a01..4e91c4c 100644 --- a/data/chips/STM32L4R9AI.json +++ b/data/chips/STM32L4R9AI.json @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6055,7 +6055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6137,7 +6137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6224,7 +6224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6356,7 +6356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6513,7 +6513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6630,7 +6630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6847,7 +6847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9VG.json b/data/chips/STM32L4R9VG.json index 98a93ec..6c633f3 100644 --- a/data/chips/STM32L4R9VG.json +++ b/data/chips/STM32L4R9VG.json @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4741,7 +4741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4925,7 +4925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5139,7 +5139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5296,7 +5296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5398,7 +5398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9VI.json b/data/chips/STM32L4R9VI.json index e315032..566c8f9 100644 --- a/data/chips/STM32L4R9VI.json +++ b/data/chips/STM32L4R9VI.json @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4741,7 +4741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4925,7 +4925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5139,7 +5139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5296,7 +5296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5398,7 +5398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9ZG.json b/data/chips/STM32L4R9ZG.json index 4d9e196..1017b28 100644 --- a/data/chips/STM32L4R9ZG.json +++ b/data/chips/STM32L4R9ZG.json @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7371,7 +7371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7503,7 +7503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7585,7 +7585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7672,7 +7672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7804,7 +7804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7961,7 +7961,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8078,7 +8078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8300,7 +8300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9ZI.json b/data/chips/STM32L4R9ZI.json index 524bc6f..e4aa957 100644 --- a/data/chips/STM32L4R9ZI.json +++ b/data/chips/STM32L4R9ZI.json @@ -8045,7 +8045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8247,7 +8247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8379,7 +8379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8461,7 +8461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8548,7 +8548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8680,7 +8680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8837,7 +8837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8954,7 +8954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9176,7 +9176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5AI.json b/data/chips/STM32L4S5AI.json index 73c0991..da1cd27 100644 --- a/data/chips/STM32L4S5AI.json +++ b/data/chips/STM32L4S5AI.json @@ -5557,7 +5557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5886,7 +5886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5968,7 +5968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6055,7 +6055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6187,7 +6187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6678,7 +6678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5QI.json b/data/chips/STM32L4S5QI.json index 020fe53..5c8d41b 100644 --- a/data/chips/STM32L4S5QI.json +++ b/data/chips/STM32L4S5QI.json @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5404,7 +5404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5486,7 +5486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5573,7 +5573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5705,7 +5705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5862,7 +5862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5979,7 +5979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6176,7 +6176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5VI.json b/data/chips/STM32L4S5VI.json index 66ee9e9..c0aeff9 100644 --- a/data/chips/STM32L4S5VI.json +++ b/data/chips/STM32L4S5VI.json @@ -4478,7 +4478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4680,7 +4680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4787,7 +4787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4869,7 +4869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4956,7 +4956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5088,7 +5088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5245,7 +5245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5362,7 +5362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5559,7 +5559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5ZI.json b/data/chips/STM32L4S5ZI.json index 09fc821..58842c5 100644 --- a/data/chips/STM32L4S5ZI.json +++ b/data/chips/STM32L4S5ZI.json @@ -6082,7 +6082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6284,7 +6284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6416,7 +6416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6498,7 +6498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6585,7 +6585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6717,7 +6717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6874,7 +6874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7213,7 +7213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7AI.json b/data/chips/STM32L4S7AI.json index ab5a7f0..8a2c02e 100644 --- a/data/chips/STM32L4S7AI.json +++ b/data/chips/STM32L4S7AI.json @@ -5812,7 +5812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6014,7 +6014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6141,7 +6141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6223,7 +6223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6310,7 +6310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6442,7 +6442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6599,7 +6599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6716,7 +6716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6933,7 +6933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7VI.json b/data/chips/STM32L4S7VI.json index 636828f..cc65a31 100644 --- a/data/chips/STM32L4S7VI.json +++ b/data/chips/STM32L4S7VI.json @@ -4693,7 +4693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4895,7 +4895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5002,7 +5002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5084,7 +5084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5171,7 +5171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5303,7 +5303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5774,7 +5774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7ZI.json b/data/chips/STM32L4S7ZI.json index 3e67a0d..768e313 100644 --- a/data/chips/STM32L4S7ZI.json +++ b/data/chips/STM32L4S7ZI.json @@ -5467,7 +5467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5669,7 +5669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5801,7 +5801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5883,7 +5883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5970,7 +5970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6102,7 +6102,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6259,7 +6259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6376,7 +6376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6598,7 +6598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9AI.json b/data/chips/STM32L4S9AI.json index c0b44d4..04c69f1 100644 --- a/data/chips/STM32L4S9AI.json +++ b/data/chips/STM32L4S9AI.json @@ -5807,7 +5807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6009,7 +6009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6136,7 +6136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6218,7 +6218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6305,7 +6305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6437,7 +6437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6711,7 +6711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6928,7 +6928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9VI.json b/data/chips/STM32L4S9VI.json index 6652b41..2f0e9a4 100644 --- a/data/chips/STM32L4S9VI.json +++ b/data/chips/STM32L4S9VI.json @@ -4620,7 +4620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4822,7 +4822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5006,7 +5006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5088,7 +5088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5220,7 +5220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5377,7 +5377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5479,7 +5479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5676,7 +5676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9ZI.json b/data/chips/STM32L4S9ZI.json index 3ea292a..87aeff5 100644 --- a/data/chips/STM32L4S9ZI.json +++ b/data/chips/STM32L4S9ZI.json @@ -7250,7 +7250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7452,7 +7452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7584,7 +7584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7666,7 +7666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7753,7 +7753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8042,7 +8042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8159,7 +8159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8381,7 +8381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552CC.json b/data/chips/STM32L552CC.json index ea510fe..417fa2b 100644 --- a/data/chips/STM32L552CC.json +++ b/data/chips/STM32L552CC.json @@ -3124,7 +3124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3276,7 +3276,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3383,7 +3383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3460,7 +3460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3542,7 +3542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3674,7 +3674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3781,7 +3781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3873,7 +3873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4070,7 +4070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552CE.json b/data/chips/STM32L552CE.json index 8a7155c..11a5dd2 100644 --- a/data/chips/STM32L552CE.json +++ b/data/chips/STM32L552CE.json @@ -3712,7 +3712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3971,7 +3971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4048,7 +4048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4130,7 +4130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4262,7 +4262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4461,7 +4461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4658,7 +4658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ME.json b/data/chips/STM32L552ME.json index ac428f3..dc630c0 100644 --- a/data/chips/STM32L552ME.json +++ b/data/chips/STM32L552ME.json @@ -3953,7 +3953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4125,7 +4125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4324,7 +4324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4538,7 +4538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4670,7 +4670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4762,7 +4762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4959,7 +4959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552QC.json b/data/chips/STM32L552QC.json index 13f632c..e377215 100644 --- a/data/chips/STM32L552QC.json +++ b/data/chips/STM32L552QC.json @@ -4560,7 +4560,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4762,7 +4762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4884,7 +4884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4966,7 +4966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5053,7 +5053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5185,7 +5185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5342,7 +5342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5459,7 +5459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5656,7 +5656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552QE.json b/data/chips/STM32L552QE.json index 691e0be..ddd9d07 100644 --- a/data/chips/STM32L552QE.json +++ b/data/chips/STM32L552QE.json @@ -6156,7 +6156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6358,7 +6358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6480,7 +6480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6562,7 +6562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6649,7 +6649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6781,7 +6781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6938,7 +6938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7055,7 +7055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7252,7 +7252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552RC.json b/data/chips/STM32L552RC.json index 04ce68d..225aa6e 100644 --- a/data/chips/STM32L552RC.json +++ b/data/chips/STM32L552RC.json @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3430,7 +3430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3537,7 +3537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3614,7 +3614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3696,7 +3696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3828,7 +3828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3960,7 +3960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4052,7 +4052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4249,7 +4249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552RE.json b/data/chips/STM32L552RE.json index d705244..660de8f 100644 --- a/data/chips/STM32L552RE.json +++ b/data/chips/STM32L552RE.json @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4317,7 +4317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4476,7 +4476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4608,7 +4608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4740,7 +4740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4832,7 +4832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5029,7 +5029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552VC.json b/data/chips/STM32L552VC.json index 1ef3f5a..867e82f 100644 --- a/data/chips/STM32L552VC.json +++ b/data/chips/STM32L552VC.json @@ -4028,7 +4028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4230,7 +4230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4419,7 +4419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4795,7 +4795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4912,7 +4912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552VE.json b/data/chips/STM32L552VE.json index 96cebdc..0204102 100644 --- a/data/chips/STM32L552VE.json +++ b/data/chips/STM32L552VE.json @@ -4634,7 +4634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4836,7 +4836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4943,7 +4943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5025,7 +5025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5112,7 +5112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5244,7 +5244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5401,7 +5401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5518,7 +5518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5715,7 +5715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ZC.json b/data/chips/STM32L552ZC.json index fe281c7..9152648 100644 --- a/data/chips/STM32L552ZC.json +++ b/data/chips/STM32L552ZC.json @@ -4706,7 +4706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4908,7 +4908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5040,7 +5040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5122,7 +5122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5209,7 +5209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5341,7 +5341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5498,7 +5498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5615,7 +5615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5837,7 +5837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ZE.json b/data/chips/STM32L552ZE.json index a1a725f..9e71653 100644 --- a/data/chips/STM32L552ZE.json +++ b/data/chips/STM32L552ZE.json @@ -5576,7 +5576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5778,7 +5778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5992,7 +5992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6079,7 +6079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6211,7 +6211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6368,7 +6368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6707,7 +6707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562CE.json b/data/chips/STM32L562CE.json index cfa5e85..2d097bf 100644 --- a/data/chips/STM32L562CE.json +++ b/data/chips/STM32L562CE.json @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3957,7 +3957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4064,7 +4064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4141,7 +4141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4223,7 +4223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4355,7 +4355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4462,7 +4462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4554,7 +4554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562ME.json b/data/chips/STM32L562ME.json index 458379b..11cd799 100644 --- a/data/chips/STM32L562ME.json +++ b/data/chips/STM32L562ME.json @@ -4046,7 +4046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4218,7 +4218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4340,7 +4340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4417,7 +4417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4499,7 +4499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4631,7 +4631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4763,7 +4763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5052,7 +5052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562QE.json b/data/chips/STM32L562QE.json index 5f83ee7..2f35f5d 100644 --- a/data/chips/STM32L562QE.json +++ b/data/chips/STM32L562QE.json @@ -6249,7 +6249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6451,7 +6451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6655,7 +6655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6742,7 +6742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6874,7 +6874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7031,7 +7031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7148,7 +7148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7345,7 +7345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562RE.json b/data/chips/STM32L562RE.json index 1e18a69..bac3422 100644 --- a/data/chips/STM32L562RE.json +++ b/data/chips/STM32L562RE.json @@ -4151,7 +4151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4303,7 +4303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4487,7 +4487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4701,7 +4701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4833,7 +4833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4925,7 +4925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5122,7 +5122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562VE.json b/data/chips/STM32L562VE.json index f5afd8c..ad3a560 100644 --- a/data/chips/STM32L562VE.json +++ b/data/chips/STM32L562VE.json @@ -4727,7 +4727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5036,7 +5036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5205,7 +5205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5337,7 +5337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5494,7 +5494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5611,7 +5611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5808,7 +5808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562ZE.json b/data/chips/STM32L562ZE.json index 5cef299..b156614 100644 --- a/data/chips/STM32L562ZE.json +++ b/data/chips/STM32L562ZE.json @@ -5669,7 +5669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5871,7 +5871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6003,7 +6003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6085,7 +6085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6172,7 +6172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6304,7 +6304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6578,7 +6578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6800,7 +6800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U031C6.json b/data/chips/STM32U031C6.json index e9b9ead..0d27f36 100644 --- a/data/chips/STM32U031C6.json +++ b/data/chips/STM32U031C6.json @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2364,7 +2364,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2556,7 +2556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031C8.json b/data/chips/STM32U031C8.json index 457d135..a96a563 100644 --- a/data/chips/STM32U031C8.json +++ b/data/chips/STM32U031C8.json @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2364,7 +2364,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2556,7 +2556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F4.json b/data/chips/STM32U031F4.json index 08215f2..e75919f 100644 --- a/data/chips/STM32U031F4.json +++ b/data/chips/STM32U031F4.json @@ -1589,7 +1589,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1719,7 +1719,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1809,7 +1809,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F6.json b/data/chips/STM32U031F6.json index 3f03302..f4518ae 100644 --- a/data/chips/STM32U031F6.json +++ b/data/chips/STM32U031F6.json @@ -1589,7 +1589,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1719,7 +1719,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1809,7 +1809,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F8.json b/data/chips/STM32U031F8.json index 4735975..a4c4e00 100644 --- a/data/chips/STM32U031F8.json +++ b/data/chips/STM32U031F8.json @@ -1589,7 +1589,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1719,7 +1719,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1809,7 +1809,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031G6.json b/data/chips/STM32U031G6.json index 419ad81..583afd6 100644 --- a/data/chips/STM32U031G6.json +++ b/data/chips/STM32U031G6.json @@ -1566,7 +1566,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1696,7 +1696,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1863,7 +1863,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1975,7 +1975,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031G8.json b/data/chips/STM32U031G8.json index 6cbce61..c613bb2 100644 --- a/data/chips/STM32U031G8.json +++ b/data/chips/STM32U031G8.json @@ -1566,7 +1566,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1696,7 +1696,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1863,7 +1863,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1975,7 +1975,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K4.json b/data/chips/STM32U031K4.json index 09e71f1..de7b381 100644 --- a/data/chips/STM32U031K4.json +++ b/data/chips/STM32U031K4.json @@ -1641,7 +1641,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1771,7 +1771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1861,7 +1861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1938,7 +1938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2065,7 +2065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K6.json b/data/chips/STM32U031K6.json index f470376..ebf74d5 100644 --- a/data/chips/STM32U031K6.json +++ b/data/chips/STM32U031K6.json @@ -1641,7 +1641,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1771,7 +1771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1861,7 +1861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1938,7 +1938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2065,7 +2065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K8.json b/data/chips/STM32U031K8.json index 46567ef..cd5ed1a 100644 --- a/data/chips/STM32U031K8.json +++ b/data/chips/STM32U031K8.json @@ -1641,7 +1641,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1771,7 +1771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1861,7 +1861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1938,7 +1938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2065,7 +2065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031R6.json b/data/chips/STM32U031R6.json index 2e99aee..ca4bfe3 100644 --- a/data/chips/STM32U031R6.json +++ b/data/chips/STM32U031R6.json @@ -2540,7 +2540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2690,7 +2690,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2800,7 +2800,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031R8.json b/data/chips/STM32U031R8.json index e87eb91..2d2aecb 100644 --- a/data/chips/STM32U031R8.json +++ b/data/chips/STM32U031R8.json @@ -2540,7 +2540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2690,7 +2690,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2800,7 +2800,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073C8.json b/data/chips/STM32U073C8.json index c1b8389..108a222 100644 --- a/data/chips/STM32U073C8.json +++ b/data/chips/STM32U073C8.json @@ -2869,7 +2869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3348,7 +3348,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073CB.json b/data/chips/STM32U073CB.json index 87eb4cd..d97af65 100644 --- a/data/chips/STM32U073CB.json +++ b/data/chips/STM32U073CB.json @@ -2869,7 +2869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3348,7 +3348,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073CC.json b/data/chips/STM32U073CC.json index 1e56b52..ddef18d 100644 --- a/data/chips/STM32U073CC.json +++ b/data/chips/STM32U073CC.json @@ -2869,7 +2869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3348,7 +3348,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073H8.json b/data/chips/STM32U073H8.json index a60abda..0a5b1ef 100644 --- a/data/chips/STM32U073H8.json +++ b/data/chips/STM32U073H8.json @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073HB.json b/data/chips/STM32U073HB.json index 2977882..d668f31 100644 --- a/data/chips/STM32U073HB.json +++ b/data/chips/STM32U073HB.json @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073HC.json b/data/chips/STM32U073HC.json index 95cc737..e3d4378 100644 --- a/data/chips/STM32U073HC.json +++ b/data/chips/STM32U073HC.json @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073K8.json b/data/chips/STM32U073K8.json index d157ca5..6a8ad03 100644 --- a/data/chips/STM32U073K8.json +++ b/data/chips/STM32U073K8.json @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073KB.json b/data/chips/STM32U073KB.json index 75319bd..76b1ba2 100644 --- a/data/chips/STM32U073KB.json +++ b/data/chips/STM32U073KB.json @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073KC.json b/data/chips/STM32U073KC.json index 55ae4ad..1b18fe6 100644 --- a/data/chips/STM32U073KC.json +++ b/data/chips/STM32U073KC.json @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073M8.json b/data/chips/STM32U073M8.json index 9aca59f..8d6956d 100644 --- a/data/chips/STM32U073M8.json +++ b/data/chips/STM32U073M8.json @@ -3767,7 +3767,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4042,7 +4042,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4124,7 +4124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073MB.json b/data/chips/STM32U073MB.json index eeb57cb..ad94043 100644 --- a/data/chips/STM32U073MB.json +++ b/data/chips/STM32U073MB.json @@ -3767,7 +3767,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4042,7 +4042,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4124,7 +4124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073MC.json b/data/chips/STM32U073MC.json index f7c038a..77e71b1 100644 --- a/data/chips/STM32U073MC.json +++ b/data/chips/STM32U073MC.json @@ -3767,7 +3767,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4042,7 +4042,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4124,7 +4124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073R8.json b/data/chips/STM32U073R8.json index 5b4bec8..9d60d87 100644 --- a/data/chips/STM32U073R8.json +++ b/data/chips/STM32U073R8.json @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3650,7 +3650,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3732,7 +3732,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3869,7 +3869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073RB.json b/data/chips/STM32U073RB.json index 8644da1..60eaef4 100644 --- a/data/chips/STM32U073RB.json +++ b/data/chips/STM32U073RB.json @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3650,7 +3650,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3732,7 +3732,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3869,7 +3869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073RC.json b/data/chips/STM32U073RC.json index 14bab76..a801319 100644 --- a/data/chips/STM32U073RC.json +++ b/data/chips/STM32U073RC.json @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3650,7 +3650,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3732,7 +3732,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3869,7 +3869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083CC.json b/data/chips/STM32U083CC.json index 811b472..6b06a83 100644 --- a/data/chips/STM32U083CC.json +++ b/data/chips/STM32U083CC.json @@ -2902,7 +2902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3052,7 +3052,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3162,7 +3162,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3244,7 +3244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3381,7 +3381,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083HC.json b/data/chips/STM32U083HC.json index 6f878e3..7a681ad 100644 --- a/data/chips/STM32U083HC.json +++ b/data/chips/STM32U083HC.json @@ -2424,7 +2424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2554,7 +2554,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2644,7 +2644,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2726,7 +2726,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2858,7 +2858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083KC.json b/data/chips/STM32U083KC.json index 1de550b..5fc0d9f 100644 --- a/data/chips/STM32U083KC.json +++ b/data/chips/STM32U083KC.json @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2374,7 +2374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2464,7 +2464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2541,7 +2541,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2668,7 +2668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083MC.json b/data/chips/STM32U083MC.json index 92d2e69..e265cb6 100644 --- a/data/chips/STM32U083MC.json +++ b/data/chips/STM32U083MC.json @@ -3800,7 +3800,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3965,7 +3965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4157,7 +4157,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083RC.json b/data/chips/STM32U083RC.json index a1f7a2b..38961b8 100644 --- a/data/chips/STM32U083RC.json +++ b/data/chips/STM32U083RC.json @@ -3423,7 +3423,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3573,7 +3573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3683,7 +3683,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3765,7 +3765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U535CB.json b/data/chips/STM32U535CB.json index c682a5f..2df154c 100644 --- a/data/chips/STM32U535CB.json +++ b/data/chips/STM32U535CB.json @@ -3925,7 +3925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4077,7 +4077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4184,7 +4184,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4343,7 +4343,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4470,7 +4470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4866,7 +4866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535CC.json b/data/chips/STM32U535CC.json index 196913d..398ba08 100644 --- a/data/chips/STM32U535CC.json +++ b/data/chips/STM32U535CC.json @@ -3925,7 +3925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4077,7 +4077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4184,7 +4184,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4343,7 +4343,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4470,7 +4470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4866,7 +4866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535CE.json b/data/chips/STM32U535CE.json index 3dff013..dc1c202 100644 --- a/data/chips/STM32U535CE.json +++ b/data/chips/STM32U535CE.json @@ -3925,7 +3925,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4077,7 +4077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4184,7 +4184,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4343,7 +4343,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4470,7 +4470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4866,7 +4866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535JE.json b/data/chips/STM32U535JE.json index 429b39f..c4c0b0c 100644 --- a/data/chips/STM32U535JE.json +++ b/data/chips/STM32U535JE.json @@ -3350,7 +3350,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3497,7 +3497,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3614,7 +3614,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3768,7 +3768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3895,7 +3895,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4002,7 +4002,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4089,7 +4089,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4286,7 +4286,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535NC.json b/data/chips/STM32U535NC.json index d564427..0ac31a5 100644 --- a/data/chips/STM32U535NC.json +++ b/data/chips/STM32U535NC.json @@ -3109,7 +3109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3261,7 +3261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3368,7 +3368,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3445,7 +3445,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3527,7 +3527,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3649,7 +3649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3771,7 +3771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3863,7 +3863,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4060,7 +4060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535NE.json b/data/chips/STM32U535NE.json index 27e8df1..d6f70a1 100644 --- a/data/chips/STM32U535NE.json +++ b/data/chips/STM32U535NE.json @@ -3109,7 +3109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3261,7 +3261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3368,7 +3368,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3445,7 +3445,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3527,7 +3527,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3649,7 +3649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3771,7 +3771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3863,7 +3863,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4060,7 +4060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RB.json b/data/chips/STM32U535RB.json index 4984825..6ec2898 100644 --- a/data/chips/STM32U535RB.json +++ b/data/chips/STM32U535RB.json @@ -4686,7 +4686,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4843,7 +4843,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4950,7 +4950,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5236,7 +5236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5368,7 +5368,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5657,7 +5657,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RC.json b/data/chips/STM32U535RC.json index 7f04aa3..d247879 100644 --- a/data/chips/STM32U535RC.json +++ b/data/chips/STM32U535RC.json @@ -4686,7 +4686,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4843,7 +4843,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4950,7 +4950,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5236,7 +5236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5368,7 +5368,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5657,7 +5657,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RE.json b/data/chips/STM32U535RE.json index 31da5ad..7d156e9 100644 --- a/data/chips/STM32U535RE.json +++ b/data/chips/STM32U535RE.json @@ -4686,7 +4686,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4843,7 +4843,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4950,7 +4950,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5236,7 +5236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5368,7 +5368,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5657,7 +5657,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535VC.json b/data/chips/STM32U535VC.json index c1889be..aee9e24 100644 --- a/data/chips/STM32U535VC.json +++ b/data/chips/STM32U535VC.json @@ -6297,7 +6297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6509,7 +6509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6616,7 +6616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6698,7 +6698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6785,7 +6785,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6917,7 +6917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7074,7 +7074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7191,7 +7191,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7388,7 +7388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535VE.json b/data/chips/STM32U535VE.json index ae29b61..2c6cb4d 100644 --- a/data/chips/STM32U535VE.json +++ b/data/chips/STM32U535VE.json @@ -6297,7 +6297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6509,7 +6509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6616,7 +6616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6698,7 +6698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6785,7 +6785,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6917,7 +6917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7074,7 +7074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7191,7 +7191,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7388,7 +7388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545CE.json b/data/chips/STM32U545CE.json index 46ec68f..2a014f0 100644 --- a/data/chips/STM32U545CE.json +++ b/data/chips/STM32U545CE.json @@ -4060,7 +4060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4212,7 +4212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4319,7 +4319,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4396,7 +4396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4478,7 +4478,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4605,7 +4605,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4712,7 +4712,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4804,7 +4804,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5001,7 +5001,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545JE.json b/data/chips/STM32U545JE.json index e4eb990..e0fc31f 100644 --- a/data/chips/STM32U545JE.json +++ b/data/chips/STM32U545JE.json @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3632,7 +3632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3749,7 +3749,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3826,7 +3826,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3903,7 +3903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4030,7 +4030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4137,7 +4137,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4421,7 +4421,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545NE.json b/data/chips/STM32U545NE.json index 9e59e88..c13a078 100644 --- a/data/chips/STM32U545NE.json +++ b/data/chips/STM32U545NE.json @@ -3244,7 +3244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3503,7 +3503,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3580,7 +3580,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3784,7 +3784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3906,7 +3906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3998,7 +3998,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4195,7 +4195,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545RE.json b/data/chips/STM32U545RE.json index 01714dc..ba65b55 100644 --- a/data/chips/STM32U545RE.json +++ b/data/chips/STM32U545RE.json @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4978,7 +4978,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5085,7 +5085,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5162,7 +5162,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5244,7 +5244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5371,7 +5371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5503,7 +5503,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5792,7 +5792,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545VE.json b/data/chips/STM32U545VE.json index 08bc4fc..6aadafc 100644 --- a/data/chips/STM32U545VE.json +++ b/data/chips/STM32U545VE.json @@ -6432,7 +6432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6644,7 +6644,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6751,7 +6751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6833,7 +6833,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6920,7 +6920,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7052,7 +7052,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7209,7 +7209,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7326,7 +7326,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7523,7 +7523,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575AG.json b/data/chips/STM32U575AG.json index 493b52d..66b9292 100644 --- a/data/chips/STM32U575AG.json +++ b/data/chips/STM32U575AG.json @@ -7999,7 +7999,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8211,7 +8211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8343,7 +8343,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8425,7 +8425,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8512,7 +8512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8644,7 +8644,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8801,7 +8801,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8918,7 +8918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9160,7 +9160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575AI.json b/data/chips/STM32U575AI.json index 888b185..a06bb5e 100644 --- a/data/chips/STM32U575AI.json +++ b/data/chips/STM32U575AI.json @@ -7999,7 +7999,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8211,7 +8211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8343,7 +8343,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8425,7 +8425,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8512,7 +8512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8644,7 +8644,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8801,7 +8801,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8918,7 +8918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9160,7 +9160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575CG.json b/data/chips/STM32U575CG.json index aafd4ba..04a5160 100644 --- a/data/chips/STM32U575CG.json +++ b/data/chips/STM32U575CG.json @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4681,7 +4681,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4865,7 +4865,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4947,7 +4947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5181,7 +5181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5273,7 +5273,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5470,7 +5470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575CI.json b/data/chips/STM32U575CI.json index 23fc11a..38bd286 100644 --- a/data/chips/STM32U575CI.json +++ b/data/chips/STM32U575CI.json @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4681,7 +4681,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4865,7 +4865,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4947,7 +4947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5181,7 +5181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5273,7 +5273,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5470,7 +5470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575OG.json b/data/chips/STM32U575OG.json index b0bdc5f..0bb3d6c 100644 --- a/data/chips/STM32U575OG.json +++ b/data/chips/STM32U575OG.json @@ -5068,7 +5068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5240,7 +5240,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5357,7 +5357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5434,7 +5434,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5516,7 +5516,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5643,7 +5643,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5795,7 +5795,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5897,7 +5897,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6094,7 +6094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575OI.json b/data/chips/STM32U575OI.json index aff3c84..5b1236f 100644 --- a/data/chips/STM32U575OI.json +++ b/data/chips/STM32U575OI.json @@ -5068,7 +5068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5240,7 +5240,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5357,7 +5357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5434,7 +5434,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5516,7 +5516,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5643,7 +5643,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5795,7 +5795,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5897,7 +5897,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6094,7 +6094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575QG.json b/data/chips/STM32U575QG.json index b9deff9..467f3c7 100644 --- a/data/chips/STM32U575QG.json +++ b/data/chips/STM32U575QG.json @@ -7115,7 +7115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7327,7 +7327,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7449,7 +7449,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7531,7 +7531,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7618,7 +7618,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7750,7 +7750,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7907,7 +7907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8024,7 +8024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8221,7 +8221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575QI.json b/data/chips/STM32U575QI.json index 3c38206..c2a9684 100644 --- a/data/chips/STM32U575QI.json +++ b/data/chips/STM32U575QI.json @@ -7115,7 +7115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7327,7 +7327,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7449,7 +7449,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7531,7 +7531,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7618,7 +7618,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7750,7 +7750,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7907,7 +7907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8024,7 +8024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8221,7 +8221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575RG.json b/data/chips/STM32U575RG.json index 9383433..c349c34 100644 --- a/data/chips/STM32U575RG.json +++ b/data/chips/STM32U575RG.json @@ -4865,7 +4865,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5022,7 +5022,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5129,7 +5129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5206,7 +5206,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5288,7 +5288,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5415,7 +5415,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5547,7 +5547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5639,7 +5639,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5836,7 +5836,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575RI.json b/data/chips/STM32U575RI.json index 1a62210..1b0ee1d 100644 --- a/data/chips/STM32U575RI.json +++ b/data/chips/STM32U575RI.json @@ -4865,7 +4865,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5022,7 +5022,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5129,7 +5129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5206,7 +5206,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5288,7 +5288,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5415,7 +5415,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5547,7 +5547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5639,7 +5639,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5836,7 +5836,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575VG.json b/data/chips/STM32U575VG.json index 71b958e..1945cd9 100644 --- a/data/chips/STM32U575VG.json +++ b/data/chips/STM32U575VG.json @@ -6241,7 +6241,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6453,7 +6453,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6560,7 +6560,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6642,7 +6642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6729,7 +6729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6861,7 +6861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7018,7 +7018,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7135,7 +7135,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7332,7 +7332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575VI.json b/data/chips/STM32U575VI.json index 136cc9c..7a14b67 100644 --- a/data/chips/STM32U575VI.json +++ b/data/chips/STM32U575VI.json @@ -6241,7 +6241,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6453,7 +6453,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6560,7 +6560,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6642,7 +6642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6729,7 +6729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6861,7 +6861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7018,7 +7018,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7135,7 +7135,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7332,7 +7332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575ZG.json b/data/chips/STM32U575ZG.json index 404958b..cd0b5ea 100644 --- a/data/chips/STM32U575ZG.json +++ b/data/chips/STM32U575ZG.json @@ -7364,7 +7364,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7576,7 +7576,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7708,7 +7708,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7790,7 +7790,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7877,7 +7877,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8009,7 +8009,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8166,7 +8166,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8283,7 +8283,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8505,7 +8505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575ZI.json b/data/chips/STM32U575ZI.json index 283194f..6996ec9 100644 --- a/data/chips/STM32U575ZI.json +++ b/data/chips/STM32U575ZI.json @@ -7364,7 +7364,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7576,7 +7576,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7708,7 +7708,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7790,7 +7790,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7877,7 +7877,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8009,7 +8009,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8166,7 +8166,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8283,7 +8283,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8505,7 +8505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585AI.json b/data/chips/STM32U585AI.json index 496bf13..8f98391 100644 --- a/data/chips/STM32U585AI.json +++ b/data/chips/STM32U585AI.json @@ -8167,7 +8167,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8379,7 +8379,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8511,7 +8511,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8593,7 +8593,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8680,7 +8680,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8812,7 +8812,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8969,7 +8969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9086,7 +9086,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9328,7 +9328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585CI.json b/data/chips/STM32U585CI.json index 59768e2..825e197 100644 --- a/data/chips/STM32U585CI.json +++ b/data/chips/STM32U585CI.json @@ -4697,7 +4697,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4849,7 +4849,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4956,7 +4956,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5033,7 +5033,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5115,7 +5115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5242,7 +5242,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5349,7 +5349,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5441,7 +5441,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5638,7 +5638,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585OI.json b/data/chips/STM32U585OI.json index 943a834..2c4e218 100644 --- a/data/chips/STM32U585OI.json +++ b/data/chips/STM32U585OI.json @@ -5236,7 +5236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5408,7 +5408,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5525,7 +5525,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5684,7 +5684,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5811,7 +5811,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5963,7 +5963,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6065,7 +6065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6262,7 +6262,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585QI.json b/data/chips/STM32U585QI.json index bf45705..6dfa123 100644 --- a/data/chips/STM32U585QI.json +++ b/data/chips/STM32U585QI.json @@ -7283,7 +7283,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7495,7 +7495,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7617,7 +7617,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7699,7 +7699,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7786,7 +7786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7918,7 +7918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8075,7 +8075,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8192,7 +8192,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8389,7 +8389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585RI.json b/data/chips/STM32U585RI.json index 4fa9ccb..43fbb5d 100644 --- a/data/chips/STM32U585RI.json +++ b/data/chips/STM32U585RI.json @@ -5033,7 +5033,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5190,7 +5190,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5456,7 +5456,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5583,7 +5583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5715,7 +5715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5807,7 +5807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6004,7 +6004,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585VI.json b/data/chips/STM32U585VI.json index 020aafa..fa097b8 100644 --- a/data/chips/STM32U585VI.json +++ b/data/chips/STM32U585VI.json @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6621,7 +6621,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6728,7 +6728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6810,7 +6810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6897,7 +6897,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7029,7 +7029,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7186,7 +7186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7303,7 +7303,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7500,7 +7500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585ZI.json b/data/chips/STM32U585ZI.json index 4c12d3d..38cb42b 100644 --- a/data/chips/STM32U585ZI.json +++ b/data/chips/STM32U585ZI.json @@ -7532,7 +7532,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7744,7 +7744,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7876,7 +7876,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7958,7 +7958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8045,7 +8045,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8177,7 +8177,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8334,7 +8334,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8451,7 +8451,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8673,7 +8673,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595AI.json b/data/chips/STM32U595AI.json index 9fa8f18..19d9f16 100644 --- a/data/chips/STM32U595AI.json +++ b/data/chips/STM32U595AI.json @@ -7926,7 +7926,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8138,7 +8138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8270,7 +8270,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8352,7 +8352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8439,7 +8439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8571,7 +8571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8728,7 +8728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8845,7 +8845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9087,7 +9087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595AJ.json b/data/chips/STM32U595AJ.json index 989ea1d..1571511 100644 --- a/data/chips/STM32U595AJ.json +++ b/data/chips/STM32U595AJ.json @@ -7926,7 +7926,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8138,7 +8138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8270,7 +8270,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8352,7 +8352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8439,7 +8439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8571,7 +8571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8728,7 +8728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8845,7 +8845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9087,7 +9087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595QI.json b/data/chips/STM32U595QI.json index a823007..5b7b9c3 100644 --- a/data/chips/STM32U595QI.json +++ b/data/chips/STM32U595QI.json @@ -7027,7 +7027,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7239,7 +7239,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7361,7 +7361,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7443,7 +7443,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7530,7 +7530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7662,7 +7662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7819,7 +7819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7936,7 +7936,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8133,7 +8133,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595QJ.json b/data/chips/STM32U595QJ.json index a113856..b1d4a2e 100644 --- a/data/chips/STM32U595QJ.json +++ b/data/chips/STM32U595QJ.json @@ -7027,7 +7027,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7239,7 +7239,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7361,7 +7361,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7443,7 +7443,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7530,7 +7530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7662,7 +7662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7819,7 +7819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7936,7 +7936,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8133,7 +8133,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595RI.json b/data/chips/STM32U595RI.json index 0e79a3e..71600d9 100644 --- a/data/chips/STM32U595RI.json +++ b/data/chips/STM32U595RI.json @@ -4625,7 +4625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4782,7 +4782,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4889,7 +4889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4966,7 +4966,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5175,7 +5175,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5307,7 +5307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5399,7 +5399,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5596,7 +5596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595RJ.json b/data/chips/STM32U595RJ.json index 9e57315..eba2c06 100644 --- a/data/chips/STM32U595RJ.json +++ b/data/chips/STM32U595RJ.json @@ -4625,7 +4625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4782,7 +4782,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4889,7 +4889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4966,7 +4966,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5175,7 +5175,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5307,7 +5307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5399,7 +5399,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5596,7 +5596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595VI.json b/data/chips/STM32U595VI.json index f14ef41..c2c3991 100644 --- a/data/chips/STM32U595VI.json +++ b/data/chips/STM32U595VI.json @@ -6118,7 +6118,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6330,7 +6330,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6437,7 +6437,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6519,7 +6519,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6606,7 +6606,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6738,7 +6738,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6895,7 +6895,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7012,7 +7012,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7209,7 +7209,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595VJ.json b/data/chips/STM32U595VJ.json index 2dd4889..5ed2f38 100644 --- a/data/chips/STM32U595VJ.json +++ b/data/chips/STM32U595VJ.json @@ -6118,7 +6118,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6330,7 +6330,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6437,7 +6437,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6519,7 +6519,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6606,7 +6606,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6738,7 +6738,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6895,7 +6895,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7012,7 +7012,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7209,7 +7209,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595ZI.json b/data/chips/STM32U595ZI.json index d26e0e4..5807131 100644 --- a/data/chips/STM32U595ZI.json +++ b/data/chips/STM32U595ZI.json @@ -8182,7 +8182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8394,7 +8394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8526,7 +8526,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8608,7 +8608,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8695,7 +8695,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8827,7 +8827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8984,7 +8984,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9101,7 +9101,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9323,7 +9323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595ZJ.json b/data/chips/STM32U595ZJ.json index c1528ab..ecf8c9d 100644 --- a/data/chips/STM32U595ZJ.json +++ b/data/chips/STM32U595ZJ.json @@ -8182,7 +8182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8394,7 +8394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8526,7 +8526,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8608,7 +8608,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8695,7 +8695,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8827,7 +8827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8984,7 +8984,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9101,7 +9101,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9323,7 +9323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599BJ.json b/data/chips/STM32U599BJ.json index 1273b51..d9159cd 100644 --- a/data/chips/STM32U599BJ.json +++ b/data/chips/STM32U599BJ.json @@ -7632,7 +7632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7844,7 +7844,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7976,7 +7976,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8058,7 +8058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8145,7 +8145,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8277,7 +8277,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8434,7 +8434,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8551,7 +8551,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8793,7 +8793,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599NI.json b/data/chips/STM32U599NI.json index 053abfb..76150a7 100644 --- a/data/chips/STM32U599NI.json +++ b/data/chips/STM32U599NI.json @@ -7705,7 +7705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7917,7 +7917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8049,7 +8049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8131,7 +8131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8218,7 +8218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8350,7 +8350,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8507,7 +8507,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8624,7 +8624,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8866,7 +8866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599NJ.json b/data/chips/STM32U599NJ.json index eb814ee..4b2c5b2 100644 --- a/data/chips/STM32U599NJ.json +++ b/data/chips/STM32U599NJ.json @@ -7705,7 +7705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7917,7 +7917,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8049,7 +8049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8131,7 +8131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8218,7 +8218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8350,7 +8350,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8507,7 +8507,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8624,7 +8624,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8866,7 +8866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599VI.json b/data/chips/STM32U599VI.json index cab7398..20f05e1 100644 --- a/data/chips/STM32U599VI.json +++ b/data/chips/STM32U599VI.json @@ -5656,7 +5656,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5858,7 +5858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5960,7 +5960,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6042,7 +6042,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6124,7 +6124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6256,7 +6256,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6413,7 +6413,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6727,7 +6727,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599VJ.json b/data/chips/STM32U599VJ.json index 87b752b..55a83f9 100644 --- a/data/chips/STM32U599VJ.json +++ b/data/chips/STM32U599VJ.json @@ -6386,7 +6386,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6598,7 +6598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6705,7 +6705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6787,7 +6787,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6874,7 +6874,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7006,7 +7006,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7163,7 +7163,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7280,7 +7280,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7477,7 +7477,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599ZI.json b/data/chips/STM32U599ZI.json index 1b50b96..bb2de91 100644 --- a/data/chips/STM32U599ZI.json +++ b/data/chips/STM32U599ZI.json @@ -7647,7 +7647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7859,7 +7859,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7986,7 +7986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8068,7 +8068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8155,7 +8155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8287,7 +8287,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8444,7 +8444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8561,7 +8561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8783,7 +8783,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599ZJ.json b/data/chips/STM32U599ZJ.json index 7837b7a..370af56 100644 --- a/data/chips/STM32U599ZJ.json +++ b/data/chips/STM32U599ZJ.json @@ -7647,7 +7647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7859,7 +7859,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7986,7 +7986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8068,7 +8068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8155,7 +8155,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8287,7 +8287,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8444,7 +8444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8561,7 +8561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8783,7 +8783,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5AJ.json b/data/chips/STM32U5A5AJ.json index 46a75d8..0254ab6 100644 --- a/data/chips/STM32U5A5AJ.json +++ b/data/chips/STM32U5A5AJ.json @@ -8088,7 +8088,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8300,7 +8300,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8432,7 +8432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8514,7 +8514,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8601,7 +8601,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8733,7 +8733,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8890,7 +8890,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9007,7 +9007,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9249,7 +9249,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5QI.json b/data/chips/STM32U5A5QI.json index a69aeb9..6e2ee49 100644 --- a/data/chips/STM32U5A5QI.json +++ b/data/chips/STM32U5A5QI.json @@ -6316,7 +6316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6528,7 +6528,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6645,7 +6645,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6727,7 +6727,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6814,7 +6814,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6946,7 +6946,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7103,7 +7103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7220,7 +7220,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7417,7 +7417,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5QJ.json b/data/chips/STM32U5A5QJ.json index bacd232..9ec2d7d 100644 --- a/data/chips/STM32U5A5QJ.json +++ b/data/chips/STM32U5A5QJ.json @@ -7189,7 +7189,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7401,7 +7401,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7523,7 +7523,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7605,7 +7605,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7692,7 +7692,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7824,7 +7824,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7981,7 +7981,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8098,7 +8098,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8295,7 +8295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5RJ.json b/data/chips/STM32U5A5RJ.json index 7548031..d913422 100644 --- a/data/chips/STM32U5A5RJ.json +++ b/data/chips/STM32U5A5RJ.json @@ -4787,7 +4787,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4944,7 +4944,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5051,7 +5051,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5128,7 +5128,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5337,7 +5337,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5469,7 +5469,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5561,7 +5561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5758,7 +5758,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5VJ.json b/data/chips/STM32U5A5VJ.json index f52d847..e151cd1 100644 --- a/data/chips/STM32U5A5VJ.json +++ b/data/chips/STM32U5A5VJ.json @@ -6280,7 +6280,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6492,7 +6492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6599,7 +6599,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6681,7 +6681,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6768,7 +6768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6900,7 +6900,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7057,7 +7057,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7174,7 +7174,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7371,7 +7371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5ZJ.json b/data/chips/STM32U5A5ZJ.json index 3cbfdc8..79ac82a 100644 --- a/data/chips/STM32U5A5ZJ.json +++ b/data/chips/STM32U5A5ZJ.json @@ -8344,7 +8344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8556,7 +8556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8688,7 +8688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8770,7 +8770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8857,7 +8857,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8989,7 +8989,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9146,7 +9146,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9263,7 +9263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9485,7 +9485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9BJ.json b/data/chips/STM32U5A9BJ.json index 3715e93..a24aa46 100644 --- a/data/chips/STM32U5A9BJ.json +++ b/data/chips/STM32U5A9BJ.json @@ -7794,7 +7794,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8006,7 +8006,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8138,7 +8138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8220,7 +8220,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8307,7 +8307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8439,7 +8439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8596,7 +8596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8713,7 +8713,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8955,7 +8955,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9NJ.json b/data/chips/STM32U5A9NJ.json index 4fe05fb..4a175c2 100644 --- a/data/chips/STM32U5A9NJ.json +++ b/data/chips/STM32U5A9NJ.json @@ -7867,7 +7867,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8079,7 +8079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8211,7 +8211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8293,7 +8293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8380,7 +8380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8512,7 +8512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8669,7 +8669,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8786,7 +8786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9028,7 +9028,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9VJ.json b/data/chips/STM32U5A9VJ.json index a182c0b..73b65ae 100644 --- a/data/chips/STM32U5A9VJ.json +++ b/data/chips/STM32U5A9VJ.json @@ -5818,7 +5818,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6020,7 +6020,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6122,7 +6122,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6204,7 +6204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6286,7 +6286,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6418,7 +6418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6575,7 +6575,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6692,7 +6692,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6889,7 +6889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9ZJ.json b/data/chips/STM32U5A9ZJ.json index e44bd05..68ec74c 100644 --- a/data/chips/STM32U5A9ZJ.json +++ b/data/chips/STM32U5A9ZJ.json @@ -7809,7 +7809,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8021,7 +8021,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8148,7 +8148,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8230,7 +8230,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8317,7 +8317,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8449,7 +8449,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8606,7 +8606,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8723,7 +8723,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8945,7 +8945,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F7VI.json b/data/chips/STM32U5F7VI.json index 8796a4d..46e6770 100644 --- a/data/chips/STM32U5F7VI.json +++ b/data/chips/STM32U5F7VI.json @@ -6508,7 +6508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6720,7 +6720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6827,7 +6827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6909,7 +6909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6996,7 +6996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7285,7 +7285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7402,7 +7402,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7599,7 +7599,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F7VJ.json b/data/chips/STM32U5F7VJ.json index 127b433..3404670 100644 --- a/data/chips/STM32U5F7VJ.json +++ b/data/chips/STM32U5F7VJ.json @@ -6508,7 +6508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6720,7 +6720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6827,7 +6827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6909,7 +6909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6996,7 +6996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7285,7 +7285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7402,7 +7402,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7599,7 +7599,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9BJ.json b/data/chips/STM32U5F9BJ.json index 856cb38..bad64bb 100644 --- a/data/chips/STM32U5F9BJ.json +++ b/data/chips/STM32U5F9BJ.json @@ -7721,7 +7721,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7933,7 +7933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8065,7 +8065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8147,7 +8147,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8234,7 +8234,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8366,7 +8366,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8523,7 +8523,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8640,7 +8640,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8882,7 +8882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9NJ.json b/data/chips/STM32U5F9NJ.json index 852e00f..0727723 100644 --- a/data/chips/STM32U5F9NJ.json +++ b/data/chips/STM32U5F9NJ.json @@ -7889,7 +7889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8101,7 +8101,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8233,7 +8233,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8315,7 +8315,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8402,7 +8402,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8534,7 +8534,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8691,7 +8691,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8808,7 +8808,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9050,7 +9050,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9VI.json b/data/chips/STM32U5F9VI.json index 5c33f15..cb30ea5 100644 --- a/data/chips/STM32U5F9VI.json +++ b/data/chips/STM32U5F9VI.json @@ -5167,7 +5167,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5334,7 +5334,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5436,7 +5436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5513,7 +5513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5717,7 +5717,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5829,7 +5829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5921,7 +5921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6138,7 +6138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9VJ.json b/data/chips/STM32U5F9VJ.json index fc0a0e4..f520819 100644 --- a/data/chips/STM32U5F9VJ.json +++ b/data/chips/STM32U5F9VJ.json @@ -5167,7 +5167,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5334,7 +5334,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5436,7 +5436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5513,7 +5513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5717,7 +5717,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5829,7 +5829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5921,7 +5921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6138,7 +6138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9ZI.json b/data/chips/STM32U5F9ZI.json index e4c16f1..86fa971 100644 --- a/data/chips/STM32U5F9ZI.json +++ b/data/chips/STM32U5F9ZI.json @@ -7436,7 +7436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7638,7 +7638,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7750,7 +7750,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7832,7 +7832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7914,7 +7914,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8046,7 +8046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8203,7 +8203,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8320,7 +8320,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8537,7 +8537,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9ZJ.json b/data/chips/STM32U5F9ZJ.json index a9cdbfe..a495e4c 100644 --- a/data/chips/STM32U5F9ZJ.json +++ b/data/chips/STM32U5F9ZJ.json @@ -7436,7 +7436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7638,7 +7638,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7750,7 +7750,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7832,7 +7832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7914,7 +7914,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8046,7 +8046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8203,7 +8203,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8320,7 +8320,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8537,7 +8537,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G7VJ.json b/data/chips/STM32U5G7VJ.json index b9326a0..7078925 100644 --- a/data/chips/STM32U5G7VJ.json +++ b/data/chips/STM32U5G7VJ.json @@ -6643,7 +6643,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6855,7 +6855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6962,7 +6962,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7044,7 +7044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7131,7 +7131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7263,7 +7263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7420,7 +7420,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7537,7 +7537,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7734,7 +7734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9BJ.json b/data/chips/STM32U5G9BJ.json index ce17a0c..28bf853 100644 --- a/data/chips/STM32U5G9BJ.json +++ b/data/chips/STM32U5G9BJ.json @@ -7883,7 +7883,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8095,7 +8095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8227,7 +8227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8309,7 +8309,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8396,7 +8396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8528,7 +8528,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8685,7 +8685,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8802,7 +8802,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9044,7 +9044,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9NJ.json b/data/chips/STM32U5G9NJ.json index 70cf85c..66047ee 100644 --- a/data/chips/STM32U5G9NJ.json +++ b/data/chips/STM32U5G9NJ.json @@ -8051,7 +8051,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8263,7 +8263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8395,7 +8395,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8477,7 +8477,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8564,7 +8564,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8696,7 +8696,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8853,7 +8853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8970,7 +8970,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9212,7 +9212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9VJ.json b/data/chips/STM32U5G9VJ.json index ce468d4..ec39b07 100644 --- a/data/chips/STM32U5G9VJ.json +++ b/data/chips/STM32U5G9VJ.json @@ -5302,7 +5302,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5469,7 +5469,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5571,7 +5571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5648,7 +5648,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5730,7 +5730,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5852,7 +5852,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5964,7 +5964,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6056,7 +6056,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6273,7 +6273,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9ZJ.json b/data/chips/STM32U5G9ZJ.json index c5bed1e..d7e35c3 100644 --- a/data/chips/STM32U5G9ZJ.json +++ b/data/chips/STM32U5G9ZJ.json @@ -7571,7 +7571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7773,7 +7773,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7967,7 +7967,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8049,7 +8049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8181,7 +8181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8338,7 +8338,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8455,7 +8455,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8672,7 +8672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32WB10CC.json b/data/chips/STM32WB10CC.json index 4e70ed4..835e8ec 100644 --- a/data/chips/STM32WB10CC.json +++ b/data/chips/STM32WB10CC.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1984,7 +1984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB15CC.json b/data/chips/STM32WB15CC.json index bd19d14..f646b39 100644 --- a/data/chips/STM32WB15CC.json +++ b/data/chips/STM32WB15CC.json @@ -2574,7 +2574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2721,7 +2721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB30CE.json b/data/chips/STM32WB30CE.json index d3187d4..22dee9d 100644 --- a/data/chips/STM32WB30CE.json +++ b/data/chips/STM32WB30CE.json @@ -1652,7 +1652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1789,7 +1789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1866,7 +1866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1948,7 +1948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB35CC.json b/data/chips/STM32WB35CC.json index 9c861a9..8dfbf54 100644 --- a/data/chips/STM32WB35CC.json +++ b/data/chips/STM32WB35CC.json @@ -2249,7 +2249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2386,7 +2386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2463,7 +2463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2545,7 +2545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB35CE.json b/data/chips/STM32WB35CE.json index 224b2cd..ce77fbd 100644 --- a/data/chips/STM32WB35CE.json +++ b/data/chips/STM32WB35CE.json @@ -2249,7 +2249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2386,7 +2386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2463,7 +2463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2545,7 +2545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB50CG.json b/data/chips/STM32WB50CG.json index d3d3cfc..b58c39b 100644 --- a/data/chips/STM32WB50CG.json +++ b/data/chips/STM32WB50CG.json @@ -1652,7 +1652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1789,7 +1789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1866,7 +1866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1948,7 +1948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CC.json b/data/chips/STM32WB55CC.json index 5172c27..5ddfb04 100644 --- a/data/chips/STM32WB55CC.json +++ b/data/chips/STM32WB55CC.json @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2546,7 +2546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2623,7 +2623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CE.json b/data/chips/STM32WB55CE.json index c78eb3f..0301b05 100644 --- a/data/chips/STM32WB55CE.json +++ b/data/chips/STM32WB55CE.json @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2546,7 +2546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2623,7 +2623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CG.json b/data/chips/STM32WB55CG.json index 26bea4c..a97204f 100644 --- a/data/chips/STM32WB55CG.json +++ b/data/chips/STM32WB55CG.json @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2546,7 +2546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2623,7 +2623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RC.json b/data/chips/STM32WB55RC.json index 477a59b..b55821f 100644 --- a/data/chips/STM32WB55RC.json +++ b/data/chips/STM32WB55RC.json @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3115,7 +3115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3192,7 +3192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3274,7 +3274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RE.json b/data/chips/STM32WB55RE.json index 088b951..f404c83 100644 --- a/data/chips/STM32WB55RE.json +++ b/data/chips/STM32WB55RE.json @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3115,7 +3115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3192,7 +3192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3274,7 +3274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RG.json b/data/chips/STM32WB55RG.json index 9225c1e..5a4420d 100644 --- a/data/chips/STM32WB55RG.json +++ b/data/chips/STM32WB55RG.json @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3115,7 +3115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3192,7 +3192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3274,7 +3274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VC.json b/data/chips/STM32WB55VC.json index d589da0..c7c46f3 100644 --- a/data/chips/STM32WB55VC.json +++ b/data/chips/STM32WB55VC.json @@ -4105,7 +4105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4456,7 +4456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VE.json b/data/chips/STM32WB55VE.json index 0bc2e3f..0a8d8f0 100644 --- a/data/chips/STM32WB55VE.json +++ b/data/chips/STM32WB55VE.json @@ -4105,7 +4105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4456,7 +4456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VG.json b/data/chips/STM32WB55VG.json index 083177b..3bcb1f3 100644 --- a/data/chips/STM32WB55VG.json +++ b/data/chips/STM32WB55VG.json @@ -4105,7 +4105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4456,7 +4456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VY.json b/data/chips/STM32WB55VY.json index 16ff497..34c61a7 100644 --- a/data/chips/STM32WB55VY.json +++ b/data/chips/STM32WB55VY.json @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3571,7 +3571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3658,7 +3658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA50KE.json b/data/chips/STM32WBA50KE.json index f06170c..c7564a6 100644 --- a/data/chips/STM32WBA50KE.json +++ b/data/chips/STM32WBA50KE.json @@ -1258,7 +1258,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1390,7 +1390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1467,7 +1467,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA50KG.json b/data/chips/STM32WBA50KG.json index 0d66d7c..347e56d 100644 --- a/data/chips/STM32WBA50KG.json +++ b/data/chips/STM32WBA50KG.json @@ -1258,7 +1258,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1390,7 +1390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1467,7 +1467,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52CE.json b/data/chips/STM32WBA52CE.json index 38de9db..93d4727 100644 --- a/data/chips/STM32WBA52CE.json +++ b/data/chips/STM32WBA52CE.json @@ -1737,7 +1737,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1899,7 +1899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2180,7 +2180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52CG.json b/data/chips/STM32WBA52CG.json index 70d8c3d..abb29aa 100644 --- a/data/chips/STM32WBA52CG.json +++ b/data/chips/STM32WBA52CG.json @@ -1737,7 +1737,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1899,7 +1899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2180,7 +2180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52KE.json b/data/chips/STM32WBA52KE.json index 7c2e343..71c0729 100644 --- a/data/chips/STM32WBA52KE.json +++ b/data/chips/STM32WBA52KE.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1641,7 +1641,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1795,7 +1795,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52KG.json b/data/chips/STM32WBA52KG.json index 838b170..f57b7e0 100644 --- a/data/chips/STM32WBA52KG.json +++ b/data/chips/STM32WBA52KG.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1641,7 +1641,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1795,7 +1795,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54CE.json b/data/chips/STM32WBA54CE.json index fc21e1e..6071b44 100644 --- a/data/chips/STM32WBA54CE.json +++ b/data/chips/STM32WBA54CE.json @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2142,7 +2142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54CG.json b/data/chips/STM32WBA54CG.json index c7da4c6..ef5e058 100644 --- a/data/chips/STM32WBA54CG.json +++ b/data/chips/STM32WBA54CG.json @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2142,7 +2142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54KE.json b/data/chips/STM32WBA54KE.json index d889696..ada3127 100644 --- a/data/chips/STM32WBA54KE.json +++ b/data/chips/STM32WBA54KE.json @@ -1630,7 +1630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1762,7 +1762,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1839,7 +1839,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1916,7 +1916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2023,7 +2023,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54KG.json b/data/chips/STM32WBA54KG.json index cb417c1..4491ca0 100644 --- a/data/chips/STM32WBA54KG.json +++ b/data/chips/STM32WBA54KG.json @@ -1630,7 +1630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1762,7 +1762,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1839,7 +1839,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1916,7 +1916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2023,7 +2023,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55CE.json b/data/chips/STM32WBA55CE.json index f4f46b0..0887414 100644 --- a/data/chips/STM32WBA55CE.json +++ b/data/chips/STM32WBA55CE.json @@ -1870,7 +1870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2032,7 +2032,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2109,7 +2109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55CG.json b/data/chips/STM32WBA55CG.json index 586d379..9c4350e 100644 --- a/data/chips/STM32WBA55CG.json +++ b/data/chips/STM32WBA55CG.json @@ -1870,7 +1870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2032,7 +2032,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2109,7 +2109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55HE.json b/data/chips/STM32WBA55HE.json index 11b2566..c5ddc33 100644 --- a/data/chips/STM32WBA55HE.json +++ b/data/chips/STM32WBA55HE.json @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2142,7 +2142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55HG.json b/data/chips/STM32WBA55HG.json index 51a44ac..87a205d 100644 --- a/data/chips/STM32WBA55HG.json +++ b/data/chips/STM32WBA55HG.json @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2142,7 +2142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55UE.json b/data/chips/STM32WBA55UE.json index 93f2da1..aad798e 100644 --- a/data/chips/STM32WBA55UE.json +++ b/data/chips/STM32WBA55UE.json @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2218,7 +2218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55UG.json b/data/chips/STM32WBA55UG.json index 18b119c..d30028f 100644 --- a/data/chips/STM32WBA55UG.json +++ b/data/chips/STM32WBA55UG.json @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2218,7 +2218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL54CC.json b/data/chips/STM32WL54CC.json index c127805..03bd8fb 100644 --- a/data/chips/STM32WL54CC.json +++ b/data/chips/STM32WL54CC.json @@ -2116,7 +2116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2253,7 +2253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2330,7 +2330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2407,7 +2407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4691,7 +4691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4828,7 +4828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4905,7 +4905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL54JC.json b/data/chips/STM32WL54JC.json index ebd0c36..e44dbb9 100644 --- a/data/chips/STM32WL54JC.json +++ b/data/chips/STM32WL54JC.json @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2639,7 +2639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2716,7 +2716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2798,7 +2798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5308,7 +5308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5465,7 +5465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5542,7 +5542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5624,7 +5624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL55CC.json b/data/chips/STM32WL55CC.json index 4a9e13a..c77d79c 100644 --- a/data/chips/STM32WL55CC.json +++ b/data/chips/STM32WL55CC.json @@ -2122,7 +2122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2259,7 +2259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4697,7 +4697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4834,7 +4834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4911,7 +4911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4988,7 +4988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL55JC.json b/data/chips/STM32WL55JC.json index 0c47fd9..791cb00 100644 --- a/data/chips/STM32WL55JC.json +++ b/data/chips/STM32WL55JC.json @@ -2488,7 +2488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2645,7 +2645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2722,7 +2722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5548,7 +5548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5630,7 +5630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4C8.json b/data/chips/STM32WLE4C8.json index 56af0ba..af1bc50 100644 --- a/data/chips/STM32WLE4C8.json +++ b/data/chips/STM32WLE4C8.json @@ -1904,7 +1904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4CB.json b/data/chips/STM32WLE4CB.json index cc38b6b..a1552ce 100644 --- a/data/chips/STM32WLE4CB.json +++ b/data/chips/STM32WLE4CB.json @@ -1904,7 +1904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4CC.json b/data/chips/STM32WLE4CC.json index 328c7fb..fc98013 100644 --- a/data/chips/STM32WLE4CC.json +++ b/data/chips/STM32WLE4CC.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2216,7 +2216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4J8.json b/data/chips/STM32WLE4J8.json index 1ba399b..3b6705a 100644 --- a/data/chips/STM32WLE4J8.json +++ b/data/chips/STM32WLE4J8.json @@ -2270,7 +2270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2427,7 +2427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4JB.json b/data/chips/STM32WLE4JB.json index 6c0da8d..0a7623f 100644 --- a/data/chips/STM32WLE4JB.json +++ b/data/chips/STM32WLE4JB.json @@ -2270,7 +2270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2427,7 +2427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4JC.json b/data/chips/STM32WLE4JC.json index 74c7864..8a6a5d6 100644 --- a/data/chips/STM32WLE4JC.json +++ b/data/chips/STM32WLE4JC.json @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2679,7 +2679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5C8.json b/data/chips/STM32WLE5C8.json index 5dd1285..adc6f76 100644 --- a/data/chips/STM32WLE5C8.json +++ b/data/chips/STM32WLE5C8.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2216,7 +2216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5CB.json b/data/chips/STM32WLE5CB.json index d2fa22c..b19c75d 100644 --- a/data/chips/STM32WLE5CB.json +++ b/data/chips/STM32WLE5CB.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2216,7 +2216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5CC.json b/data/chips/STM32WLE5CC.json index 3d6a2ab..e948dc0 100644 --- a/data/chips/STM32WLE5CC.json +++ b/data/chips/STM32WLE5CC.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2216,7 +2216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5J8.json b/data/chips/STM32WLE5J8.json index 387a844..58790c1 100644 --- a/data/chips/STM32WLE5J8.json +++ b/data/chips/STM32WLE5J8.json @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2679,7 +2679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5JB.json b/data/chips/STM32WLE5JB.json index 73d5b80..d2b5674 100644 --- a/data/chips/STM32WLE5JB.json +++ b/data/chips/STM32WLE5JB.json @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2679,7 +2679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5JC.json b/data/chips/STM32WLE5JC.json index 7a341b1..2c58ce8 100644 --- a/data/chips/STM32WLE5JC.json +++ b/data/chips/STM32WLE5JC.json @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2679,7 +2679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/registers/timer_l0.json b/data/registers/timer_l0.json index 92b61bd..e1d6bd3 100644 --- a/data/registers/timer_l0.json +++ b/data/registers/timer_l0.json @@ -1,7 +1,7 @@ { "block/TIM_1CH": { "extends": "TIM_CORE", - "description": "Virtual 1-channel timers", + "description": "1-channel timers", "items": [ { "name": "CR1", @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -77,6 +77,13 @@ "extends": "TIM_1CH", "description": "2-channel timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_2CH" + }, { "name": "CR2", "description": "control register 2", @@ -87,7 +94,7 @@ "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_2CH" }, { "name": "DIER", @@ -108,71 +115,87 @@ "access": "Write", "bit_size": 16, "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", + "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_4CH" }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_TRIGDMA" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_4CH" + }, + { + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_4CH" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_4CH" }, { "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", + "description": "capture/compare mode register 1-2 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 72, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 76 } ] }, "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", + "extends": "TIM_CORE", "description": "Basic timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ + "fieldset": "CR2_MMS" + }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" + "fieldset": "DIER_UPDMA" } ] }, "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", + "description": "Virtual timer for common parts of all timers", "items": [ { "name": "CR1", @@ -221,99 +244,6 @@ } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", - "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, - { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_GP16" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_GP16" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_GP16" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 72, - "fieldset": "DCR_GP16" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" - } - ] - }, "fieldset/ARR_CORE": { "description": "auto-reload register", "fields": [ @@ -326,77 +256,6 @@ ] }, "fieldset/CCER_1CH": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_GP16": { "description": "capture/compare enable register", "fields": [ { @@ -432,45 +291,7 @@ ] }, "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", + "description": "capture/compare mode register (input mode)", "fields": [ { "name": "CCS", @@ -507,55 +328,7 @@ ] }, "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "CCS", @@ -601,9 +374,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -658,6 +431,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -691,43 +489,27 @@ "description": "Auto-reload preload enable", "bit_offset": 7, "bit_size": 1 - }, - { - "name": "UIFREMAP", - "description": "UIF status bit remapping enable", - "bit_offset": 11, - "bit_size": 1 } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", + "fields": [] + }, + "fieldset/CR2_CCDMA": { + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "CCDS" } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -736,17 +518,11 @@ "bit_offset": 4, "bit_size": 3, "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -755,19 +531,6 @@ "bit_offset": 4, "bit_size": 3, "enum": "MMS" - } - ] - }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", - "description": "control register 2", - "fields": [ - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" }, { "name": "TI1S", @@ -778,7 +541,7 @@ } ] }, - "fieldset/DCR_GP16": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -801,11 +564,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -815,16 +578,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -833,15 +586,24 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", + "description": "DMA/Interrupt enable register", + "fields": [] + }, + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 + "name": "CCDE", + "description": "Capture/Compare x (x=1-4) DMA request enable", + "bit_offset": 9, + "bit_size": 1, + "array": { + "len": 4, + "stride": 1 + } } ] }, @@ -856,36 +618,10 @@ } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1-4) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "TDE", "description": "Trigger DMA request enable", @@ -894,14 +630,15 @@ } ] }, - "fieldset/DMAR_GP16": { - "description": "DMA address for full transfer", + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "DMAB", - "description": "DMA register for burst accesses", - "bit_offset": 0, - "bit_size": 16 + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, + "bit_size": 1 } ] }, @@ -911,11 +648,11 @@ "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -925,16 +662,6 @@ "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -954,29 +681,7 @@ } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", - "description": "event generation register", - "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, - "bit_size": 1 - } - ] - }, - "fieldset/SMCR_GP16": { + "fieldset/SMCR_2CH": { "description": "slave mode control register", "fields": [ { @@ -1029,27 +734,37 @@ } ] }, + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", + "description": "slave mode control register", + "fields": [] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [] + }, "fieldset/SR_1CH": { "extends": "SR_CORE", "description": "status register", "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1059,34 +774,19 @@ "extends": "SR_1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, + "fieldset/SR_4CH": { + "extends": "SR_2CH", + "description": "status register", + "fields": [] + }, "fieldset/SR_CORE": { "description": "status register", "fields": [ @@ -1098,38 +798,6 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - } - ] - }, "enum/CCDS": { "bit_size": 1, "variants": [ diff --git a/data/registers/timer_v1.json b/data/registers/timer_v1.json index 7c2ea9f..8e75607 100644 --- a/data/registers/timer_v1.json +++ b/data/registers/timer_v1.json @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -79,27 +79,40 @@ } ] }, - "block/TIM_1CH_CMP": { + "block/TIM_2CH": { "extends": "TIM_1CH", - "description": "1-channel with one complementary output timers", + "description": "2-channel timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_2CH" + }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_1CH_CMP" + "fieldset": "CR2_2CH" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_2CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_1CH_CMP" + "fieldset": "DIER_2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_1CH_CMP" + "fieldset": "SR_2CH" }, { "name": "EGR", @@ -107,74 +120,120 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_1CH_CMP" + "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_32BIT": { + "extends": "TIM_4CH", + "description": "General purpose 32-bit timers", + "items": [ + { + "name": "CNT", + "description": "counter", + "byte_offset": 36 }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_1CH_CMP" + "name": "ARR", + "description": "auto-reload register", + "byte_offset": 44 }, { - "name": "RCR", - "description": "repetition counter register", - "byte_offset": 48, + "name": "CCR", + "description": "capture/compare register x (x=1-4)", + "array": { + "len": 4, + "stride": 4 + }, + "byte_offset": 52 + } + ] + }, + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", + "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, "bit_size": 16, - "fieldset": "RCR_1CH_CMP" + "fieldset": "CR1_4CH" }, { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_TRIGDMA" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_4CH" + }, + { + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_4CH" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_4CH" + }, + { + "name": "CCMR_Output", + "description": "capture/compare mode register 1-2 (output mode)", + "array": { + "len": 2, + "stride": 4 + }, + "byte_offset": 24, + "fieldset": "CCMR_Output_4CH" }, { "name": "DCR", "description": "DMA control register", "byte_offset": 72, - "fieldset": "DCR_1CH_CMP" + "fieldset": "DCR_CCDMA" }, { "name": "DMAR", "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" + "byte_offset": 76 }, { "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_1CH_CMP" + "fieldset": "AF1_4CH" } ] }, - "block/TIM_2CH": { + "block/TIM_ADV1CH": { "extends": "TIM_1CH", - "description": "2-channel timers", + "description": "1-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_2CH" + "fieldset": "CR2_ADV1CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH" + "fieldset": "DIER_ADV1CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH" + "fieldset": "SR_ADV1CH" }, { "name": "EGR", @@ -182,79 +241,73 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_2CH" + "fieldset": "EGR_ADV1CH" }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CCER", + "description": "capture/compare enable register", + "byte_offset": 32, + "fieldset": "CCER_ADV1CH" }, { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "name": "RCR", + "description": "repetition counter register", + "byte_offset": 48, + "bit_size": 16, + "fieldset": "RCR_ADV1CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "BDTR", + "description": "break and dead-time register", + "byte_offset": 68, + "fieldset": "BDTR_ADV1CH" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 72, + "fieldset": "DCR_CCDMA" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_2CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 76 + }, + { + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_ADV1CH" } ] }, - "block/TIM_2CH_CMP": { - "extends": "TIM_1CH_CMP", + "block/TIM_ADV2CH": { + "extends": "TIM_ADV1CH", "description": "2-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH_CMP" + "fieldset": "CR2_ADV2CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_2CH" + "fieldset": "SMCR_TRIGDMA" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH_CMP" + "fieldset": "DIER_ADV2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH_CMP" + "fieldset": "SR_ADV2CH" }, { "name": "EGR", @@ -262,60 +315,12 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_2CH_CMP" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_1CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_1CH" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH_CMP" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_2CH" + "fieldset": "EGR_ADV2CH" } ] }, - "block/TIM_ADV": { - "extends": "TIM_2CH_CMP", + "block/TIM_ADV4CH": { + "extends": "TIM_ADV2CH", "description": "Advanced Control timers", "items": [ { @@ -323,49 +328,31 @@ "description": "control register 1", "byte_offset": 0, "bit_size": 16, - "fieldset": "CR1_GP16" + "fieldset": "CR1_4CH" }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_ADV" + "fieldset": "CR2_ADV4CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_ADV4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_ADV" + "fieldset": "DIER_ADV4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_ADV" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_ADV" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "fieldset": "SR_ADV4CH" }, { "name": "CCMR_Output", @@ -375,53 +362,26 @@ "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_ADV" + "fieldset": "CCMR_Output_4CH" }, { "name": "RCR", "description": "repetition counter register", "byte_offset": 48, "bit_size": 16, - "fieldset": "RCR_ADV" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_ADV" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76 + "fieldset": "RCR_ADV4CH" }, { - "name": "CCMR3", - "description": "capture/compare mode register 3", + "name": "CCMR3_Output", + "description": "capture/compare mode register 3 (output mode)", "byte_offset": 84, - "fieldset": "CCMR3_ADV" + "fieldset": "CCMR3_Output_ADV4CH" }, { "name": "CCR5", "description": "capture/compare register 5", "byte_offset": 88, - "fieldset": "CCR5_ADV" + "fieldset": "CCR5_ADV4CH" }, { "name": "CCR6", @@ -433,48 +393,36 @@ "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_ADV" + "fieldset": "AF1_ADV4CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_ADV" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_GP16" + "fieldset": "AF2_ADV4CH" } ] }, "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", + "extends": "TIM_CORE", "description": "Basic timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ + "fieldset": "CR2_MMS" + }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" + "fieldset": "DIER_UPDMA" } ] }, "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", + "description": "Virtual timer for common parts of all timers", "items": [ { "name": "CR1", @@ -523,137 +471,18 @@ } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", - "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, + "fieldset/AF1_4CH": { + "description": "alternate function register 1", + "fields": [ { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_GP16" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_GP16" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_GP16" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 72, - "fieldset": "DCR_1CH_CMP" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_GP16" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_GP16" - } - ] - }, - "block/TIM_GP32": { - "extends": "TIM_GP16", - "description": "General purpose 32-bit timers", - "items": [ - { - "name": "CNT", - "description": "counter", - "byte_offset": 36 - }, - { - "name": "ARR", - "description": "auto-reload register", - "byte_offset": 44 - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52 + "name": "ETRSEL", + "description": "etr_in source selection", + "bit_offset": 14, + "bit_size": 4 } ] }, - "fieldset/AF1_1CH_CMP": { + "fieldset/AF1_ADV1CH": { "description": "alternate function register 1", "fields": [ { @@ -698,19 +527,8 @@ } ] }, - "fieldset/AF1_ADV": { - "extends": "AF1_1CH_CMP", - "description": "alternate function register 1", - "fields": [ - { - "name": "ETRSEL", - "description": "etr_in source selection", - "bit_offset": 14, - "bit_size": 4 - } - ] - }, - "fieldset/AF1_GP16": { + "fieldset/AF1_ADV4CH": { + "extends": "AF1_ADV1CH", "description": "alternate function register 1", "fields": [ { @@ -721,7 +539,8 @@ } ] }, - "fieldset/AF2_ADV": { + "fieldset/AF2_ADV4CH": { + "extends": "AF2_CCDMA", "description": "alternate function register 2", "fields": [ { @@ -732,12 +551,12 @@ }, { "name": "BK2CMPE", - "description": "TIM_BRK2_CMPx (x=1-8) enable", + "description": "TIM_BRK2_CMPx (x=1-2) enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 8 + "len": 2, + "stride": 1 } }, { @@ -766,6 +585,10 @@ } ] }, + "fieldset/AF2_CCDMA": { + "description": "alternate function register 2", + "fields": [] + }, "fieldset/ARR_CORE": { "description": "auto-reload register", "fields": [ @@ -777,7 +600,7 @@ } ] }, - "fieldset/BDTR_1CH_CMP": { + "fieldset/BDTR_ADV1CH": { "description": "break and dead-time register", "fields": [ { @@ -809,21 +632,21 @@ }, { "name": "BKE", - "description": "Break x (x=1) enable", + "description": "Break x (x=1,2) enable", "bit_offset": 12, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 } }, { "name": "BKP", - "description": "Break x (x=1) polarity", + "description": "Break x (x=1,2) polarity", "bit_offset": 13, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 }, "enum": "BKP" @@ -840,44 +663,6 @@ "bit_offset": 15, "bit_size": 1 }, - { - "name": "BKF", - "description": "Break x (x=1) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 1, - "stride": 4 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/BDTR_ADV": { - "extends": "BDTR_1CH_CMP", - "description": "break and dead-time register", - "fields": [ - { - "name": "BKE", - "description": "Break x (x=1,2) enable", - "bit_offset": 12, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - } - }, - { - "name": "BKP", - "description": "Break x (x=1,2) polarity", - "bit_offset": 13, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - }, - "enum": "BKP" - }, { "name": "BKF", "description": "Break x (x=1,2) filter", @@ -896,376 +681,157 @@ "fields": [ { "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", + "description": "Capture/Compare x (x=1-4) output enable", "bit_offset": 0, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } }, { "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", + "description": "Capture/Compare x (x=1-4) output Polarity", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } }, { "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", + "description": "Capture/Compare x (x=1-4) output Polarity", "bit_offset": 3, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } } ] }, - "fieldset/CCER_1CH_CMP": { + "fieldset/CCER_ADV1CH": { "extends": "CCER_1CH", "description": "capture/compare enable register", "fields": [ { "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", + "description": "Capture/Compare x (x=1-3) complementary output enable", "bit_offset": 2, "bit_size": 1, "array": { - "len": 1, + "len": 3, "stride": 4 } } ] }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", + "fieldset/CCMR3_Output_ADV4CH": { + "description": "capture/compare mode register 3", "fields": [ { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, + "name": "OCFE", + "description": "Output compare x (x=5,6) fast enable", + "bit_offset": 2, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } }, { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, + "name": "OCPE", + "description": "Output compare x (x=5,6) preload enable", + "bit_offset": 3, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } }, { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, + "name": "OCM", + "description": "Output compare x (x=5,6) mode", + "bit_offset": 4, + "bit_size": 3, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "OCM" + }, + { + "name": "OCCE", + "description": "Output compare x (x=5,6) clear enable", + "bit_offset": 7, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } } ] }, - "fieldset/CCER_2CH_CMP": { - "extends": "CCER_2CH", - "description": "capture/compare enable register", + "fieldset/CCMR_Input_1CH": { + "description": "capture/compare mode register (input mode)", "fields": [ { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", + "name": "CCS", + "description": "Capture/Compare y selection", + "bit_offset": 0, + "bit_size": 2, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "CCMR_Input_CCS" + }, + { + "name": "ICPSC", + "description": "Input capture y prescaler", "bit_offset": 2, - "bit_size": 1, + "bit_size": 2, "array": { - "len": 1, - "stride": 4 + "len": 2, + "stride": 8 } + }, + { + "name": "ICF", + "description": "Input capture y filter", + "bit_offset": 4, + "bit_size": 4, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "FilterValue" } ] }, - "fieldset/CCER_ADV": { - "extends": "CCER_2CH_CMP", - "description": "capture/compare enable register", + "fieldset/CCMR_Output_1CH": { + "description": "capture/compare mode register (output mode)", "fields": [ { - "name": "CCE", - "description": "Capture/Compare x (x=1-6) output enable", + "name": "CCS", + "description": "Capture/Compare y selection", "bit_offset": 0, - "bit_size": 1, + "bit_size": 2, "array": { - "len": 6, - "stride": 4 - } + "len": 2, + "stride": 8 + }, + "enum": "CCMR_Output_CCS" }, { - "name": "CCP", - "description": "Capture/Compare x (x=1-6) output Polarity", - "bit_offset": 1, + "name": "OCFE", + "description": "Output compare y fast enable", + "bit_offset": 2, "bit_size": 1, "array": { - "len": 6, - "stride": 4 - } - }, - { - "name": "CCNE", - "description": "Capture/Compare x (x=1-3) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 3, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_GP16": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-4) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - } - ] - }, - "fieldset/CCMR3_ADV": { - "description": "capture/compare mode register 3", - "fields": [ - { - "name": "OCFE", - "description": "Output compare x (x=5,6) fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare x (x=5,6) preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare x (x=5,6) mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "OCM" - }, - { - "name": "OCCE", - "description": "Output compare x (x=5,6) clear enable", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 + "len": 2, + "stride": 8 } }, { @@ -1291,9 +857,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -1307,7 +873,7 @@ } ] }, - "fieldset/CCR5_ADV": { + "fieldset/CCR5_ADV4CH": { "extends": "CCR_1CH", "description": "capture/compare register 5", "fields": [ @@ -1365,6 +931,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -1407,34 +998,21 @@ } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "TI1S", + "description": "TI1 selection", + "bit_offset": 7, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "TI1S" } ] }, - "fieldset/CR2_1CH_CMP": { + "fieldset/CR2_ADV1CH": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -1449,36 +1027,30 @@ "bit_offset": 2, "bit_size": 1 }, - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" - }, { "name": "OIS", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x (x=1-6)", "bit_offset": 8, "bit_size": 1, "array": { - "len": 1, + "len": 6, "stride": 2 } }, { "name": "OISN", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x N x (x=1-4)", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 2 } } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_ADV2CH": { + "extends": "CR2_ADV1CH", "description": "control register 2", "fields": [ { @@ -1497,70 +1069,32 @@ } ] }, - "fieldset/CR2_2CH_CMP": { - "extends": "CR2_1CH_CMP", + "fieldset/CR2_ADV4CH": { + "extends": "CR2_ADV2CH", "description": "control register 2", "fields": [ { - "name": "MMS", - "description": "Master mode selection", - "bit_offset": 4, - "bit_size": 3, - "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" - }, - { - "name": "OIS", - "description": "Output Idle state x (x=1,2)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 2, - "stride": 2 - } + "name": "MMS2", + "description": "Master mode selection 2", + "bit_offset": 20, + "bit_size": 4, + "enum": "MMS2" } ] }, - "fieldset/CR2_ADV": { - "extends": "CR2_2CH_CMP", + "fieldset/CR2_CCDMA": { "description": "control register 2", "fields": [ { - "name": "OIS", - "description": "Output Idle state x (x=1-6)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 6, - "stride": 2 - } - }, - { - "name": "OISN", - "description": "Output Idle state x N x (x=1-4)", - "bit_offset": 9, + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, "bit_size": 1, - "array": { - "len": 4, - "stride": 2 - } - }, - { - "name": "MMS2", - "description": "Master mode selection 2", - "bit_offset": 20, - "bit_size": 4, - "enum": "MMS2" + "enum": "CCDS" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -1572,8 +1106,8 @@ } ] }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_2CH", "description": "control register 2", "fields": [ { @@ -1582,17 +1116,10 @@ "bit_offset": 3, "bit_size": 1, "enum": "CCDS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/DCR_1CH_CMP": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -1615,45 +1142,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/DIER_1CH_CMP": { - "extends": "DIER_1CH", - "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "COMIE", - "description": "COM interrupt enable", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIE", - "description": "Break interrupt enable", - "bit_offset": 7, - "bit_size": 1 - }, - { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1663,16 +1156,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -1681,32 +1164,13 @@ } ] }, - "fieldset/DIER_2CH_CMP": { - "extends": "DIER_1CH_CMP", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "COMDE", - "description": "COM DMA request enable", - "bit_offset": 13, - "bit_size": 1 - }, - { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, - "bit_size": 1 - } - ] + "fields": [] }, - "fieldset/DIER_ADV": { - "extends": "DIER_2CH_CMP", + "fieldset/DIER_ADV1CH": { + "extends": "DIER_UPDMA", "description": "DMA/Interrupt enable register", "fields": [ { @@ -1719,6 +1183,18 @@ "stride": 1 } }, + { + "name": "COMIE", + "description": "COM interrupt enable", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "BIE", + "description": "Break interrupt enable", + "bit_offset": 7, + "bit_size": 1 + }, { "name": "CCDE", "description": "Capture/Compare x (x=1-4) DMA request enable", @@ -1731,152 +1207,100 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_ADV2CH": { + "extends": "DIER_ADV1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, + "name": "COMDE", + "description": "COM DMA request enable", + "bit_offset": 13, "bit_size": 1 - } - ] - }, - "fieldset/DIER_CORE": { - "description": "DMA/Interrupt enable register", - "fields": [ + }, { - "name": "UIE", - "description": "Update interrupt enable", - "bit_offset": 0, + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, "bit_size": 1 } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_ADV4CH": { + "extends": "DIER_ADV2CH", + "description": "DMA/Interrupt enable register", + "fields": [] + }, + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, { "name": "CCDE", "description": "Capture/Compare x (x=1-4) DMA request enable", "bit_offset": 9, "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, - "bit_size": 1 + "array": { + "len": 4, + "stride": 1 + } } ] }, - "fieldset/DMAR_GP16": { - "description": "DMA address for full transfer", + "fieldset/DIER_CORE": { + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "DMAB", - "description": "DMA register for burst accesses", + "name": "UIE", + "description": "Update interrupt enable", "bit_offset": 0, - "bit_size": 16 + "bit_size": 1 } ] }, - "fieldset/EGR_1CH": { - "extends": "EGR_CORE", - "description": "event generation register", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, + "bit_size": 1 } ] }, - "fieldset/EGR_1CH_CMP": { - "extends": "EGR_1CH", - "description": "event generation register", + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "COMG", - "description": "Capture/Compare control update generation", - "bit_offset": 5, + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, "bit_size": 1 - }, - { - "name": "BG", - "description": "Break x (x=1) generation", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } } ] }, - "fieldset/EGR_2CH": { - "extends": "EGR_1CH", + "fieldset/EGR_1CH": { + "extends": "EGR_CORE", "description": "event generation register", "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 2, + "len": 4, "stride": 1 } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, - "bit_size": 1 } ] }, - "fieldset/EGR_2CH_CMP": { - "extends": "EGR_1CH_CMP", + "fieldset/EGR_2CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1,2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -1885,19 +1309,15 @@ } ] }, - "fieldset/EGR_ADV": { - "extends": "EGR_2CH_CMP", + "fieldset/EGR_ADV1CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } + "name": "COMG", + "description": "Capture/Compare control update generation", + "bit_offset": 5, + "bit_size": 1 }, { "name": "BG", @@ -1911,40 +1331,30 @@ } ] }, - "fieldset/EGR_CORE": { + "fieldset/EGR_ADV2CH": { + "extends": "EGR_ADV1CH", "description": "event generation register", "fields": [ { - "name": "UG", - "description": "Update generation", - "bit_offset": 0, + "name": "TG", + "description": "Trigger generation", + "bit_offset": 6, "bit_size": 1 } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", + "fieldset/EGR_CORE": { "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "UG", + "description": "Update generation", + "bit_offset": 0, "bit_size": 1 } ] }, - "fieldset/RCR_1CH_CMP": { + "fieldset/RCR_ADV1CH": { "description": "repetition counter register", "fields": [ { @@ -1955,7 +1365,7 @@ } ] }, - "fieldset/RCR_ADV": { + "fieldset/RCR_ADV4CH": { "description": "repetition counter register", "fields": [ { @@ -2010,8 +1420,8 @@ } ] }, - "fieldset/SMCR_GP16": { - "extends": "SMCR_2CH", + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", "description": "slave mode control register", "fields": [ { @@ -2043,78 +1453,73 @@ } ] }, + "fieldset/SMCR_ADV4CH": { + "extends": "SMCR_4CH", + "description": "slave mode control register", + "fields": [] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [] + }, "fieldset/SR_1CH": { "extends": "SR_CORE", "description": "status register", "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } ] }, - "fieldset/SR_1CH_CMP": { + "fieldset/SR_2CH": { "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "COMIF", - "description": "COM interrupt flag", - "bit_offset": 5, + "name": "TIF", + "description": "Trigger interrupt flag", + "bit_offset": 6, "bit_size": 1 - }, - { - "name": "BIF", - "description": "Break x (x=1) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } } ] }, - "fieldset/SR_2CH": { + "fieldset/SR_4CH": { + "extends": "SR_2CH", + "description": "status register", + "fields": [] + }, + "fieldset/SR_ADV1CH": { "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, + "name": "COMIF", + "description": "COM interrupt flag", + "bit_offset": 5, "bit_size": 1 }, { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, + "name": "BIF", + "description": "Break x (x=1,2) interrupt flag", + "bit_offset": 7, "bit_size": 1, "array": { "len": 2, @@ -2123,72 +1528,22 @@ } ] }, - "fieldset/SR_2CH_CMP": { - "extends": "SR_1CH_CMP", + "fieldset/SR_ADV2CH": { + "extends": "SR_ADV1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1,2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1,2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, - "fieldset/SR_ADV": { - "extends": "SR_2CH_CMP", + "fieldset/SR_ADV4CH": { + "extends": "SR_ADV2CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "BIF", - "description": "Break x (x=1,2) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "SBIF", "description": "System break interrupt flag", @@ -2220,70 +1575,7 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - } - ] - }, "fieldset/TISEL_1CH": { - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_2CH": { - "extends": "TISEL_1CH", - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1-2) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_GP16": { "description": "input selection register", "fields": [ { diff --git a/data/registers/timer_v2.json b/data/registers/timer_v2.json index 918d05e..fde1969 100644 --- a/data/registers/timer_v2.json +++ b/data/registers/timer_v2.json @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -68,9 +68,9 @@ }, { "name": "CCR_DITHER", - "description": "capture/compare register x (x=1) (Dither mode enabled)", + "description": "capture/compare register x (x=1-4) (dither mode enabled)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -89,90 +89,17 @@ } ] }, - "block/TIM_1CH_CMP": { + "block/TIM_2CH": { "extends": "TIM_1CH", - "description": "1-channel with one complementary output timers", + "description": "2-channel timers", "items": [ { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_1CH_CMP" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_1CH_CMP" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_1CH_CMP" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_1CH_CMP" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_1CH_CMP" - }, - { - "name": "RCR", - "description": "repetition counter register", - "byte_offset": 48, + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, "bit_size": 16, - "fieldset": "RCR_1CH_CMP" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" - }, - { - "name": "DTR2", - "description": "break and dead-time register", - "byte_offset": 84, - "fieldset": "DTR2_1CH_CMP" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_1CH_CMP" - }, - { - "name": "AF2", - "description": "alternate function register 2", - "byte_offset": 100, - "fieldset": "AF2_1CH_CMP" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 988, - "fieldset": "DCR_1CH_CMP" + "fieldset": "CR1_2CH" }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 992 - } - ] - }, - "block/TIM_2CH": { - "extends": "TIM_1CH", - "description": "2-channel timers", - "items": [ { "name": "CR2", "description": "control register 2", @@ -204,191 +131,153 @@ "access": "Write", "bit_size": 16, "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_32BIT": { + "extends": "TIM_4CH", + "description": "General purpose 32-bit timers", + "items": [ + { + "name": "CNT", + "description": "counter", + "byte_offset": 36 }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CNT_DITHER", + "description": "counter (dither mode enabled)", + "byte_offset": 36, + "fieldset": "CNT_DITHER_32BIT" }, { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "name": "ARR", + "description": "auto-reload register", + "byte_offset": 44 }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "ARR_DITHER", + "description": "auto-reload register (dither mode enabled)", + "byte_offset": 44, + "fieldset": "ARR_DITHER_32BIT" }, { "name": "CCR", - "description": "capture/compare register x (x=1-2) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 2, + "len": 4, "stride": 4 }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "byte_offset": 52 }, { "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-2) (Dither mode enabled)", + "description": "capture/compare register x (x=1-4) (dither mode enabled)", "array": { - "len": 2, + "len": 4, "stride": 4 }, "byte_offset": 52, - "fieldset": "CCR_DITHER_1CH" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_2CH" + "fieldset": "CCR_DITHER_32BIT" } ] }, - "block/TIM_2CH_CMP": { - "extends": "TIM_1CH_CMP", - "description": "2-channel with one complementary output timers", + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_4CH" + }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH_CMP" + "fieldset": "CR2_TRIGDMA" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_2CH_CMP" + "fieldset": "SMCR_4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH_CMP" + "fieldset": "DIER_4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH_CMP" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_2CH_CMP" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_1CH" + "fieldset": "SR_4CH" }, { "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", + "description": "capture/compare mode register 1-2 (output mode)", "array": { "len": 2, "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_1CH" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH_CMP" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 988, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 992 }, { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-2) (Dither mode enabled)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_DITHER_1CH" + "name": "ECR", + "description": "encoder control register", + "byte_offset": 88, + "fieldset": "ECR_4CH" }, { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_4CH" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_2CH" + "name": "AF2", + "description": "alternate function register 2", + "byte_offset": 100, + "fieldset": "AF2_CCDMA" } ] }, - "block/TIM_ADV": { - "extends": "TIM_2CH_CMP", - "description": "Advanced Control timers", + "block/TIM_ADV1CH": { + "extends": "TIM_1CH", + "description": "1-channel with one complementary output timers", "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_ADV" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_ADV" + "fieldset": "CR2_ADV1CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_ADV" + "fieldset": "DIER_ADV1CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_ADV" + "fieldset": "SR_ADV1CH" }, { "name": "EGR", @@ -396,158 +285,85 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_ADV" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" + "fieldset": "EGR_ADV1CH" }, { "name": "CCER", "description": "capture/compare enable register", "byte_offset": 32, - "fieldset": "CCER_ADV" + "fieldset": "CCER_ADV1CH" }, { "name": "RCR", "description": "repetition counter register", "byte_offset": 48, "bit_size": 16, - "fieldset": "RCR_ADV" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "ECR", - "description": "encoder control register", - "byte_offset": 88, - "fieldset": "ECR_GP16" + "fieldset": "RCR_ADV1CH" }, { "name": "BDTR", "description": "break and dead-time register", "byte_offset": 68, - "fieldset": "BDTR_ADV" + "fieldset": "BDTR_ADV1CH" }, { - "name": "CCR5", - "description": "capture/compare register 5 (Dither mode disabled)", - "byte_offset": 72, - "fieldset": "CCR5_ADV" + "name": "DTR2", + "description": "break and dead-time register", + "byte_offset": 84, + "fieldset": "DTR2_ADV1CH" }, { - "name": "CCR5_DITHER", - "description": "capture/compare register 5 (Dither mode enabled)", - "byte_offset": 72, - "fieldset": "CCR5_DITHER_ADV" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 988, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR6", - "description": "capture/compare register 6 (Dither mode disabled)", - "byte_offset": 76, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 992 }, { - "name": "CCR6_DITHER", - "description": "capture/compare register 6 (Dither mode enabled)", - "byte_offset": 76, - "fieldset": "CCR_DITHER_1CH" - }, - { - "name": "CCMR3", - "description": "capture/compare mode register 3", - "byte_offset": 80, - "fieldset": "CCMR3_ADV" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_ADV" + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_ADV1CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_ADV" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_GP16" + "fieldset": "AF2_CCDMA" } ] }, - "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", - "description": "Basic timers", + "block/TIM_ADV2CH": { + "extends": "TIM_ADV1CH", + "description": "2-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" - } - ] - }, - "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", - "items": [ + "fieldset": "CR2_ADV2CH" + }, { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_CORE" + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_TRIGDMA" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_CORE" + "fieldset": "DIER_ADV2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_CORE" + "fieldset": "SR_ADV2CH" }, { "name": "EGR", @@ -555,86 +371,44 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_CORE" - }, - { - "name": "CNT", - "description": "counter", - "byte_offset": 36, - "fieldset": "CNT_CORE" - }, - { - "name": "PSC", - "description": "prescaler", - "byte_offset": 40, - "bit_size": 16 - }, - { - "name": "ARR", - "description": "auto-reload register (Dither mode disabled)", - "byte_offset": 44, - "fieldset": "ARR_CORE" - }, - { - "name": "ARR_DITHER", - "description": "auto-reload register (Dither mode enabled)", - "byte_offset": 44, - "fieldset": "ARR_DITHER_CORE" + "fieldset": "EGR_ADV2CH" } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", + "block/TIM_ADV4CH": { + "extends": "TIM_ADV2CH", + "description": "Advanced Control timers", "items": [ { "name": "CR1", "description": "control register 1", "byte_offset": 0, "bit_size": 16, - "fieldset": "CR1_GP16" + "fieldset": "CR1_4CH" }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_GP16" + "fieldset": "CR2_ADV4CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_ADV4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_GP16" + "fieldset": "DIER_ADV4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "fieldset": "SR_ADV4CH" }, { "name": "CCMR_Output", @@ -644,119 +418,151 @@ "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" + "name": "RCR", + "description": "repetition counter register", + "byte_offset": 48, + "bit_size": 16, + "fieldset": "RCR_ADV4CH" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-4) (Dither mode disabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, + "name": "CCMR3_Output", + "description": "capture/compare mode register 3 (output mode)", + "byte_offset": 80, + "fieldset": "CCMR3_Output_ADV4CH" + }, + { + "name": "CCR5", + "description": "capture/compare register 5", + "byte_offset": 72, + "fieldset": "CCR5_ADV4CH" + }, + { + "name": "CCR5_DITHER", + "description": "capture/compare register 5 (dither mode enabled)", + "byte_offset": 72, + "fieldset": "CCR5_DITHER_ADV4CH" + }, + { + "name": "CCR6", + "description": "capture/compare register 6", + "byte_offset": 76, "fieldset": "CCR_1CH" }, { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-4) (Dither mode enabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, + "name": "CCR6_DITHER", + "description": "capture/compare register 6 (dither mode enabled)", + "byte_offset": 76, "fieldset": "CCR_DITHER_1CH" }, { "name": "ECR", "description": "encoder control register", "byte_offset": 88, - "fieldset": "ECR_GP16" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 988, - "fieldset": "DCR_1CH_CMP" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 992 + "fieldset": "ECR_4CH" }, { "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_GP16" + "fieldset": "AF1_ADV4CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_1CH_CMP" + "fieldset": "AF2_ADV4CH" + } + ] + }, + "block/TIM_BASIC": { + "extends": "TIM_CORE", + "description": "Basic timers", + "items": [ + { + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_MMS" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_GP16" + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_UPDMA" } ] }, - "block/TIM_GP32": { - "extends": "TIM_GP16", - "description": "General purpose 32-bit timers", + "block/TIM_CORE": { + "description": "Virtual timer for common parts of all timers", "items": [ { - "name": "CNT", - "description": "counter (Dither mode disabled)", - "byte_offset": 36 + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_CORE" }, { - "name": "CNT_DITHER", - "description": "counter (Dither mode enbled)", + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_CORE" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_CORE" + }, + { + "name": "EGR", + "description": "event generation register", + "byte_offset": 20, + "access": "Write", + "bit_size": 16, + "fieldset": "EGR_CORE" + }, + { + "name": "CNT", + "description": "counter", "byte_offset": 36, - "fieldset": "CNT_DITHER_GP32" + "fieldset": "CNT_CORE" }, { - "name": "ARR", - "description": "auto-reload register (Dither mode disabled)", - "byte_offset": 44 + "name": "PSC", + "description": "prescaler", + "byte_offset": 40, + "bit_size": 16 }, { - "name": "ARR_DITHER", - "description": "auto-reload register (Dither mode enabled)", + "name": "ARR", + "description": "auto-reload register", "byte_offset": 44, - "fieldset": "ARR_DITHER_GP32" + "fieldset": "ARR_CORE" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-4) (Dither mode disabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52 - }, + "name": "ARR_DITHER", + "description": "auto-reload register (dither mode enabled)", + "byte_offset": 44, + "fieldset": "ARR_DITHER_CORE" + } + ] + }, + "fieldset/AF1_4CH": { + "description": "alternate function register 1", + "fields": [ { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-4) (Dither mode enabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_DITHER_GP32" + "name": "ETRSEL", + "description": "etr_in source selection", + "bit_offset": 14, + "bit_size": 4 } ] }, - "fieldset/AF1_1CH_CMP": { + "fieldset/AF1_ADV1CH": { "description": "alternate function register 1", "fields": [ { @@ -784,7 +590,7 @@ }, { "name": "BKCMPP", - "description": "TIM_BRK_CMPx (x=1-4) input polarity", + "description": "TIM_BRK_CMPx (x=1-3) input polarity", "bit_offset": 10, "bit_size": 1, "array": { @@ -795,19 +601,8 @@ } ] }, - "fieldset/AF1_ADV": { - "extends": "AF1_1CH_CMP", - "description": "alternate function register 1", - "fields": [ - { - "name": "ETRSEL", - "description": "etr_in source selection", - "bit_offset": 14, - "bit_size": 4 - } - ] - }, - "fieldset/AF1_GP16": { + "fieldset/AF1_ADV4CH": { + "extends": "AF1_ADV1CH", "description": "alternate function register 1", "fields": [ { @@ -818,19 +613,8 @@ } ] }, - "fieldset/AF2_1CH_CMP": { - "description": "alternate function register 2", - "fields": [ - { - "name": "OCRSEL", - "description": "ocref_clr source selection", - "bit_offset": 16, - "bit_size": 3 - } - ] - }, - "fieldset/AF2_ADV": { - "extends": "AF2_1CH_CMP", + "fieldset/AF2_ADV4CH": { + "extends": "AF2_CCDMA", "description": "alternate function register 2", "fields": [ { @@ -869,8 +653,19 @@ } ] }, + "fieldset/AF2_CCDMA": { + "description": "alternate function register 2", + "fields": [ + { + "name": "OCRSEL", + "description": "ocref_clr source selection", + "bit_offset": 16, + "bit_size": 3 + } + ] + }, "fieldset/ARR_CORE": { - "description": "auto-reload register (Dither mode disabled)", + "description": "auto-reload register", "fields": [ { "name": "ARR", @@ -880,7 +675,7 @@ } ] }, - "fieldset/ARR_DITHER_CORE": { + "fieldset/ARR_DITHER_32BIT": { "description": "auto-reload register (Dither mode enabled)", "fields": [ { @@ -893,11 +688,11 @@ "name": "ARR", "description": "Auto-reload value", "bit_offset": 4, - "bit_size": 16 + "bit_size": 28 } ] }, - "fieldset/ARR_DITHER_GP32": { + "fieldset/ARR_DITHER_CORE": { "description": "auto-reload register (Dither mode enabled)", "fields": [ { @@ -910,11 +705,11 @@ "name": "ARR", "description": "Auto-reload value", "bit_offset": 4, - "bit_size": 28 + "bit_size": 16 } ] }, - "fieldset/BDTR_1CH_CMP": { + "fieldset/BDTR_ADV1CH": { "description": "break and dead-time register", "fields": [ { @@ -946,21 +741,21 @@ }, { "name": "BKE", - "description": "Break x (x=1) enable", + "description": "Break x (x=1,2) enable", "bit_offset": 12, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 } }, { "name": "BKP", - "description": "Break x (x=1) polarity", + "description": "Break x (x=1,2) polarity", "bit_offset": 13, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 }, "enum": "BKP" @@ -978,250 +773,41 @@ "bit_size": 1 }, { - "name": "BKF", - "description": "Break x (x=1) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 1, - "stride": 4 - }, - "enum": "FilterValue" - }, - { - "name": "BKDSRM", - "description": "Break x (x=1) Disarm", - "bit_offset": 26, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - }, - "enum": "BKDSRM" - }, - { - "name": "BKBID", - "description": "Break x (x=1) bidirectional", - "bit_offset": 28, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - }, - "enum": "BKBID" - } - ] - }, - "fieldset/BDTR_ADV": { - "extends": "BDTR_1CH_CMP", - "description": "break and dead-time register", - "fields": [ - { - "name": "BKE", - "description": "Break x (x=1,2) enable", - "bit_offset": 12, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - } - }, - { - "name": "BKP", - "description": "Break x (x=1,2) polarity", - "bit_offset": 13, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - }, - "enum": "BKP" - }, - { - "name": "BKF", - "description": "Break x (x=1,2) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 2, - "stride": 4 - }, - "enum": "FilterValue" - }, - { - "name": "BKDSRM", - "description": "Break x (x=1,2) Disarm", - "bit_offset": 26, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - }, - "enum": "BKDSRM" - }, - { - "name": "BKBID", - "description": "Break x (x=1,2) bidirectional", - "bit_offset": 28, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - }, - "enum": "BKBID" - } - ] - }, - "fieldset/CCER_1CH": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_1CH_CMP": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH_CMP": { - "extends": "CCER_2CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_ADV": { - "extends": "CCER_2CH_CMP", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-6) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 6, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-6) output Polarity", - "bit_offset": 1, - "bit_size": 1, + "name": "BKF", + "description": "Break x (x=1,2) filter", + "bit_offset": 16, + "bit_size": 4, "array": { - "len": 6, + "len": 2, "stride": 4 - } + }, + "enum": "FilterValue" }, { - "name": "CCNE", - "description": "Capture/Compare x (x=1-4) complementary output enable", - "bit_offset": 2, + "name": "BKDSRM", + "description": "Break x (x=1,2) Disarm", + "bit_offset": 26, "bit_size": 1, "array": { - "len": 4, - "stride": 4 - } + "len": 2, + "stride": 1 + }, + "enum": "BKDSRM" }, { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, + "name": "BKBID", + "description": "Break x (x=1,2) bidirectional", + "bit_offset": 28, "bit_size": 1, "array": { - "len": 4, - "stride": 4 - } + "len": 2, + "stride": 1 + }, + "enum": "BKBID" } ] }, - "fieldset/CCER_GP16": { + "fieldset/CCER_1CH": { "description": "capture/compare enable register", "fields": [ { @@ -1256,7 +842,23 @@ } ] }, - "fieldset/CCMR3_ADV": { + "fieldset/CCER_ADV1CH": { + "extends": "CCER_1CH", + "description": "capture/compare enable register", + "fields": [ + { + "name": "CCNE", + "description": "Capture/Compare x (x=1-4) complementary output enable", + "bit_offset": 2, + "bit_size": 1, + "array": { + "len": 4, + "stride": 4 + } + } + ] + }, + "fieldset/CCMR3_Output_ADV4CH": { "description": "capture/compare mode register 3", "fields": [ { @@ -1312,45 +914,7 @@ ] }, "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", + "description": "capture/compare mode register (input mode)", "fields": [ { "name": "CCS", @@ -1387,64 +951,7 @@ ] }, "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": [ - { - "start": 4, - "end": 6 - }, - { - "start": 16, - "end": 16 - } - ], - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "CCS", @@ -1499,9 +1006,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -1515,9 +1022,9 @@ } ] }, - "fieldset/CCR5_ADV": { + "fieldset/CCR5_ADV4CH": { "extends": "CCR_1CH", - "description": "capture/compare register 5 (Dither mode disabled)", + "description": "capture/compare register 5", "fields": [ { "name": "GC5C", @@ -1532,9 +1039,9 @@ } ] }, - "fieldset/CCR5_DITHER_ADV": { + "fieldset/CCR5_DITHER_ADV4CH": { "extends": "CCR_DITHER_1CH", - "description": "capture/compare register 5 (Dither mode enabled)", + "description": "capture/compare register 5", "fields": [ { "name": "GC5C", @@ -1550,7 +1057,7 @@ ] }, "fieldset/CCR_1CH": { - "description": "capture/compare register x (x=1-4,6) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4,6)", "fields": [ { "name": "CCR", @@ -1577,7 +1084,7 @@ } ] }, - "fieldset/CCR_DITHER_GP32": { + "fieldset/CCR_DITHER_32BIT": { "description": "capture/compare register x (x=1-4,6) (Dither mode enabled)", "fields": [ { @@ -1611,8 +1118,8 @@ } ] }, - "fieldset/CNT_DITHER_GP32": { - "description": "counter (Dither mode enabled)", + "fieldset/CNT_DITHER_32BIT": { + "description": "counter (dither mode enabled)", "fields": [ { "name": "CNT", @@ -1641,6 +1148,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -1689,34 +1221,21 @@ } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "TI1S", + "description": "TI1 selection", + "bit_offset": 7, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "TI1S" } ] }, - "fieldset/CR2_1CH_CMP": { + "fieldset/CR2_ADV1CH": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -1731,36 +1250,30 @@ "bit_offset": 2, "bit_size": 1 }, - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" - }, { "name": "OIS", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x (x=1-6)", "bit_offset": 8, "bit_size": 1, "array": { - "len": 1, + "len": 6, "stride": 2 } }, { "name": "OISN", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x N x (x=1-4)", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 2 } } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_ADV2CH": { + "extends": "CR2_ADV1CH", "description": "control register 2", "fields": [ { @@ -1788,79 +1301,32 @@ } ] }, - "fieldset/CR2_2CH_CMP": { - "extends": "CR2_1CH_CMP", + "fieldset/CR2_ADV4CH": { + "extends": "CR2_ADV2CH", "description": "control register 2", "fields": [ { - "name": "MMS", - "description": "Master mode selection", - "bit_offset": [ - { - "start": 4, - "end": 6 - }, - { - "start": 25, - "end": 25 - } - ], + "name": "MMS2", + "description": "Master mode selection 2", + "bit_offset": 20, "bit_size": 4, - "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" - }, - { - "name": "OIS", - "description": "Output Idle state x (x=1,2)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 2, - "stride": 2 - } + "enum": "MMS2" } ] }, - "fieldset/CR2_ADV": { - "extends": "CR2_2CH_CMP", + "fieldset/CR2_CCDMA": { "description": "control register 2", "fields": [ { - "name": "OIS", - "description": "Output Idle state x (x=1-6)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 6, - "stride": 2 - } - }, - { - "name": "OISN", - "description": "Output Idle state x N x (x=1-4)", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 2 - } - }, - { - "name": "MMS2", - "description": "Master mode selection 2", - "bit_offset": 20, - "bit_size": 4, - "enum": "MMS2" + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, + "bit_size": 1, + "enum": "CCDS" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -1881,8 +1347,8 @@ } ] }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_2CH", "description": "control register 2", "fields": [ { @@ -1891,17 +1357,10 @@ "bit_offset": 3, "bit_size": 1, "enum": "CCDS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/DCR_1CH_CMP": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -1931,45 +1390,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/DIER_1CH_CMP": { - "extends": "DIER_1CH", - "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "COMIE", - "description": "COM interrupt enable", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIE", - "description": "Break interrupt enable", - "bit_offset": 7, - "bit_size": 1 - }, - { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1979,16 +1404,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -1997,32 +1412,38 @@ } ] }, - "fieldset/DIER_2CH_CMP": { - "extends": "DIER_1CH_CMP", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, + "name": "IDXIE", + "description": "Index interrupt enable", + "bit_offset": 20, "bit_size": 1 }, { - "name": "COMDE", - "description": "COM DMA request enable", - "bit_offset": 13, + "name": "DIRIE", + "description": "Direction change interrupt enable", + "bit_offset": 21, "bit_size": 1 }, { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, + "name": "IERRIE", + "description": "Index error interrupt enable", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "TERRIE", + "description": "Transition error interrupt enable", + "bit_offset": 23, "bit_size": 1 } ] }, - "fieldset/DIER_ADV": { - "extends": "DIER_2CH_CMP", + "fieldset/DIER_ADV1CH": { + "extends": "DIER_UPDMA", "description": "DMA/Interrupt enable register", "fields": [ { @@ -2035,6 +1456,12 @@ "stride": 1 } }, + { + "name": "COMIE", + "description": "COM interrupt enable", + "bit_offset": 5, + "bit_size": 1 + }, { "name": "BIE", "description": "Break interrupt enable", @@ -2043,14 +1470,38 @@ }, { "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", + "description": "Capture/Compare x (x=1-4) DMA request enable", "bit_offset": 9, "bit_size": 1, "array": { "len": 4, "stride": 1 } + } + ] + }, + "fieldset/DIER_ADV2CH": { + "extends": "DIER_ADV1CH", + "description": "DMA/Interrupt enable register", + "fields": [ + { + "name": "COMDE", + "description": "COM DMA request enable", + "bit_offset": 13, + "bit_size": 1 }, + { + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, + "bit_size": 1 + } + ] + }, + "fieldset/DIER_ADV4CH": { + "extends": "DIER_ADV2CH", + "description": "DMA/Interrupt enable register", + "fields": [ { "name": "IDXIE", "description": "Index interrupt enable", @@ -2077,15 +1528,19 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 + "name": "CCDE", + "description": "Capture/Compare x (x=1-4) DMA request enable", + "bit_offset": 9, + "bit_size": 1, + "array": { + "len": 4, + "stride": 1 + } } ] }, @@ -2100,69 +1555,31 @@ } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1-4) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "TDE", "description": "Trigger DMA request enable", "bit_offset": 14, "bit_size": 1 - }, - { - "name": "IDXIE", - "description": "Index interrupt enable", - "bit_offset": 20, - "bit_size": 1 - }, - { - "name": "DIRIE", - "description": "Direction change interrupt enable", - "bit_offset": 21, - "bit_size": 1 - }, - { - "name": "IERRIE", - "description": "Index error interrupt enable", - "bit_offset": 22, - "bit_size": 1 - }, + } + ] + }, + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", + "fields": [ { - "name": "TERRIE", - "description": "Transition error interrupt enable", - "bit_offset": 23, + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, "bit_size": 1 } ] }, - "fieldset/DTR2_1CH_CMP": { + "fieldset/DTR2_ADV1CH": { "description": "deadtime register 2", "fields": [ { @@ -2186,7 +1603,7 @@ } ] }, - "fieldset/ECR_GP16": { + "fieldset/ECR_4CH": { "description": "encoder control register", "fields": [ { @@ -2242,33 +1659,11 @@ "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/EGR_1CH_CMP": { - "extends": "EGR_1CH", - "description": "event generation register", - "fields": [ - { - "name": "COMG", - "description": "Capture/Compare control update generation", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BG", - "description": "Break x (x=1) generation", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -2278,16 +1673,6 @@ "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -2296,41 +1681,15 @@ } ] }, - "fieldset/EGR_2CH_CMP": { - "extends": "EGR_1CH_CMP", + "fieldset/EGR_ADV1CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1,2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "COMG", + "description": "Capture/Compare control update generation", + "bit_offset": 5, "bit_size": 1 - } - ] - }, - "fieldset/EGR_ADV": { - "extends": "EGR_2CH_CMP", - "description": "event generation register", - "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } }, { "name": "BG", @@ -2344,40 +1703,30 @@ } ] }, - "fieldset/EGR_CORE": { + "fieldset/EGR_ADV2CH": { + "extends": "EGR_ADV1CH", "description": "event generation register", "fields": [ { - "name": "UG", - "description": "Update generation", - "bit_offset": 0, + "name": "TG", + "description": "Trigger generation", + "bit_offset": 6, "bit_size": 1 } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", + "fieldset/EGR_CORE": { "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "UG", + "description": "Update generation", + "bit_offset": 0, "bit_size": 1 } ] }, - "fieldset/RCR_1CH_CMP": { + "fieldset/RCR_ADV1CH": { "description": "repetition counter register", "fields": [ { @@ -2388,7 +1737,7 @@ } ] }, - "fieldset/RCR_ADV": { + "fieldset/RCR_ADV4CH": { "description": "repetition counter register", "fields": [ { @@ -2443,29 +1792,10 @@ } ] }, - "fieldset/SMCR_2CH_CMP": { - "extends": "SMCR_2CH", - "description": "slave mode control register", - "fields": [ - { - "name": "SMSPE", - "description": "SMS preload enable", - "bit_offset": 24, - "bit_size": 1 - } - ] - }, - "fieldset/SMCR_ADV": { - "extends": "SMCR_2CH_CMP", + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", "description": "slave mode control register", "fields": [ - { - "name": "OCCS", - "description": "OCREF clear selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "OCCS" - }, { "name": "ETF", "description": "External trigger filter", @@ -2502,49 +1832,28 @@ } ] }, - "fieldset/SMCR_GP16": { - "extends": "SMCR_2CH", + "fieldset/SMCR_ADV4CH": { + "extends": "SMCR_4CH", "description": "slave mode control register", "fields": [ { - "name": "ETF", - "description": "External trigger filter", - "bit_offset": 8, - "bit_size": 4, - "enum": "FilterValue" - }, - { - "name": "ETPS", - "description": "External trigger prescaler", - "bit_offset": 12, - "bit_size": 2, - "enum": "ETPS" - }, - { - "name": "ECE", - "description": "External clock mode 2 enable", - "bit_offset": 14, - "bit_size": 1 - }, - { - "name": "ETP", - "description": "External trigger polarity", - "bit_offset": 15, + "name": "OCCS", + "description": "OCREF clear selection", + "bit_offset": 3, "bit_size": 1, - "enum": "ETP" - }, + "enum": "OCCS" + } + ] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [ { "name": "SMSPE", "description": "SMS preload enable", "bit_offset": 24, "bit_size": 1 - }, - { - "name": "SMSPS", - "description": "SMS preload source", - "bit_offset": 25, - "bit_size": 1, - "enum": "SMSPS" } ] }, @@ -2554,43 +1863,21 @@ "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/SR_1CH_CMP": { - "extends": "SR_1CH", - "description": "status register", - "fields": [ - { - "name": "COMIF", - "description": "COM interrupt flag", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIF", - "description": "Break x (x=1) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -2600,79 +1887,53 @@ "extends": "SR_1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, - "fieldset/SR_2CH_CMP": { - "extends": "SR_1CH_CMP", + "fieldset/SR_4CH": { + "extends": "SR_2CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1,2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } + "name": "IDXIF", + "description": "Index interrupt flag", + "bit_offset": 20, + "bit_size": 1 }, { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, + "name": "DIRIF", + "description": "Direction change interrupt flag", + "bit_offset": 21, "bit_size": 1 }, { - "name": "CCOF", - "description": "Capture/Compare x (x=1,2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } + "name": "IERRIF", + "description": "Index error interrupt flag", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "TERRIF", + "description": "Transition error interrupt flag", + "bit_offset": 23, + "bit_size": 1 } ] }, - "fieldset/SR_ADV": { - "extends": "SR_2CH_CMP", + "fieldset/SR_ADV1CH": { + "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } + "name": "COMIF", + "description": "COM interrupt flag", + "bit_offset": 5, + "bit_size": 1 }, { "name": "BIF", @@ -2683,17 +1944,25 @@ "len": 2, "stride": 1 } - }, + } + ] + }, + "fieldset/SR_ADV2CH": { + "extends": "SR_ADV1CH", + "description": "status register", + "fields": [ { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, + "name": "TIF", + "description": "Trigger interrupt flag", + "bit_offset": 6, + "bit_size": 1 + } + ] + }, + "fieldset/SR_ADV4CH": { + "extends": "SR_ADV2CH", + "description": "status register", + "fields": [ { "name": "SBIF", "description": "System break interrupt flag", @@ -2749,94 +2018,7 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "IDXIF", - "description": "Index interrupt flag", - "bit_offset": 20, - "bit_size": 1 - }, - { - "name": "DIRIF", - "description": "Direction change interrupt flag", - "bit_offset": 21, - "bit_size": 1 - }, - { - "name": "IERRIF", - "description": "Index error interrupt flag", - "bit_offset": 22, - "bit_size": 1 - }, - { - "name": "TERRIF", - "description": "Transition error interrupt flag", - "bit_offset": 23, - "bit_size": 1 - } - ] - }, "fieldset/TISEL_1CH": { - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_2CH": { - "extends": "TISEL_1CH", - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1-2) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_GP16": { "description": "input selection register", "fields": [ {