diff --git a/data/chips/STM32U535CB.json b/data/chips/STM32U535CB.json index 4656296..2dad1cb 100644 --- a/data/chips/STM32U535CB.json +++ b/data/chips/STM32U535CB.json @@ -1429,6 +1429,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535CC.json b/data/chips/STM32U535CC.json index c7800ee..864d48f 100644 --- a/data/chips/STM32U535CC.json +++ b/data/chips/STM32U535CC.json @@ -1429,6 +1429,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535CE.json b/data/chips/STM32U535CE.json index 9f9cceb..663171b 100644 --- a/data/chips/STM32U535CE.json +++ b/data/chips/STM32U535CE.json @@ -1429,6 +1429,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535JE.json b/data/chips/STM32U535JE.json index df81b5b..ce32d57 100644 --- a/data/chips/STM32U535JE.json +++ b/data/chips/STM32U535JE.json @@ -699,6 +699,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535NC.json b/data/chips/STM32U535NC.json index 238c81f..18a2b02 100644 --- a/data/chips/STM32U535NC.json +++ b/data/chips/STM32U535NC.json @@ -595,6 +595,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535NE.json b/data/chips/STM32U535NE.json index fcc4421..2de756c 100644 --- a/data/chips/STM32U535NE.json +++ b/data/chips/STM32U535NE.json @@ -595,6 +595,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535RB.json b/data/chips/STM32U535RB.json index fd1ad6a..3d28d76 100644 --- a/data/chips/STM32U535RB.json +++ b/data/chips/STM32U535RB.json @@ -1871,6 +1871,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535RC.json b/data/chips/STM32U535RC.json index caaf0a6..07ea28d 100644 --- a/data/chips/STM32U535RC.json +++ b/data/chips/STM32U535RC.json @@ -1871,6 +1871,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535RE.json b/data/chips/STM32U535RE.json index 3f1dd0a..516166d 100644 --- a/data/chips/STM32U535RE.json +++ b/data/chips/STM32U535RE.json @@ -1871,6 +1871,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535VC.json b/data/chips/STM32U535VC.json index f22e535..142488d 100644 --- a/data/chips/STM32U535VC.json +++ b/data/chips/STM32U535VC.json @@ -2757,6 +2757,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U535VE.json b/data/chips/STM32U535VE.json index 741b0f6..504a5fb 100644 --- a/data/chips/STM32U535VE.json +++ b/data/chips/STM32U535VE.json @@ -2757,6 +2757,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U545CE.json b/data/chips/STM32U545CE.json index 4f42cb8..13444f1 100644 --- a/data/chips/STM32U545CE.json +++ b/data/chips/STM32U545CE.json @@ -1468,6 +1468,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U545JE.json b/data/chips/STM32U545JE.json index d3907c0..951c3ce 100644 --- a/data/chips/STM32U545JE.json +++ b/data/chips/STM32U545JE.json @@ -738,6 +738,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U545NE.json b/data/chips/STM32U545NE.json index 372aca5..7b518f2 100644 --- a/data/chips/STM32U545NE.json +++ b/data/chips/STM32U545NE.json @@ -634,6 +634,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U545RE.json b/data/chips/STM32U545RE.json index 1a710e8..a1a8e51 100644 --- a/data/chips/STM32U545RE.json +++ b/data/chips/STM32U545RE.json @@ -1910,6 +1910,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U545VE.json b/data/chips/STM32U545VE.json index 1fe5a23..1305229 100644 --- a/data/chips/STM32U545VE.json +++ b/data/chips/STM32U545VE.json @@ -2796,6 +2796,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575AG.json b/data/chips/STM32U575AG.json index db4fbc8..d27ebb1 100644 --- a/data/chips/STM32U575AG.json +++ b/data/chips/STM32U575AG.json @@ -2762,6 +2762,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2816,6 +2821,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575AI.json b/data/chips/STM32U575AI.json index 0960179..3ae86bb 100644 --- a/data/chips/STM32U575AI.json +++ b/data/chips/STM32U575AI.json @@ -2762,6 +2762,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2816,6 +2821,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575CG.json b/data/chips/STM32U575CG.json index 32e5eba..189eb89 100644 --- a/data/chips/STM32U575CG.json +++ b/data/chips/STM32U575CG.json @@ -1802,6 +1802,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1848,6 +1853,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575CI.json b/data/chips/STM32U575CI.json index 68defc3..490fa83 100644 --- a/data/chips/STM32U575CI.json +++ b/data/chips/STM32U575CI.json @@ -1802,6 +1802,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1848,6 +1853,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575OG.json b/data/chips/STM32U575OG.json index 043e19b..384f968 100644 --- a/data/chips/STM32U575OG.json +++ b/data/chips/STM32U575OG.json @@ -1232,6 +1232,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1282,6 +1287,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575OI.json b/data/chips/STM32U575OI.json index 79fd6f7..0512cfc 100644 --- a/data/chips/STM32U575OI.json +++ b/data/chips/STM32U575OI.json @@ -1232,6 +1232,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1282,6 +1287,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575QG.json b/data/chips/STM32U575QG.json index e6c34d7..b393663 100644 --- a/data/chips/STM32U575QG.json +++ b/data/chips/STM32U575QG.json @@ -2318,6 +2318,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2372,6 +2377,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575QI.json b/data/chips/STM32U575QI.json index 462d922..8642e10 100644 --- a/data/chips/STM32U575QI.json +++ b/data/chips/STM32U575QI.json @@ -2318,6 +2318,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2372,6 +2377,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575RG.json b/data/chips/STM32U575RG.json index d67aa3b..1164e4b 100644 --- a/data/chips/STM32U575RG.json +++ b/data/chips/STM32U575RG.json @@ -1464,6 +1464,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1518,6 +1523,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575RI.json b/data/chips/STM32U575RI.json index b59a002..d04525d 100644 --- a/data/chips/STM32U575RI.json +++ b/data/chips/STM32U575RI.json @@ -1464,6 +1464,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1518,6 +1523,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575VG.json b/data/chips/STM32U575VG.json index 87ce54b..c136faa 100644 --- a/data/chips/STM32U575VG.json +++ b/data/chips/STM32U575VG.json @@ -1918,6 +1918,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1972,6 +1977,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575VI.json b/data/chips/STM32U575VI.json index dac5889..f0d130e 100644 --- a/data/chips/STM32U575VI.json +++ b/data/chips/STM32U575VI.json @@ -1918,6 +1918,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1972,6 +1977,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575ZG.json b/data/chips/STM32U575ZG.json index 0358ef8..ac09e8d 100644 --- a/data/chips/STM32U575ZG.json +++ b/data/chips/STM32U575ZG.json @@ -2462,6 +2462,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2516,6 +2521,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U575ZI.json b/data/chips/STM32U575ZI.json index 60f7982..5fdaf57 100644 --- a/data/chips/STM32U575ZI.json +++ b/data/chips/STM32U575ZI.json @@ -2462,6 +2462,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2516,6 +2521,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U585AI.json b/data/chips/STM32U585AI.json index e58baf5..f0cd880 100644 --- a/data/chips/STM32U585AI.json +++ b/data/chips/STM32U585AI.json @@ -2807,6 +2807,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2861,6 +2866,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U585CI.json b/data/chips/STM32U585CI.json index 3fb97a0..b62dd30 100644 --- a/data/chips/STM32U585CI.json +++ b/data/chips/STM32U585CI.json @@ -1847,6 +1847,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1893,6 +1898,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U585OI.json b/data/chips/STM32U585OI.json index 6d218e1..efaeb29 100644 --- a/data/chips/STM32U585OI.json +++ b/data/chips/STM32U585OI.json @@ -1277,6 +1277,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1327,6 +1332,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U585QI.json b/data/chips/STM32U585QI.json index d49eb9a..139996e 100644 --- a/data/chips/STM32U585QI.json +++ b/data/chips/STM32U585QI.json @@ -2363,6 +2363,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2417,6 +2422,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U585RI.json b/data/chips/STM32U585RI.json index cec49f9..87c8e47 100644 --- a/data/chips/STM32U585RI.json +++ b/data/chips/STM32U585RI.json @@ -1509,6 +1509,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1563,6 +1568,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U585VI.json b/data/chips/STM32U585VI.json index e6859c7..4877055 100644 --- a/data/chips/STM32U585VI.json +++ b/data/chips/STM32U585VI.json @@ -1963,6 +1963,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2017,6 +2022,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U585ZI.json b/data/chips/STM32U585ZI.json index 9f1a049..60c178d 100644 --- a/data/chips/STM32U585ZI.json +++ b/data/chips/STM32U585ZI.json @@ -2507,6 +2507,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2561,6 +2566,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595AI.json b/data/chips/STM32U595AI.json index 60ee02b..b7f2eaf 100644 --- a/data/chips/STM32U595AI.json +++ b/data/chips/STM32U595AI.json @@ -2506,6 +2506,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2560,6 +2565,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595AJ.json b/data/chips/STM32U595AJ.json index 2beef65..3dff4b2 100644 --- a/data/chips/STM32U595AJ.json +++ b/data/chips/STM32U595AJ.json @@ -2506,6 +2506,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2560,6 +2565,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595QI.json b/data/chips/STM32U595QI.json index 611ead5..65dc386 100644 --- a/data/chips/STM32U595QI.json +++ b/data/chips/STM32U595QI.json @@ -2062,6 +2062,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2116,6 +2121,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595QJ.json b/data/chips/STM32U595QJ.json index 73c86cd..a414196 100644 --- a/data/chips/STM32U595QJ.json +++ b/data/chips/STM32U595QJ.json @@ -2062,6 +2062,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2116,6 +2121,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595RI.json b/data/chips/STM32U595RI.json index 1723dd6..7161260 100644 --- a/data/chips/STM32U595RI.json +++ b/data/chips/STM32U595RI.json @@ -1198,6 +1198,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1252,6 +1257,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595RJ.json b/data/chips/STM32U595RJ.json index 1baf68d..09775ba 100644 --- a/data/chips/STM32U595RJ.json +++ b/data/chips/STM32U595RJ.json @@ -1198,6 +1198,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1252,6 +1257,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595VI.json b/data/chips/STM32U595VI.json index 01abc0b..c91256a 100644 --- a/data/chips/STM32U595VI.json +++ b/data/chips/STM32U595VI.json @@ -1652,6 +1652,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1706,6 +1711,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595VJ.json b/data/chips/STM32U595VJ.json index 402ffbc..dc9f460 100644 --- a/data/chips/STM32U595VJ.json +++ b/data/chips/STM32U595VJ.json @@ -1652,6 +1652,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1706,6 +1711,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595ZI.json b/data/chips/STM32U595ZI.json index ac21bc9..93b99a5 100644 --- a/data/chips/STM32U595ZI.json +++ b/data/chips/STM32U595ZI.json @@ -3112,6 +3112,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -3166,6 +3171,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U595ZJ.json b/data/chips/STM32U595ZJ.json index 17a81cc..22d3dac 100644 --- a/data/chips/STM32U595ZJ.json +++ b/data/chips/STM32U595ZJ.json @@ -3112,6 +3112,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -3166,6 +3171,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U599BJ.json b/data/chips/STM32U599BJ.json index 7a35582..e6f9d87 100644 --- a/data/chips/STM32U599BJ.json +++ b/data/chips/STM32U599BJ.json @@ -1720,6 +1720,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1774,6 +1779,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U599NI.json b/data/chips/STM32U599NI.json index 85c452d..33318fa 100644 --- a/data/chips/STM32U599NI.json +++ b/data/chips/STM32U599NI.json @@ -1768,6 +1768,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1822,6 +1827,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U599NJ.json b/data/chips/STM32U599NJ.json index 7afe61b..acf1968 100644 --- a/data/chips/STM32U599NJ.json +++ b/data/chips/STM32U599NJ.json @@ -1768,6 +1768,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1822,6 +1827,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U599VI.json b/data/chips/STM32U599VI.json index 56646f7..bc7633c 100644 --- a/data/chips/STM32U599VI.json +++ b/data/chips/STM32U599VI.json @@ -1022,6 +1022,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1068,6 +1073,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U599VJ.json b/data/chips/STM32U599VJ.json index 96007b8..73885d0 100644 --- a/data/chips/STM32U599VJ.json +++ b/data/chips/STM32U599VJ.json @@ -1652,6 +1652,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1706,6 +1711,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U599ZI.json b/data/chips/STM32U599ZI.json index 073d886..0d18ce9 100644 --- a/data/chips/STM32U599ZI.json +++ b/data/chips/STM32U599ZI.json @@ -2242,6 +2242,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2296,6 +2301,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U599ZJ.json b/data/chips/STM32U599ZJ.json index 92605da..2ce2eac 100644 --- a/data/chips/STM32U599ZJ.json +++ b/data/chips/STM32U599ZJ.json @@ -2242,6 +2242,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2296,6 +2301,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A5AJ.json b/data/chips/STM32U5A5AJ.json index 390a07e..d185fe6 100644 --- a/data/chips/STM32U5A5AJ.json +++ b/data/chips/STM32U5A5AJ.json @@ -2545,6 +2545,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2599,6 +2604,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A5QI.json b/data/chips/STM32U5A5QI.json index d501d0e..19e6021 100644 --- a/data/chips/STM32U5A5QI.json +++ b/data/chips/STM32U5A5QI.json @@ -1303,6 +1303,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1357,6 +1362,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A5QJ.json b/data/chips/STM32U5A5QJ.json index c7c33a1..5490349 100644 --- a/data/chips/STM32U5A5QJ.json +++ b/data/chips/STM32U5A5QJ.json @@ -2101,6 +2101,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2155,6 +2160,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A5RJ.json b/data/chips/STM32U5A5RJ.json index 4a7665f..dbf22c9 100644 --- a/data/chips/STM32U5A5RJ.json +++ b/data/chips/STM32U5A5RJ.json @@ -1237,6 +1237,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1291,6 +1296,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A5VJ.json b/data/chips/STM32U5A5VJ.json index 7481d7c..42c3662 100644 --- a/data/chips/STM32U5A5VJ.json +++ b/data/chips/STM32U5A5VJ.json @@ -1691,6 +1691,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1745,6 +1750,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A5ZJ.json b/data/chips/STM32U5A5ZJ.json index cff3b8b..af2e97d 100644 --- a/data/chips/STM32U5A5ZJ.json +++ b/data/chips/STM32U5A5ZJ.json @@ -3151,6 +3151,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -3205,6 +3210,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A9BJ.json b/data/chips/STM32U5A9BJ.json index 1fba75f..b8a487d 100644 --- a/data/chips/STM32U5A9BJ.json +++ b/data/chips/STM32U5A9BJ.json @@ -1759,6 +1759,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1813,6 +1818,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A9NJ.json b/data/chips/STM32U5A9NJ.json index f984bfc..96ef9d8 100644 --- a/data/chips/STM32U5A9NJ.json +++ b/data/chips/STM32U5A9NJ.json @@ -1807,6 +1807,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1861,6 +1866,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A9VJ.json b/data/chips/STM32U5A9VJ.json index 0358048..b511035 100644 --- a/data/chips/STM32U5A9VJ.json +++ b/data/chips/STM32U5A9VJ.json @@ -1061,6 +1061,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1107,6 +1112,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5A9ZJ.json b/data/chips/STM32U5A9ZJ.json index 88e32e9..9b9df56 100644 --- a/data/chips/STM32U5A9ZJ.json +++ b/data/chips/STM32U5A9ZJ.json @@ -2281,6 +2281,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2335,6 +2340,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5F7VI.json b/data/chips/STM32U5F7VI.json index 65434cb..e131073 100644 --- a/data/chips/STM32U5F7VI.json +++ b/data/chips/STM32U5F7VI.json @@ -1658,6 +1658,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1712,6 +1717,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5F7VJ.json b/data/chips/STM32U5F7VJ.json index 9886b8f..39b7259 100644 --- a/data/chips/STM32U5F7VJ.json +++ b/data/chips/STM32U5F7VJ.json @@ -1658,6 +1658,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1712,6 +1717,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5F9BJ.json b/data/chips/STM32U5F9BJ.json index f3d9770..1c1a4f2 100644 --- a/data/chips/STM32U5F9BJ.json +++ b/data/chips/STM32U5F9BJ.json @@ -1726,6 +1726,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1780,6 +1785,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5F9NJ.json b/data/chips/STM32U5F9NJ.json index 4a689e4..6a4680c 100644 --- a/data/chips/STM32U5F9NJ.json +++ b/data/chips/STM32U5F9NJ.json @@ -1774,6 +1774,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1828,6 +1833,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5F9VI.json b/data/chips/STM32U5F9VI.json index 78aa3cf..d85ada5 100644 --- a/data/chips/STM32U5F9VI.json +++ b/data/chips/STM32U5F9VI.json @@ -1016,6 +1016,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1057,6 +1062,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5F9VJ.json b/data/chips/STM32U5F9VJ.json index f8522e6..cd33ae6 100644 --- a/data/chips/STM32U5F9VJ.json +++ b/data/chips/STM32U5F9VJ.json @@ -1016,6 +1016,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1057,6 +1062,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5F9ZI.json b/data/chips/STM32U5F9ZI.json index 756a247..59a3992 100644 --- a/data/chips/STM32U5F9ZI.json +++ b/data/chips/STM32U5F9ZI.json @@ -2158,6 +2158,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2204,6 +2209,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5F9ZJ.json b/data/chips/STM32U5F9ZJ.json index 5850a48..4a659da 100644 --- a/data/chips/STM32U5F9ZJ.json +++ b/data/chips/STM32U5F9ZJ.json @@ -2158,6 +2158,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2204,6 +2209,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5G7VJ.json b/data/chips/STM32U5G7VJ.json index aa0cd72..c77606c 100644 --- a/data/chips/STM32U5G7VJ.json +++ b/data/chips/STM32U5G7VJ.json @@ -1697,6 +1697,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1751,6 +1756,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5G9BJ.json b/data/chips/STM32U5G9BJ.json index b1f2c08..0eae3f0 100644 --- a/data/chips/STM32U5G9BJ.json +++ b/data/chips/STM32U5G9BJ.json @@ -1765,6 +1765,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1819,6 +1824,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5G9NJ.json b/data/chips/STM32U5G9NJ.json index 7da0ff4..41597a1 100644 --- a/data/chips/STM32U5G9NJ.json +++ b/data/chips/STM32U5G9NJ.json @@ -1813,6 +1813,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1867,6 +1872,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5G9VJ.json b/data/chips/STM32U5G9VJ.json index a7204cc..d10ddf5 100644 --- a/data/chips/STM32U5G9VJ.json +++ b/data/chips/STM32U5G9VJ.json @@ -1055,6 +1055,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -1096,6 +1101,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/chips/STM32U5G9ZJ.json b/data/chips/STM32U5G9ZJ.json index 17747e4..041e715 100644 --- a/data/chips/STM32U5G9ZJ.json +++ b/data/chips/STM32U5G9ZJ.json @@ -2197,6 +2197,11 @@ { "name": "COMP1", "address": 1174426624, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", @@ -2243,6 +2248,11 @@ { "name": "COMP2", "address": 1174426628, + "registers": { + "kind": "comp", + "version": "u5", + "block": "COMP" + }, "rcc": { "bus_clock": "PCLK3", "kernel_clock": "PCLK3", diff --git a/data/registers/comp_u0.json b/data/registers/comp_u0.json index 660aa77..100872a 100644 --- a/data/registers/comp_u0.json +++ b/data/registers/comp_u0.json @@ -34,23 +34,23 @@ { "name": "WINMODE", "description": "Comparator 1 noninverting input selector for window mode.", - "bit_offset": 14, + "bit_offset": 11, "bit_size": 1, - "enum": "WINMODE" + "enum": "WindowMode" }, { "name": "WINOUT", "description": "Comparator 1 output selector.", "bit_offset": 14, "bit_size": 1, - "enum": "WINOUT" + "enum": "WindowOut" }, { "name": "POLARITY", "description": "Polarity selection bit.", "bit_offset": 15, "bit_size": 1, - "enum": "POLARITY" + "enum": "Polarity" }, { "name": "HYST", @@ -73,12 +73,6 @@ "bit_size": 5, "enum": "BLANKING" }, - { - "name": "BRGEN", - "description": "Scaler bridge enable.", - "bit_offset": 22, - "bit_size": 1 - }, { "name": "VALUE", "description": "Output status bit.", @@ -149,21 +143,6 @@ } ] }, - "enum/POLARITY": { - "bit_size": 1, - "variants": [ - { - "name": "NotInverted", - "description": "Output is not inverted.", - "value": 0 - }, - { - "name": "Inverted", - "description": "Output is inverted.", - "value": 1 - } - ] - }, "enum/PWRMODE": { "bit_size": 2, "variants": [ @@ -179,17 +158,27 @@ }, { "name": "LowSpeed", - "description": "Low speed / low power.", - "value": 2 - }, - { - "name": "VeryLowSpeed", "description": "Very-low speed / ultra-low power.", "value": 3 } ] }, - "enum/WINMODE": { + "enum/Polarity": { + "bit_size": 1, + "variants": [ + { + "name": "NotInverted", + "description": "Output is not inverted.", + "value": 0 + }, + { + "name": "Inverted", + "description": "Output is inverted.", + "value": 1 + } + ] + }, + "enum/WindowMode": { "bit_size": 1, "variants": [ { @@ -204,7 +193,7 @@ } ] }, - "enum/WINOUT": { + "enum/WindowOut": { "bit_size": 1, "variants": [ { diff --git a/data/registers/comp_u5.json b/data/registers/comp_u5.json new file mode 100644 index 0000000..4fced19 --- /dev/null +++ b/data/registers/comp_u5.json @@ -0,0 +1,247 @@ +{ + "block/COMP": { + "description": "Comparator.", + "items": [ + { + "name": "CSR", + "description": "Comparator control and status register.", + "byte_offset": 0, + "fieldset": "CSR" + } + ] + }, + "fieldset/CSR": { + "description": "control and status register.", + "fields": [ + { + "name": "EN", + "description": "Enable", + "bit_offset": 0, + "bit_size": 1 + }, + { + "name": "INMSEL", + "description": "Input minus selection bits.", + "bit_offset": 4, + "bit_size": 4, + "enum": "INM" + }, + { + "name": "INPSEL", + "description": "Input plus selection bit.", + "bit_offset": 8, + "bit_size": 3 + }, + { + "name": "WINMODE", + "description": "Comparator 1 noninverting input selector for window mode.", + "bit_offset": 11, + "bit_size": 1, + "enum": "WindowMode" + }, + { + "name": "WINOUT", + "description": "Comparator 1 output selector.", + "bit_offset": 14, + "bit_size": 1, + "enum": "WindowOut" + }, + { + "name": "POLARITY", + "description": "Polarity selection bit.", + "bit_offset": 15, + "bit_size": 1, + "enum": "Polarity" + }, + { + "name": "HYST", + "description": "Hysteresis selection bits.", + "bit_offset": 16, + "bit_size": 2, + "enum": "Hysteresis" + }, + { + "name": "PWRMODE", + "description": "Power Mode.", + "bit_offset": 18, + "bit_size": 2, + "enum": "PowerMode" + }, + { + "name": "BLANKSEL", + "description": "Blanking source selection bits.", + "bit_offset": 20, + "bit_size": 5, + "enum": "Blanking" + }, + { + "name": "VALUE", + "description": "Output status bit.", + "bit_offset": 30, + "bit_size": 1 + }, + { + "name": "LOCK", + "description": "Register lock bit.", + "bit_offset": 31, + "bit_size": 1 + } + ] + }, + "enum/Blanking": { + "bit_size": 5, + "variants": [ + { + "name": "NoBlanking", + "description": "No blanking.", + "value": 0 + }, + { + "name": "Blank1", + "description": "Check data sheet for blanking options", + "value": 1 + }, + { + "name": "Blank2", + "description": "Check data sheet for blanking options", + "value": 2 + }, + { + "name": "Blank3", + "description": "Check data sheet for blanking options", + "value": 4 + } + ] + }, + "enum/Hysteresis": { + "bit_size": 2, + "variants": [ + { + "name": "None", + "value": 0 + }, + { + "name": "Low", + "value": 1 + }, + { + "name": "Medium", + "value": 2 + }, + { + "name": "High", + "value": 3 + } + ] + }, + "enum/INM": { + "bit_size": 4, + "variants": [ + { + "name": "QuarterVRef", + "description": "Inverting input set to 1/4 VRef", + "value": 0 + }, + { + "name": "HalfVRef", + "description": "Inverting input set to 1/2 VRef", + "value": 1 + }, + { + "name": "ThreeQuarterVRef", + "description": "Inverting input set to 3/4 VRef", + "value": 2 + }, + { + "name": "VRef", + "description": "Inverting input set to VRef", + "value": 3 + }, + { + "name": "DAC1", + "description": "Inverting input set to DAC1 output", + "value": 4 + }, + { + "name": "DAC2", + "description": "Inverting input set to DAC2 output", + "value": 5 + }, + { + "name": "INM1", + "description": "Inverting input set to IO1 (PB7)", + "value": 6 + }, + { + "name": "INM2", + "description": "Inverting input set to IO2 (PB3)", + "value": 7 + } + ] + }, + "enum/Polarity": { + "bit_size": 1, + "variants": [ + { + "name": "NotInverted", + "description": "Output is not inverted.", + "value": 0 + }, + { + "name": "Inverted", + "description": "Output is inverted.", + "value": 1 + } + ] + }, + "enum/PowerMode": { + "bit_size": 2, + "variants": [ + { + "name": "HighSpeed", + "description": "High speed / full power.", + "value": 0 + }, + { + "name": "MediumSpeed", + "description": "Medium speed / medium power.", + "value": 1 + }, + { + "name": "UltraLow", + "description": "Very-low speed / ultra-low power.", + "value": 3 + } + ] + }, + "enum/WindowMode": { + "bit_size": 1, + "variants": [ + { + "name": "ThisInpsel", + "description": "Signal selected with INPSEL[2:0] bitfield of this register.", + "value": 0 + }, + { + "name": "OtherInpsel", + "description": "Signal selected with INPSEL[2:0] bitfield of the other register (required for window mode).", + "value": 1 + } + ] + }, + "enum/WindowOut": { + "bit_size": 1, + "variants": [ + { + "name": "COMP1_VALUE", + "description": "Comparator 1 value.", + "value": 0 + }, + { + "name": "COMP1_VALUE XOR COMP2_VALUE", + "description": "Comparator 1 value XOR comparator 2 value (required for window mode).", + "value": 1 + } + ] + } +} \ No newline at end of file