diff --git a/data/chips/STM32C011D6.json b/data/chips/STM32C011D6.json index 479fe85..97b0b2a 100644 --- a/data/chips/STM32C011D6.json +++ b/data/chips/STM32C011D6.json @@ -920,7 +920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1187,7 +1187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1279,7 +1279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1376,7 +1376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011F4.json b/data/chips/STM32C011F4.json index 6ce69a7..d412f10 100644 --- a/data/chips/STM32C011F4.json +++ b/data/chips/STM32C011F4.json @@ -1088,7 +1088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1355,7 +1355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1447,7 +1447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1544,7 +1544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011F6.json b/data/chips/STM32C011F6.json index 2e54875..36765c8 100644 --- a/data/chips/STM32C011F6.json +++ b/data/chips/STM32C011F6.json @@ -1088,7 +1088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1355,7 +1355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1447,7 +1447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1544,7 +1544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011J4.json b/data/chips/STM32C011J4.json index 673c2e5..9ec09ed 100644 --- a/data/chips/STM32C011J4.json +++ b/data/chips/STM32C011J4.json @@ -823,7 +823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1045,7 +1045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1132,7 +1132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C011J6.json b/data/chips/STM32C011J6.json index d12330a..bb45ea4 100644 --- a/data/chips/STM32C011J6.json +++ b/data/chips/STM32C011J6.json @@ -823,7 +823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1045,7 +1045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1132,7 +1132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031C4.json b/data/chips/STM32C031C4.json index 5bf3923..e75a50d 100644 --- a/data/chips/STM32C031C4.json +++ b/data/chips/STM32C031C4.json @@ -1561,7 +1561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1908,7 +1908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031C6.json b/data/chips/STM32C031C6.json index d90f7e1..4e41b72 100644 --- a/data/chips/STM32C031C6.json +++ b/data/chips/STM32C031C6.json @@ -1561,7 +1561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1908,7 +1908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031F4.json b/data/chips/STM32C031F4.json index b65864a..2b29283 100644 --- a/data/chips/STM32C031F4.json +++ b/data/chips/STM32C031F4.json @@ -981,7 +981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1248,7 +1248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1340,7 +1340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1437,7 +1437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031F6.json b/data/chips/STM32C031F6.json index b824418..09e28a3 100644 --- a/data/chips/STM32C031F6.json +++ b/data/chips/STM32C031F6.json @@ -981,7 +981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1248,7 +1248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1340,7 +1340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1437,7 +1437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031G4.json b/data/chips/STM32C031G4.json index a18fcd2..bdc7d88 100644 --- a/data/chips/STM32C031G4.json +++ b/data/chips/STM32C031G4.json @@ -1084,7 +1084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1371,7 +1371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1473,7 +1473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1570,7 +1570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031G6.json b/data/chips/STM32C031G6.json index 417858f..4abadd5 100644 --- a/data/chips/STM32C031G6.json +++ b/data/chips/STM32C031G6.json @@ -1084,7 +1084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1371,7 +1371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1473,7 +1473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1570,7 +1570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031K4.json b/data/chips/STM32C031K4.json index 407798c..f6f0427 100644 --- a/data/chips/STM32C031K4.json +++ b/data/chips/STM32C031K4.json @@ -1340,7 +1340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1739,7 +1739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1846,7 +1846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32C031K6.json b/data/chips/STM32C031K6.json index c90fb91..4c8b0e9 100644 --- a/data/chips/STM32C031K6.json +++ b/data/chips/STM32C031K6.json @@ -1340,7 +1340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1739,7 +1739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1846,7 +1846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030C6.json b/data/chips/STM32F030C6.json index 30203d1..d4b6ad7 100644 --- a/data/chips/STM32F030C6.json +++ b/data/chips/STM32F030C6.json @@ -1294,7 +1294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1494,7 +1494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1577,7 +1577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1660,7 +1660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030C8.json b/data/chips/STM32F030C8.json index 164e7d9..d99f58d 100644 --- a/data/chips/STM32F030C8.json +++ b/data/chips/STM32F030C8.json @@ -1364,7 +1364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1564,7 +1564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1657,7 +1657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1740,7 +1740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1823,7 +1823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030CC.json b/data/chips/STM32F030CC.json index 497ce46..a244b9a 100644 --- a/data/chips/STM32F030CC.json +++ b/data/chips/STM32F030CC.json @@ -1439,7 +1439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1666,7 +1666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1870,7 +1870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1972,7 +1972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030F4.json b/data/chips/STM32F030F4.json index 33f63a7..e92012b 100644 --- a/data/chips/STM32F030F4.json +++ b/data/chips/STM32F030F4.json @@ -1003,7 +1003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1163,7 +1163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1231,7 +1231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1304,7 +1304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030K6.json b/data/chips/STM32F030K6.json index 08e073d..414f5a6 100644 --- a/data/chips/STM32F030K6.json +++ b/data/chips/STM32F030K6.json @@ -1119,7 +1119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1299,7 +1299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1377,7 +1377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1455,7 +1455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030R8.json b/data/chips/STM32F030R8.json index 7599d92..8d98d0a 100644 --- a/data/chips/STM32F030R8.json +++ b/data/chips/STM32F030R8.json @@ -1484,7 +1484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1684,7 +1684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1777,7 +1777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1860,7 +1860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1943,7 +1943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F030RC.json b/data/chips/STM32F030RC.json index 1287805..ebef42b 100644 --- a/data/chips/STM32F030RC.json +++ b/data/chips/STM32F030RC.json @@ -1569,7 +1569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1903,7 +1903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2000,7 +2000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2102,7 +2102,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031C4.json b/data/chips/STM32F031C4.json index 15e1d2c..06c7a63 100644 --- a/data/chips/STM32F031C4.json +++ b/data/chips/STM32F031C4.json @@ -1313,7 +1313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1513,7 +1513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1596,7 +1596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1679,7 +1679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031C6.json b/data/chips/STM32F031C6.json index 6bd698d..d6f2899 100644 --- a/data/chips/STM32F031C6.json +++ b/data/chips/STM32F031C6.json @@ -1313,7 +1313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1513,7 +1513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1596,7 +1596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1679,7 +1679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031E6.json b/data/chips/STM32F031E6.json index f44a714..eedf5bf 100644 --- a/data/chips/STM32F031E6.json +++ b/data/chips/STM32F031E6.json @@ -1060,7 +1060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1308,7 +1308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1386,7 +1386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031F4.json b/data/chips/STM32F031F4.json index 5aca4f5..510a592 100644 --- a/data/chips/STM32F031F4.json +++ b/data/chips/STM32F031F4.json @@ -1002,7 +1002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1162,7 +1162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1303,7 +1303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1405,7 +1405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031F6.json b/data/chips/STM32F031F6.json index 144ccb9..948547f 100644 --- a/data/chips/STM32F031F6.json +++ b/data/chips/STM32F031F6.json @@ -1002,7 +1002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1162,7 +1162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1303,7 +1303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1405,7 +1405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031G4.json b/data/chips/STM32F031G4.json index 1ec45ef..bfb69dd 100644 --- a/data/chips/STM32F031G4.json +++ b/data/chips/STM32F031G4.json @@ -1114,7 +1114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1284,7 +1284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1362,7 +1362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1440,7 +1440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1557,7 +1557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031G6.json b/data/chips/STM32F031G6.json index d43c3ba..50245b1 100644 --- a/data/chips/STM32F031G6.json +++ b/data/chips/STM32F031G6.json @@ -1114,7 +1114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1284,7 +1284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1362,7 +1362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1440,7 +1440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1557,7 +1557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031K4.json b/data/chips/STM32F031K4.json index 15b2deb..8495fe2 100644 --- a/data/chips/STM32F031K4.json +++ b/data/chips/STM32F031K4.json @@ -1143,7 +1143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1484,7 +1484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1601,7 +1601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F031K6.json b/data/chips/STM32F031K6.json index 9710bb7..8937133 100644 --- a/data/chips/STM32F031K6.json +++ b/data/chips/STM32F031K6.json @@ -1341,7 +1341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1521,7 +1521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1604,7 +1604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1682,7 +1682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1799,7 +1799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038C6.json b/data/chips/STM32F038C6.json index 82eb104..f63a351 100644 --- a/data/chips/STM32F038C6.json +++ b/data/chips/STM32F038C6.json @@ -1313,7 +1313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1513,7 +1513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1596,7 +1596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1679,7 +1679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038E6.json b/data/chips/STM32F038E6.json index 434fd35..028e1e8 100644 --- a/data/chips/STM32F038E6.json +++ b/data/chips/STM32F038E6.json @@ -1060,7 +1060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1308,7 +1308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1386,7 +1386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038F6.json b/data/chips/STM32F038F6.json index 9953a2d..50e6a53 100644 --- a/data/chips/STM32F038F6.json +++ b/data/chips/STM32F038F6.json @@ -998,7 +998,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1148,7 +1148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1216,7 +1216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1289,7 +1289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1391,7 +1391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038G6.json b/data/chips/STM32F038G6.json index 1fc8574..1734378 100644 --- a/data/chips/STM32F038G6.json +++ b/data/chips/STM32F038G6.json @@ -1110,7 +1110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1270,7 +1270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1348,7 +1348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1426,7 +1426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1543,7 +1543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F038K6.json b/data/chips/STM32F038K6.json index a91e434..4d46b3a 100644 --- a/data/chips/STM32F038K6.json +++ b/data/chips/STM32F038K6.json @@ -1143,7 +1143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1484,7 +1484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1601,7 +1601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042C4.json b/data/chips/STM32F042C4.json index 763aae6..35854e8 100644 --- a/data/chips/STM32F042C4.json +++ b/data/chips/STM32F042C4.json @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2097,7 +2097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2185,7 +2185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042C6.json b/data/chips/STM32F042C6.json index 120a9e2..50eae94 100644 --- a/data/chips/STM32F042C6.json +++ b/data/chips/STM32F042C6.json @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2097,7 +2097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2185,7 +2185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042F4.json b/data/chips/STM32F042F4.json index cee9123..60e885d 100644 --- a/data/chips/STM32F042F4.json +++ b/data/chips/STM32F042F4.json @@ -1153,7 +1153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1396,7 +1396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1469,7 +1469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1571,7 +1571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042F6.json b/data/chips/STM32F042F6.json index 88c4e03..dd578c8 100644 --- a/data/chips/STM32F042F6.json +++ b/data/chips/STM32F042F6.json @@ -1153,7 +1153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1323,7 +1323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1396,7 +1396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1469,7 +1469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1571,7 +1571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042G4.json b/data/chips/STM32F042G4.json index 3dcd430..76e9277 100644 --- a/data/chips/STM32F042G4.json +++ b/data/chips/STM32F042G4.json @@ -1260,7 +1260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1435,7 +1435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1518,7 +1518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1601,7 +1601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042G6.json b/data/chips/STM32F042G6.json index 1461c40..e98ed35 100644 --- a/data/chips/STM32F042G6.json +++ b/data/chips/STM32F042G6.json @@ -1260,7 +1260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1435,7 +1435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1518,7 +1518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1601,7 +1601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042K4.json b/data/chips/STM32F042K4.json index 902db9b..79c782f 100644 --- a/data/chips/STM32F042K4.json +++ b/data/chips/STM32F042K4.json @@ -1495,7 +1495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1675,7 +1675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1841,7 +1841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1958,7 +1958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042K6.json b/data/chips/STM32F042K6.json index f171f27..e92a232 100644 --- a/data/chips/STM32F042K6.json +++ b/data/chips/STM32F042K6.json @@ -1495,7 +1495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1675,7 +1675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1841,7 +1841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1958,7 +1958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F042T6.json b/data/chips/STM32F042T6.json index 9e06731..986db6f 100644 --- a/data/chips/STM32F042T6.json +++ b/data/chips/STM32F042T6.json @@ -1345,7 +1345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1608,7 +1608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1691,7 +1691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1808,7 +1808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048C6.json b/data/chips/STM32F048C6.json index 4ba7135..9580004 100644 --- a/data/chips/STM32F048C6.json +++ b/data/chips/STM32F048C6.json @@ -1453,7 +1453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1653,7 +1653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1736,7 +1736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1824,7 +1824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1951,7 +1951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048G6.json b/data/chips/STM32F048G6.json index 081f825..d324228 100644 --- a/data/chips/STM32F048G6.json +++ b/data/chips/STM32F048G6.json @@ -1194,7 +1194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1359,7 +1359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1442,7 +1442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1642,7 +1642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F048T6.json b/data/chips/STM32F048T6.json index 445c4aa..82f6ae4 100644 --- a/data/chips/STM32F048T6.json +++ b/data/chips/STM32F048T6.json @@ -1283,7 +1283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1463,7 +1463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1546,7 +1546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1629,7 +1629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1746,7 +1746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C4.json b/data/chips/STM32F051C4.json index f865ca7..1ae17c5 100644 --- a/data/chips/STM32F051C4.json +++ b/data/chips/STM32F051C4.json @@ -1741,7 +1741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1941,7 +1941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2034,7 +2034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2200,7 +2200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2327,7 +2327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C6.json b/data/chips/STM32F051C6.json index a9a6ed6..cef969d 100644 --- a/data/chips/STM32F051C6.json +++ b/data/chips/STM32F051C6.json @@ -1741,7 +1741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1941,7 +1941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2034,7 +2034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2200,7 +2200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2327,7 +2327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051C8.json b/data/chips/STM32F051C8.json index a153277..0164f70 100644 --- a/data/chips/STM32F051C8.json +++ b/data/chips/STM32F051C8.json @@ -1861,7 +1861,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2061,7 +2061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2154,7 +2154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2237,7 +2237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2320,7 +2320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2447,7 +2447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K4.json b/data/chips/STM32F051K4.json index dd1b1dc..960f9b9 100644 --- a/data/chips/STM32F051K4.json +++ b/data/chips/STM32F051K4.json @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1695,7 +1695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1856,7 +1856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2051,7 +2051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K6.json b/data/chips/STM32F051K6.json index 3dbf0da..a08cd18 100644 --- a/data/chips/STM32F051K6.json +++ b/data/chips/STM32F051K6.json @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1695,7 +1695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1856,7 +1856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2051,7 +2051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051K8.json b/data/chips/STM32F051K8.json index 89e8982..6da7b62 100644 --- a/data/chips/STM32F051K8.json +++ b/data/chips/STM32F051K8.json @@ -1515,7 +1515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1695,7 +1695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1856,7 +1856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1934,7 +1934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2051,7 +2051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R4.json b/data/chips/STM32F051R4.json index 314c189..7b628e9 100644 --- a/data/chips/STM32F051R4.json +++ b/data/chips/STM32F051R4.json @@ -1626,7 +1626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1919,7 +1919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2212,7 +2212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R6.json b/data/chips/STM32F051R6.json index d2e32d8..ed99d65 100644 --- a/data/chips/STM32F051R6.json +++ b/data/chips/STM32F051R6.json @@ -1626,7 +1626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1826,7 +1826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1919,7 +1919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2212,7 +2212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051R8.json b/data/chips/STM32F051R8.json index 929238c..8b57ecf 100644 --- a/data/chips/STM32F051R8.json +++ b/data/chips/STM32F051R8.json @@ -2077,7 +2077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2277,7 +2277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2453,7 +2453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2536,7 +2536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2663,7 +2663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F051T8.json b/data/chips/STM32F051T8.json index f3b942e..935ec59 100644 --- a/data/chips/STM32F051T8.json +++ b/data/chips/STM32F051T8.json @@ -1354,7 +1354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1534,7 +1534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1612,7 +1612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1690,7 +1690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1768,7 +1768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1885,7 +1885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058C8.json b/data/chips/STM32F058C8.json index 163de2b..ea3aec6 100644 --- a/data/chips/STM32F058C8.json +++ b/data/chips/STM32F058C8.json @@ -1567,7 +1567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1767,7 +1767,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1860,7 +1860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1943,7 +1943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2026,7 +2026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2153,7 +2153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058R8.json b/data/chips/STM32F058R8.json index 86a63a8..9d0ea08 100644 --- a/data/chips/STM32F058R8.json +++ b/data/chips/STM32F058R8.json @@ -2077,7 +2077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2277,7 +2277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2453,7 +2453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2536,7 +2536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2663,7 +2663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F058T8.json b/data/chips/STM32F058T8.json index 0c7089c..6598ee4 100644 --- a/data/chips/STM32F058T8.json +++ b/data/chips/STM32F058T8.json @@ -1354,7 +1354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1534,7 +1534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1612,7 +1612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1690,7 +1690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1768,7 +1768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1885,7 +1885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070C6.json b/data/chips/STM32F070C6.json index c12cb6f..4d831cc 100644 --- a/data/chips/STM32F070C6.json +++ b/data/chips/STM32F070C6.json @@ -1268,7 +1268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1468,7 +1468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1551,7 +1551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1639,7 +1639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070CB.json b/data/chips/STM32F070CB.json index 65bd338..92a5197 100644 --- a/data/chips/STM32F070CB.json +++ b/data/chips/STM32F070CB.json @@ -1396,7 +1396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1612,7 +1612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1715,7 +1715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070F6.json b/data/chips/STM32F070F6.json index 0ad38c6..7afeef2 100644 --- a/data/chips/STM32F070F6.json +++ b/data/chips/STM32F070F6.json @@ -1025,7 +1025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1195,7 +1195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1263,7 +1263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1336,7 +1336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F070RB.json b/data/chips/STM32F070RB.json index 64def21..b8a5419 100644 --- a/data/chips/STM32F070RB.json +++ b/data/chips/STM32F070RB.json @@ -1526,7 +1526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1936,7 +1936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2032,7 +2032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071C8.json b/data/chips/STM32F071C8.json index d410e12..07d66aa 100644 --- a/data/chips/STM32F071C8.json +++ b/data/chips/STM32F071C8.json @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2290,7 +2290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2381,7 +2381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2477,7 +2477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2612,7 +2612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071CB.json b/data/chips/STM32F071CB.json index 442b28e..802e7ca 100644 --- a/data/chips/STM32F071CB.json +++ b/data/chips/STM32F071CB.json @@ -2283,7 +2283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2499,7 +2499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2789,7 +2789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2924,7 +2924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071RB.json b/data/chips/STM32F071RB.json index df08162..c675489 100644 --- a/data/chips/STM32F071RB.json +++ b/data/chips/STM32F071RB.json @@ -1829,7 +1829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2045,7 +2045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2239,7 +2239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2335,7 +2335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2470,7 +2470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071V8.json b/data/chips/STM32F071V8.json index e205e8b..01b7bd2 100644 --- a/data/chips/STM32F071V8.json +++ b/data/chips/STM32F071V8.json @@ -2734,7 +2734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2995,7 +2995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3108,7 +3108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3305,7 +3305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3440,7 +3440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F071VB.json b/data/chips/STM32F071VB.json index 6baaa88..f07c14f 100644 --- a/data/chips/STM32F071VB.json +++ b/data/chips/STM32F071VB.json @@ -2740,7 +2740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3001,7 +3001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3114,7 +3114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3210,7 +3210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3311,7 +3311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3446,7 +3446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072C8.json b/data/chips/STM32F072C8.json index 4f41364..120e70b 100644 --- a/data/chips/STM32F072C8.json +++ b/data/chips/STM32F072C8.json @@ -2056,7 +2056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2272,7 +2272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2375,7 +2375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2562,7 +2562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2697,7 +2697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072CB.json b/data/chips/STM32F072CB.json index 01cf474..16ee1f4 100644 --- a/data/chips/STM32F072CB.json +++ b/data/chips/STM32F072CB.json @@ -2356,7 +2356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2572,7 +2572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2675,7 +2675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2766,7 +2766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2862,7 +2862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2997,7 +2997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072R8.json b/data/chips/STM32F072R8.json index e1749bd..ce9e93a 100644 --- a/data/chips/STM32F072R8.json +++ b/data/chips/STM32F072R8.json @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2408,7 +2408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072RB.json b/data/chips/STM32F072RB.json index 82d3aba..53843cd 100644 --- a/data/chips/STM32F072RB.json +++ b/data/chips/STM32F072RB.json @@ -2682,7 +2682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2898,7 +2898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3001,7 +3001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3092,7 +3092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3188,7 +3188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3323,7 +3323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072V8.json b/data/chips/STM32F072V8.json index 878515d..616180a 100644 --- a/data/chips/STM32F072V8.json +++ b/data/chips/STM32F072V8.json @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3293,7 +3293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3529,7 +3529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F072VB.json b/data/chips/STM32F072VB.json index da67249..0c86013 100644 --- a/data/chips/STM32F072VB.json +++ b/data/chips/STM32F072VB.json @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3293,7 +3293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3394,7 +3394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3529,7 +3529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078CB.json b/data/chips/STM32F078CB.json index 00ceadf..020599d 100644 --- a/data/chips/STM32F078CB.json +++ b/data/chips/STM32F078CB.json @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2511,7 +2511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2614,7 +2614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2801,7 +2801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078RB.json b/data/chips/STM32F078RB.json index 89286c3..e6c1115 100644 --- a/data/chips/STM32F078RB.json +++ b/data/chips/STM32F078RB.json @@ -2231,7 +2231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2447,7 +2447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2550,7 +2550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2641,7 +2641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2737,7 +2737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2872,7 +2872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F078VB.json b/data/chips/STM32F078VB.json index 5b02aea..48ff7fd 100644 --- a/data/chips/STM32F078VB.json +++ b/data/chips/STM32F078VB.json @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3013,7 +3013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3126,7 +3126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3323,7 +3323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3458,7 +3458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091CB.json b/data/chips/STM32F091CB.json index d23c40b..5637a40 100644 --- a/data/chips/STM32F091CB.json +++ b/data/chips/STM32F091CB.json @@ -2169,7 +2169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2702,7 +2702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091CC.json b/data/chips/STM32F091CC.json index 38a1333..483d971 100644 --- a/data/chips/STM32F091CC.json +++ b/data/chips/STM32F091CC.json @@ -2169,7 +2169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2702,7 +2702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091RB.json b/data/chips/STM32F091RB.json index 8fb18d5..bcf36a3 100644 --- a/data/chips/STM32F091RB.json +++ b/data/chips/STM32F091RB.json @@ -2015,7 +2015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2242,7 +2242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2349,7 +2349,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2446,7 +2446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2690,7 +2690,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091RC.json b/data/chips/STM32F091RC.json index 4a5e00a..de9e81d 100644 --- a/data/chips/STM32F091RC.json +++ b/data/chips/STM32F091RC.json @@ -2795,7 +2795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3022,7 +3022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3328,7 +3328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091VB.json b/data/chips/STM32F091VB.json index 7dfc809..8686314 100644 --- a/data/chips/STM32F091VB.json +++ b/data/chips/STM32F091VB.json @@ -2330,7 +2330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2821,7 +2821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2928,7 +2928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3070,7 +3070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F091VC.json b/data/chips/STM32F091VC.json index f2e62c4..11419bf 100644 --- a/data/chips/STM32F091VC.json +++ b/data/chips/STM32F091VC.json @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3427,7 +3427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098CC.json b/data/chips/STM32F098CC.json index 1beac22..be0e9c4 100644 --- a/data/chips/STM32F098CC.json +++ b/data/chips/STM32F098CC.json @@ -2169,7 +2169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2702,7 +2702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098RC.json b/data/chips/STM32F098RC.json index 0c9aead..1fda1f2 100644 --- a/data/chips/STM32F098RC.json +++ b/data/chips/STM32F098RC.json @@ -2795,7 +2795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3022,7 +3022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3328,7 +3328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F098VC.json b/data/chips/STM32F098VC.json index beb5c00..f946b91 100644 --- a/data/chips/STM32F098VC.json +++ b/data/chips/STM32F098VC.json @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3427,7 +3427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C4.json b/data/chips/STM32F100C4.json index bb7d483..19d7bc4 100644 --- a/data/chips/STM32F100C4.json +++ b/data/chips/STM32F100C4.json @@ -1278,7 +1278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1417,7 +1417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1504,7 +1504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1575,7 +1575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1646,7 +1646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1753,7 +1753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C6.json b/data/chips/STM32F100C6.json index 27cd790..d6610a2 100644 --- a/data/chips/STM32F100C6.json +++ b/data/chips/STM32F100C6.json @@ -1278,7 +1278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1417,7 +1417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1504,7 +1504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1575,7 +1575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1646,7 +1646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1753,7 +1753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100C8.json b/data/chips/STM32F100C8.json index 384f728..d672470 100644 --- a/data/chips/STM32F100C8.json +++ b/data/chips/STM32F100C8.json @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1614,7 +1614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1685,7 +1685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1756,7 +1756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1863,7 +1863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1954,7 +1954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100CB.json b/data/chips/STM32F100CB.json index 6c18fd5..74fd8e4 100644 --- a/data/chips/STM32F100CB.json +++ b/data/chips/STM32F100CB.json @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1614,7 +1614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1685,7 +1685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1756,7 +1756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1863,7 +1863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1954,7 +1954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R4.json b/data/chips/STM32F100R4.json index 94d3710..dac51bb 100644 --- a/data/chips/STM32F100R4.json +++ b/data/chips/STM32F100R4.json @@ -1788,7 +1788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1927,7 +1927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2263,7 +2263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R6.json b/data/chips/STM32F100R6.json index a0f7683..5a20245 100644 --- a/data/chips/STM32F100R6.json +++ b/data/chips/STM32F100R6.json @@ -1788,7 +1788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1927,7 +1927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2014,7 +2014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2085,7 +2085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2263,7 +2263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100R8.json b/data/chips/STM32F100R8.json index 4f94011..dec7390 100644 --- a/data/chips/STM32F100R8.json +++ b/data/chips/STM32F100R8.json @@ -1898,7 +1898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2037,7 +2037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RB.json b/data/chips/STM32F100RB.json index 622f30c..c45f113 100644 --- a/data/chips/STM32F100RB.json +++ b/data/chips/STM32F100RB.json @@ -1898,7 +1898,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2037,7 +2037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RC.json b/data/chips/STM32F100RC.json index 83937c7..e3bf908 100644 --- a/data/chips/STM32F100RC.json +++ b/data/chips/STM32F100RC.json @@ -1648,7 +1648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1954,7 +1954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2290,7 +2290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2401,7 +2401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RD.json b/data/chips/STM32F100RD.json index fcc32e8..f2b6628 100644 --- a/data/chips/STM32F100RD.json +++ b/data/chips/STM32F100RD.json @@ -1648,7 +1648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1954,7 +1954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2290,7 +2290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2401,7 +2401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100RE.json b/data/chips/STM32F100RE.json index 9c2c22b..1fff42a 100644 --- a/data/chips/STM32F100RE.json +++ b/data/chips/STM32F100RE.json @@ -1648,7 +1648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1954,7 +1954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2290,7 +2290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2401,7 +2401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100V8.json b/data/chips/STM32F100V8.json index 8d19d3e..bc56f1f 100644 --- a/data/chips/STM32F100V8.json +++ b/data/chips/STM32F100V8.json @@ -1716,7 +1716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1978,7 +1978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2120,7 +2120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2227,7 +2227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2338,7 +2338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VB.json b/data/chips/STM32F100VB.json index 2f5dcf8..d3ab07c 100644 --- a/data/chips/STM32F100VB.json +++ b/data/chips/STM32F100VB.json @@ -1716,7 +1716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1891,7 +1891,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1978,7 +1978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2120,7 +2120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2227,7 +2227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2338,7 +2338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VC.json b/data/chips/STM32F100VC.json index 2a385dd..1aed734 100644 --- a/data/chips/STM32F100VC.json +++ b/data/chips/STM32F100VC.json @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2496,7 +2496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2638,7 +2638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2745,7 +2745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2856,7 +2856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2955,7 +2955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VD.json b/data/chips/STM32F100VD.json index 8cfebae..faa1e7b 100644 --- a/data/chips/STM32F100VD.json +++ b/data/chips/STM32F100VD.json @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2496,7 +2496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2638,7 +2638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2745,7 +2745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2856,7 +2856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2955,7 +2955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100VE.json b/data/chips/STM32F100VE.json index 4f2dd8e..5d452b9 100644 --- a/data/chips/STM32F100VE.json +++ b/data/chips/STM32F100VE.json @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2496,7 +2496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2638,7 +2638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2745,7 +2745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2856,7 +2856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2955,7 +2955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZC.json b/data/chips/STM32F100ZC.json index 9c71d30..6f902ea 100644 --- a/data/chips/STM32F100ZC.json +++ b/data/chips/STM32F100ZC.json @@ -2415,7 +2415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2915,7 +2915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2986,7 +2986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3093,7 +3093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3303,7 +3303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZD.json b/data/chips/STM32F100ZD.json index 7689e0d..07abe67 100644 --- a/data/chips/STM32F100ZD.json +++ b/data/chips/STM32F100ZD.json @@ -2415,7 +2415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2915,7 +2915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2986,7 +2986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3093,7 +3093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3303,7 +3303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F100ZE.json b/data/chips/STM32F100ZE.json index da993e2..e0f555e 100644 --- a/data/chips/STM32F100ZE.json +++ b/data/chips/STM32F100ZE.json @@ -2415,7 +2415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2844,7 +2844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2915,7 +2915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2986,7 +2986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3093,7 +3093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3303,7 +3303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C4.json b/data/chips/STM32F101C4.json index 0a8cd19..2589963 100644 --- a/data/chips/STM32F101C4.json +++ b/data/chips/STM32F101C4.json @@ -1189,7 +1189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C6.json b/data/chips/STM32F101C6.json index 6aef6f2..e4f0121 100644 --- a/data/chips/STM32F101C6.json +++ b/data/chips/STM32F101C6.json @@ -1195,7 +1195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1302,7 +1302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101C8.json b/data/chips/STM32F101C8.json index 0d97e98..0666c94 100644 --- a/data/chips/STM32F101C8.json +++ b/data/chips/STM32F101C8.json @@ -1620,7 +1620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1727,7 +1727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101CB.json b/data/chips/STM32F101CB.json index 800c41b..18fed56 100644 --- a/data/chips/STM32F101CB.json +++ b/data/chips/STM32F101CB.json @@ -1614,7 +1614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1721,7 +1721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1812,7 +1812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R4.json b/data/chips/STM32F101R4.json index d96915b..4a99444 100644 --- a/data/chips/STM32F101R4.json +++ b/data/chips/STM32F101R4.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1422,7 +1422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R6.json b/data/chips/STM32F101R6.json index 552cc67..e5b0f05 100644 --- a/data/chips/STM32F101R6.json +++ b/data/chips/STM32F101R6.json @@ -1321,7 +1321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1428,7 +1428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101R8.json b/data/chips/STM32F101R8.json index a50a471..8b8f533 100644 --- a/data/chips/STM32F101R8.json +++ b/data/chips/STM32F101R8.json @@ -1452,7 +1452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1559,7 +1559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1670,7 +1670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RB.json b/data/chips/STM32F101RB.json index a6fb857..6940cac 100644 --- a/data/chips/STM32F101RB.json +++ b/data/chips/STM32F101RB.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1949,7 +1949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RC.json b/data/chips/STM32F101RC.json index d9c6c8c..6e2cbd1 100644 --- a/data/chips/STM32F101RC.json +++ b/data/chips/STM32F101RC.json @@ -1635,7 +1635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1853,7 +1853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1932,7 +1932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RD.json b/data/chips/STM32F101RD.json index 63eec64..f1ee311 100644 --- a/data/chips/STM32F101RD.json +++ b/data/chips/STM32F101RD.json @@ -1635,7 +1635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1853,7 +1853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1932,7 +1932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RE.json b/data/chips/STM32F101RE.json index ea7d103..f187cf1 100644 --- a/data/chips/STM32F101RE.json +++ b/data/chips/STM32F101RE.json @@ -1635,7 +1635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1853,7 +1853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1932,7 +1932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RF.json b/data/chips/STM32F101RF.json index fda7821..2c0df5b 100644 --- a/data/chips/STM32F101RF.json +++ b/data/chips/STM32F101RF.json @@ -1901,7 +1901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2008,7 +2008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2198,7 +2198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101RG.json b/data/chips/STM32F101RG.json index 061ec29..c4202a7 100644 --- a/data/chips/STM32F101RG.json +++ b/data/chips/STM32F101RG.json @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1990,7 +1990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2101,7 +2101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2180,7 +2180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T4.json b/data/chips/STM32F101T4.json index b8e58a4..3b9c929 100644 --- a/data/chips/STM32F101T4.json +++ b/data/chips/STM32F101T4.json @@ -1091,7 +1091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1190,7 +1190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T6.json b/data/chips/STM32F101T6.json index 666f681..65bf623 100644 --- a/data/chips/STM32F101T6.json +++ b/data/chips/STM32F101T6.json @@ -1091,7 +1091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1190,7 +1190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101T8.json b/data/chips/STM32F101T8.json index dd6294a..b83cc82 100644 --- a/data/chips/STM32F101T8.json +++ b/data/chips/STM32F101T8.json @@ -1118,7 +1118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1217,7 +1217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1308,7 +1308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101TB.json b/data/chips/STM32F101TB.json index 29f6d4e..944ab03 100644 --- a/data/chips/STM32F101TB.json +++ b/data/chips/STM32F101TB.json @@ -1106,7 +1106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1205,7 +1205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101V8.json b/data/chips/STM32F101V8.json index cb8d4c6..2f23918 100644 --- a/data/chips/STM32F101V8.json +++ b/data/chips/STM32F101V8.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1761,7 +1761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1872,7 +1872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VB.json b/data/chips/STM32F101VB.json index 72df86c..4d04383 100644 --- a/data/chips/STM32F101VB.json +++ b/data/chips/STM32F101VB.json @@ -1654,7 +1654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1761,7 +1761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1872,7 +1872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VC.json b/data/chips/STM32F101VC.json index 364c526..a090ba6 100644 --- a/data/chips/STM32F101VC.json +++ b/data/chips/STM32F101VC.json @@ -2066,7 +2066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2173,7 +2173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VD.json b/data/chips/STM32F101VD.json index 15bf8d1..4552bed 100644 --- a/data/chips/STM32F101VD.json +++ b/data/chips/STM32F101VD.json @@ -2066,7 +2066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2173,7 +2173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2284,7 +2284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VE.json b/data/chips/STM32F101VE.json index dc5287c..0aa42ef 100644 --- a/data/chips/STM32F101VE.json +++ b/data/chips/STM32F101VE.json @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2167,7 +2167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2377,7 +2377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VF.json b/data/chips/STM32F101VF.json index 7c30fdf..f3b0f81 100644 --- a/data/chips/STM32F101VF.json +++ b/data/chips/STM32F101VF.json @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101VG.json b/data/chips/STM32F101VG.json index 079946a..dd8fa2c 100644 --- a/data/chips/STM32F101VG.json +++ b/data/chips/STM32F101VG.json @@ -2314,7 +2314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZC.json b/data/chips/STM32F101ZC.json index 796bb5e..6874bc0 100644 --- a/data/chips/STM32F101ZC.json +++ b/data/chips/STM32F101ZC.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZD.json b/data/chips/STM32F101ZD.json index cafd588..b8b54c9 100644 --- a/data/chips/STM32F101ZD.json +++ b/data/chips/STM32F101ZD.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZE.json b/data/chips/STM32F101ZE.json index d7c2b58..4e8b6a4 100644 --- a/data/chips/STM32F101ZE.json +++ b/data/chips/STM32F101ZE.json @@ -2452,7 +2452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2559,7 +2559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2769,7 +2769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZF.json b/data/chips/STM32F101ZF.json index af67258..8aa9a3d 100644 --- a/data/chips/STM32F101ZF.json +++ b/data/chips/STM32F101ZF.json @@ -2698,7 +2698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2916,7 +2916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F101ZG.json b/data/chips/STM32F101ZG.json index 2e6f9c3..a784df4 100644 --- a/data/chips/STM32F101ZG.json +++ b/data/chips/STM32F101ZG.json @@ -2722,7 +2722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2829,7 +2829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2940,7 +2940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3039,7 +3039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C4.json b/data/chips/STM32F102C4.json index a64460f..a02c535 100644 --- a/data/chips/STM32F102C4.json +++ b/data/chips/STM32F102C4.json @@ -1189,7 +1189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C6.json b/data/chips/STM32F102C6.json index 9f1bad0..2b892b5 100644 --- a/data/chips/STM32F102C6.json +++ b/data/chips/STM32F102C6.json @@ -1189,7 +1189,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1296,7 +1296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102C8.json b/data/chips/STM32F102C8.json index 87d4e21..943f49c 100644 --- a/data/chips/STM32F102C8.json +++ b/data/chips/STM32F102C8.json @@ -1299,7 +1299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1497,7 +1497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102CB.json b/data/chips/STM32F102CB.json index 2b2c230..e12cb01 100644 --- a/data/chips/STM32F102CB.json +++ b/data/chips/STM32F102CB.json @@ -1299,7 +1299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1406,7 +1406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1497,7 +1497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R4.json b/data/chips/STM32F102R4.json index 5a60dbe..8cee284 100644 --- a/data/chips/STM32F102R4.json +++ b/data/chips/STM32F102R4.json @@ -1309,7 +1309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1416,7 +1416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R6.json b/data/chips/STM32F102R6.json index c363169..69a171f 100644 --- a/data/chips/STM32F102R6.json +++ b/data/chips/STM32F102R6.json @@ -1309,7 +1309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1416,7 +1416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102R8.json b/data/chips/STM32F102R8.json index fc54fcf..4a090ae 100644 --- a/data/chips/STM32F102R8.json +++ b/data/chips/STM32F102R8.json @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1526,7 +1526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F102RB.json b/data/chips/STM32F102RB.json index 300ae0b..c7ca8d6 100644 --- a/data/chips/STM32F102RB.json +++ b/data/chips/STM32F102RB.json @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1526,7 +1526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1637,7 +1637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C4.json b/data/chips/STM32F103C4.json index f38f598..4a69306 100644 --- a/data/chips/STM32F103C4.json +++ b/data/chips/STM32F103C4.json @@ -1315,7 +1315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1442,7 +1442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1549,7 +1549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C6.json b/data/chips/STM32F103C6.json index e6b20a1..92bed88 100644 --- a/data/chips/STM32F103C6.json +++ b/data/chips/STM32F103C6.json @@ -1615,7 +1615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1742,7 +1742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103C8.json b/data/chips/STM32F103C8.json index f30b5fd..7c6ffb1 100644 --- a/data/chips/STM32F103C8.json +++ b/data/chips/STM32F103C8.json @@ -1452,7 +1452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1579,7 +1579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1686,7 +1686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1777,7 +1777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103CB.json b/data/chips/STM32F103CB.json index 135951b..08426a5 100644 --- a/data/chips/STM32F103CB.json +++ b/data/chips/STM32F103CB.json @@ -1740,7 +1740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1867,7 +1867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1974,7 +1974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2065,7 +2065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R4.json b/data/chips/STM32F103R4.json index c9217d3..044f7cf 100644 --- a/data/chips/STM32F103R4.json +++ b/data/chips/STM32F103R4.json @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1976,7 +1976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2083,7 +2083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R6.json b/data/chips/STM32F103R6.json index 0c59f73..e15dfe6 100644 --- a/data/chips/STM32F103R6.json +++ b/data/chips/STM32F103R6.json @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1982,7 +1982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2089,7 +2089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103R8.json b/data/chips/STM32F103R8.json index 91d6f31..0a9d2f4 100644 --- a/data/chips/STM32F103R8.json +++ b/data/chips/STM32F103R8.json @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2113,7 +2113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2220,7 +2220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2331,7 +2331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103RB.json b/data/chips/STM32F103RB.json index e2d30bd..f3d0221 100644 --- a/data/chips/STM32F103RB.json +++ b/data/chips/STM32F103RB.json @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2113,7 +2113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2220,7 +2220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2331,7 +2331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103RC.json b/data/chips/STM32F103RC.json index a380caf..b147d65 100644 --- a/data/chips/STM32F103RC.json +++ b/data/chips/STM32F103RC.json @@ -2333,7 +2333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2678,7 +2678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2942,7 +2942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RD.json b/data/chips/STM32F103RD.json index ecbfcaa..ecbe892 100644 --- a/data/chips/STM32F103RD.json +++ b/data/chips/STM32F103RD.json @@ -2333,7 +2333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2678,7 +2678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2942,7 +2942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RE.json b/data/chips/STM32F103RE.json index 813a612..b72f47e 100644 --- a/data/chips/STM32F103RE.json +++ b/data/chips/STM32F103RE.json @@ -2333,7 +2333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2460,7 +2460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2567,7 +2567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2678,7 +2678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2942,7 +2942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RF.json b/data/chips/STM32F103RF.json index 1120521..00dc077 100644 --- a/data/chips/STM32F103RF.json +++ b/data/chips/STM32F103RF.json @@ -1948,7 +1948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2621,7 +2621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2806,7 +2806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103RG.json b/data/chips/STM32F103RG.json index bc06466..b389024 100644 --- a/data/chips/STM32F103RG.json +++ b/data/chips/STM32F103RG.json @@ -1948,7 +1948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2621,7 +2621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2806,7 +2806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103T4.json b/data/chips/STM32F103T4.json index a918ee8..73352d3 100644 --- a/data/chips/STM32F103T4.json +++ b/data/chips/STM32F103T4.json @@ -1209,7 +1209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1320,7 +1320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103T6.json b/data/chips/STM32F103T6.json index be76cb2..4bc018a 100644 --- a/data/chips/STM32F103T6.json +++ b/data/chips/STM32F103T6.json @@ -1209,7 +1209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1320,7 +1320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103T8.json b/data/chips/STM32F103T8.json index ae1da34..4589a7b 100644 --- a/data/chips/STM32F103T8.json +++ b/data/chips/STM32F103T8.json @@ -1230,7 +1230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1341,7 +1341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1440,7 +1440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1531,7 +1531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103TB.json b/data/chips/STM32F103TB.json index faf0b8a..5ff3b4f 100644 --- a/data/chips/STM32F103TB.json +++ b/data/chips/STM32F103TB.json @@ -1224,7 +1224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1335,7 +1335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1434,7 +1434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1525,7 +1525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103V8.json b/data/chips/STM32F103V8.json index 6134e4e..b75dbe4 100644 --- a/data/chips/STM32F103V8.json +++ b/data/chips/STM32F103V8.json @@ -2418,7 +2418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2581,7 +2581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2688,7 +2688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2799,7 +2799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103VB.json b/data/chips/STM32F103VB.json index 98bfd69..2f67828 100644 --- a/data/chips/STM32F103VB.json +++ b/data/chips/STM32F103VB.json @@ -3024,7 +3024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3187,7 +3187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3294,7 +3294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3405,7 +3405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F103VC.json b/data/chips/STM32F103VC.json index e0f0aa4..1e75d1f 100644 --- a/data/chips/STM32F103VC.json +++ b/data/chips/STM32F103VC.json @@ -2994,7 +2994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3157,7 +3157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3375,7 +3375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3474,7 +3474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3659,7 +3659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VD.json b/data/chips/STM32F103VD.json index 3ef6003..a46f516 100644 --- a/data/chips/STM32F103VD.json +++ b/data/chips/STM32F103VD.json @@ -2994,7 +2994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3157,7 +3157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3375,7 +3375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3474,7 +3474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3659,7 +3659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VE.json b/data/chips/STM32F103VE.json index b476ca3..4b883c1 100644 --- a/data/chips/STM32F103VE.json +++ b/data/chips/STM32F103VE.json @@ -2994,7 +2994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3157,7 +3157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3375,7 +3375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3474,7 +3474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3659,7 +3659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VF.json b/data/chips/STM32F103VF.json index 4f957fa..bc22478 100644 --- a/data/chips/STM32F103VF.json +++ b/data/chips/STM32F103VF.json @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2912,7 +2912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3023,7 +3023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103VG.json b/data/chips/STM32F103VG.json index 39f73ca..4326850 100644 --- a/data/chips/STM32F103VG.json +++ b/data/chips/STM32F103VG.json @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2805,7 +2805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2912,7 +2912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3023,7 +3023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZC.json b/data/chips/STM32F103ZC.json index e6aa6e4..153e589 100644 --- a/data/chips/STM32F103ZC.json +++ b/data/chips/STM32F103ZC.json @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3940,7 +3940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4051,7 +4051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4150,7 +4150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4335,7 +4335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZD.json b/data/chips/STM32F103ZD.json index 06a248d..8b1012c 100644 --- a/data/chips/STM32F103ZD.json +++ b/data/chips/STM32F103ZD.json @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3940,7 +3940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4051,7 +4051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4150,7 +4150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4335,7 +4335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZE.json b/data/chips/STM32F103ZE.json index 9a68282..61b1c4a 100644 --- a/data/chips/STM32F103ZE.json +++ b/data/chips/STM32F103ZE.json @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3940,7 +3940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4051,7 +4051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4150,7 +4150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4335,7 +4335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZF.json b/data/chips/STM32F103ZF.json index 4158391..1cdbb5c 100644 --- a/data/chips/STM32F103ZF.json +++ b/data/chips/STM32F103ZF.json @@ -3675,7 +3675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4420,7 +4420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4605,7 +4605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F103ZG.json b/data/chips/STM32F103ZG.json index e19c7a2..01cfd14 100644 --- a/data/chips/STM32F103ZG.json +++ b/data/chips/STM32F103ZG.json @@ -3675,7 +3675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4321,7 +4321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4420,7 +4420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4605,7 +4605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F105R8.json b/data/chips/STM32F105R8.json index e92a6b4..712c877 100644 --- a/data/chips/STM32F105R8.json +++ b/data/chips/STM32F105R8.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2076,7 +2076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105RB.json b/data/chips/STM32F105RB.json index 4f9a579..259457d 100644 --- a/data/chips/STM32F105RB.json +++ b/data/chips/STM32F105RB.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2076,7 +2076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105RC.json b/data/chips/STM32F105RC.json index 375aabe..795a462 100644 --- a/data/chips/STM32F105RC.json +++ b/data/chips/STM32F105RC.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2076,7 +2076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2187,7 +2187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2266,7 +2266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105V8.json b/data/chips/STM32F105V8.json index 5e93597..03b5398 100644 --- a/data/chips/STM32F105V8.json +++ b/data/chips/STM32F105V8.json @@ -2664,7 +2664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2827,7 +2827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2934,7 +2934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3144,7 +3144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105VB.json b/data/chips/STM32F105VB.json index 85bfb7f..b95e1a2 100644 --- a/data/chips/STM32F105VB.json +++ b/data/chips/STM32F105VB.json @@ -2664,7 +2664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2827,7 +2827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2934,7 +2934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3144,7 +3144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F105VC.json b/data/chips/STM32F105VC.json index 77f95ac..20443b9 100644 --- a/data/chips/STM32F105VC.json +++ b/data/chips/STM32F105VC.json @@ -2058,7 +2058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2439,7 +2439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2538,7 +2538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107RB.json b/data/chips/STM32F107RB.json index 4c4b581..cbbdded 100644 --- a/data/chips/STM32F107RB.json +++ b/data/chips/STM32F107RB.json @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2027,7 +2027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2134,7 +2134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2245,7 +2245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107RC.json b/data/chips/STM32F107RC.json index 8e18937..75ef654 100644 --- a/data/chips/STM32F107RC.json +++ b/data/chips/STM32F107RC.json @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2027,7 +2027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2134,7 +2134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2245,7 +2245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107VB.json b/data/chips/STM32F107VB.json index 1bca976..d126fa9 100644 --- a/data/chips/STM32F107VB.json +++ b/data/chips/STM32F107VB.json @@ -2140,7 +2140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2410,7 +2410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2620,7 +2620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F107VC.json b/data/chips/STM32F107VC.json index 356c322..6b7888f 100644 --- a/data/chips/STM32F107VC.json +++ b/data/chips/STM32F107VC.json @@ -2746,7 +2746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2909,7 +2909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3016,7 +3016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3127,7 +3127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F205RB.json b/data/chips/STM32F205RB.json index 31c712b..d9255f3 100644 --- a/data/chips/STM32F205RB.json +++ b/data/chips/STM32F205RB.json @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2812,7 +2812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2954,7 +2954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3086,7 +3086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3173,7 +3173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RC.json b/data/chips/STM32F205RC.json index 0689bcd..f8b076c 100644 --- a/data/chips/STM32F205RC.json +++ b/data/chips/STM32F205RC.json @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3184,7 +3184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RE.json b/data/chips/STM32F205RE.json index f037928..edff04d 100644 --- a/data/chips/STM32F205RE.json +++ b/data/chips/STM32F205RE.json @@ -2798,7 +2798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3225,7 +3225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3367,7 +3367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3499,7 +3499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3586,7 +3586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3803,7 +3803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RF.json b/data/chips/STM32F205RF.json index 61482fc..aa3beb1 100644 --- a/data/chips/STM32F205RF.json +++ b/data/chips/STM32F205RF.json @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2823,7 +2823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3097,7 +3097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3184,7 +3184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205RG.json b/data/chips/STM32F205RG.json index ddabebc..760749f 100644 --- a/data/chips/STM32F205RG.json +++ b/data/chips/STM32F205RG.json @@ -3200,7 +3200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3627,7 +3627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3901,7 +3901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3988,7 +3988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4205,7 +4205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VB.json b/data/chips/STM32F205VB.json index cea90a0..ff6c7a1 100644 --- a/data/chips/STM32F205VB.json +++ b/data/chips/STM32F205VB.json @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3367,7 +3367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3509,7 +3509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3641,7 +3641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3753,7 +3753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3970,7 +3970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VC.json b/data/chips/STM32F205VC.json index a1b96e7..ff62109 100644 --- a/data/chips/STM32F205VC.json +++ b/data/chips/STM32F205VC.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3764,7 +3764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VE.json b/data/chips/STM32F205VE.json index f3546b8..39d3e9f 100644 --- a/data/chips/STM32F205VE.json +++ b/data/chips/STM32F205VE.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3764,7 +3764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VF.json b/data/chips/STM32F205VF.json index 4b6a034..50a6a1b 100644 --- a/data/chips/STM32F205VF.json +++ b/data/chips/STM32F205VF.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3764,7 +3764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205VG.json b/data/chips/STM32F205VG.json index f13bb8f..0c6f058 100644 --- a/data/chips/STM32F205VG.json +++ b/data/chips/STM32F205VG.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3764,7 +3764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZC.json b/data/chips/STM32F205ZC.json index 64acd96..fcd0c5c 100644 --- a/data/chips/STM32F205ZC.json +++ b/data/chips/STM32F205ZC.json @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4467,7 +4467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZE.json b/data/chips/STM32F205ZE.json index 1432123..abdc3e8 100644 --- a/data/chips/STM32F205ZE.json +++ b/data/chips/STM32F205ZE.json @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4467,7 +4467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZF.json b/data/chips/STM32F205ZF.json index 628761a..565a13e 100644 --- a/data/chips/STM32F205ZF.json +++ b/data/chips/STM32F205ZF.json @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4467,7 +4467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F205ZG.json b/data/chips/STM32F205ZG.json index 2dd5615..ec194b4 100644 --- a/data/chips/STM32F205ZG.json +++ b/data/chips/STM32F205ZG.json @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4006,7 +4006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4250,7 +4250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4467,7 +4467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IC.json b/data/chips/STM32F207IC.json index 4c0d326..292a332 100644 --- a/data/chips/STM32F207IC.json +++ b/data/chips/STM32F207IC.json @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IE.json b/data/chips/STM32F207IE.json index 8b5d0cc..4cfa80d 100644 --- a/data/chips/STM32F207IE.json +++ b/data/chips/STM32F207IE.json @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IF.json b/data/chips/STM32F207IF.json index 5ff7e32..8b770fe 100644 --- a/data/chips/STM32F207IF.json +++ b/data/chips/STM32F207IF.json @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207IG.json b/data/chips/STM32F207IG.json index 39d9578..4373de9 100644 --- a/data/chips/STM32F207IG.json +++ b/data/chips/STM32F207IG.json @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5919,7 +5919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6400,7 +6400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VC.json b/data/chips/STM32F207VC.json index 534cb47..41ce1bf 100644 --- a/data/chips/STM32F207VC.json +++ b/data/chips/STM32F207VC.json @@ -3195,7 +3195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3809,7 +3809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VE.json b/data/chips/STM32F207VE.json index 5133766..8bb30ca 100644 --- a/data/chips/STM32F207VE.json +++ b/data/chips/STM32F207VE.json @@ -3195,7 +3195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3809,7 +3809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VF.json b/data/chips/STM32F207VF.json index 2586d93..b4296a6 100644 --- a/data/chips/STM32F207VF.json +++ b/data/chips/STM32F207VF.json @@ -3195,7 +3195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3809,7 +3809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207VG.json b/data/chips/STM32F207VG.json index d54e9e5..42f6811 100644 --- a/data/chips/STM32F207VG.json +++ b/data/chips/STM32F207VG.json @@ -3195,7 +3195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3809,7 +3809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3941,7 +3941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZC.json b/data/chips/STM32F207ZC.json index 5f7b66e..85820c1 100644 --- a/data/chips/STM32F207ZC.json +++ b/data/chips/STM32F207ZC.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZE.json b/data/chips/STM32F207ZE.json index 6012549..2557cf6 100644 --- a/data/chips/STM32F207ZE.json +++ b/data/chips/STM32F207ZE.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZF.json b/data/chips/STM32F207ZF.json index 4351521..b5e53e7 100644 --- a/data/chips/STM32F207ZF.json +++ b/data/chips/STM32F207ZF.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F207ZG.json b/data/chips/STM32F207ZG.json index 91863c7..5fd10da 100644 --- a/data/chips/STM32F207ZG.json +++ b/data/chips/STM32F207ZG.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4183,7 +4183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4325,7 +4325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4786,7 +4786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215RE.json b/data/chips/STM32F215RE.json index bb21522..4169151 100644 --- a/data/chips/STM32F215RE.json +++ b/data/chips/STM32F215RE.json @@ -2465,7 +2465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3034,7 +3034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3166,7 +3166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215RG.json b/data/chips/STM32F215RG.json index bc7082a..427fada 100644 --- a/data/chips/STM32F215RG.json +++ b/data/chips/STM32F215RG.json @@ -2465,7 +2465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3034,7 +3034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3166,7 +3166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215VE.json b/data/chips/STM32F215VE.json index f268575..d7009a6 100644 --- a/data/chips/STM32F215VE.json +++ b/data/chips/STM32F215VE.json @@ -2975,7 +2975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3447,7 +3447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3721,7 +3721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4050,7 +4050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215VG.json b/data/chips/STM32F215VG.json index 2aedd75..b802004 100644 --- a/data/chips/STM32F215VG.json +++ b/data/chips/STM32F215VG.json @@ -2975,7 +2975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3447,7 +3447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3721,7 +3721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3833,7 +3833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4050,7 +4050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215ZE.json b/data/chips/STM32F215ZE.json index 290fb89..4b82a4b 100644 --- a/data/chips/STM32F215ZE.json +++ b/data/chips/STM32F215ZE.json @@ -3441,7 +3441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3933,7 +3933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4319,7 +4319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4536,7 +4536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F215ZG.json b/data/chips/STM32F215ZG.json index 9d53c1d..d7e0786 100644 --- a/data/chips/STM32F215ZG.json +++ b/data/chips/STM32F215ZG.json @@ -3441,7 +3441,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3933,7 +3933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4319,7 +4319,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4536,7 +4536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217IE.json b/data/chips/STM32F217IE.json index 23b0616..6549b82 100644 --- a/data/chips/STM32F217IE.json +++ b/data/chips/STM32F217IE.json @@ -5344,7 +5344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5846,7 +5846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5988,7 +5988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6232,7 +6232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6469,7 +6469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217IG.json b/data/chips/STM32F217IG.json index 307c46b..0d7df71 100644 --- a/data/chips/STM32F217IG.json +++ b/data/chips/STM32F217IG.json @@ -5344,7 +5344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5846,7 +5846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5988,7 +5988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6232,7 +6232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6469,7 +6469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217VE.json b/data/chips/STM32F217VE.json index 0b15366..8de933d 100644 --- a/data/chips/STM32F217VE.json +++ b/data/chips/STM32F217VE.json @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3736,7 +3736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3878,7 +3878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4122,7 +4122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4339,7 +4339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217VG.json b/data/chips/STM32F217VG.json index 4e0b98e..9895dd3 100644 --- a/data/chips/STM32F217VG.json +++ b/data/chips/STM32F217VG.json @@ -3264,7 +3264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3736,7 +3736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3878,7 +3878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4122,7 +4122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4339,7 +4339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217ZE.json b/data/chips/STM32F217ZE.json index 822c970..ee6018a 100644 --- a/data/chips/STM32F217ZE.json +++ b/data/chips/STM32F217ZE.json @@ -3760,7 +3760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4526,7 +4526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F217ZG.json b/data/chips/STM32F217ZG.json index 0aac582..b5fa748 100644 --- a/data/chips/STM32F217ZG.json +++ b/data/chips/STM32F217ZG.json @@ -3760,7 +3760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4252,7 +4252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4526,7 +4526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F301C6.json b/data/chips/STM32F301C6.json index dbdd2ab..f01caa4 100644 --- a/data/chips/STM32F301C6.json +++ b/data/chips/STM32F301C6.json @@ -1732,7 +1732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1915,7 +1915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2016,7 +2016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2117,7 +2117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2213,7 +2213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301C8.json b/data/chips/STM32F301C8.json index a93de2d..cd3c985 100644 --- a/data/chips/STM32F301C8.json +++ b/data/chips/STM32F301C8.json @@ -2038,7 +2038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2423,7 +2423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301K6.json b/data/chips/STM32F301K6.json index 22d691e..e47f7f2 100644 --- a/data/chips/STM32F301K6.json +++ b/data/chips/STM32F301K6.json @@ -1696,7 +1696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1849,7 +1849,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1935,7 +1935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2122,7 +2122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301K8.json b/data/chips/STM32F301K8.json index 82b50a0..12fc3c3 100644 --- a/data/chips/STM32F301K8.json +++ b/data/chips/STM32F301K8.json @@ -1702,7 +1702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1941,7 +1941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2037,7 +2037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2128,7 +2128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301R6.json b/data/chips/STM32F301R6.json index 004c258..3f8fbcd 100644 --- a/data/chips/STM32F301R6.json +++ b/data/chips/STM32F301R6.json @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2115,7 +2115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2418,7 +2418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F301R8.json b/data/chips/STM32F301R8.json index 002106c..12802fa 100644 --- a/data/chips/STM32F301R8.json +++ b/data/chips/STM32F301R8.json @@ -1908,7 +1908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2121,7 +2121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2227,7 +2227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2424,7 +2424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302C6.json b/data/chips/STM32F302C6.json index 39b2b6e..86a54e6 100644 --- a/data/chips/STM32F302C6.json +++ b/data/chips/STM32F302C6.json @@ -1805,7 +1805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2089,7 +2089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2190,7 +2190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2286,7 +2286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302C8.json b/data/chips/STM32F302C8.json index 8dad0c7..0460be2 100644 --- a/data/chips/STM32F302C8.json +++ b/data/chips/STM32F302C8.json @@ -2105,7 +2105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2288,7 +2288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2389,7 +2389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2490,7 +2490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302CB.json b/data/chips/STM32F302CB.json index 690a5ff..b3adbea 100644 --- a/data/chips/STM32F302CB.json +++ b/data/chips/STM32F302CB.json @@ -2038,7 +2038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2423,7 +2423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2659,7 +2659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2771,7 +2771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302CC.json b/data/chips/STM32F302CC.json index db368a9..a0a1904 100644 --- a/data/chips/STM32F302CC.json +++ b/data/chips/STM32F302CC.json @@ -2038,7 +2038,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2322,7 +2322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2423,7 +2423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2659,7 +2659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2771,7 +2771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302K6.json b/data/chips/STM32F302K6.json index 9fea8b7..1bf5566 100644 --- a/data/chips/STM32F302K6.json +++ b/data/chips/STM32F302K6.json @@ -1552,7 +1552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1700,7 +1700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302K8.json b/data/chips/STM32F302K8.json index 118658e..027c2b1 100644 --- a/data/chips/STM32F302K8.json +++ b/data/chips/STM32F302K8.json @@ -1552,7 +1552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1700,7 +1700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1882,7 +1882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302R6.json b/data/chips/STM32F302R6.json index c4c6a45..213b72e 100644 --- a/data/chips/STM32F302R6.json +++ b/data/chips/STM32F302R6.json @@ -1975,7 +1975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2188,7 +2188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2395,7 +2395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2491,7 +2491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302R8.json b/data/chips/STM32F302R8.json index d6f385a..9e9d31c 100644 --- a/data/chips/STM32F302R8.json +++ b/data/chips/STM32F302R8.json @@ -1975,7 +1975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2188,7 +2188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2395,7 +2395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2491,7 +2491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RB.json b/data/chips/STM32F302RB.json index e1d8330..c9d3912 100644 --- a/data/chips/STM32F302RB.json +++ b/data/chips/STM32F302RB.json @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2533,7 +2533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2634,7 +2634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2730,7 +2730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2870,7 +2870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3007,7 +3007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RC.json b/data/chips/STM32F302RC.json index b38be45..1973ffd 100644 --- a/data/chips/STM32F302RC.json +++ b/data/chips/STM32F302RC.json @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2533,7 +2533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2634,7 +2634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2730,7 +2730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2870,7 +2870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3007,7 +3007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RD.json b/data/chips/STM32F302RD.json index ec0caff..90566cd 100644 --- a/data/chips/STM32F302RD.json +++ b/data/chips/STM32F302RD.json @@ -2376,7 +2376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2589,7 +2589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3169,7 +3169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302RE.json b/data/chips/STM32F302RE.json index cab44b2..d809bff 100644 --- a/data/chips/STM32F302RE.json +++ b/data/chips/STM32F302RE.json @@ -2376,7 +2376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2589,7 +2589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2892,7 +2892,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3169,7 +3169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VB.json b/data/chips/STM32F302VB.json index 88071b3..ff525c9 100644 --- a/data/chips/STM32F302VB.json +++ b/data/chips/STM32F302VB.json @@ -2526,7 +2526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2764,7 +2764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2875,7 +2875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2981,7 +2981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3082,7 +3082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3247,7 +3247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VC.json b/data/chips/STM32F302VC.json index 429220e..9b7b12f 100644 --- a/data/chips/STM32F302VC.json +++ b/data/chips/STM32F302VC.json @@ -3132,7 +3132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3370,7 +3370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3481,7 +3481,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3587,7 +3587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VD.json b/data/chips/STM32F302VD.json index 4fb8724..4bc6995 100644 --- a/data/chips/STM32F302VD.json +++ b/data/chips/STM32F302VD.json @@ -3621,7 +3621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3884,7 +3884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4000,7 +4000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4106,7 +4106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4372,7 +4372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302VE.json b/data/chips/STM32F302VE.json index cb9215a..bf4f69d 100644 --- a/data/chips/STM32F302VE.json +++ b/data/chips/STM32F302VE.json @@ -3621,7 +3621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3884,7 +3884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4000,7 +4000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4106,7 +4106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4372,7 +4372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302ZD.json b/data/chips/STM32F302ZD.json index 1e81437..b4ab23a 100644 --- a/data/chips/STM32F302ZD.json +++ b/data/chips/STM32F302ZD.json @@ -3423,7 +3423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3686,7 +3686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3908,7 +3908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4009,7 +4009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4174,7 +4174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4331,7 +4331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F302ZE.json b/data/chips/STM32F302ZE.json index a4b45ac..347e2eb 100644 --- a/data/chips/STM32F302ZE.json +++ b/data/chips/STM32F302ZE.json @@ -3423,7 +3423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3686,7 +3686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3908,7 +3908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4009,7 +4009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4174,7 +4174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4331,7 +4331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303C6.json b/data/chips/STM32F303C6.json index 6443638..8ed8aea 100644 --- a/data/chips/STM32F303C6.json +++ b/data/chips/STM32F303C6.json @@ -1703,7 +1703,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1901,7 +1901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2007,7 +2007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2108,7 +2108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2204,7 +2204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303C8.json b/data/chips/STM32F303C8.json index dd56fa0..8dd1d77 100644 --- a/data/chips/STM32F303C8.json +++ b/data/chips/STM32F303C8.json @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2307,7 +2307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2408,7 +2408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2644,7 +2644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303CB.json b/data/chips/STM32F303CB.json index 3e1f835..d2e742c 100644 --- a/data/chips/STM32F303CB.json +++ b/data/chips/STM32F303CB.json @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2588,7 +2588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2689,7 +2689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2790,7 +2790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2886,7 +2886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3138,7 +3138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3352,7 +3352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303CC.json b/data/chips/STM32F303CC.json index 25e9f3a..07c5441 100644 --- a/data/chips/STM32F303CC.json +++ b/data/chips/STM32F303CC.json @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2588,7 +2588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2689,7 +2689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2790,7 +2790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2886,7 +2886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3138,7 +3138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3352,7 +3352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303K6.json b/data/chips/STM32F303K6.json index 092a84f..c06ca13 100644 --- a/data/chips/STM32F303K6.json +++ b/data/chips/STM32F303K6.json @@ -1667,7 +1667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1820,7 +1820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1906,7 +1906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2093,7 +2093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2223,7 +2223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303K8.json b/data/chips/STM32F303K8.json index dd7c8f4..bf0afa3 100644 --- a/data/chips/STM32F303K8.json +++ b/data/chips/STM32F303K8.json @@ -1667,7 +1667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1820,7 +1820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1906,7 +1906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2002,7 +2002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2093,7 +2093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2223,7 +2223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303R6.json b/data/chips/STM32F303R6.json index c911f83..139f66a 100644 --- a/data/chips/STM32F303R6.json +++ b/data/chips/STM32F303R6.json @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2248,7 +2248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303R8.json b/data/chips/STM32F303R8.json index 784ef22..79ce7d6 100644 --- a/data/chips/STM32F303R8.json +++ b/data/chips/STM32F303R8.json @@ -1828,7 +1828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2248,7 +2248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2484,7 +2484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F303RB.json b/data/chips/STM32F303RB.json index 8b36fc6..7898ba7 100644 --- a/data/chips/STM32F303RB.json +++ b/data/chips/STM32F303RB.json @@ -2634,7 +2634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2923,7 +2923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3024,7 +3024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3120,7 +3120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3260,7 +3260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3397,7 +3397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RC.json b/data/chips/STM32F303RC.json index b2cc06d..750a1fb 100644 --- a/data/chips/STM32F303RC.json +++ b/data/chips/STM32F303RC.json @@ -2640,7 +2640,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2828,7 +2828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2929,7 +2929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3030,7 +3030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3126,7 +3126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3266,7 +3266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3403,7 +3403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3617,7 +3617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RD.json b/data/chips/STM32F303RD.json index 7c1c177..ea166c7 100644 --- a/data/chips/STM32F303RD.json +++ b/data/chips/STM32F303RD.json @@ -2762,7 +2762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2975,7 +2975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3081,7 +3081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3182,7 +3182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3418,7 +3418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3555,7 +3555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303RE.json b/data/chips/STM32F303RE.json index c019685..c8bd279 100644 --- a/data/chips/STM32F303RE.json +++ b/data/chips/STM32F303RE.json @@ -2762,7 +2762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2975,7 +2975,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3081,7 +3081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3182,7 +3182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3418,7 +3418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3555,7 +3555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VB.json b/data/chips/STM32F303VB.json index babae90..6657142 100644 --- a/data/chips/STM32F303VB.json +++ b/data/chips/STM32F303VB.json @@ -3036,7 +3036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3274,7 +3274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3385,7 +3385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3592,7 +3592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3914,7 +3914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4158,7 +4158,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VC.json b/data/chips/STM32F303VC.json index 9977354..2bae8b7 100644 --- a/data/chips/STM32F303VC.json +++ b/data/chips/STM32F303VC.json @@ -3642,7 +3642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4097,7 +4097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4198,7 +4198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4363,7 +4363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4520,7 +4520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4764,7 +4764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VD.json b/data/chips/STM32F303VD.json index 9b1b724..35a72ee 100644 --- a/data/chips/STM32F303VD.json +++ b/data/chips/STM32F303VD.json @@ -4119,7 +4119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4382,7 +4382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4498,7 +4498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4705,7 +4705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4870,7 +4870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4998,7 +4998,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5155,7 +5155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5399,7 +5399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303VE.json b/data/chips/STM32F303VE.json index a778264..f36d0ea 100644 --- a/data/chips/STM32F303VE.json +++ b/data/chips/STM32F303VE.json @@ -4725,7 +4725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4988,7 +4988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5104,7 +5104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5311,7 +5311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5476,7 +5476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5604,7 +5604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5761,7 +5761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6005,7 +6005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303ZD.json b/data/chips/STM32F303ZD.json index cd616ab..a007951 100644 --- a/data/chips/STM32F303ZD.json +++ b/data/chips/STM32F303ZD.json @@ -3921,7 +3921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4184,7 +4184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4300,7 +4300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4507,7 +4507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4672,7 +4672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5047,7 +5047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5291,7 +5291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F303ZE.json b/data/chips/STM32F303ZE.json index f918eb8..8a9a887 100644 --- a/data/chips/STM32F303ZE.json +++ b/data/chips/STM32F303ZE.json @@ -3921,7 +3921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4184,7 +4184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4300,7 +4300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4507,7 +4507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4672,7 +4672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5047,7 +5047,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5291,7 +5291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F318C8.json b/data/chips/STM32F318C8.json index ba81f21..44ca9eb 100644 --- a/data/chips/STM32F318C8.json +++ b/data/chips/STM32F318C8.json @@ -2028,7 +2028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2509,7 +2509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F318K8.json b/data/chips/STM32F318K8.json index ac8c200..bc948eb 100644 --- a/data/chips/STM32F318K8.json +++ b/data/chips/STM32F318K8.json @@ -1484,7 +1484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1632,7 +1632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1814,7 +1814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F328C8.json b/data/chips/STM32F328C8.json index ed172d5..c6d992d 100644 --- a/data/chips/STM32F328C8.json +++ b/data/chips/STM32F328C8.json @@ -1647,7 +1647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1830,7 +1830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1931,7 +1931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2032,7 +2032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2128,7 +2128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C4.json b/data/chips/STM32F334C4.json index b13571b..00fbe8f 100644 --- a/data/chips/STM32F334C4.json +++ b/data/chips/STM32F334C4.json @@ -1910,7 +1910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2108,7 +2108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2315,7 +2315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2551,7 +2551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C6.json b/data/chips/STM32F334C6.json index a932260..87999df 100644 --- a/data/chips/STM32F334C6.json +++ b/data/chips/STM32F334C6.json @@ -1910,7 +1910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2108,7 +2108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2214,7 +2214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2315,7 +2315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2551,7 +2551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334C8.json b/data/chips/STM32F334C8.json index 373da39..54904d3 100644 --- a/data/chips/STM32F334C8.json +++ b/data/chips/STM32F334C8.json @@ -2210,7 +2210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2408,7 +2408,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2514,7 +2514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2615,7 +2615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2711,7 +2711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2851,7 +2851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K4.json b/data/chips/STM32F334K4.json index 0b68de8..57a47ad 100644 --- a/data/chips/STM32F334K4.json +++ b/data/chips/STM32F334K4.json @@ -1824,7 +1824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1977,7 +1977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2159,7 +2159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2250,7 +2250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2380,7 +2380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K6.json b/data/chips/STM32F334K6.json index a44b618..818237c 100644 --- a/data/chips/STM32F334K6.json +++ b/data/chips/STM32F334K6.json @@ -1824,7 +1824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1977,7 +1977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2159,7 +2159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2250,7 +2250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2380,7 +2380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334K8.json b/data/chips/STM32F334K8.json index fb8916e..2183c43 100644 --- a/data/chips/STM32F334K8.json +++ b/data/chips/STM32F334K8.json @@ -1824,7 +1824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1977,7 +1977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2159,7 +2159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2250,7 +2250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2380,7 +2380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334R6.json b/data/chips/STM32F334R6.json index 9c1fb40..ae56ea1 100644 --- a/data/chips/STM32F334R6.json +++ b/data/chips/STM32F334R6.json @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2379,7 +2379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2576,7 +2576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2716,7 +2716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F334R8.json b/data/chips/STM32F334R8.json index 4b88135..48e651c 100644 --- a/data/chips/STM32F334R8.json +++ b/data/chips/STM32F334R8.json @@ -2060,7 +2060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2379,7 +2379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2576,7 +2576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2716,7 +2716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F358CC.json b/data/chips/STM32F358CC.json index efbfc2c..5f1c2a7 100644 --- a/data/chips/STM32F358CC.json +++ b/data/chips/STM32F358CC.json @@ -2353,7 +2353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2536,7 +2536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2637,7 +2637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2738,7 +2738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2834,7 +2834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2974,7 +2974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3086,7 +3086,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3300,7 +3300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F358RC.json b/data/chips/STM32F358RC.json index 991329a..9da45bc 100644 --- a/data/chips/STM32F358RC.json +++ b/data/chips/STM32F358RC.json @@ -2582,7 +2582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2770,7 +2770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2871,7 +2871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2972,7 +2972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3068,7 +3068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3345,7 +3345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3559,7 +3559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F358VC.json b/data/chips/STM32F358VC.json index c64369b..9ac21d8 100644 --- a/data/chips/STM32F358VC.json +++ b/data/chips/STM32F358VC.json @@ -2984,7 +2984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3333,7 +3333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3439,7 +3439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3862,7 +3862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4106,7 +4106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F373C8.json b/data/chips/STM32F373C8.json index e4e44fe..eb06037 100644 --- a/data/chips/STM32F373C8.json +++ b/data/chips/STM32F373C8.json @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2468,7 +2468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2569,7 +2569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2721,7 +2721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2833,7 +2833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2963,7 +2963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3080,7 +3080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3193,7 +3193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373CB.json b/data/chips/STM32F373CB.json index 320c146..cb685ed 100644 --- a/data/chips/STM32F373CB.json +++ b/data/chips/STM32F373CB.json @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2468,7 +2468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2569,7 +2569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2721,7 +2721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2833,7 +2833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2963,7 +2963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3080,7 +3080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3193,7 +3193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373CC.json b/data/chips/STM32F373CC.json index ade27c7..9b31c70 100644 --- a/data/chips/STM32F373CC.json +++ b/data/chips/STM32F373CC.json @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2468,7 +2468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2569,7 +2569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2721,7 +2721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2833,7 +2833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2963,7 +2963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3080,7 +3080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3193,7 +3193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373R8.json b/data/chips/STM32F373R8.json index 6144fa7..acc00b8 100644 --- a/data/chips/STM32F373R8.json +++ b/data/chips/STM32F373R8.json @@ -2591,7 +2591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2707,7 +2707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3092,7 +3092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3369,7 +3369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3482,7 +3482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373RB.json b/data/chips/STM32F373RB.json index 65826d8..201a16d 100644 --- a/data/chips/STM32F373RB.json +++ b/data/chips/STM32F373RB.json @@ -2591,7 +2591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2707,7 +2707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3092,7 +3092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3369,7 +3369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3482,7 +3482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373RC.json b/data/chips/STM32F373RC.json index 2d18370..c2fa031 100644 --- a/data/chips/STM32F373RC.json +++ b/data/chips/STM32F373RC.json @@ -2591,7 +2591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2707,7 +2707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3092,7 +3092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3369,7 +3369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3482,7 +3482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373V8.json b/data/chips/STM32F373V8.json index 8abb5e3..9667452 100644 --- a/data/chips/STM32F373V8.json +++ b/data/chips/STM32F373V8.json @@ -3590,7 +3590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3706,7 +3706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3807,7 +3807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3964,7 +3964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4236,7 +4236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4383,7 +4383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373VB.json b/data/chips/STM32F373VB.json index 33931bb..33c898c 100644 --- a/data/chips/STM32F373VB.json +++ b/data/chips/STM32F373VB.json @@ -3590,7 +3590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3706,7 +3706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3807,7 +3807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3964,7 +3964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4236,7 +4236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4383,7 +4383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F373VC.json b/data/chips/STM32F373VC.json index 48c500b..9d35048 100644 --- a/data/chips/STM32F373VC.json +++ b/data/chips/STM32F373VC.json @@ -3590,7 +3590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3706,7 +3706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3807,7 +3807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3964,7 +3964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4101,7 +4101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4236,7 +4236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4383,7 +4383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378CC.json b/data/chips/STM32F378CC.json index fe7ab00..1a6f305 100644 --- a/data/chips/STM32F378CC.json +++ b/data/chips/STM32F378CC.json @@ -2326,7 +2326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2442,7 +2442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2807,7 +2807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2937,7 +2937,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3054,7 +3054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3167,7 +3167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378RC.json b/data/chips/STM32F378RC.json index beb5868..c4cf46d 100644 --- a/data/chips/STM32F378RC.json +++ b/data/chips/STM32F378RC.json @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3083,7 +3083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3184,7 +3184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3468,7 +3468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3598,7 +3598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3745,7 +3745,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3858,7 +3858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F378VC.json b/data/chips/STM32F378VC.json index 8c84055..6e50a9e 100644 --- a/data/chips/STM32F378VC.json +++ b/data/chips/STM32F378VC.json @@ -3564,7 +3564,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3680,7 +3680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3781,7 +3781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4357,7 +4357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4495,7 +4495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F398VE.json b/data/chips/STM32F398VE.json index c8f38a7..4ca7dac 100644 --- a/data/chips/STM32F398VE.json +++ b/data/chips/STM32F398VE.json @@ -3467,7 +3467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3730,7 +3730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3846,7 +3846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3952,7 +3952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4053,7 +4053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4218,7 +4218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4346,7 +4346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4503,7 +4503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4747,7 +4747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F401CB.json b/data/chips/STM32F401CB.json index 374985f..79a8f3b 100644 --- a/data/chips/STM32F401CB.json +++ b/data/chips/STM32F401CB.json @@ -1992,7 +1992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2264,7 +2264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2401,7 +2401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2595,7 +2595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CC.json b/data/chips/STM32F401CC.json index 7c29dd6..fc599bf 100644 --- a/data/chips/STM32F401CC.json +++ b/data/chips/STM32F401CC.json @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2575,7 +2575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2819,7 +2819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CD.json b/data/chips/STM32F401CD.json index 4d797d6..59733ac 100644 --- a/data/chips/STM32F401CD.json +++ b/data/chips/STM32F401CD.json @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2275,7 +2275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2606,7 +2606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401CE.json b/data/chips/STM32F401CE.json index e658d11..a70a1a9 100644 --- a/data/chips/STM32F401CE.json +++ b/data/chips/STM32F401CE.json @@ -2003,7 +2003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2275,7 +2275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2519,7 +2519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2606,7 +2606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RB.json b/data/chips/STM32F401RB.json index bd1d300..146557f 100644 --- a/data/chips/STM32F401RB.json +++ b/data/chips/STM32F401RB.json @@ -1996,7 +1996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2537,7 +2537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2624,7 +2624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RC.json b/data/chips/STM32F401RC.json index 1472481..21bc193 100644 --- a/data/chips/STM32F401RC.json +++ b/data/chips/STM32F401RC.json @@ -2007,7 +2007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2279,7 +2279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RD.json b/data/chips/STM32F401RD.json index 63fac5e..4ff0cd4 100644 --- a/data/chips/STM32F401RD.json +++ b/data/chips/STM32F401RD.json @@ -2007,7 +2007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2279,7 +2279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401RE.json b/data/chips/STM32F401RE.json index 1ee36a8..0136350 100644 --- a/data/chips/STM32F401RE.json +++ b/data/chips/STM32F401RE.json @@ -2007,7 +2007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2279,7 +2279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2416,7 +2416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VB.json b/data/chips/STM32F401VB.json index 1fe9d53..ea7a9ff 100644 --- a/data/chips/STM32F401VB.json +++ b/data/chips/STM32F401VB.json @@ -2934,7 +2934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3251,7 +3251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3393,7 +3393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3525,7 +3525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3637,7 +3637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VC.json b/data/chips/STM32F401VC.json index 6464631..aa98e4c 100644 --- a/data/chips/STM32F401VC.json +++ b/data/chips/STM32F401VC.json @@ -2945,7 +2945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3536,7 +3536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3648,7 +3648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VD.json b/data/chips/STM32F401VD.json index da1a2b7..1386ca2 100644 --- a/data/chips/STM32F401VD.json +++ b/data/chips/STM32F401VD.json @@ -2945,7 +2945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3536,7 +3536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3648,7 +3648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F401VE.json b/data/chips/STM32F401VE.json index 1ba7b0a..83f84d8 100644 --- a/data/chips/STM32F401VE.json +++ b/data/chips/STM32F401VE.json @@ -2945,7 +2945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3536,7 +3536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3648,7 +3648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F405OE.json b/data/chips/STM32F405OE.json index ad4b5bb..36beb6a 100644 --- a/data/chips/STM32F405OE.json +++ b/data/chips/STM32F405OE.json @@ -2843,7 +2843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3315,7 +3315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3457,7 +3457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3913,7 +3913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405OG.json b/data/chips/STM32F405OG.json index bba2afa..5795ece 100644 --- a/data/chips/STM32F405OG.json +++ b/data/chips/STM32F405OG.json @@ -2843,7 +2843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3315,7 +3315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3457,7 +3457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3589,7 +3589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3913,7 +3913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405RG.json b/data/chips/STM32F405RG.json index e5641df..5171597 100644 --- a/data/chips/STM32F405RG.json +++ b/data/chips/STM32F405RG.json @@ -2446,7 +2446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2873,7 +2873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3147,7 +3147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3234,7 +3234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3451,7 +3451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405VG.json b/data/chips/STM32F405VG.json index 16eeb86..3ad965b 100644 --- a/data/chips/STM32F405VG.json +++ b/data/chips/STM32F405VG.json @@ -2956,7 +2956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3428,7 +3428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3570,7 +3570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3702,7 +3702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3814,7 +3814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4031,7 +4031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F405ZG.json b/data/chips/STM32F405ZG.json index 22bdb5d..ce570d5 100644 --- a/data/chips/STM32F405ZG.json +++ b/data/chips/STM32F405ZG.json @@ -3422,7 +3422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3914,7 +3914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4188,7 +4188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4300,7 +4300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4517,7 +4517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407IE.json b/data/chips/STM32F407IE.json index 8b2079d..e27b1df 100644 --- a/data/chips/STM32F407IE.json +++ b/data/chips/STM32F407IE.json @@ -5342,7 +5342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5844,7 +5844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6118,7 +6118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6230,7 +6230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6467,7 +6467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407IG.json b/data/chips/STM32F407IG.json index b2b83bf..5f7c385 100644 --- a/data/chips/STM32F407IG.json +++ b/data/chips/STM32F407IG.json @@ -5342,7 +5342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5844,7 +5844,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6118,7 +6118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6230,7 +6230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6467,7 +6467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407VE.json b/data/chips/STM32F407VE.json index eb40d28..052e83b 100644 --- a/data/chips/STM32F407VE.json +++ b/data/chips/STM32F407VE.json @@ -3257,7 +3257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4003,7 +4003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4115,7 +4115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407VG.json b/data/chips/STM32F407VG.json index 1f39bfa..bff0b75 100644 --- a/data/chips/STM32F407VG.json +++ b/data/chips/STM32F407VG.json @@ -3257,7 +3257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4003,7 +4003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4115,7 +4115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407ZE.json b/data/chips/STM32F407ZE.json index 4a79eae..19c1151 100644 --- a/data/chips/STM32F407ZE.json +++ b/data/chips/STM32F407ZE.json @@ -3753,7 +3753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4245,7 +4245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4387,7 +4387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4519,7 +4519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4631,7 +4631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F407ZG.json b/data/chips/STM32F407ZG.json index 2d270a3..c4df795 100644 --- a/data/chips/STM32F407ZG.json +++ b/data/chips/STM32F407ZG.json @@ -3753,7 +3753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4245,7 +4245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4387,7 +4387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4519,7 +4519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4631,7 +4631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F410C8.json b/data/chips/STM32F410C8.json index 436319a..b5d6ccb 100644 --- a/data/chips/STM32F410C8.json +++ b/data/chips/STM32F410C8.json @@ -2108,7 +2108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2330,7 +2330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410CB.json b/data/chips/STM32F410CB.json index 051fbb4..9330fd7 100644 --- a/data/chips/STM32F410CB.json +++ b/data/chips/STM32F410CB.json @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410R8.json b/data/chips/STM32F410R8.json index 5db60c9..54ef07a 100644 --- a/data/chips/STM32F410R8.json +++ b/data/chips/STM32F410R8.json @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2636,7 +2636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410RB.json b/data/chips/STM32F410RB.json index e1e7719..57b75f6 100644 --- a/data/chips/STM32F410RB.json +++ b/data/chips/STM32F410RB.json @@ -2420,7 +2420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2647,7 +2647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410T8.json b/data/chips/STM32F410T8.json index 7b87d9e..1e174d7 100644 --- a/data/chips/STM32F410T8.json +++ b/data/chips/STM32F410T8.json @@ -1456,7 +1456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1621,7 +1621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F410TB.json b/data/chips/STM32F410TB.json index 024c784..206e7a2 100644 --- a/data/chips/STM32F410TB.json +++ b/data/chips/STM32F410TB.json @@ -1467,7 +1467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1632,7 +1632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411CC.json b/data/chips/STM32F411CC.json index 0fa8e41..2501007 100644 --- a/data/chips/STM32F411CC.json +++ b/data/chips/STM32F411CC.json @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2655,7 +2655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2792,7 +2792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2899,7 +2899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2986,7 +2986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411CE.json b/data/chips/STM32F411CE.json index fa780aa..17ef9b5 100644 --- a/data/chips/STM32F411CE.json +++ b/data/chips/STM32F411CE.json @@ -2389,7 +2389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2661,7 +2661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2798,7 +2798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2905,7 +2905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411RC.json b/data/chips/STM32F411RC.json index 8c1fa06..c2d7be4 100644 --- a/data/chips/STM32F411RC.json +++ b/data/chips/STM32F411RC.json @@ -2323,7 +2323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2595,7 +2595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2732,7 +2732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2864,7 +2864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2951,7 +2951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411RE.json b/data/chips/STM32F411RE.json index 3a61ec4..ad7bd9c 100644 --- a/data/chips/STM32F411RE.json +++ b/data/chips/STM32F411RE.json @@ -2329,7 +2329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2738,7 +2738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2870,7 +2870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2957,7 +2957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411VC.json b/data/chips/STM32F411VC.json index d65f1e8..d5a7730 100644 --- a/data/chips/STM32F411VC.json +++ b/data/chips/STM32F411VC.json @@ -3310,7 +3310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3627,7 +3627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3901,7 +3901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4013,7 +4013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F411VE.json b/data/chips/STM32F411VE.json index d1dff2d..ecf53ee 100644 --- a/data/chips/STM32F411VE.json +++ b/data/chips/STM32F411VE.json @@ -3316,7 +3316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3633,7 +3633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3775,7 +3775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4019,7 +4019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32F412CE.json b/data/chips/STM32F412CE.json index 8757fc2..141d073 100644 --- a/data/chips/STM32F412CE.json +++ b/data/chips/STM32F412CE.json @@ -2364,7 +2364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2791,7 +2791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2928,7 +2928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3035,7 +3035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3339,7 +3339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412CG.json b/data/chips/STM32F412CG.json index 04b8aa8..7f7013f 100644 --- a/data/chips/STM32F412CG.json +++ b/data/chips/STM32F412CG.json @@ -2364,7 +2364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2791,7 +2791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2928,7 +2928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3035,7 +3035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3122,7 +3122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3339,7 +3339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412RE.json b/data/chips/STM32F412RE.json index 6d82486..02d410c 100644 --- a/data/chips/STM32F412RE.json +++ b/data/chips/STM32F412RE.json @@ -3669,7 +3669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4096,7 +4096,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4233,7 +4233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4365,7 +4365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4452,7 +4452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412RG.json b/data/chips/STM32F412RG.json index 43f9346..068f410 100644 --- a/data/chips/STM32F412RG.json +++ b/data/chips/STM32F412RG.json @@ -3669,7 +3669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4096,7 +4096,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4233,7 +4233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4365,7 +4365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4452,7 +4452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412VE.json b/data/chips/STM32F412VE.json index ca9ad3c..1d704d1 100644 --- a/data/chips/STM32F412VE.json +++ b/data/chips/STM32F412VE.json @@ -4267,7 +4267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4739,7 +4739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4881,7 +4881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5013,7 +5013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5125,7 +5125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5342,7 +5342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412VG.json b/data/chips/STM32F412VG.json index 46a7c19..6867371 100644 --- a/data/chips/STM32F412VG.json +++ b/data/chips/STM32F412VG.json @@ -4267,7 +4267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4739,7 +4739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4881,7 +4881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5013,7 +5013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5125,7 +5125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5342,7 +5342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412ZE.json b/data/chips/STM32F412ZE.json index 3b264e3..77b8a3a 100644 --- a/data/chips/STM32F412ZE.json +++ b/data/chips/STM32F412ZE.json @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5524,7 +5524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5666,7 +5666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5798,7 +5798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6147,7 +6147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F412ZG.json b/data/chips/STM32F412ZG.json index 59ff414..09c0962 100644 --- a/data/chips/STM32F412ZG.json +++ b/data/chips/STM32F412ZG.json @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5524,7 +5524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5666,7 +5666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5798,7 +5798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6147,7 +6147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413CG.json b/data/chips/STM32F413CG.json index 069910c..e1dc8ad 100644 --- a/data/chips/STM32F413CG.json +++ b/data/chips/STM32F413CG.json @@ -2881,7 +2881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3308,7 +3308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3445,7 +3445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3552,7 +3552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3639,7 +3639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3856,7 +3856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413CH.json b/data/chips/STM32F413CH.json index 0608858..57b3f91 100644 --- a/data/chips/STM32F413CH.json +++ b/data/chips/STM32F413CH.json @@ -2881,7 +2881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3308,7 +3308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3445,7 +3445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3552,7 +3552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3639,7 +3639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3856,7 +3856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413MG.json b/data/chips/STM32F413MG.json index 938d954..f811e5e 100644 --- a/data/chips/STM32F413MG.json +++ b/data/chips/STM32F413MG.json @@ -3827,7 +3827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4289,7 +4289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4426,7 +4426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4558,7 +4558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4645,7 +4645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4862,7 +4862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413MH.json b/data/chips/STM32F413MH.json index 99029f5..61192ac 100644 --- a/data/chips/STM32F413MH.json +++ b/data/chips/STM32F413MH.json @@ -3827,7 +3827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4289,7 +4289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4426,7 +4426,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4558,7 +4558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4645,7 +4645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4862,7 +4862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413RG.json b/data/chips/STM32F413RG.json index 0e04cfc..5e6e85b 100644 --- a/data/chips/STM32F413RG.json +++ b/data/chips/STM32F413RG.json @@ -3490,7 +3490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4054,7 +4054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4186,7 +4186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4273,7 +4273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4490,7 +4490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413RH.json b/data/chips/STM32F413RH.json index 5e82764..e1aabe4 100644 --- a/data/chips/STM32F413RH.json +++ b/data/chips/STM32F413RH.json @@ -3490,7 +3490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4054,7 +4054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4186,7 +4186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4273,7 +4273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4490,7 +4490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413VG.json b/data/chips/STM32F413VG.json index b8af486..852aeab 100644 --- a/data/chips/STM32F413VG.json +++ b/data/chips/STM32F413VG.json @@ -4947,7 +4947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5419,7 +5419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5561,7 +5561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5693,7 +5693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5805,7 +5805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6022,7 +6022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413VH.json b/data/chips/STM32F413VH.json index d045e97..45ca577 100644 --- a/data/chips/STM32F413VH.json +++ b/data/chips/STM32F413VH.json @@ -4947,7 +4947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5419,7 +5419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5561,7 +5561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5693,7 +5693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5805,7 +5805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6022,7 +6022,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413ZG.json b/data/chips/STM32F413ZG.json index 7ec749a..34a8ce7 100644 --- a/data/chips/STM32F413ZG.json +++ b/data/chips/STM32F413ZG.json @@ -5685,7 +5685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6182,7 +6182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6324,7 +6324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6456,7 +6456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6568,7 +6568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6805,7 +6805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F413ZH.json b/data/chips/STM32F413ZH.json index 65390c0..4b8c47b 100644 --- a/data/chips/STM32F413ZH.json +++ b/data/chips/STM32F413ZH.json @@ -5685,7 +5685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6182,7 +6182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6324,7 +6324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6456,7 +6456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6568,7 +6568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6805,7 +6805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415OG.json b/data/chips/STM32F415OG.json index d87807d..aa48849 100644 --- a/data/chips/STM32F415OG.json +++ b/data/chips/STM32F415OG.json @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3520,7 +3520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3652,7 +3652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3754,7 +3754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3976,7 +3976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415RG.json b/data/chips/STM32F415RG.json index 383a9bf..cc28e77 100644 --- a/data/chips/STM32F415RG.json +++ b/data/chips/STM32F415RG.json @@ -2509,7 +2509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2936,7 +2936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3078,7 +3078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3210,7 +3210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3297,7 +3297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3514,7 +3514,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415VG.json b/data/chips/STM32F415VG.json index 3683841..09b4847 100644 --- a/data/chips/STM32F415VG.json +++ b/data/chips/STM32F415VG.json @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3633,7 +3633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3765,7 +3765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3877,7 +3877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4094,7 +4094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F415ZG.json b/data/chips/STM32F415ZG.json index 0efa1be..2f2db40 100644 --- a/data/chips/STM32F415ZG.json +++ b/data/chips/STM32F415ZG.json @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3977,7 +3977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4119,7 +4119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4251,7 +4251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4363,7 +4363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4580,7 +4580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417IE.json b/data/chips/STM32F417IE.json index 0bcd0d3..ea64e7d 100644 --- a/data/chips/STM32F417IE.json +++ b/data/chips/STM32F417IE.json @@ -5405,7 +5405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5907,7 +5907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6181,7 +6181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417IG.json b/data/chips/STM32F417IG.json index 770a1c4..f9b2c5c 100644 --- a/data/chips/STM32F417IG.json +++ b/data/chips/STM32F417IG.json @@ -5405,7 +5405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5907,7 +5907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6181,7 +6181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417VE.json b/data/chips/STM32F417VE.json index bf775d6..1c6c07a 100644 --- a/data/chips/STM32F417VE.json +++ b/data/chips/STM32F417VE.json @@ -3320,7 +3320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3792,7 +3792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3934,7 +3934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4066,7 +4066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4178,7 +4178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4395,7 +4395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417VG.json b/data/chips/STM32F417VG.json index 8f59e52..c8a7b4e 100644 --- a/data/chips/STM32F417VG.json +++ b/data/chips/STM32F417VG.json @@ -3320,7 +3320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3792,7 +3792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3934,7 +3934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4066,7 +4066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4178,7 +4178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4395,7 +4395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417ZE.json b/data/chips/STM32F417ZE.json index 4a0f4b9..e3503c8 100644 --- a/data/chips/STM32F417ZE.json +++ b/data/chips/STM32F417ZE.json @@ -3816,7 +3816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4308,7 +4308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4450,7 +4450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4694,7 +4694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4911,7 +4911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F417ZG.json b/data/chips/STM32F417ZG.json index f9279f3..11f4765 100644 --- a/data/chips/STM32F417ZG.json +++ b/data/chips/STM32F417ZG.json @@ -3816,7 +3816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4308,7 +4308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4450,7 +4450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4694,7 +4694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4911,7 +4911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423CH.json b/data/chips/STM32F423CH.json index bc06b4f..77ffd7d 100644 --- a/data/chips/STM32F423CH.json +++ b/data/chips/STM32F423CH.json @@ -2908,7 +2908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3335,7 +3335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3472,7 +3472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3579,7 +3579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3666,7 +3666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3883,7 +3883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423MH.json b/data/chips/STM32F423MH.json index d6872f6..e545550 100644 --- a/data/chips/STM32F423MH.json +++ b/data/chips/STM32F423MH.json @@ -3854,7 +3854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4453,7 +4453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4585,7 +4585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4672,7 +4672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4889,7 +4889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423RH.json b/data/chips/STM32F423RH.json index 8e69ed1..7d343dc 100644 --- a/data/chips/STM32F423RH.json +++ b/data/chips/STM32F423RH.json @@ -3517,7 +3517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3944,7 +3944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4081,7 +4081,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4213,7 +4213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4300,7 +4300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4517,7 +4517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423VH.json b/data/chips/STM32F423VH.json index 02da3ba..637f654 100644 --- a/data/chips/STM32F423VH.json +++ b/data/chips/STM32F423VH.json @@ -4974,7 +4974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5446,7 +5446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5588,7 +5588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5832,7 +5832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6049,7 +6049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F423ZH.json b/data/chips/STM32F423ZH.json index c6d729e..c1ed79c 100644 --- a/data/chips/STM32F423ZH.json +++ b/data/chips/STM32F423ZH.json @@ -5712,7 +5712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6209,7 +6209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6351,7 +6351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6483,7 +6483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6595,7 +6595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6832,7 +6832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427AG.json b/data/chips/STM32F427AG.json index ce5b92d..af207a2 100644 --- a/data/chips/STM32F427AG.json +++ b/data/chips/STM32F427AG.json @@ -4521,7 +4521,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5003,7 +5003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5145,7 +5145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5277,7 +5277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5389,7 +5389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5626,7 +5626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427AI.json b/data/chips/STM32F427AI.json index 37aaa51..22d817f 100644 --- a/data/chips/STM32F427AI.json +++ b/data/chips/STM32F427AI.json @@ -4554,7 +4554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5036,7 +5036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5178,7 +5178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5310,7 +5310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5422,7 +5422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5659,7 +5659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427IG.json b/data/chips/STM32F427IG.json index 39981fc..da232a7 100644 --- a/data/chips/STM32F427IG.json +++ b/data/chips/STM32F427IG.json @@ -5988,7 +5988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6490,7 +6490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6764,7 +6764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6876,7 +6876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7113,7 +7113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427II.json b/data/chips/STM32F427II.json index 2453ad8..1995521 100644 --- a/data/chips/STM32F427II.json +++ b/data/chips/STM32F427II.json @@ -6021,7 +6021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6523,7 +6523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6665,7 +6665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6797,7 +6797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6909,7 +6909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7146,7 +7146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427VG.json b/data/chips/STM32F427VG.json index ba3e590..483d191 100644 --- a/data/chips/STM32F427VG.json +++ b/data/chips/STM32F427VG.json @@ -3552,7 +3552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4024,7 +4024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4166,7 +4166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4298,7 +4298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4627,7 +4627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427VI.json b/data/chips/STM32F427VI.json index 7d0ea25..dc3069e 100644 --- a/data/chips/STM32F427VI.json +++ b/data/chips/STM32F427VI.json @@ -3585,7 +3585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4057,7 +4057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4199,7 +4199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4331,7 +4331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4443,7 +4443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4660,7 +4660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427ZG.json b/data/chips/STM32F427ZG.json index 1aa0f7e..e1aff6d 100644 --- a/data/chips/STM32F427ZG.json +++ b/data/chips/STM32F427ZG.json @@ -4260,7 +4260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4752,7 +4752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4894,7 +4894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5026,7 +5026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5138,7 +5138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5355,7 +5355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F427ZI.json b/data/chips/STM32F427ZI.json index 1f43f84..cc789f3 100644 --- a/data/chips/STM32F427ZI.json +++ b/data/chips/STM32F427ZI.json @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4785,7 +4785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4927,7 +4927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5059,7 +5059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5171,7 +5171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5388,7 +5388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429AG.json b/data/chips/STM32F429AG.json index a79da75..3ad6982 100644 --- a/data/chips/STM32F429AG.json +++ b/data/chips/STM32F429AG.json @@ -4826,7 +4826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5308,7 +5308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5450,7 +5450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5694,7 +5694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5931,7 +5931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429AI.json b/data/chips/STM32F429AI.json index 4ed38f3..7c2aca2 100644 --- a/data/chips/STM32F429AI.json +++ b/data/chips/STM32F429AI.json @@ -4859,7 +4859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5341,7 +5341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5483,7 +5483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5615,7 +5615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5727,7 +5727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5964,7 +5964,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BE.json b/data/chips/STM32F429BE.json index 4459046..9c58210 100644 --- a/data/chips/STM32F429BE.json +++ b/data/chips/STM32F429BE.json @@ -5401,7 +5401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5903,7 +5903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6045,7 +6045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6177,7 +6177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6289,7 +6289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6526,7 +6526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BG.json b/data/chips/STM32F429BG.json index 409ba37..78c7777 100644 --- a/data/chips/STM32F429BG.json +++ b/data/chips/STM32F429BG.json @@ -5407,7 +5407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6183,7 +6183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6295,7 +6295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6532,7 +6532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429BI.json b/data/chips/STM32F429BI.json index ec4543c..737369d 100644 --- a/data/chips/STM32F429BI.json +++ b/data/chips/STM32F429BI.json @@ -5440,7 +5440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5942,7 +5942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6084,7 +6084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6216,7 +6216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6328,7 +6328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6565,7 +6565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429IE.json b/data/chips/STM32F429IE.json index 9f8b11b..571d1d8 100644 --- a/data/chips/STM32F429IE.json +++ b/data/chips/STM32F429IE.json @@ -6281,7 +6281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6783,7 +6783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6925,7 +6925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7057,7 +7057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7406,7 +7406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429IG.json b/data/chips/STM32F429IG.json index 62e4afd..3a0708d 100644 --- a/data/chips/STM32F429IG.json +++ b/data/chips/STM32F429IG.json @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6795,7 +6795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6937,7 +6937,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7069,7 +7069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7181,7 +7181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7418,7 +7418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429II.json b/data/chips/STM32F429II.json index 9cfe8f3..deca98b 100644 --- a/data/chips/STM32F429II.json +++ b/data/chips/STM32F429II.json @@ -6326,7 +6326,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6828,7 +6828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6970,7 +6970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7102,7 +7102,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7214,7 +7214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7451,7 +7451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NE.json b/data/chips/STM32F429NE.json index 5a7ad23..9b6dc0c 100644 --- a/data/chips/STM32F429NE.json +++ b/data/chips/STM32F429NE.json @@ -5449,7 +5449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5951,7 +5951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6225,7 +6225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6337,7 +6337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6574,7 +6574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NG.json b/data/chips/STM32F429NG.json index 109ddab..4b0326f 100644 --- a/data/chips/STM32F429NG.json +++ b/data/chips/STM32F429NG.json @@ -5455,7 +5455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5957,7 +5957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6099,7 +6099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6231,7 +6231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6343,7 +6343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6580,7 +6580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429NI.json b/data/chips/STM32F429NI.json index 3ee954c..9d9495c 100644 --- a/data/chips/STM32F429NI.json +++ b/data/chips/STM32F429NI.json @@ -5488,7 +5488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5990,7 +5990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6132,7 +6132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6264,7 +6264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6376,7 +6376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6613,7 +6613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VE.json b/data/chips/STM32F429VE.json index 643ff31..afe7f56 100644 --- a/data/chips/STM32F429VE.json +++ b/data/chips/STM32F429VE.json @@ -3685,7 +3685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4157,7 +4157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4299,7 +4299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4431,7 +4431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4543,7 +4543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4760,7 +4760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VG.json b/data/chips/STM32F429VG.json index 494ac71..f3056f8 100644 --- a/data/chips/STM32F429VG.json +++ b/data/chips/STM32F429VG.json @@ -3691,7 +3691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4163,7 +4163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4305,7 +4305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4437,7 +4437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4549,7 +4549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4766,7 +4766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429VI.json b/data/chips/STM32F429VI.json index 7c1aa50..dc30523 100644 --- a/data/chips/STM32F429VI.json +++ b/data/chips/STM32F429VI.json @@ -3724,7 +3724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4196,7 +4196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4338,7 +4338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4470,7 +4470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4582,7 +4582,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4799,7 +4799,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZE.json b/data/chips/STM32F429ZE.json index 07f6ca6..1aab25e 100644 --- a/data/chips/STM32F429ZE.json +++ b/data/chips/STM32F429ZE.json @@ -4458,7 +4458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4950,7 +4950,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5092,7 +5092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5224,7 +5224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5336,7 +5336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5553,7 +5553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZG.json b/data/chips/STM32F429ZG.json index 9c3975b..a8a6729 100644 --- a/data/chips/STM32F429ZG.json +++ b/data/chips/STM32F429ZG.json @@ -5328,7 +5328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5820,7 +5820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5962,7 +5962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6094,7 +6094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6206,7 +6206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6423,7 +6423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F429ZI.json b/data/chips/STM32F429ZI.json index ee0ff0b..7c1078e 100644 --- a/data/chips/STM32F429ZI.json +++ b/data/chips/STM32F429ZI.json @@ -5361,7 +5361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5853,7 +5853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6127,7 +6127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6239,7 +6239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6456,7 +6456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437AI.json b/data/chips/STM32F437AI.json index 90f0b4c..3d141d2 100644 --- a/data/chips/STM32F437AI.json +++ b/data/chips/STM32F437AI.json @@ -4623,7 +4623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5105,7 +5105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5247,7 +5247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5491,7 +5491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5728,7 +5728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437IG.json b/data/chips/STM32F437IG.json index befa79c..5fa31a8 100644 --- a/data/chips/STM32F437IG.json +++ b/data/chips/STM32F437IG.json @@ -6057,7 +6057,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6559,7 +6559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6701,7 +6701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6833,7 +6833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6945,7 +6945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7182,7 +7182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437II.json b/data/chips/STM32F437II.json index 9db8ab2..8d05f8c 100644 --- a/data/chips/STM32F437II.json +++ b/data/chips/STM32F437II.json @@ -6090,7 +6090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6592,7 +6592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6734,7 +6734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6866,7 +6866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6978,7 +6978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7215,7 +7215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437VG.json b/data/chips/STM32F437VG.json index dfe9592..5c75434 100644 --- a/data/chips/STM32F437VG.json +++ b/data/chips/STM32F437VG.json @@ -3621,7 +3621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4093,7 +4093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4367,7 +4367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4479,7 +4479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4696,7 +4696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437VI.json b/data/chips/STM32F437VI.json index 669b0dc..7365de7 100644 --- a/data/chips/STM32F437VI.json +++ b/data/chips/STM32F437VI.json @@ -3654,7 +3654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4126,7 +4126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4268,7 +4268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4400,7 +4400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4512,7 +4512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4729,7 +4729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437ZG.json b/data/chips/STM32F437ZG.json index fde16e6..19bb524 100644 --- a/data/chips/STM32F437ZG.json +++ b/data/chips/STM32F437ZG.json @@ -4329,7 +4329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4963,7 +4963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5095,7 +5095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5207,7 +5207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F437ZI.json b/data/chips/STM32F437ZI.json index 11e7a82..d9e61c6 100644 --- a/data/chips/STM32F437ZI.json +++ b/data/chips/STM32F437ZI.json @@ -4362,7 +4362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4854,7 +4854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4996,7 +4996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5128,7 +5128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5240,7 +5240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5457,7 +5457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439AI.json b/data/chips/STM32F439AI.json index 22b3b18..48624bf 100644 --- a/data/chips/STM32F439AI.json +++ b/data/chips/STM32F439AI.json @@ -4928,7 +4928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5410,7 +5410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5552,7 +5552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5684,7 +5684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5796,7 +5796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6033,7 +6033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439BG.json b/data/chips/STM32F439BG.json index e628d22..133c22a 100644 --- a/data/chips/STM32F439BG.json +++ b/data/chips/STM32F439BG.json @@ -5476,7 +5476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5978,7 +5978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6252,7 +6252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6364,7 +6364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6601,7 +6601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439BI.json b/data/chips/STM32F439BI.json index c498213..5124e2e 100644 --- a/data/chips/STM32F439BI.json +++ b/data/chips/STM32F439BI.json @@ -5509,7 +5509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6011,7 +6011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6153,7 +6153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6285,7 +6285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6397,7 +6397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6634,7 +6634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439IG.json b/data/chips/STM32F439IG.json index 3d260ca..5f32336 100644 --- a/data/chips/STM32F439IG.json +++ b/data/chips/STM32F439IG.json @@ -6362,7 +6362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6864,7 +6864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7006,7 +7006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7138,7 +7138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7250,7 +7250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7487,7 +7487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439II.json b/data/chips/STM32F439II.json index 1f96a0e..eff3dd5 100644 --- a/data/chips/STM32F439II.json +++ b/data/chips/STM32F439II.json @@ -6395,7 +6395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6897,7 +6897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7039,7 +7039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7171,7 +7171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7283,7 +7283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7520,7 +7520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439NG.json b/data/chips/STM32F439NG.json index fe2a371..01365d4 100644 --- a/data/chips/STM32F439NG.json +++ b/data/chips/STM32F439NG.json @@ -5524,7 +5524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6026,7 +6026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6168,7 +6168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6412,7 +6412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6649,7 +6649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439NI.json b/data/chips/STM32F439NI.json index c5b2ae7..c9fd3ef 100644 --- a/data/chips/STM32F439NI.json +++ b/data/chips/STM32F439NI.json @@ -5557,7 +5557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6059,7 +6059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6201,7 +6201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6333,7 +6333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6445,7 +6445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6682,7 +6682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439VG.json b/data/chips/STM32F439VG.json index bb30dde..1934a54 100644 --- a/data/chips/STM32F439VG.json +++ b/data/chips/STM32F439VG.json @@ -3760,7 +3760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4232,7 +4232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4374,7 +4374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4618,7 +4618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4835,7 +4835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439VI.json b/data/chips/STM32F439VI.json index 9637287..723e5ba 100644 --- a/data/chips/STM32F439VI.json +++ b/data/chips/STM32F439VI.json @@ -3793,7 +3793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4265,7 +4265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4407,7 +4407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4651,7 +4651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4868,7 +4868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439ZG.json b/data/chips/STM32F439ZG.json index 64b5ba4..70d5697 100644 --- a/data/chips/STM32F439ZG.json +++ b/data/chips/STM32F439ZG.json @@ -5397,7 +5397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5889,7 +5889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6031,7 +6031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6163,7 +6163,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6275,7 +6275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6492,7 +6492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F439ZI.json b/data/chips/STM32F439ZI.json index 341ffe5..0002d7b 100644 --- a/data/chips/STM32F439ZI.json +++ b/data/chips/STM32F439ZI.json @@ -5430,7 +5430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5922,7 +5922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6064,7 +6064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6196,7 +6196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6308,7 +6308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6525,7 +6525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446MC.json b/data/chips/STM32F446MC.json index 7c7dc1d..0d17f84 100644 --- a/data/chips/STM32F446MC.json +++ b/data/chips/STM32F446MC.json @@ -3236,7 +3236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3683,7 +3683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3840,7 +3840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3972,7 +3972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4069,7 +4069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4286,7 +4286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ME.json b/data/chips/STM32F446ME.json index 145ce73..cdea8ef 100644 --- a/data/chips/STM32F446ME.json +++ b/data/chips/STM32F446ME.json @@ -3236,7 +3236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3683,7 +3683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3840,7 +3840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3972,7 +3972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4069,7 +4069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4286,7 +4286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446RC.json b/data/chips/STM32F446RC.json index 43b4ac6..86813fb 100644 --- a/data/chips/STM32F446RC.json +++ b/data/chips/STM32F446RC.json @@ -2908,7 +2908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3335,7 +3335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3492,7 +3492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3624,7 +3624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3711,7 +3711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3928,7 +3928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446RE.json b/data/chips/STM32F446RE.json index 57354f4..e06bd10 100644 --- a/data/chips/STM32F446RE.json +++ b/data/chips/STM32F446RE.json @@ -2908,7 +2908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3335,7 +3335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3492,7 +3492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3624,7 +3624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3711,7 +3711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3928,7 +3928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446VC.json b/data/chips/STM32F446VC.json index a906461..cd4726e 100644 --- a/data/chips/STM32F446VC.json +++ b/data/chips/STM32F446VC.json @@ -3834,7 +3834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4306,7 +4306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4595,7 +4595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4707,7 +4707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4924,7 +4924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446VE.json b/data/chips/STM32F446VE.json index 32b7596..10c3f65 100644 --- a/data/chips/STM32F446VE.json +++ b/data/chips/STM32F446VE.json @@ -3834,7 +3834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4306,7 +4306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4595,7 +4595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4707,7 +4707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4924,7 +4924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ZC.json b/data/chips/STM32F446ZC.json index 7a010d5..859db99 100644 --- a/data/chips/STM32F446ZC.json +++ b/data/chips/STM32F446ZC.json @@ -6208,7 +6208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6700,7 +6700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6862,7 +6862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6994,7 +6994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7106,7 +7106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7323,7 +7323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F446ZE.json b/data/chips/STM32F446ZE.json index cd1679e..3858fb7 100644 --- a/data/chips/STM32F446ZE.json +++ b/data/chips/STM32F446ZE.json @@ -6208,7 +6208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6700,7 +6700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6862,7 +6862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6994,7 +6994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7106,7 +7106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7323,7 +7323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AE.json b/data/chips/STM32F469AE.json index b30b62e..2cbd535 100644 --- a/data/chips/STM32F469AE.json +++ b/data/chips/STM32F469AE.json @@ -5845,7 +5845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6322,7 +6322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6464,7 +6464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6708,7 +6708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6945,7 +6945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AG.json b/data/chips/STM32F469AG.json index 572a1a7..4a78803 100644 --- a/data/chips/STM32F469AG.json +++ b/data/chips/STM32F469AG.json @@ -5845,7 +5845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6322,7 +6322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6464,7 +6464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6708,7 +6708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6945,7 +6945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469AI.json b/data/chips/STM32F469AI.json index e0ab8ff..7443144 100644 --- a/data/chips/STM32F469AI.json +++ b/data/chips/STM32F469AI.json @@ -5878,7 +5878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6355,7 +6355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6497,7 +6497,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6629,7 +6629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6741,7 +6741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6978,7 +6978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BE.json b/data/chips/STM32F469BE.json index 65672a3..002268e 100644 --- a/data/chips/STM32F469BE.json +++ b/data/chips/STM32F469BE.json @@ -5653,7 +5653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6155,7 +6155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6297,7 +6297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6541,7 +6541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BG.json b/data/chips/STM32F469BG.json index f2b386f..57265d1 100644 --- a/data/chips/STM32F469BG.json +++ b/data/chips/STM32F469BG.json @@ -5653,7 +5653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6155,7 +6155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6297,7 +6297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6541,7 +6541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469BI.json b/data/chips/STM32F469BI.json index 86baf2d..03ed997 100644 --- a/data/chips/STM32F469BI.json +++ b/data/chips/STM32F469BI.json @@ -5686,7 +5686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6188,7 +6188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6330,7 +6330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6462,7 +6462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6574,7 +6574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6811,7 +6811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469IE.json b/data/chips/STM32F469IE.json index 094c981..365e84b 100644 --- a/data/chips/STM32F469IE.json +++ b/data/chips/STM32F469IE.json @@ -6398,7 +6398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6895,7 +6895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7037,7 +7037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7281,7 +7281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7503,7 +7503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469IG.json b/data/chips/STM32F469IG.json index 19281f5..01d6433 100644 --- a/data/chips/STM32F469IG.json +++ b/data/chips/STM32F469IG.json @@ -6398,7 +6398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6895,7 +6895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7037,7 +7037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7281,7 +7281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7503,7 +7503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469II.json b/data/chips/STM32F469II.json index e419e9f..687f98a 100644 --- a/data/chips/STM32F469II.json +++ b/data/chips/STM32F469II.json @@ -6431,7 +6431,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6928,7 +6928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7202,7 +7202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7314,7 +7314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7536,7 +7536,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NE.json b/data/chips/STM32F469NE.json index 1596ae8..de28c09 100644 --- a/data/chips/STM32F469NE.json +++ b/data/chips/STM32F469NE.json @@ -5701,7 +5701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6345,7 +6345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6477,7 +6477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6589,7 +6589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6826,7 +6826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NG.json b/data/chips/STM32F469NG.json index b7da287..a73ca0a 100644 --- a/data/chips/STM32F469NG.json +++ b/data/chips/STM32F469NG.json @@ -5701,7 +5701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6345,7 +6345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6477,7 +6477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6589,7 +6589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6826,7 +6826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469NI.json b/data/chips/STM32F469NI.json index eefe0c6..f4009a0 100644 --- a/data/chips/STM32F469NI.json +++ b/data/chips/STM32F469NI.json @@ -5734,7 +5734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6236,7 +6236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6378,7 +6378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6510,7 +6510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6622,7 +6622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6859,7 +6859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VE.json b/data/chips/STM32F469VE.json index 59fd284..5ddef1d 100644 --- a/data/chips/STM32F469VE.json +++ b/data/chips/STM32F469VE.json @@ -3623,7 +3623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4237,7 +4237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VG.json b/data/chips/STM32F469VG.json index e81ef64..f8564e1 100644 --- a/data/chips/STM32F469VG.json +++ b/data/chips/STM32F469VG.json @@ -3623,7 +3623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4237,7 +4237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469VI.json b/data/chips/STM32F469VI.json index 871f6a7..288dac2 100644 --- a/data/chips/STM32F469VI.json +++ b/data/chips/STM32F469VI.json @@ -3656,7 +3656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4128,7 +4128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4270,7 +4270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4402,7 +4402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4499,7 +4499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4716,7 +4716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZE.json b/data/chips/STM32F469ZE.json index f5eb72f..356e685 100644 --- a/data/chips/STM32F469ZE.json +++ b/data/chips/STM32F469ZE.json @@ -4304,7 +4304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4776,7 +4776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5050,7 +5050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZG.json b/data/chips/STM32F469ZG.json index d25f24b..c5123b0 100644 --- a/data/chips/STM32F469ZG.json +++ b/data/chips/STM32F469ZG.json @@ -4304,7 +4304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4776,7 +4776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5050,7 +5050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F469ZI.json b/data/chips/STM32F469ZI.json index cc00c3b..388cb40 100644 --- a/data/chips/STM32F469ZI.json +++ b/data/chips/STM32F469ZI.json @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4809,7 +4809,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4951,7 +4951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5190,7 +5190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5407,7 +5407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479AG.json b/data/chips/STM32F479AG.json index 5326f3a..cd72142 100644 --- a/data/chips/STM32F479AG.json +++ b/data/chips/STM32F479AG.json @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6386,7 +6386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6528,7 +6528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6660,7 +6660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6772,7 +6772,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7009,7 +7009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479AI.json b/data/chips/STM32F479AI.json index 5431651..7da3f02 100644 --- a/data/chips/STM32F479AI.json +++ b/data/chips/STM32F479AI.json @@ -5942,7 +5942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6419,7 +6419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6561,7 +6561,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6693,7 +6693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6805,7 +6805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7042,7 +7042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479BG.json b/data/chips/STM32F479BG.json index 6887e0b..5d6471b 100644 --- a/data/chips/STM32F479BG.json +++ b/data/chips/STM32F479BG.json @@ -5717,7 +5717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6219,7 +6219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6361,7 +6361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6493,7 +6493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6605,7 +6605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6842,7 +6842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479BI.json b/data/chips/STM32F479BI.json index 8e2d2f1..894eb50 100644 --- a/data/chips/STM32F479BI.json +++ b/data/chips/STM32F479BI.json @@ -5750,7 +5750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6252,7 +6252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6394,7 +6394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6526,7 +6526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6638,7 +6638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6875,7 +6875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479IG.json b/data/chips/STM32F479IG.json index 54b3b7e..e0f025b 100644 --- a/data/chips/STM32F479IG.json +++ b/data/chips/STM32F479IG.json @@ -6462,7 +6462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6959,7 +6959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7101,7 +7101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7233,7 +7233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7345,7 +7345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7567,7 +7567,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479II.json b/data/chips/STM32F479II.json index 5e66b8f..9b238d6 100644 --- a/data/chips/STM32F479II.json +++ b/data/chips/STM32F479II.json @@ -6495,7 +6495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6992,7 +6992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7134,7 +7134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7266,7 +7266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7378,7 +7378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7600,7 +7600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479NG.json b/data/chips/STM32F479NG.json index f30c31f..9d3b01b 100644 --- a/data/chips/STM32F479NG.json +++ b/data/chips/STM32F479NG.json @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6267,7 +6267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6541,7 +6541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6653,7 +6653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6890,7 +6890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479NI.json b/data/chips/STM32F479NI.json index ef96fe0..1ebbab6 100644 --- a/data/chips/STM32F479NI.json +++ b/data/chips/STM32F479NI.json @@ -5798,7 +5798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6442,7 +6442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6574,7 +6574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6686,7 +6686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6923,7 +6923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479VG.json b/data/chips/STM32F479VG.json index 7539cd5..3e626db 100644 --- a/data/chips/STM32F479VG.json +++ b/data/chips/STM32F479VG.json @@ -3687,7 +3687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4159,7 +4159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4301,7 +4301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4433,7 +4433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4530,7 +4530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4747,7 +4747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479VI.json b/data/chips/STM32F479VI.json index 380a72c..b651c96 100644 --- a/data/chips/STM32F479VI.json +++ b/data/chips/STM32F479VI.json @@ -3720,7 +3720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4192,7 +4192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4334,7 +4334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4563,7 +4563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4780,7 +4780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479ZG.json b/data/chips/STM32F479ZG.json index e696a5e..273795f 100644 --- a/data/chips/STM32F479ZG.json +++ b/data/chips/STM32F479ZG.json @@ -4368,7 +4368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4840,7 +4840,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5114,7 +5114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5438,7 +5438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F479ZI.json b/data/chips/STM32F479ZI.json index 735ff8b..1745542 100644 --- a/data/chips/STM32F479ZI.json +++ b/data/chips/STM32F479ZI.json @@ -4401,7 +4401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4873,7 +4873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5015,7 +5015,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5147,7 +5147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5254,7 +5254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722IC.json b/data/chips/STM32F722IC.json index 26d15db..3626288 100644 --- a/data/chips/STM32F722IC.json +++ b/data/chips/STM32F722IC.json @@ -5902,7 +5902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6683,7 +6683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6795,7 +6795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7032,7 +7032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722IE.json b/data/chips/STM32F722IE.json index 11bf08c..9a84a27 100644 --- a/data/chips/STM32F722IE.json +++ b/data/chips/STM32F722IE.json @@ -5902,7 +5902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6551,7 +6551,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6683,7 +6683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6795,7 +6795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7032,7 +7032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722RC.json b/data/chips/STM32F722RC.json index 8532bc4..eaccf02 100644 --- a/data/chips/STM32F722RC.json +++ b/data/chips/STM32F722RC.json @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3358,7 +3358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3445,7 +3445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722RE.json b/data/chips/STM32F722RE.json index 9cddf26..42941d2 100644 --- a/data/chips/STM32F722RE.json +++ b/data/chips/STM32F722RE.json @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3084,7 +3084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3226,7 +3226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3358,7 +3358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3445,7 +3445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722VC.json b/data/chips/STM32F722VC.json index 1a00851..c79d977 100644 --- a/data/chips/STM32F722VC.json +++ b/data/chips/STM32F722VC.json @@ -3603,7 +3603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4354,7 +4354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722VE.json b/data/chips/STM32F722VE.json index b2df910..13c0c8c 100644 --- a/data/chips/STM32F722VE.json +++ b/data/chips/STM32F722VE.json @@ -3603,7 +3603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4354,7 +4354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722ZC.json b/data/chips/STM32F722ZC.json index bd5bc44..addc819 100644 --- a/data/chips/STM32F722ZC.json +++ b/data/chips/STM32F722ZC.json @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4732,7 +4732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4874,7 +4874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5006,7 +5006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5335,7 +5335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F722ZE.json b/data/chips/STM32F722ZE.json index 95aa6fb..b52c5f6 100644 --- a/data/chips/STM32F722ZE.json +++ b/data/chips/STM32F722ZE.json @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4732,7 +4732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4874,7 +4874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5006,7 +5006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5335,7 +5335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723IC.json b/data/chips/STM32F723IC.json index ff07b6d..407004f 100644 --- a/data/chips/STM32F723IC.json +++ b/data/chips/STM32F723IC.json @@ -5867,7 +5867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6354,7 +6354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6496,7 +6496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6628,7 +6628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6740,7 +6740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6977,7 +6977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723IE.json b/data/chips/STM32F723IE.json index 67d577a..4c3139d 100644 --- a/data/chips/STM32F723IE.json +++ b/data/chips/STM32F723IE.json @@ -5867,7 +5867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6354,7 +6354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6496,7 +6496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6628,7 +6628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6740,7 +6740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6977,7 +6977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723VC.json b/data/chips/STM32F723VC.json index 6dc4a2d..03cd6eb 100644 --- a/data/chips/STM32F723VC.json +++ b/data/chips/STM32F723VC.json @@ -4045,7 +4045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4599,7 +4599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4731,7 +4731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4843,7 +4843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723VE.json b/data/chips/STM32F723VE.json index 2148983..37e6c8c 100644 --- a/data/chips/STM32F723VE.json +++ b/data/chips/STM32F723VE.json @@ -4045,7 +4045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4457,7 +4457,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4599,7 +4599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4731,7 +4731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4843,7 +4843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723ZC.json b/data/chips/STM32F723ZC.json index d0fc0b8..41f0717 100644 --- a/data/chips/STM32F723ZC.json +++ b/data/chips/STM32F723ZC.json @@ -5070,7 +5070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5502,7 +5502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5644,7 +5644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5776,7 +5776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5888,7 +5888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6105,7 +6105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F723ZE.json b/data/chips/STM32F723ZE.json index 117cd32..33612bc 100644 --- a/data/chips/STM32F723ZE.json +++ b/data/chips/STM32F723ZE.json @@ -5070,7 +5070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5502,7 +5502,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5644,7 +5644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5776,7 +5776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5888,7 +5888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6105,7 +6105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730I8.json b/data/chips/STM32F730I8.json index f6b0b67..6609ddc 100644 --- a/data/chips/STM32F730I8.json +++ b/data/chips/STM32F730I8.json @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5439,7 +5439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5571,7 +5571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5683,7 +5683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5920,7 +5920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730R8.json b/data/chips/STM32F730R8.json index 4f95132..4441775 100644 --- a/data/chips/STM32F730R8.json +++ b/data/chips/STM32F730R8.json @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3089,7 +3089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3231,7 +3231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3363,7 +3363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3450,7 +3450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3667,7 +3667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730V8.json b/data/chips/STM32F730V8.json index 8b18242..6fc2a0b 100644 --- a/data/chips/STM32F730V8.json +++ b/data/chips/STM32F730V8.json @@ -3608,7 +3608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4085,7 +4085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4227,7 +4227,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4359,7 +4359,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4471,7 +4471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4688,7 +4688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F730Z8.json b/data/chips/STM32F730Z8.json index a3a157b..d8451d5 100644 --- a/data/chips/STM32F730Z8.json +++ b/data/chips/STM32F730Z8.json @@ -4205,7 +4205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4637,7 +4637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4779,7 +4779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4911,7 +4911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5023,7 +5023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5240,7 +5240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732IE.json b/data/chips/STM32F732IE.json index e2451a5..d33a812 100644 --- a/data/chips/STM32F732IE.json +++ b/data/chips/STM32F732IE.json @@ -5941,7 +5941,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6448,7 +6448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6590,7 +6590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6722,7 +6722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6834,7 +6834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7071,7 +7071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732RE.json b/data/chips/STM32F732RE.json index 83479a6..c90bed6 100644 --- a/data/chips/STM32F732RE.json +++ b/data/chips/STM32F732RE.json @@ -2696,7 +2696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3123,7 +3123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3265,7 +3265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3397,7 +3397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3484,7 +3484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3701,7 +3701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732VE.json b/data/chips/STM32F732VE.json index 393f215..7121eec 100644 --- a/data/chips/STM32F732VE.json +++ b/data/chips/STM32F732VE.json @@ -3642,7 +3642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4119,7 +4119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4505,7 +4505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4722,7 +4722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F732ZE.json b/data/chips/STM32F732ZE.json index 94a2b30..84fd266 100644 --- a/data/chips/STM32F732ZE.json +++ b/data/chips/STM32F732ZE.json @@ -4274,7 +4274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4771,7 +4771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4913,7 +4913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5045,7 +5045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733IE.json b/data/chips/STM32F733IE.json index 0d073d8..bf070ca 100644 --- a/data/chips/STM32F733IE.json +++ b/data/chips/STM32F733IE.json @@ -5906,7 +5906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6393,7 +6393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6535,7 +6535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6667,7 +6667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6779,7 +6779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7016,7 +7016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733VE.json b/data/chips/STM32F733VE.json index 25e6cab..5ac9c15 100644 --- a/data/chips/STM32F733VE.json +++ b/data/chips/STM32F733VE.json @@ -4084,7 +4084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4770,7 +4770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4882,7 +4882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F733ZE.json b/data/chips/STM32F733ZE.json index 1cfb2e9..dd170de 100644 --- a/data/chips/STM32F733ZE.json +++ b/data/chips/STM32F733ZE.json @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5541,7 +5541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5683,7 +5683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5815,7 +5815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5927,7 +5927,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6144,7 +6144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745IE.json b/data/chips/STM32F745IE.json index b387c16..20f2c48 100644 --- a/data/chips/STM32F745IE.json +++ b/data/chips/STM32F745IE.json @@ -6681,7 +6681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7188,7 +7188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7330,7 +7330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7462,7 +7462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7574,7 +7574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7811,7 +7811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745IG.json b/data/chips/STM32F745IG.json index fd8cd1a..59cc3f8 100644 --- a/data/chips/STM32F745IG.json +++ b/data/chips/STM32F745IG.json @@ -6681,7 +6681,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7188,7 +7188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7330,7 +7330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7462,7 +7462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7574,7 +7574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7811,7 +7811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745VE.json b/data/chips/STM32F745VE.json index 67ad5ad..822a2e7 100644 --- a/data/chips/STM32F745VE.json +++ b/data/chips/STM32F745VE.json @@ -4732,7 +4732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5209,7 +5209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5351,7 +5351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5483,7 +5483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5812,7 +5812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745VG.json b/data/chips/STM32F745VG.json index 3ac2ad4..5001035 100644 --- a/data/chips/STM32F745VG.json +++ b/data/chips/STM32F745VG.json @@ -4732,7 +4732,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5209,7 +5209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5351,7 +5351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5483,7 +5483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5812,7 +5812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745ZE.json b/data/chips/STM32F745ZE.json index 7af4bae..ffff9d8 100644 --- a/data/chips/STM32F745ZE.json +++ b/data/chips/STM32F745ZE.json @@ -4894,7 +4894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5391,7 +5391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5533,7 +5533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5665,7 +5665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5994,7 +5994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F745ZG.json b/data/chips/STM32F745ZG.json index 76d59d6..2560fbc 100644 --- a/data/chips/STM32F745ZG.json +++ b/data/chips/STM32F745ZG.json @@ -4894,7 +4894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5391,7 +5391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5533,7 +5533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5665,7 +5665,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5994,7 +5994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746BE.json b/data/chips/STM32F746BE.json index dbaff15..9a10fae 100644 --- a/data/chips/STM32F746BE.json +++ b/data/chips/STM32F746BE.json @@ -6130,7 +6130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6637,7 +6637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6779,7 +6779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6911,7 +6911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7023,7 +7023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7260,7 +7260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746BG.json b/data/chips/STM32F746BG.json index 27a159d..3558e8b 100644 --- a/data/chips/STM32F746BG.json +++ b/data/chips/STM32F746BG.json @@ -6130,7 +6130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6637,7 +6637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6779,7 +6779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6911,7 +6911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7023,7 +7023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7260,7 +7260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746IE.json b/data/chips/STM32F746IE.json index b66b90f..ea50de3 100644 --- a/data/chips/STM32F746IE.json +++ b/data/chips/STM32F746IE.json @@ -7010,7 +7010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7517,7 +7517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7659,7 +7659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7903,7 +7903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8140,7 +8140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746IG.json b/data/chips/STM32F746IG.json index 504b8c2..5c9b5a9 100644 --- a/data/chips/STM32F746IG.json +++ b/data/chips/STM32F746IG.json @@ -7010,7 +7010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7517,7 +7517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7659,7 +7659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7903,7 +7903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8140,7 +8140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746NE.json b/data/chips/STM32F746NE.json index bbfc2e2..e99e3d9 100644 --- a/data/chips/STM32F746NE.json +++ b/data/chips/STM32F746NE.json @@ -6178,7 +6178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6685,7 +6685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6827,7 +6827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6959,7 +6959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7071,7 +7071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7308,7 +7308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746NG.json b/data/chips/STM32F746NG.json index c68b89d..e36b07c 100644 --- a/data/chips/STM32F746NG.json +++ b/data/chips/STM32F746NG.json @@ -6178,7 +6178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6685,7 +6685,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6827,7 +6827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6959,7 +6959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7071,7 +7071,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7308,7 +7308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746VE.json b/data/chips/STM32F746VE.json index afa4eb1..0ee8bc3 100644 --- a/data/chips/STM32F746VE.json +++ b/data/chips/STM32F746VE.json @@ -4916,7 +4916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5393,7 +5393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5535,7 +5535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5667,7 +5667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5779,7 +5779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746VG.json b/data/chips/STM32F746VG.json index ec037ce..d4f41b7 100644 --- a/data/chips/STM32F746VG.json +++ b/data/chips/STM32F746VG.json @@ -4916,7 +4916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5393,7 +5393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5535,7 +5535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5667,7 +5667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5779,7 +5779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746ZE.json b/data/chips/STM32F746ZE.json index 1b31108..96dabc2 100644 --- a/data/chips/STM32F746ZE.json +++ b/data/chips/STM32F746ZE.json @@ -5992,7 +5992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6489,7 +6489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6631,7 +6631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6763,7 +6763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6875,7 +6875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7092,7 +7092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F746ZG.json b/data/chips/STM32F746ZG.json index 4ef03b4..ecea0db 100644 --- a/data/chips/STM32F746ZG.json +++ b/data/chips/STM32F746ZG.json @@ -5992,7 +5992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6489,7 +6489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6631,7 +6631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6763,7 +6763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6875,7 +6875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7092,7 +7092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750N8.json b/data/chips/STM32F750N8.json index d3383ce..37086e0 100644 --- a/data/chips/STM32F750N8.json +++ b/data/chips/STM32F750N8.json @@ -6201,7 +6201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6708,7 +6708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6850,7 +6850,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6982,7 +6982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7094,7 +7094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7331,7 +7331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750V8.json b/data/chips/STM32F750V8.json index d3d0393..847adc3 100644 --- a/data/chips/STM32F750V8.json +++ b/data/chips/STM32F750V8.json @@ -4333,7 +4333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4952,7 +4952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5084,7 +5084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5196,7 +5196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5413,7 +5413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F750Z8.json b/data/chips/STM32F750Z8.json index 80f1896..a7d379c 100644 --- a/data/chips/STM32F750Z8.json +++ b/data/chips/STM32F750Z8.json @@ -5151,7 +5151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5648,7 +5648,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5790,7 +5790,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5922,7 +5922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6034,7 +6034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6251,7 +6251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756BG.json b/data/chips/STM32F756BG.json index 458ad33..3909ba5 100644 --- a/data/chips/STM32F756BG.json +++ b/data/chips/STM32F756BG.json @@ -6199,7 +6199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6706,7 +6706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6848,7 +6848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6980,7 +6980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7092,7 +7092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7329,7 +7329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756IG.json b/data/chips/STM32F756IG.json index 286f243..856b981 100644 --- a/data/chips/STM32F756IG.json +++ b/data/chips/STM32F756IG.json @@ -7079,7 +7079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7586,7 +7586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7728,7 +7728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7860,7 +7860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7972,7 +7972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8209,7 +8209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756NG.json b/data/chips/STM32F756NG.json index f2dbeb6..b2feb2b 100644 --- a/data/chips/STM32F756NG.json +++ b/data/chips/STM32F756NG.json @@ -6247,7 +6247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6754,7 +6754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6896,7 +6896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7028,7 +7028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7140,7 +7140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7377,7 +7377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756VG.json b/data/chips/STM32F756VG.json index 51ffb49..4036c8f 100644 --- a/data/chips/STM32F756VG.json +++ b/data/chips/STM32F756VG.json @@ -4985,7 +4985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5462,7 +5462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5604,7 +5604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5736,7 +5736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5848,7 +5848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6065,7 +6065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F756ZG.json b/data/chips/STM32F756ZG.json index bee0784..3e4b0c6 100644 --- a/data/chips/STM32F756ZG.json +++ b/data/chips/STM32F756ZG.json @@ -6061,7 +6061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6558,7 +6558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6700,7 +6700,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6832,7 +6832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6944,7 +6944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7161,7 +7161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765BG.json b/data/chips/STM32F765BG.json index 1e65368..68b7793 100644 --- a/data/chips/STM32F765BG.json +++ b/data/chips/STM32F765BG.json @@ -6386,7 +6386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6893,7 +6893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7035,7 +7035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7167,7 +7167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7279,7 +7279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7516,7 +7516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765BI.json b/data/chips/STM32F765BI.json index 13de404..ecbf85f 100644 --- a/data/chips/STM32F765BI.json +++ b/data/chips/STM32F765BI.json @@ -6392,7 +6392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6899,7 +6899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7041,7 +7041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7173,7 +7173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7285,7 +7285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7522,7 +7522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765IG.json b/data/chips/STM32F765IG.json index 6408647..f638fa4 100644 --- a/data/chips/STM32F765IG.json +++ b/data/chips/STM32F765IG.json @@ -7412,7 +7412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7919,7 +7919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8061,7 +8061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8193,7 +8193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8305,7 +8305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8542,7 +8542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765II.json b/data/chips/STM32F765II.json index b486ab7..c011350 100644 --- a/data/chips/STM32F765II.json +++ b/data/chips/STM32F765II.json @@ -7412,7 +7412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7919,7 +7919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8061,7 +8061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8193,7 +8193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8305,7 +8305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8542,7 +8542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765NG.json b/data/chips/STM32F765NG.json index 556a839..a63a860 100644 --- a/data/chips/STM32F765NG.json +++ b/data/chips/STM32F765NG.json @@ -6440,7 +6440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7089,7 +7089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7221,7 +7221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7333,7 +7333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7570,7 +7570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765NI.json b/data/chips/STM32F765NI.json index 99205bd..9bda586 100644 --- a/data/chips/STM32F765NI.json +++ b/data/chips/STM32F765NI.json @@ -6440,7 +6440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7089,7 +7089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7221,7 +7221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7333,7 +7333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7570,7 +7570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765VG.json b/data/chips/STM32F765VG.json index 41aa866..3551e87 100644 --- a/data/chips/STM32F765VG.json +++ b/data/chips/STM32F765VG.json @@ -5429,7 +5429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5906,7 +5906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6048,7 +6048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6180,7 +6180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6292,7 +6292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6509,7 +6509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765VI.json b/data/chips/STM32F765VI.json index df8ec47..5544e5d 100644 --- a/data/chips/STM32F765VI.json +++ b/data/chips/STM32F765VI.json @@ -5429,7 +5429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5906,7 +5906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6048,7 +6048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6180,7 +6180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6292,7 +6292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6509,7 +6509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765ZG.json b/data/chips/STM32F765ZG.json index 981f6a3..e6693ca 100644 --- a/data/chips/STM32F765ZG.json +++ b/data/chips/STM32F765ZG.json @@ -5620,7 +5620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6117,7 +6117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6259,7 +6259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6391,7 +6391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6503,7 +6503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6720,7 +6720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F765ZI.json b/data/chips/STM32F765ZI.json index 74ed9f5..b01709c 100644 --- a/data/chips/STM32F765ZI.json +++ b/data/chips/STM32F765ZI.json @@ -5620,7 +5620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6117,7 +6117,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6259,7 +6259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6391,7 +6391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6503,7 +6503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6720,7 +6720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767BG.json b/data/chips/STM32F767BG.json index 38f9e3b..9332fcc 100644 --- a/data/chips/STM32F767BG.json +++ b/data/chips/STM32F767BG.json @@ -7001,7 +7001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7508,7 +7508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7650,7 +7650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7782,7 +7782,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7894,7 +7894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8131,7 +8131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767BI.json b/data/chips/STM32F767BI.json index 53dce25..0c926a4 100644 --- a/data/chips/STM32F767BI.json +++ b/data/chips/STM32F767BI.json @@ -7001,7 +7001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7508,7 +7508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7650,7 +7650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7782,7 +7782,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7894,7 +7894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8131,7 +8131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767IG.json b/data/chips/STM32F767IG.json index b9a78d9..b2550e2 100644 --- a/data/chips/STM32F767IG.json +++ b/data/chips/STM32F767IG.json @@ -7861,7 +7861,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8368,7 +8368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8510,7 +8510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8642,7 +8642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8754,7 +8754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8991,7 +8991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767II.json b/data/chips/STM32F767II.json index cbc142e..4b11f3e 100644 --- a/data/chips/STM32F767II.json +++ b/data/chips/STM32F767II.json @@ -7861,7 +7861,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8368,7 +8368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8510,7 +8510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8642,7 +8642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8754,7 +8754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8991,7 +8991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767NG.json b/data/chips/STM32F767NG.json index 10d72f8..fb08ed8 100644 --- a/data/chips/STM32F767NG.json +++ b/data/chips/STM32F767NG.json @@ -7049,7 +7049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7556,7 +7556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7698,7 +7698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7830,7 +7830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7942,7 +7942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8179,7 +8179,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767NI.json b/data/chips/STM32F767NI.json index 6c32204..de652f0 100644 --- a/data/chips/STM32F767NI.json +++ b/data/chips/STM32F767NI.json @@ -7049,7 +7049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7556,7 +7556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7698,7 +7698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7830,7 +7830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7942,7 +7942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8179,7 +8179,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767VG.json b/data/chips/STM32F767VG.json index 65c4498..5262972 100644 --- a/data/chips/STM32F767VG.json +++ b/data/chips/STM32F767VG.json @@ -5713,7 +5713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6190,7 +6190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6332,7 +6332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6464,7 +6464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6576,7 +6576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6793,7 +6793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767VI.json b/data/chips/STM32F767VI.json index 7d47cd7..d020955 100644 --- a/data/chips/STM32F767VI.json +++ b/data/chips/STM32F767VI.json @@ -5713,7 +5713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6190,7 +6190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6332,7 +6332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6464,7 +6464,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6576,7 +6576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6793,7 +6793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767ZG.json b/data/chips/STM32F767ZG.json index 6653417..241e578 100644 --- a/data/chips/STM32F767ZG.json +++ b/data/chips/STM32F767ZG.json @@ -5959,7 +5959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6456,7 +6456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6598,7 +6598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6730,7 +6730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6842,7 +6842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7059,7 +7059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F767ZI.json b/data/chips/STM32F767ZI.json index 5539fdf..c3fc7c8 100644 --- a/data/chips/STM32F767ZI.json +++ b/data/chips/STM32F767ZI.json @@ -5959,7 +5959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6456,7 +6456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6598,7 +6598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6730,7 +6730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6842,7 +6842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7059,7 +7059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F768AI.json b/data/chips/STM32F768AI.json index d33c860..4746505 100644 --- a/data/chips/STM32F768AI.json +++ b/data/chips/STM32F768AI.json @@ -5920,7 +5920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6402,7 +6402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6544,7 +6544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6676,7 +6676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6788,7 +6788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7025,7 +7025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769AG.json b/data/chips/STM32F769AG.json index 1a07e45..ad3e3cc 100644 --- a/data/chips/STM32F769AG.json +++ b/data/chips/STM32F769AG.json @@ -5920,7 +5920,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6402,7 +6402,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6544,7 +6544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6676,7 +6676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6788,7 +6788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7025,7 +7025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769AI.json b/data/chips/STM32F769AI.json index 1fe65d2..999ebe1 100644 --- a/data/chips/STM32F769AI.json +++ b/data/chips/STM32F769AI.json @@ -6209,7 +6209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6691,7 +6691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6833,7 +6833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6965,7 +6965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7077,7 +7077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7314,7 +7314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769BG.json b/data/chips/STM32F769BG.json index 5fc4ad3..ddae26d 100644 --- a/data/chips/STM32F769BG.json +++ b/data/chips/STM32F769BG.json @@ -7010,7 +7010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7517,7 +7517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7659,7 +7659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7903,7 +7903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8140,7 +8140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769BI.json b/data/chips/STM32F769BI.json index 68f410b..4e69a1e 100644 --- a/data/chips/STM32F769BI.json +++ b/data/chips/STM32F769BI.json @@ -7010,7 +7010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7517,7 +7517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7659,7 +7659,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7903,7 +7903,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8140,7 +8140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769IG.json b/data/chips/STM32F769IG.json index 3a54790..219ee61 100644 --- a/data/chips/STM32F769IG.json +++ b/data/chips/STM32F769IG.json @@ -6528,7 +6528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7030,7 +7030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7172,7 +7172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7304,7 +7304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7416,7 +7416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7638,7 +7638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769II.json b/data/chips/STM32F769II.json index d84e0a0..b928183 100644 --- a/data/chips/STM32F769II.json +++ b/data/chips/STM32F769II.json @@ -6528,7 +6528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7030,7 +7030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7172,7 +7172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7304,7 +7304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7416,7 +7416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7638,7 +7638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769NG.json b/data/chips/STM32F769NG.json index 4442306..3d9380d 100644 --- a/data/chips/STM32F769NG.json +++ b/data/chips/STM32F769NG.json @@ -7058,7 +7058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7565,7 +7565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7707,7 +7707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7839,7 +7839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7951,7 +7951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8188,7 +8188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F769NI.json b/data/chips/STM32F769NI.json index 2915e6d..98f194e 100644 --- a/data/chips/STM32F769NI.json +++ b/data/chips/STM32F769NI.json @@ -7058,7 +7058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7565,7 +7565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7707,7 +7707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7839,7 +7839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7951,7 +7951,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8188,7 +8188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777BI.json b/data/chips/STM32F777BI.json index 4d479b4..f3df8ee 100644 --- a/data/chips/STM32F777BI.json +++ b/data/chips/STM32F777BI.json @@ -7076,7 +7076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7583,7 +7583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7725,7 +7725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7857,7 +7857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7969,7 +7969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8206,7 +8206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777II.json b/data/chips/STM32F777II.json index 48136a1..1d591b0 100644 --- a/data/chips/STM32F777II.json +++ b/data/chips/STM32F777II.json @@ -7936,7 +7936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8443,7 +8443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8585,7 +8585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8717,7 +8717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8829,7 +8829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9066,7 +9066,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777NI.json b/data/chips/STM32F777NI.json index ae3ea77..c5b41e0 100644 --- a/data/chips/STM32F777NI.json +++ b/data/chips/STM32F777NI.json @@ -7124,7 +7124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7631,7 +7631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7773,7 +7773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7905,7 +7905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8017,7 +8017,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8254,7 +8254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777VI.json b/data/chips/STM32F777VI.json index daa5759..b06e048 100644 --- a/data/chips/STM32F777VI.json +++ b/data/chips/STM32F777VI.json @@ -5788,7 +5788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6265,7 +6265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6407,7 +6407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6539,7 +6539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6651,7 +6651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6868,7 +6868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F777ZI.json b/data/chips/STM32F777ZI.json index 422a60d..d5511d6 100644 --- a/data/chips/STM32F777ZI.json +++ b/data/chips/STM32F777ZI.json @@ -6034,7 +6034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6531,7 +6531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6673,7 +6673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6805,7 +6805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6917,7 +6917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7134,7 +7134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F778AI.json b/data/chips/STM32F778AI.json index fc54354..65f79a4 100644 --- a/data/chips/STM32F778AI.json +++ b/data/chips/STM32F778AI.json @@ -6272,7 +6272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6754,7 +6754,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6896,7 +6896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7028,7 +7028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7140,7 +7140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7377,7 +7377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779AI.json b/data/chips/STM32F779AI.json index e6e3d3e..3d29f81 100644 --- a/data/chips/STM32F779AI.json +++ b/data/chips/STM32F779AI.json @@ -6278,7 +6278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6760,7 +6760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7034,7 +7034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7146,7 +7146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7383,7 +7383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779BI.json b/data/chips/STM32F779BI.json index 08d1e02..6617ad2 100644 --- a/data/chips/STM32F779BI.json +++ b/data/chips/STM32F779BI.json @@ -7079,7 +7079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7586,7 +7586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7728,7 +7728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7860,7 +7860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7972,7 +7972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8209,7 +8209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779II.json b/data/chips/STM32F779II.json index 1ebc2a5..59cc70f 100644 --- a/data/chips/STM32F779II.json +++ b/data/chips/STM32F779II.json @@ -6597,7 +6597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7099,7 +7099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7241,7 +7241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7373,7 +7373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7485,7 +7485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7707,7 +7707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32F779NI.json b/data/chips/STM32F779NI.json index a879d7d..aac3cec 100644 --- a/data/chips/STM32F779NI.json +++ b/data/chips/STM32F779NI.json @@ -7127,7 +7127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7634,7 +7634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7776,7 +7776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7908,7 +7908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8020,7 +8020,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G030C6.json b/data/chips/STM32G030C6.json index b06e9c9..475feec 100644 --- a/data/chips/STM32G030C6.json +++ b/data/chips/STM32G030C6.json @@ -1565,7 +1565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1810,7 +1810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1897,7 +1897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1989,7 +1989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030C8.json b/data/chips/STM32G030C8.json index eb357e0..fb17e96 100644 --- a/data/chips/STM32G030C8.json +++ b/data/chips/STM32G030C8.json @@ -1565,7 +1565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1810,7 +1810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1897,7 +1897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1989,7 +1989,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030F6.json b/data/chips/STM32G030F6.json index 8b6635a..2649112 100644 --- a/data/chips/STM32G030F6.json +++ b/data/chips/STM32G030F6.json @@ -1318,7 +1318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1523,7 +1523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1605,7 +1605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1692,7 +1692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030J6.json b/data/chips/STM32G030J6.json index 093ba9a..a2c87aa 100644 --- a/data/chips/STM32G030J6.json +++ b/data/chips/STM32G030J6.json @@ -1120,7 +1120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1300,7 +1300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1377,7 +1377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1454,7 +1454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030K6.json b/data/chips/STM32G030K6.json index d2c5109..018a6b0 100644 --- a/data/chips/STM32G030K6.json +++ b/data/chips/STM32G030K6.json @@ -1383,7 +1383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1588,7 +1588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1670,7 +1670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1757,7 +1757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G030K8.json b/data/chips/STM32G030K8.json index 809e283..64c2415 100644 --- a/data/chips/STM32G030K8.json +++ b/data/chips/STM32G030K8.json @@ -1383,7 +1383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1588,7 +1588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1670,7 +1670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1757,7 +1757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C4.json b/data/chips/STM32G031C4.json index 771b5e1..193b195 100644 --- a/data/chips/STM32G031C4.json +++ b/data/chips/STM32G031C4.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2650,7 +2650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C6.json b/data/chips/STM32G031C6.json index 2dfaf76..8c57537 100644 --- a/data/chips/STM32G031C6.json +++ b/data/chips/STM32G031C6.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2650,7 +2650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031C8.json b/data/chips/STM32G031C8.json index 3dcb050..edb13cb 100644 --- a/data/chips/STM32G031C8.json +++ b/data/chips/STM32G031C8.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2324,7 +2324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2650,7 +2650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F4.json b/data/chips/STM32G031F4.json index e3853c8..8936bce 100644 --- a/data/chips/STM32G031F4.json +++ b/data/chips/STM32G031F4.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F6.json b/data/chips/STM32G031F6.json index 07afc94..cc94e22 100644 --- a/data/chips/STM32G031F6.json +++ b/data/chips/STM32G031F6.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031F8.json b/data/chips/STM32G031F8.json index 10ffb13..df44fb6 100644 --- a/data/chips/STM32G031F8.json +++ b/data/chips/STM32G031F8.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G4.json b/data/chips/STM32G031G4.json index aed90d7..ea4dbda 100644 --- a/data/chips/STM32G031G4.json +++ b/data/chips/STM32G031G4.json @@ -1524,7 +1524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1729,7 +1729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2025,7 +2025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G6.json b/data/chips/STM32G031G6.json index c14e4ed..31cc09d 100644 --- a/data/chips/STM32G031G6.json +++ b/data/chips/STM32G031G6.json @@ -1524,7 +1524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1729,7 +1729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2025,7 +2025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031G8.json b/data/chips/STM32G031G8.json index 0c5b9e4..0c787e3 100644 --- a/data/chips/STM32G031G8.json +++ b/data/chips/STM32G031G8.json @@ -1524,7 +1524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1729,7 +1729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1811,7 +1811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2025,7 +2025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031J4.json b/data/chips/STM32G031J4.json index 16950fa..3a92d63 100644 --- a/data/chips/STM32G031J4.json +++ b/data/chips/STM32G031J4.json @@ -1286,7 +1286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1466,7 +1466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1543,7 +1543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1620,7 +1620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1727,7 +1727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031J6.json b/data/chips/STM32G031J6.json index 32d05b7..ba470bb 100644 --- a/data/chips/STM32G031J6.json +++ b/data/chips/STM32G031J6.json @@ -1286,7 +1286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1466,7 +1466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1543,7 +1543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1620,7 +1620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1727,7 +1727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K4.json b/data/chips/STM32G031K4.json index 14cafba..1297eba 100644 --- a/data/chips/STM32G031K4.json +++ b/data/chips/STM32G031K4.json @@ -1776,7 +1776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1981,7 +1981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2150,7 +2150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K6.json b/data/chips/STM32G031K6.json index 522c2d2..fbb263f 100644 --- a/data/chips/STM32G031K6.json +++ b/data/chips/STM32G031K6.json @@ -1776,7 +1776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1981,7 +1981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2150,7 +2150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031K8.json b/data/chips/STM32G031K8.json index 699d709..f83dade 100644 --- a/data/chips/STM32G031K8.json +++ b/data/chips/STM32G031K8.json @@ -1776,7 +1776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1981,7 +1981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2150,7 +2150,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G031Y8.json b/data/chips/STM32G031Y8.json index cf0482d..973bd4b 100644 --- a/data/chips/STM32G031Y8.json +++ b/data/chips/STM32G031Y8.json @@ -1499,7 +1499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1704,7 +1704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1786,7 +1786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1873,7 +1873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2000,7 +2000,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041C6.json b/data/chips/STM32G041C6.json index 2048122..25b17e8 100644 --- a/data/chips/STM32G041C6.json +++ b/data/chips/STM32G041C6.json @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2572,7 +2572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041C8.json b/data/chips/STM32G041C8.json index 7953054..c5af580 100644 --- a/data/chips/STM32G041C8.json +++ b/data/chips/STM32G041C8.json @@ -2148,7 +2148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2393,7 +2393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2480,7 +2480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2572,7 +2572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2719,7 +2719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041F6.json b/data/chips/STM32G041F6.json index a10bddb..a71f8c9 100644 --- a/data/chips/STM32G041F6.json +++ b/data/chips/STM32G041F6.json @@ -1578,7 +1578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1783,7 +1783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1865,7 +1865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1952,7 +1952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041F8.json b/data/chips/STM32G041F8.json index 1ca4f98..6048b25 100644 --- a/data/chips/STM32G041F8.json +++ b/data/chips/STM32G041F8.json @@ -1578,7 +1578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1783,7 +1783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1865,7 +1865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1952,7 +1952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041G6.json b/data/chips/STM32G041G6.json index 3f856cd..e481810 100644 --- a/data/chips/STM32G041G6.json +++ b/data/chips/STM32G041G6.json @@ -1593,7 +1593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1798,7 +1798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1880,7 +1880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1962,7 +1962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2094,7 +2094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041G8.json b/data/chips/STM32G041G8.json index 39e5db9..7f06b23 100644 --- a/data/chips/STM32G041G8.json +++ b/data/chips/STM32G041G8.json @@ -1593,7 +1593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1798,7 +1798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1880,7 +1880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1962,7 +1962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2094,7 +2094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041J6.json b/data/chips/STM32G041J6.json index 2098699..d054cb2 100644 --- a/data/chips/STM32G041J6.json +++ b/data/chips/STM32G041J6.json @@ -1355,7 +1355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1535,7 +1535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1612,7 +1612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1689,7 +1689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1796,7 +1796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041K6.json b/data/chips/STM32G041K6.json index ed41430..07503ed 100644 --- a/data/chips/STM32G041K6.json +++ b/data/chips/STM32G041K6.json @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2050,7 +2050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2132,7 +2132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2351,7 +2351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041K8.json b/data/chips/STM32G041K8.json index 8c4cba6..03fd174 100644 --- a/data/chips/STM32G041K8.json +++ b/data/chips/STM32G041K8.json @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2050,7 +2050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2132,7 +2132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2351,7 +2351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G041Y8.json b/data/chips/STM32G041Y8.json index 2d369d9..203e458 100644 --- a/data/chips/STM32G041Y8.json +++ b/data/chips/STM32G041Y8.json @@ -1568,7 +1568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1773,7 +1773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1942,7 +1942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2069,7 +2069,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050C6.json b/data/chips/STM32G050C6.json index 4bfa7a8..98b9aa6 100644 --- a/data/chips/STM32G050C6.json +++ b/data/chips/STM32G050C6.json @@ -1756,7 +1756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2218,7 +2218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2310,7 +2310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050C8.json b/data/chips/STM32G050C8.json index aebd8bb..1ee114f 100644 --- a/data/chips/STM32G050C8.json +++ b/data/chips/STM32G050C8.json @@ -1756,7 +1756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2218,7 +2218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2310,7 +2310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050F6.json b/data/chips/STM32G050F6.json index 852f503..9a63dbd 100644 --- a/data/chips/STM32G050F6.json +++ b/data/chips/STM32G050F6.json @@ -1513,7 +1513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1900,7 +1900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1987,7 +1987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050K6.json b/data/chips/STM32G050K6.json index 6f3fc3e..91f4ae6 100644 --- a/data/chips/STM32G050K6.json +++ b/data/chips/STM32G050K6.json @@ -1578,7 +1578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1783,7 +1783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1965,7 +1965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2052,7 +2052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G050K8.json b/data/chips/STM32G050K8.json index 0b1e7c3..49ce313 100644 --- a/data/chips/STM32G050K8.json +++ b/data/chips/STM32G050K8.json @@ -1578,7 +1578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1783,7 +1783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1883,7 +1883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1965,7 +1965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2052,7 +2052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051C6.json b/data/chips/STM32G051C6.json index 5cc7698..eeef858 100644 --- a/data/chips/STM32G051C6.json +++ b/data/chips/STM32G051C6.json @@ -2438,7 +2438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2900,7 +2900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051C8.json b/data/chips/STM32G051C8.json index 095be3b..03fcf84 100644 --- a/data/chips/STM32G051C8.json +++ b/data/chips/STM32G051C8.json @@ -2438,7 +2438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2683,7 +2683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2900,7 +2900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2992,7 +2992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051F6.json b/data/chips/STM32G051F6.json index 9566680..c9e37db 100644 --- a/data/chips/STM32G051F6.json +++ b/data/chips/STM32G051F6.json @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2167,7 +2167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2249,7 +2249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2463,7 +2463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051F8.json b/data/chips/STM32G051F8.json index 0775b13..360cd86 100644 --- a/data/chips/STM32G051F8.json +++ b/data/chips/STM32G051F8.json @@ -1999,7 +1999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2204,7 +2204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2304,7 +2304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2386,7 +2386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2473,7 +2473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051G6.json b/data/chips/STM32G051G6.json index 0fc51bf..f19737d 100644 --- a/data/chips/STM32G051G6.json +++ b/data/chips/STM32G051G6.json @@ -1873,7 +1873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2078,7 +2078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2178,7 +2178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2260,7 +2260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2342,7 +2342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051G8.json b/data/chips/STM32G051G8.json index c4e2d82..04315c6 100644 --- a/data/chips/STM32G051G8.json +++ b/data/chips/STM32G051G8.json @@ -1873,7 +1873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2078,7 +2078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2178,7 +2178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2260,7 +2260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2342,7 +2342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051K6.json b/data/chips/STM32G051K6.json index dac2a5e..8ee18bc 100644 --- a/data/chips/STM32G051K6.json +++ b/data/chips/STM32G051K6.json @@ -2129,7 +2129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2434,7 +2434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2516,7 +2516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2603,7 +2603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2735,7 +2735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G051K8.json b/data/chips/STM32G051K8.json index 1f19977..a9cb985 100644 --- a/data/chips/STM32G051K8.json +++ b/data/chips/STM32G051K8.json @@ -2129,7 +2129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2434,7 +2434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2516,7 +2516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2603,7 +2603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2735,7 +2735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061C6.json b/data/chips/STM32G061C6.json index 5bc304f..46a0e53 100644 --- a/data/chips/STM32G061C6.json +++ b/data/chips/STM32G061C6.json @@ -2507,7 +2507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2969,7 +2969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3061,7 +3061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061C8.json b/data/chips/STM32G061C8.json index e17798c..429ffda 100644 --- a/data/chips/STM32G061C8.json +++ b/data/chips/STM32G061C8.json @@ -2507,7 +2507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2969,7 +2969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3061,7 +3061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061F6.json b/data/chips/STM32G061F6.json index 741d182..068eca4 100644 --- a/data/chips/STM32G061F6.json +++ b/data/chips/STM32G061F6.json @@ -1931,7 +1931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2136,7 +2136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2236,7 +2236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2318,7 +2318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061F8.json b/data/chips/STM32G061F8.json index 76c5a8c..6fd8316 100644 --- a/data/chips/STM32G061F8.json +++ b/data/chips/STM32G061F8.json @@ -2068,7 +2068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2455,7 +2455,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2669,7 +2669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061G6.json b/data/chips/STM32G061G6.json index 8edfe2b..62e9edf 100644 --- a/data/chips/STM32G061G6.json +++ b/data/chips/STM32G061G6.json @@ -1942,7 +1942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2247,7 +2247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2329,7 +2329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061G8.json b/data/chips/STM32G061G8.json index 2424e40..4e2a633 100644 --- a/data/chips/STM32G061G8.json +++ b/data/chips/STM32G061G8.json @@ -1942,7 +1942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2147,7 +2147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2247,7 +2247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2329,7 +2329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2411,7 +2411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061K6.json b/data/chips/STM32G061K6.json index 2fcad7c..24a100e 100644 --- a/data/chips/STM32G061K6.json +++ b/data/chips/STM32G061K6.json @@ -2198,7 +2198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2403,7 +2403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2585,7 +2585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2672,7 +2672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G061K8.json b/data/chips/STM32G061K8.json index 7e65c18..529b5c6 100644 --- a/data/chips/STM32G061K8.json +++ b/data/chips/STM32G061K8.json @@ -2198,7 +2198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2403,7 +2403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2585,7 +2585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2672,7 +2672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070CB.json b/data/chips/STM32G070CB.json index ffe6651..6246284 100644 --- a/data/chips/STM32G070CB.json +++ b/data/chips/STM32G070CB.json @@ -1565,7 +1565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1810,7 +1810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1940,7 +1940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2027,7 +2027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2119,7 +2119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070KB.json b/data/chips/STM32G070KB.json index 3ee99a9..d85089d 100644 --- a/data/chips/STM32G070KB.json +++ b/data/chips/STM32G070KB.json @@ -1371,7 +1371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1576,7 +1576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1676,7 +1676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1758,7 +1758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G070RB.json b/data/chips/STM32G070RB.json index 6a4779a..43b758d 100644 --- a/data/chips/STM32G070RB.json +++ b/data/chips/STM32G070RB.json @@ -1724,7 +1724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2009,7 +2009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2149,7 +2149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2236,7 +2236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2328,7 +2328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071C6.json b/data/chips/STM32G071C6.json index f5ebdd4..ed0a0a5 100644 --- a/data/chips/STM32G071C6.json +++ b/data/chips/STM32G071C6.json @@ -2107,7 +2107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2569,7 +2569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2661,7 +2661,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2808,7 +2808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071C8.json b/data/chips/STM32G071C8.json index 5e03da4..f8413c8 100644 --- a/data/chips/STM32G071C8.json +++ b/data/chips/STM32G071C8.json @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2527,7 +2527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2744,7 +2744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2836,7 +2836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2983,7 +2983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071CB.json b/data/chips/STM32G071CB.json index 7baf27e..bbfad9c 100644 --- a/data/chips/STM32G071CB.json +++ b/data/chips/STM32G071CB.json @@ -2282,7 +2282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2527,7 +2527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2657,7 +2657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2744,7 +2744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2836,7 +2836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2983,7 +2983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071EB.json b/data/chips/STM32G071EB.json index 064846c..7e64df4 100644 --- a/data/chips/STM32G071EB.json +++ b/data/chips/STM32G071EB.json @@ -1655,7 +1655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1855,7 +1855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1955,7 +1955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2037,7 +2037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2114,7 +2114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2236,7 +2236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071G6.json b/data/chips/STM32G071G6.json index d1a632b..d198d66 100644 --- a/data/chips/STM32G071G6.json +++ b/data/chips/STM32G071G6.json @@ -1550,7 +1550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1770,7 +1770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1880,7 +1880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1967,7 +1967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2054,7 +2054,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071G8.json b/data/chips/STM32G071G8.json index 1f7ddd1..975d8fe 100644 --- a/data/chips/STM32G071G8.json +++ b/data/chips/STM32G071G8.json @@ -1901,7 +1901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2121,7 +2121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2231,7 +2231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2318,7 +2318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2537,7 +2537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071GB.json b/data/chips/STM32G071GB.json index d380acd..b482ee6 100644 --- a/data/chips/STM32G071GB.json +++ b/data/chips/STM32G071GB.json @@ -1901,7 +1901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2121,7 +2121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2231,7 +2231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2318,7 +2318,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2405,7 +2405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2537,7 +2537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071K6.json b/data/chips/STM32G071K6.json index 42cd0c3..6ac910a 100644 --- a/data/chips/STM32G071K6.json +++ b/data/chips/STM32G071K6.json @@ -1806,7 +1806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2026,7 +2026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2136,7 +2136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2223,7 +2223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2315,7 +2315,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2447,7 +2447,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071K8.json b/data/chips/STM32G071K8.json index 9a3b812..cbc531d 100644 --- a/data/chips/STM32G071K8.json +++ b/data/chips/STM32G071K8.json @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2605,7 +2605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2715,7 +2715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2802,7 +2802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071KB.json b/data/chips/STM32G071KB.json index 2c2c104..3d51ce3 100644 --- a/data/chips/STM32G071KB.json +++ b/data/chips/STM32G071KB.json @@ -2385,7 +2385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2605,7 +2605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2715,7 +2715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2802,7 +2802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071R6.json b/data/chips/STM32G071R6.json index 7109883..d752139 100644 --- a/data/chips/STM32G071R6.json +++ b/data/chips/STM32G071R6.json @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2316,7 +2316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2456,7 +2456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2543,7 +2543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2797,7 +2797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071R8.json b/data/chips/STM32G071R8.json index 3ed0b1f..92dd71c 100644 --- a/data/chips/STM32G071R8.json +++ b/data/chips/STM32G071R8.json @@ -2206,7 +2206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2491,7 +2491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2718,7 +2718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2810,7 +2810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2972,7 +2972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G071RB.json b/data/chips/STM32G071RB.json index 8a4684b..8ce321c 100644 --- a/data/chips/STM32G071RB.json +++ b/data/chips/STM32G071RB.json @@ -2600,7 +2600,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2885,7 +2885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3025,7 +3025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3112,7 +3112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3366,7 +3366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081CB.json b/data/chips/STM32G081CB.json index 9f2be0b..3981ee7 100644 --- a/data/chips/STM32G081CB.json +++ b/data/chips/STM32G081CB.json @@ -2351,7 +2351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2596,7 +2596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2726,7 +2726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2905,7 +2905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3052,7 +3052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081EB.json b/data/chips/STM32G081EB.json index e9cfe69..17c090d 100644 --- a/data/chips/STM32G081EB.json +++ b/data/chips/STM32G081EB.json @@ -1724,7 +1724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1924,7 +1924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2024,7 +2024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2106,7 +2106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2305,7 +2305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081GB.json b/data/chips/STM32G081GB.json index 7173136..9975a9b 100644 --- a/data/chips/STM32G081GB.json +++ b/data/chips/STM32G081GB.json @@ -1970,7 +1970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2190,7 +2190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2300,7 +2300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2387,7 +2387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2606,7 +2606,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081KB.json b/data/chips/STM32G081KB.json index d518100..25462cd 100644 --- a/data/chips/STM32G081KB.json +++ b/data/chips/STM32G081KB.json @@ -2454,7 +2454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2674,7 +2674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2784,7 +2784,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2871,7 +2871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2963,7 +2963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3095,7 +3095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G081RB.json b/data/chips/STM32G081RB.json index cc2ffb6..d954b35 100644 --- a/data/chips/STM32G081RB.json +++ b/data/chips/STM32G081RB.json @@ -2669,7 +2669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2954,7 +2954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3094,7 +3094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3273,7 +3273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0CE.json b/data/chips/STM32G0B0CE.json index bb147d3..a77687f 100644 --- a/data/chips/STM32G0B0CE.json +++ b/data/chips/STM32G0B0CE.json @@ -2091,7 +2091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2553,7 +2553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2645,7 +2645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2767,7 +2767,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0KE.json b/data/chips/STM32G0B0KE.json index fdfe206..1543ae7 100644 --- a/data/chips/STM32G0B0KE.json +++ b/data/chips/STM32G0B0KE.json @@ -1851,7 +1851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2056,7 +2056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2238,7 +2238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2437,7 +2437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0RE.json b/data/chips/STM32G0B0RE.json index 0e11c24..32cbb99 100644 --- a/data/chips/STM32G0B0RE.json +++ b/data/chips/STM32G0B0RE.json @@ -2290,7 +2290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2575,7 +2575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2715,7 +2715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2802,7 +2802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2894,7 +2894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3026,7 +3026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B0VE.json b/data/chips/STM32G0B0VE.json index 7439858..8bf6d42 100644 --- a/data/chips/STM32G0B0VE.json +++ b/data/chips/STM32G0B0VE.json @@ -2560,7 +2560,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3045,7 +3045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3137,7 +3137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3234,7 +3234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3391,7 +3391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CB.json b/data/chips/STM32G0B1CB.json index 833e442..951ab1f 100644 --- a/data/chips/STM32G0B1CB.json +++ b/data/chips/STM32G0B1CB.json @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4068,7 +4068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4155,7 +4155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CC.json b/data/chips/STM32G0B1CC.json index de0bd92..3e04e34 100644 --- a/data/chips/STM32G0B1CC.json +++ b/data/chips/STM32G0B1CC.json @@ -3693,7 +3693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3938,7 +3938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4068,7 +4068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4155,7 +4155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1CE.json b/data/chips/STM32G0B1CE.json index f9a0f45..3aa62ea 100644 --- a/data/chips/STM32G0B1CE.json +++ b/data/chips/STM32G0B1CE.json @@ -3704,7 +3704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4079,7 +4079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4166,7 +4166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4258,7 +4258,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4405,7 +4405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4527,7 +4527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KB.json b/data/chips/STM32G0B1KB.json index 9c5d19b..668c32d 100644 --- a/data/chips/STM32G0B1KB.json +++ b/data/chips/STM32G0B1KB.json @@ -3159,7 +3159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3379,7 +3379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3576,7 +3576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3800,7 +3800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KC.json b/data/chips/STM32G0B1KC.json index f8d7c15..6ed7248 100644 --- a/data/chips/STM32G0B1KC.json +++ b/data/chips/STM32G0B1KC.json @@ -3159,7 +3159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3379,7 +3379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3576,7 +3576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3800,7 +3800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3917,7 +3917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1KE.json b/data/chips/STM32G0B1KE.json index 4f89783..e7bd046 100644 --- a/data/chips/STM32G0B1KE.json +++ b/data/chips/STM32G0B1KE.json @@ -3170,7 +3170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3500,7 +3500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3587,7 +3587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3811,7 +3811,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3928,7 +3928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1MB.json b/data/chips/STM32G0B1MB.json index 3f5671d..f878b3f 100644 --- a/data/chips/STM32G0B1MB.json +++ b/data/chips/STM32G0B1MB.json @@ -3288,7 +3288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3733,7 +3733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3825,7 +3825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3922,7 +3922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4084,7 +4084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4221,7 +4221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1MC.json b/data/chips/STM32G0B1MC.json index bb7e3c3..4079fdc 100644 --- a/data/chips/STM32G0B1MC.json +++ b/data/chips/STM32G0B1MC.json @@ -3288,7 +3288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3733,7 +3733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3825,7 +3825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3922,7 +3922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4084,7 +4084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4221,7 +4221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1ME.json b/data/chips/STM32G0B1ME.json index 11ed4c7..80219dd 100644 --- a/data/chips/STM32G0B1ME.json +++ b/data/chips/STM32G0B1ME.json @@ -3299,7 +3299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3604,7 +3604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3744,7 +3744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3836,7 +3836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3933,7 +3933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4095,7 +4095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4232,7 +4232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1NE.json b/data/chips/STM32G0B1NE.json index 09769ba..e8410f1 100644 --- a/data/chips/STM32G0B1NE.json +++ b/data/chips/STM32G0B1NE.json @@ -2505,7 +2505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2750,7 +2750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2880,7 +2880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3059,7 +3059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3221,7 +3221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3343,7 +3343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RB.json b/data/chips/STM32G0B1RB.json index cec3c44..ef484c5 100644 --- a/data/chips/STM32G0B1RB.json +++ b/data/chips/STM32G0B1RB.json @@ -3912,7 +3912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4197,7 +4197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4678,7 +4678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RC.json b/data/chips/STM32G0B1RC.json index 210d12a..5ed9540 100644 --- a/data/chips/STM32G0B1RC.json +++ b/data/chips/STM32G0B1RC.json @@ -3912,7 +3912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4197,7 +4197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4678,7 +4678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1RE.json b/data/chips/STM32G0B1RE.json index 70a8d36..fb3ba46 100644 --- a/data/chips/STM32G0B1RE.json +++ b/data/chips/STM32G0B1RE.json @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4208,7 +4208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4348,7 +4348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4435,7 +4435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4527,7 +4527,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4689,7 +4689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VB.json b/data/chips/STM32G0B1VB.json index 060177f..f0d7e04 100644 --- a/data/chips/STM32G0B1VB.json +++ b/data/chips/STM32G0B1VB.json @@ -4092,7 +4092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4427,7 +4427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4766,7 +4766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4928,7 +4928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5085,7 +5085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VC.json b/data/chips/STM32G0B1VC.json index 195d8fa..86b151c 100644 --- a/data/chips/STM32G0B1VC.json +++ b/data/chips/STM32G0B1VC.json @@ -4092,7 +4092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4427,7 +4427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4577,7 +4577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4766,7 +4766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4928,7 +4928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5085,7 +5085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0B1VE.json b/data/chips/STM32G0B1VE.json index 7653284..97d1f99 100644 --- a/data/chips/STM32G0B1VE.json +++ b/data/chips/STM32G0B1VE.json @@ -4103,7 +4103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4438,7 +4438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4588,7 +4588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4680,7 +4680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4777,7 +4777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4939,7 +4939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5096,7 +5096,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1CC.json b/data/chips/STM32G0C1CC.json index a15f4e4..92f6a97 100644 --- a/data/chips/STM32G0C1CC.json +++ b/data/chips/STM32G0C1CC.json @@ -3762,7 +3762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4007,7 +4007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4137,7 +4137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4585,7 +4585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1CE.json b/data/chips/STM32G0C1CE.json index a8d1f7b..79adfd7 100644 --- a/data/chips/STM32G0C1CE.json +++ b/data/chips/STM32G0C1CE.json @@ -3773,7 +3773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4018,7 +4018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4148,7 +4148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4235,7 +4235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4327,7 +4327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4474,7 +4474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1KC.json b/data/chips/STM32G0C1KC.json index 18c1bde..08b72b4 100644 --- a/data/chips/STM32G0C1KC.json +++ b/data/chips/STM32G0C1KC.json @@ -3228,7 +3228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3448,7 +3448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3558,7 +3558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3645,7 +3645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3737,7 +3737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3869,7 +3869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3986,7 +3986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1KE.json b/data/chips/STM32G0C1KE.json index f1b8350..5e71eb2 100644 --- a/data/chips/STM32G0C1KE.json +++ b/data/chips/STM32G0C1KE.json @@ -3239,7 +3239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3459,7 +3459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3569,7 +3569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3656,7 +3656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3748,7 +3748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3997,7 +3997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1MC.json b/data/chips/STM32G0C1MC.json index aa14e92..75886c3 100644 --- a/data/chips/STM32G0C1MC.json +++ b/data/chips/STM32G0C1MC.json @@ -3357,7 +3357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3894,7 +3894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4153,7 +4153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4290,7 +4290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1ME.json b/data/chips/STM32G0C1ME.json index 06c76c5..75aa2de 100644 --- a/data/chips/STM32G0C1ME.json +++ b/data/chips/STM32G0C1ME.json @@ -3368,7 +3368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3673,7 +3673,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3813,7 +3813,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3905,7 +3905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4002,7 +4002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4164,7 +4164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4301,7 +4301,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1NE.json b/data/chips/STM32G0C1NE.json index f51ee98..3c0baf5 100644 --- a/data/chips/STM32G0C1NE.json +++ b/data/chips/STM32G0C1NE.json @@ -2574,7 +2574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2819,7 +2819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2949,7 +2949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3036,7 +3036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3128,7 +3128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3290,7 +3290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3412,7 +3412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1RC.json b/data/chips/STM32G0C1RC.json index 5ebc66a..87138ee 100644 --- a/data/chips/STM32G0C1RC.json +++ b/data/chips/STM32G0C1RC.json @@ -3981,7 +3981,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4266,7 +4266,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4493,7 +4493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4585,7 +4585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4747,7 +4747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4879,7 +4879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1RE.json b/data/chips/STM32G0C1RE.json index 89b551c..e4ec808 100644 --- a/data/chips/STM32G0C1RE.json +++ b/data/chips/STM32G0C1RE.json @@ -3992,7 +3992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4417,7 +4417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4504,7 +4504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4758,7 +4758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4890,7 +4890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1VC.json b/data/chips/STM32G0C1VC.json index e0b2732..50f5b30 100644 --- a/data/chips/STM32G0C1VC.json +++ b/data/chips/STM32G0C1VC.json @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4496,7 +4496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4646,7 +4646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4738,7 +4738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4835,7 +4835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4997,7 +4997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5154,7 +5154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G0C1VE.json b/data/chips/STM32G0C1VE.json index cdbc863..282b0df 100644 --- a/data/chips/STM32G0C1VE.json +++ b/data/chips/STM32G0C1VE.json @@ -4172,7 +4172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4507,7 +4507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4657,7 +4657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4749,7 +4749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4846,7 +4846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5008,7 +5008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5165,7 +5165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32G431C6.json b/data/chips/STM32G431C6.json index b338065..91bf345 100644 --- a/data/chips/STM32G431C6.json +++ b/data/chips/STM32G431C6.json @@ -3095,7 +3095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3302,7 +3302,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3583,7 +3583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3725,7 +3725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3852,7 +3852,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4069,7 +4069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431C8.json b/data/chips/STM32G431C8.json index 88a6842..1ecd77d 100644 --- a/data/chips/STM32G431C8.json +++ b/data/chips/STM32G431C8.json @@ -3095,7 +3095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3302,7 +3302,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3404,7 +3404,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3583,7 +3583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3725,7 +3725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3852,7 +3852,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4069,7 +4069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431CB.json b/data/chips/STM32G431CB.json index b9eb1d0..4e1b4a2 100644 --- a/data/chips/STM32G431CB.json +++ b/data/chips/STM32G431CB.json @@ -3395,7 +3395,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3602,7 +3602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3704,7 +3704,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3796,7 +3796,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3883,7 +3883,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4025,7 +4025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4152,7 +4152,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431K6.json b/data/chips/STM32G431K6.json index e0f1b1f..c7eaf91 100644 --- a/data/chips/STM32G431K6.json +++ b/data/chips/STM32G431K6.json @@ -2629,7 +2629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2786,7 +2786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2873,7 +2873,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3047,7 +3047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3508,7 +3508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431K8.json b/data/chips/STM32G431K8.json index ab023cd..fe76a79 100644 --- a/data/chips/STM32G431K8.json +++ b/data/chips/STM32G431K8.json @@ -2629,7 +2629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2786,7 +2786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2873,7 +2873,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3047,7 +3047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3508,7 +3508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431KB.json b/data/chips/STM32G431KB.json index 2ce711e..de87bf7 100644 --- a/data/chips/STM32G431KB.json +++ b/data/chips/STM32G431KB.json @@ -2629,7 +2629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2786,7 +2786,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2873,7 +2873,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2965,7 +2965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3047,7 +3047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3508,7 +3508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431M6.json b/data/chips/STM32G431M6.json index 9222e9b..d1a18cf 100644 --- a/data/chips/STM32G431M6.json +++ b/data/chips/STM32G431M6.json @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3471,7 +3471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4046,7 +4046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431M8.json b/data/chips/STM32G431M8.json index 7a68d78..5b47d42 100644 --- a/data/chips/STM32G431M8.json +++ b/data/chips/STM32G431M8.json @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3471,7 +3471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4046,7 +4046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431MB.json b/data/chips/STM32G431MB.json index 7c472e0..061b2c5 100644 --- a/data/chips/STM32G431MB.json +++ b/data/chips/STM32G431MB.json @@ -3179,7 +3179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3471,7 +3471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3757,7 +3757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4046,7 +4046,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431R6.json b/data/chips/STM32G431R6.json index 0db72e0..c98deb8 100644 --- a/data/chips/STM32G431R6.json +++ b/data/chips/STM32G431R6.json @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3779,7 +3779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3958,7 +3958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4464,7 +4464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431R8.json b/data/chips/STM32G431R8.json index d6b3bd8..1b2cda4 100644 --- a/data/chips/STM32G431R8.json +++ b/data/chips/STM32G431R8.json @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3779,7 +3779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3958,7 +3958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4464,7 +4464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431RB.json b/data/chips/STM32G431RB.json index 3a9abf6..7116436 100644 --- a/data/chips/STM32G431RB.json +++ b/data/chips/STM32G431RB.json @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3672,7 +3672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3779,7 +3779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3871,7 +3871,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3958,7 +3958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4100,7 +4100,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4464,7 +4464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431V6.json b/data/chips/STM32G431V6.json index 2c8d793..fb7673d 100644 --- a/data/chips/STM32G431V6.json +++ b/data/chips/STM32G431V6.json @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3994,7 +3994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431V8.json b/data/chips/STM32G431V8.json index 6f960e9..61000e0 100644 --- a/data/chips/STM32G431V8.json +++ b/data/chips/STM32G431V8.json @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3994,7 +3994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G431VB.json b/data/chips/STM32G431VB.json index 347156a..db68fb8 100644 --- a/data/chips/STM32G431VB.json +++ b/data/chips/STM32G431VB.json @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3688,7 +3688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3994,7 +3994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441CB.json b/data/chips/STM32G441CB.json index 3119154..455e9d4 100644 --- a/data/chips/STM32G441CB.json +++ b/data/chips/STM32G441CB.json @@ -3428,7 +3428,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3635,7 +3635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3737,7 +3737,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3829,7 +3829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3916,7 +3916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4185,7 +4185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4402,7 +4402,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441KB.json b/data/chips/STM32G441KB.json index e1ad2b0..41133d8 100644 --- a/data/chips/STM32G441KB.json +++ b/data/chips/STM32G441KB.json @@ -2662,7 +2662,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2819,7 +2819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2906,7 +2906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2998,7 +2998,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3080,7 +3080,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3212,7 +3212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3329,7 +3329,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3541,7 +3541,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441MB.json b/data/chips/STM32G441MB.json index d97d2b4..ed49982 100644 --- a/data/chips/STM32G441MB.json +++ b/data/chips/STM32G441MB.json @@ -3212,7 +3212,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3504,7 +3504,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3703,7 +3703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3790,7 +3790,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4079,7 +4079,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4296,7 +4296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441RB.json b/data/chips/STM32G441RB.json index 7daf592..cf39c67 100644 --- a/data/chips/STM32G441RB.json +++ b/data/chips/STM32G441RB.json @@ -3468,7 +3468,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3812,7 +3812,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3904,7 +3904,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3991,7 +3991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4133,7 +4133,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4280,7 +4280,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4497,7 +4497,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G441VB.json b/data/chips/STM32G441VB.json index 463a359..7e2e2ab 100644 --- a/data/chips/STM32G441VB.json +++ b/data/chips/STM32G441VB.json @@ -3429,7 +3429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3721,7 +3721,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3838,7 +3838,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3935,7 +3935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4027,7 +4027,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4194,7 +4194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4361,7 +4361,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471CC.json b/data/chips/STM32G471CC.json index f8973ef..1a654af 100644 --- a/data/chips/STM32G471CC.json +++ b/data/chips/STM32G471CC.json @@ -3175,7 +3175,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3382,7 +3382,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3484,7 +3484,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3576,7 +3576,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3663,7 +3663,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4019,7 +4019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4236,7 +4236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471CE.json b/data/chips/STM32G471CE.json index 09c2f70..65b455b 100644 --- a/data/chips/STM32G471CE.json +++ b/data/chips/STM32G471CE.json @@ -3175,7 +3175,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3382,7 +3382,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3484,7 +3484,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3576,7 +3576,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3663,7 +3663,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4019,7 +4019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4236,7 +4236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471MC.json b/data/chips/STM32G471MC.json index 904c518..ef7d5a9 100644 --- a/data/chips/STM32G471MC.json +++ b/data/chips/STM32G471MC.json @@ -3411,7 +3411,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3703,7 +3703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3989,7 +3989,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4131,7 +4131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4228,7 +4228,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4592,7 +4592,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471ME.json b/data/chips/STM32G471ME.json index a609a36..49527db 100644 --- a/data/chips/STM32G471ME.json +++ b/data/chips/STM32G471ME.json @@ -3903,7 +3903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4195,7 +4195,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4302,7 +4302,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4481,7 +4481,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4623,7 +4623,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4720,7 +4720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4867,7 +4867,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5084,7 +5084,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471QC.json b/data/chips/STM32G471QC.json index 7b7e7ff..e1ddd84 100644 --- a/data/chips/STM32G471QC.json +++ b/data/chips/STM32G471QC.json @@ -4018,7 +4018,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4310,7 +4310,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4432,7 +4432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4621,7 +4621,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5030,7 +5030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5197,7 +5197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5444,7 +5444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471QE.json b/data/chips/STM32G471QE.json index 6d765d3..1278895 100644 --- a/data/chips/STM32G471QE.json +++ b/data/chips/STM32G471QE.json @@ -4018,7 +4018,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4310,7 +4310,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4432,7 +4432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4529,7 +4529,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4621,7 +4621,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5030,7 +5030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5197,7 +5197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5444,7 +5444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471RC.json b/data/chips/STM32G471RC.json index 20b701c..fd648e4 100644 --- a/data/chips/STM32G471RC.json +++ b/data/chips/STM32G471RC.json @@ -3145,7 +3145,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3382,7 +3382,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3581,7 +3581,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4054,7 +4054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4271,7 +4271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471RE.json b/data/chips/STM32G471RE.json index d553c6a..2ee3321 100644 --- a/data/chips/STM32G471RE.json +++ b/data/chips/STM32G471RE.json @@ -3145,7 +3145,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3382,7 +3382,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3581,7 +3581,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3668,7 +3668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3907,7 +3907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4054,7 +4054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4271,7 +4271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471VC.json b/data/chips/STM32G471VC.json index 202f8d9..b41cdac 100644 --- a/data/chips/STM32G471VC.json +++ b/data/chips/STM32G471VC.json @@ -4912,7 +4912,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5204,7 +5204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5321,7 +5321,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5418,7 +5418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5510,7 +5510,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5677,7 +5677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5829,7 +5829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6238,7 +6238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G471VE.json b/data/chips/STM32G471VE.json index 68f6d66..954a63e 100644 --- a/data/chips/STM32G471VE.json +++ b/data/chips/STM32G471VE.json @@ -4912,7 +4912,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5204,7 +5204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5321,7 +5321,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5418,7 +5418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5510,7 +5510,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5677,7 +5677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5829,7 +5829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6238,7 +6238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CB.json b/data/chips/STM32G473CB.json index 387ed1c..40fa6af 100644 --- a/data/chips/STM32G473CB.json +++ b/data/chips/STM32G473CB.json @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4201,7 +4201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4380,7 +4380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4609,7 +4609,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4853,7 +4853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CC.json b/data/chips/STM32G473CC.json index 1e56127..d977eea 100644 --- a/data/chips/STM32G473CC.json +++ b/data/chips/STM32G473CC.json @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4201,7 +4201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4380,7 +4380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4609,7 +4609,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4853,7 +4853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473CE.json b/data/chips/STM32G473CE.json index ca09b49..6fb27b1 100644 --- a/data/chips/STM32G473CE.json +++ b/data/chips/STM32G473CE.json @@ -3892,7 +3892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4201,7 +4201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4293,7 +4293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4380,7 +4380,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4522,7 +4522,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4609,7 +4609,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4736,7 +4736,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4853,7 +4853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5060,7 +5060,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473MB.json b/data/chips/STM32G473MB.json index 605be53..68e7076 100644 --- a/data/chips/STM32G473MB.json +++ b/data/chips/STM32G473MB.json @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4653,7 +4653,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4745,7 +4745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4832,7 +4832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4974,7 +4974,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5071,7 +5071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5218,7 +5218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5335,7 +5335,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5562,7 +5562,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473MC.json b/data/chips/STM32G473MC.json index 6b9ef84..632cca6 100644 --- a/data/chips/STM32G473MC.json +++ b/data/chips/STM32G473MC.json @@ -4254,7 +4254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4653,7 +4653,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4745,7 +4745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4832,7 +4832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4974,7 +4974,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5071,7 +5071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5218,7 +5218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5335,7 +5335,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5562,7 +5562,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473ME.json b/data/chips/STM32G473ME.json index deedc6f..2332198 100644 --- a/data/chips/STM32G473ME.json +++ b/data/chips/STM32G473ME.json @@ -4746,7 +4746,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5038,7 +5038,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5145,7 +5145,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5237,7 +5237,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5324,7 +5324,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5466,7 +5466,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5563,7 +5563,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5710,7 +5710,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5827,7 +5827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6054,7 +6054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PB.json b/data/chips/STM32G473PB.json index be7492d..0674e88 100644 --- a/data/chips/STM32G473PB.json +++ b/data/chips/STM32G473PB.json @@ -5168,7 +5168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5674,7 +5674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5766,7 +5766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6332,7 +6332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6479,7 +6479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PC.json b/data/chips/STM32G473PC.json index eb867d3..5cf9b4d 100644 --- a/data/chips/STM32G473PC.json +++ b/data/chips/STM32G473PC.json @@ -5168,7 +5168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5674,7 +5674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5766,7 +5766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6332,7 +6332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6479,7 +6479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473PE.json b/data/chips/STM32G473PE.json index 538c8b7..4e62acf 100644 --- a/data/chips/STM32G473PE.json +++ b/data/chips/STM32G473PE.json @@ -5168,7 +5168,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5674,7 +5674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5766,7 +5766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6165,7 +6165,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6332,7 +6332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6479,7 +6479,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6731,7 +6731,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QB.json b/data/chips/STM32G473QB.json index 8592293..14ae3f1 100644 --- a/data/chips/STM32G473QB.json +++ b/data/chips/STM32G473QB.json @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5598,7 +5598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6076,7 +6076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6318,7 +6318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6884,7 +6884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QC.json b/data/chips/STM32G473QC.json index 7267d2c..6021670 100644 --- a/data/chips/STM32G473QC.json +++ b/data/chips/STM32G473QC.json @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5598,7 +5598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6076,7 +6076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6318,7 +6318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6884,7 +6884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473QE.json b/data/chips/STM32G473QE.json index e17c7a9..48b1ad5 100644 --- a/data/chips/STM32G473QE.json +++ b/data/chips/STM32G473QE.json @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5598,7 +5598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6076,7 +6076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6318,7 +6318,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6632,7 +6632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6884,7 +6884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RB.json b/data/chips/STM32G473RB.json index ead84ea..305df78 100644 --- a/data/chips/STM32G473RB.json +++ b/data/chips/STM32G473RB.json @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4545,7 +4545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4789,7 +4789,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4906,7 +4906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RC.json b/data/chips/STM32G473RC.json index 4c90877..b09dcea 100644 --- a/data/chips/STM32G473RC.json +++ b/data/chips/STM32G473RC.json @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4545,7 +4545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4789,7 +4789,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4906,7 +4906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473RE.json b/data/chips/STM32G473RE.json index 4726f33..b9e7b07 100644 --- a/data/chips/STM32G473RE.json +++ b/data/chips/STM32G473RE.json @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4117,7 +4117,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4224,7 +4224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4316,7 +4316,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4545,7 +4545,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4789,7 +4789,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4906,7 +4906,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VB.json b/data/chips/STM32G473VB.json index d8cac54..2d5e8b4 100644 --- a/data/chips/STM32G473VB.json +++ b/data/chips/STM32G473VB.json @@ -5489,7 +5489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5781,7 +5781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5898,7 +5898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6087,7 +6087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6254,7 +6254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6406,7 +6406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6715,7 +6715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VC.json b/data/chips/STM32G473VC.json index 9cd1757..15cedb2 100644 --- a/data/chips/STM32G473VC.json +++ b/data/chips/STM32G473VC.json @@ -5489,7 +5489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5781,7 +5781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5898,7 +5898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6087,7 +6087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6254,7 +6254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6406,7 +6406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6715,7 +6715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G473VE.json b/data/chips/STM32G473VE.json index 42540b8..c2f7ebd 100644 --- a/data/chips/STM32G473VE.json +++ b/data/chips/STM32G473VE.json @@ -5489,7 +5489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5781,7 +5781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5898,7 +5898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6087,7 +6087,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6254,7 +6254,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6406,7 +6406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6715,7 +6715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6947,7 +6947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CB.json b/data/chips/STM32G474CB.json index 5b0f19a..9a531c5 100644 --- a/data/chips/STM32G474CB.json +++ b/data/chips/STM32G474CB.json @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4345,7 +4345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4626,7 +4626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CC.json b/data/chips/STM32G474CC.json index 4e2b1df..5631c3e 100644 --- a/data/chips/STM32G474CC.json +++ b/data/chips/STM32G474CC.json @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4345,7 +4345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4626,7 +4626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474CE.json b/data/chips/STM32G474CE.json index 410ac80..208c11a 100644 --- a/data/chips/STM32G474CE.json +++ b/data/chips/STM32G474CE.json @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4345,7 +4345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4447,7 +4447,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4626,7 +4626,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5306,7 +5306,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474MB.json b/data/chips/STM32G474MB.json index e8013ae..5ac10c4 100644 --- a/data/chips/STM32G474MB.json +++ b/data/chips/STM32G474MB.json @@ -4530,7 +4530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4822,7 +4822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5021,7 +5021,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5108,7 +5108,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5494,7 +5494,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5611,7 +5611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5838,7 +5838,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474MC.json b/data/chips/STM32G474MC.json index 0f20c60..af8a27f 100644 --- a/data/chips/STM32G474MC.json +++ b/data/chips/STM32G474MC.json @@ -4530,7 +4530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4822,7 +4822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5021,7 +5021,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5108,7 +5108,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5494,7 +5494,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5611,7 +5611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5838,7 +5838,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474ME.json b/data/chips/STM32G474ME.json index dbcc558..6aa4234 100644 --- a/data/chips/STM32G474ME.json +++ b/data/chips/STM32G474ME.json @@ -5022,7 +5022,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5421,7 +5421,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5513,7 +5513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5600,7 +5600,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5742,7 +5742,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5839,7 +5839,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5986,7 +5986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6103,7 +6103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6330,7 +6330,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PB.json b/data/chips/STM32G474PB.json index a7f33eb..e45590e 100644 --- a/data/chips/STM32G474PB.json +++ b/data/chips/STM32G474PB.json @@ -5432,7 +5432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5724,7 +5724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5841,7 +5841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6030,7 +6030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6995,7 +6995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PC.json b/data/chips/STM32G474PC.json index d50bec7..30edd77 100644 --- a/data/chips/STM32G474PC.json +++ b/data/chips/STM32G474PC.json @@ -5432,7 +5432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5724,7 +5724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5841,7 +5841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6030,7 +6030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6995,7 +6995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474PE.json b/data/chips/STM32G474PE.json index 48a034a..1d43b7d 100644 --- a/data/chips/STM32G474PE.json +++ b/data/chips/STM32G474PE.json @@ -5432,7 +5432,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5724,7 +5724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5841,7 +5841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6030,7 +6030,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6429,7 +6429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6596,7 +6596,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6995,7 +6995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QB.json b/data/chips/STM32G474QB.json index 661d57e..542efcd 100644 --- a/data/chips/STM32G474QB.json +++ b/data/chips/STM32G474QB.json @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5874,7 +5874,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6185,7 +6185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6352,7 +6352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6761,7 +6761,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7160,7 +7160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QC.json b/data/chips/STM32G474QC.json index a49a2f9..1ccb485 100644 --- a/data/chips/STM32G474QC.json +++ b/data/chips/STM32G474QC.json @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5874,7 +5874,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6185,7 +6185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6352,7 +6352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6761,7 +6761,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7160,7 +7160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474QE.json b/data/chips/STM32G474QE.json index 8dde062..e4ae0c9 100644 --- a/data/chips/STM32G474QE.json +++ b/data/chips/STM32G474QE.json @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5874,7 +5874,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5996,7 +5996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6185,7 +6185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6352,7 +6352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6761,7 +6761,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6908,7 +6908,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7160,7 +7160,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RB.json b/data/chips/STM32G474RB.json index 72d5e4b..2639a82 100644 --- a/data/chips/STM32G474RB.json +++ b/data/chips/STM32G474RB.json @@ -4156,7 +4156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4592,7 +4592,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5065,7 +5065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5182,7 +5182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RC.json b/data/chips/STM32G474RC.json index 5aed277..6372074 100644 --- a/data/chips/STM32G474RC.json +++ b/data/chips/STM32G474RC.json @@ -4156,7 +4156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4592,7 +4592,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5065,7 +5065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5182,7 +5182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474RE.json b/data/chips/STM32G474RE.json index 8c6a4ce..eece889 100644 --- a/data/chips/STM32G474RE.json +++ b/data/chips/STM32G474RE.json @@ -4156,7 +4156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4592,7 +4592,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4679,7 +4679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4821,7 +4821,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4918,7 +4918,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5065,7 +5065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5182,7 +5182,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5394,7 +5394,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VB.json b/data/chips/STM32G474VB.json index 2167e1f..fd2e3ff 100644 --- a/data/chips/STM32G474VB.json +++ b/data/chips/STM32G474VB.json @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6057,7 +6057,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6174,7 +6174,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6682,7 +6682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7223,7 +7223,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VC.json b/data/chips/STM32G474VC.json index 1701fcc..1b4e420 100644 --- a/data/chips/STM32G474VC.json +++ b/data/chips/STM32G474VC.json @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6057,7 +6057,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6174,7 +6174,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6682,7 +6682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7223,7 +7223,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G474VE.json b/data/chips/STM32G474VE.json index 114d15c..b95ccc1 100644 --- a/data/chips/STM32G474VE.json +++ b/data/chips/STM32G474VE.json @@ -5765,7 +5765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6057,7 +6057,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6174,7 +6174,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6271,7 +6271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6530,7 +6530,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6682,7 +6682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7223,7 +7223,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483CE.json b/data/chips/STM32G483CE.json index 739a576..106f732 100644 --- a/data/chips/STM32G483CE.json +++ b/data/chips/STM32G483CE.json @@ -3931,7 +3931,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4240,7 +4240,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4419,7 +4419,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4561,7 +4561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4648,7 +4648,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4775,7 +4775,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4892,7 +4892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483ME.json b/data/chips/STM32G483ME.json index 328931a..bec6b9c 100644 --- a/data/chips/STM32G483ME.json +++ b/data/chips/STM32G483ME.json @@ -4785,7 +4785,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5077,7 +5077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5184,7 +5184,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5276,7 +5276,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5505,7 +5505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5749,7 +5749,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5866,7 +5866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483PE.json b/data/chips/STM32G483PE.json index 0a0c9c6..7011fb1 100644 --- a/data/chips/STM32G483PE.json +++ b/data/chips/STM32G483PE.json @@ -5207,7 +5207,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5499,7 +5499,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5616,7 +5616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5713,7 +5713,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5805,7 +5805,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5972,7 +5972,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6204,7 +6204,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6371,7 +6371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6518,7 +6518,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6770,7 +6770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483QE.json b/data/chips/STM32G483QE.json index 0895544..1523694 100644 --- a/data/chips/STM32G483QE.json +++ b/data/chips/STM32G483QE.json @@ -5345,7 +5345,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5637,7 +5637,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5856,7 +5856,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5948,7 +5948,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6115,7 +6115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6357,7 +6357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6524,7 +6524,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6671,7 +6671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6923,7 +6923,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483RE.json b/data/chips/STM32G483RE.json index 66a038e..eb8bc2a 100644 --- a/data/chips/STM32G483RE.json +++ b/data/chips/STM32G483RE.json @@ -3919,7 +3919,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4156,7 +4156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4263,7 +4263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4355,7 +4355,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4584,7 +4584,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4681,7 +4681,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4828,7 +4828,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4945,7 +4945,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5157,7 +5157,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G483VE.json b/data/chips/STM32G483VE.json index 5ae5127..d032879 100644 --- a/data/chips/STM32G483VE.json +++ b/data/chips/STM32G483VE.json @@ -5528,7 +5528,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5820,7 +5820,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5937,7 +5937,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6034,7 +6034,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6126,7 +6126,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6445,7 +6445,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6612,7 +6612,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6754,7 +6754,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6986,7 +6986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484CE.json b/data/chips/STM32G484CE.json index 07d06bb..14087d3 100644 --- a/data/chips/STM32G484CE.json +++ b/data/chips/STM32G484CE.json @@ -4171,7 +4171,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4378,7 +4378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4480,7 +4480,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4659,7 +4659,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4801,7 +4801,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4888,7 +4888,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5015,7 +5015,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5132,7 +5132,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5339,7 +5339,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484ME.json b/data/chips/STM32G484ME.json index 757f492..8ad329f 100644 --- a/data/chips/STM32G484ME.json +++ b/data/chips/STM32G484ME.json @@ -5055,7 +5055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5347,7 +5347,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5454,7 +5454,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5546,7 +5546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5633,7 +5633,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5775,7 +5775,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5872,7 +5872,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6019,7 +6019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6136,7 +6136,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6363,7 +6363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484PE.json b/data/chips/STM32G484PE.json index 770e495..87a3c99 100644 --- a/data/chips/STM32G484PE.json +++ b/data/chips/STM32G484PE.json @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5763,7 +5763,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5880,7 +5880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5977,7 +5977,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6069,7 +6069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6236,7 +6236,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6468,7 +6468,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6635,7 +6635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6782,7 +6782,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7034,7 +7034,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484QE.json b/data/chips/STM32G484QE.json index 398cab5..d01e34a 100644 --- a/data/chips/STM32G484QE.json +++ b/data/chips/STM32G484QE.json @@ -5615,7 +5615,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5907,7 +5907,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6029,7 +6029,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6126,7 +6126,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6218,7 +6218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6385,7 +6385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6627,7 +6627,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6794,7 +6794,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6941,7 +6941,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7193,7 +7193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484RE.json b/data/chips/STM32G484RE.json index 7fb45de..967d54c 100644 --- a/data/chips/STM32G484RE.json +++ b/data/chips/STM32G484RE.json @@ -4189,7 +4189,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4426,7 +4426,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4533,7 +4533,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4625,7 +4625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4712,7 +4712,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4854,7 +4854,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4951,7 +4951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5098,7 +5098,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5215,7 +5215,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5427,7 +5427,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G484VE.json b/data/chips/STM32G484VE.json index c89635f..97ebd32 100644 --- a/data/chips/STM32G484VE.json +++ b/data/chips/STM32G484VE.json @@ -5798,7 +5798,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6090,7 +6090,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6207,7 +6207,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6304,7 +6304,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6396,7 +6396,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6563,7 +6563,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6715,7 +6715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6882,7 +6882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7024,7 +7024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7256,7 +7256,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491CC.json b/data/chips/STM32G491CC.json index 03d9212..7559c6f 100644 --- a/data/chips/STM32G491CC.json +++ b/data/chips/STM32G491CC.json @@ -3370,7 +3370,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3577,7 +3577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3771,7 +3771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3858,7 +3858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4000,7 +4000,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4092,7 +4092,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4219,7 +4219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4436,7 +4436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491CE.json b/data/chips/STM32G491CE.json index 6ec5a6c..7dc727a 100644 --- a/data/chips/STM32G491CE.json +++ b/data/chips/STM32G491CE.json @@ -3370,7 +3370,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3577,7 +3577,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3679,7 +3679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3771,7 +3771,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3858,7 +3858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4000,7 +4000,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4092,7 +4092,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4219,7 +4219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4436,7 +4436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491KC.json b/data/chips/STM32G491KC.json index f3d68e6..a091ca2 100644 --- a/data/chips/STM32G491KC.json +++ b/data/chips/STM32G491KC.json @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2788,7 +2788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2875,7 +2875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3049,7 +3049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3268,7 +3268,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3385,7 +3385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3597,7 +3597,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491KE.json b/data/chips/STM32G491KE.json index cd1ae38..3a85686 100644 --- a/data/chips/STM32G491KE.json +++ b/data/chips/STM32G491KE.json @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2788,7 +2788,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2875,7 +2875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2967,7 +2967,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3049,7 +3049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3268,7 +3268,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3385,7 +3385,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3597,7 +3597,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491MC.json b/data/chips/STM32G491MC.json index 9f6007f..95b7cfa 100644 --- a/data/chips/STM32G491MC.json +++ b/data/chips/STM32G491MC.json @@ -4025,7 +4025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4317,7 +4317,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4745,7 +4745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4847,7 +4847,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4994,7 +4994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5211,7 +5211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491ME.json b/data/chips/STM32G491ME.json index dfc5466..8f7f536 100644 --- a/data/chips/STM32G491ME.json +++ b/data/chips/STM32G491ME.json @@ -4025,7 +4025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4317,7 +4317,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4424,7 +4424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4516,7 +4516,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4603,7 +4603,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4745,7 +4745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4847,7 +4847,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4994,7 +4994,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5211,7 +5211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491RC.json b/data/chips/STM32G491RC.json index 1865d3d..8ad0413 100644 --- a/data/chips/STM32G491RC.json +++ b/data/chips/STM32G491RC.json @@ -3725,7 +3725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3962,7 +3962,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4069,7 +4069,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4161,7 +4161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4248,7 +4248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4390,7 +4390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4492,7 +4492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4639,7 +4639,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4856,7 +4856,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491RE.json b/data/chips/STM32G491RE.json index 04cc4c6..719d0f9 100644 --- a/data/chips/STM32G491RE.json +++ b/data/chips/STM32G491RE.json @@ -4115,7 +4115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4352,7 +4352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4551,7 +4551,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4780,7 +4780,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4882,7 +4882,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5029,7 +5029,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5246,7 +5246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491VC.json b/data/chips/STM32G491VC.json index 74cbcbd..07b118c 100644 --- a/data/chips/STM32G491VC.json +++ b/data/chips/STM32G491VC.json @@ -3807,7 +3807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4216,7 +4216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4313,7 +4313,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4405,7 +4405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4729,7 +4729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4896,7 +4896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5138,7 +5138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G491VE.json b/data/chips/STM32G491VE.json index 229fe43..edd6b5b 100644 --- a/data/chips/STM32G491VE.json +++ b/data/chips/STM32G491VE.json @@ -3807,7 +3807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4216,7 +4216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4313,7 +4313,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4405,7 +4405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4572,7 +4572,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4729,7 +4729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4896,7 +4896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5138,7 +5138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1CE.json b/data/chips/STM32G4A1CE.json index 30db8f2..8968278 100644 --- a/data/chips/STM32G4A1CE.json +++ b/data/chips/STM32G4A1CE.json @@ -3409,7 +3409,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3616,7 +3616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3718,7 +3718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3810,7 +3810,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3897,7 +3897,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4039,7 +4039,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4131,7 +4131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4258,7 +4258,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4475,7 +4475,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1KE.json b/data/chips/STM32G4A1KE.json index be5c19a..4dc6b31 100644 --- a/data/chips/STM32G4A1KE.json +++ b/data/chips/STM32G4A1KE.json @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2827,7 +2827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2914,7 +2914,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3006,7 +3006,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3088,7 +3088,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3220,7 +3220,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3424,7 +3424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3636,7 +3636,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1ME.json b/data/chips/STM32G4A1ME.json index 2eacf2b..c2851d3 100644 --- a/data/chips/STM32G4A1ME.json +++ b/data/chips/STM32G4A1ME.json @@ -4064,7 +4064,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4356,7 +4356,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4642,7 +4642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4784,7 +4784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5033,7 +5033,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5250,7 +5250,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1RE.json b/data/chips/STM32G4A1RE.json index 6ecdcb1..fa2480a 100644 --- a/data/chips/STM32G4A1RE.json +++ b/data/chips/STM32G4A1RE.json @@ -4154,7 +4154,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4391,7 +4391,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4498,7 +4498,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4590,7 +4590,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4677,7 +4677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4819,7 +4819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4921,7 +4921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5068,7 +5068,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5285,7 +5285,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32G4A1VE.json b/data/chips/STM32G4A1VE.json index 3d09302..f2a2400 100644 --- a/data/chips/STM32G4A1VE.json +++ b/data/chips/STM32G4A1VE.json @@ -3846,7 +3846,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4138,7 +4138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4255,7 +4255,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4352,7 +4352,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4444,7 +4444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4611,7 +4611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4935,7 +4935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5177,7 +5177,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H503CB.json b/data/chips/STM32H503CB.json index 1ad651e..975ee02 100644 --- a/data/chips/STM32H503CB.json +++ b/data/chips/STM32H503CB.json @@ -3296,7 +3296,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3588,7 +3588,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3755,7 +3755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503EB.json b/data/chips/STM32H503EB.json index 641732a..186688a 100644 --- a/data/chips/STM32H503EB.json +++ b/data/chips/STM32H503EB.json @@ -2403,7 +2403,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2620,7 +2620,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2762,7 +2762,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503KB.json b/data/chips/STM32H503KB.json index 601bd4f..024c690 100644 --- a/data/chips/STM32H503KB.json +++ b/data/chips/STM32H503KB.json @@ -2685,7 +2685,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2952,7 +2952,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3109,7 +3109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H503RB.json b/data/chips/STM32H503RB.json index 5c22197..fd64453 100644 --- a/data/chips/STM32H503RB.json +++ b/data/chips/STM32H503RB.json @@ -3514,7 +3514,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3851,7 +3851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4043,7 +4043,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H523CC.json b/data/chips/STM32H523CC.json index 6eff143..3833701 100644 --- a/data/chips/STM32H523CC.json +++ b/data/chips/STM32H523CC.json @@ -3202,7 +3202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3439,7 +3439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3546,7 +3546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3698,7 +3698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3947,7 +3947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4189,7 +4189,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523CE.json b/data/chips/STM32H523CE.json index cb378ac..851d1c0 100644 --- a/data/chips/STM32H523CE.json +++ b/data/chips/STM32H523CE.json @@ -3202,7 +3202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3439,7 +3439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3546,7 +3546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3698,7 +3698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3947,7 +3947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4189,7 +4189,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523HE.json b/data/chips/STM32H523HE.json index 2e58336..d69b899 100644 --- a/data/chips/STM32H523HE.json +++ b/data/chips/STM32H523HE.json @@ -2615,7 +2615,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2929,7 +2929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3076,7 +3076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3315,7 +3315,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3557,7 +3557,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523RC.json b/data/chips/STM32H523RC.json index 3288eb5..5caecdc 100644 --- a/data/chips/STM32H523RC.json +++ b/data/chips/STM32H523RC.json @@ -3697,7 +3697,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3939,7 +3939,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4213,7 +4213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4492,7 +4492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4734,7 +4734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523RE.json b/data/chips/STM32H523RE.json index df072c5..66de3f2 100644 --- a/data/chips/STM32H523RE.json +++ b/data/chips/STM32H523RE.json @@ -3697,7 +3697,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3939,7 +3939,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4213,7 +4213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4492,7 +4492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4734,7 +4734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523VC.json b/data/chips/STM32H523VC.json index 750e2d2..73e01ba 100644 --- a/data/chips/STM32H523VC.json +++ b/data/chips/STM32H523VC.json @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5616,7 +5616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5753,7 +5753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6072,7 +6072,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6219,7 +6219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523VE.json b/data/chips/STM32H523VE.json index d50f518..ec96a81 100644 --- a/data/chips/STM32H523VE.json +++ b/data/chips/STM32H523VE.json @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5616,7 +5616,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5753,7 +5753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6072,7 +6072,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6219,7 +6219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523ZC.json b/data/chips/STM32H523ZC.json index 12ce4dd..16f6ec6 100644 --- a/data/chips/STM32H523ZC.json +++ b/data/chips/STM32H523ZC.json @@ -6279,7 +6279,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6591,7 +6591,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6728,7 +6728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6885,7 +6885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7047,7 +7047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7194,7 +7194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7436,7 +7436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H523ZE.json b/data/chips/STM32H523ZE.json index b0fdae9..d82dc35 100644 --- a/data/chips/STM32H523ZE.json +++ b/data/chips/STM32H523ZE.json @@ -6279,7 +6279,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6591,7 +6591,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6728,7 +6728,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6885,7 +6885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7047,7 +7047,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7194,7 +7194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7436,7 +7436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533CE.json b/data/chips/STM32H533CE.json index e8b0dd7..8e788f2 100644 --- a/data/chips/STM32H533CE.json +++ b/data/chips/STM32H533CE.json @@ -3327,7 +3327,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3564,7 +3564,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3671,7 +3671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3823,7 +3823,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3960,7 +3960,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4072,7 +4072,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4314,7 +4314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533HE.json b/data/chips/STM32H533HE.json index dbf0fab..3dcf66e 100644 --- a/data/chips/STM32H533HE.json +++ b/data/chips/STM32H533HE.json @@ -2740,7 +2740,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2947,7 +2947,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3054,7 +3054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3201,7 +3201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3333,7 +3333,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3440,7 +3440,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3682,7 +3682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533RE.json b/data/chips/STM32H533RE.json index a0d0b95..b07d7f0 100644 --- a/data/chips/STM32H533RE.json +++ b/data/chips/STM32H533RE.json @@ -3822,7 +3822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4064,7 +4064,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4181,7 +4181,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4338,7 +4338,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4500,7 +4500,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4617,7 +4617,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4859,7 +4859,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533VE.json b/data/chips/STM32H533VE.json index dcf93fa..8c5fa64 100644 --- a/data/chips/STM32H533VE.json +++ b/data/chips/STM32H533VE.json @@ -5439,7 +5439,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5741,7 +5741,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5878,7 +5878,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6035,7 +6035,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6197,7 +6197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6586,7 +6586,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H533ZE.json b/data/chips/STM32H533ZE.json index 5bde0f4..eededb0 100644 --- a/data/chips/STM32H533ZE.json +++ b/data/chips/STM32H533ZE.json @@ -6404,7 +6404,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6716,7 +6716,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6853,7 +6853,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7010,7 +7010,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7172,7 +7172,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7319,7 +7319,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7561,7 +7561,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562AG.json b/data/chips/STM32H562AG.json index 4c9cfee..eac9da3 100644 --- a/data/chips/STM32H562AG.json +++ b/data/chips/STM32H562AG.json @@ -6953,7 +6953,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7410,7 +7410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7547,7 +7547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7649,7 +7649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7751,7 +7751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7913,7 +7913,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8075,7 +8075,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8222,7 +8222,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8489,7 +8489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562AI.json b/data/chips/STM32H562AI.json index 7bcc70a..46f6798 100644 --- a/data/chips/STM32H562AI.json +++ b/data/chips/STM32H562AI.json @@ -6953,7 +6953,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7410,7 +7410,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7547,7 +7547,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7649,7 +7649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7751,7 +7751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7913,7 +7913,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8075,7 +8075,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8222,7 +8222,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8489,7 +8489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562IG.json b/data/chips/STM32H562IG.json index efaddcc..dbc8c0f 100644 --- a/data/chips/STM32H562IG.json +++ b/data/chips/STM32H562IG.json @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8724,7 +8724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8861,7 +8861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9065,7 +9065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9227,7 +9227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9389,7 +9389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9536,7 +9536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9803,7 +9803,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562II.json b/data/chips/STM32H562II.json index f84424e..d4d652f 100644 --- a/data/chips/STM32H562II.json +++ b/data/chips/STM32H562II.json @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8724,7 +8724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8861,7 +8861,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9065,7 +9065,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9227,7 +9227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9389,7 +9389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9536,7 +9536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9803,7 +9803,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562RG.json b/data/chips/STM32H562RG.json index a24c8f8..6625fb0 100644 --- a/data/chips/STM32H562RG.json +++ b/data/chips/STM32H562RG.json @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5384,7 +5384,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5546,7 +5546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5708,7 +5708,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5840,7 +5840,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6082,7 +6082,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562RI.json b/data/chips/STM32H562RI.json index c5036fc..b834006 100644 --- a/data/chips/STM32H562RI.json +++ b/data/chips/STM32H562RI.json @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5210,7 +5210,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5297,7 +5297,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5384,7 +5384,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5546,7 +5546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5708,7 +5708,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5840,7 +5840,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6082,7 +6082,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562VG.json b/data/chips/STM32H562VG.json index b6ceb6a..60f9d82 100644 --- a/data/chips/STM32H562VG.json +++ b/data/chips/STM32H562VG.json @@ -5357,7 +5357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5896,7 +5896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5983,7 +5983,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6536,7 +6536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562VI.json b/data/chips/STM32H562VI.json index b2dbc34..95c1f7c 100644 --- a/data/chips/STM32H562VI.json +++ b/data/chips/STM32H562VI.json @@ -5357,7 +5357,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5896,7 +5896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5983,7 +5983,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6227,7 +6227,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6536,7 +6536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6778,7 +6778,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562ZG.json b/data/chips/STM32H562ZG.json index c73db2b..61b54e4 100644 --- a/data/chips/STM32H562ZG.json +++ b/data/chips/STM32H562ZG.json @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6766,7 +6766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6903,7 +6903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7005,7 +7005,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7264,7 +7264,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7426,7 +7426,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7573,7 +7573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H562ZI.json b/data/chips/STM32H562ZI.json index 5dd689a..8f156a3 100644 --- a/data/chips/STM32H562ZI.json +++ b/data/chips/STM32H562ZI.json @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6766,7 +6766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6903,7 +6903,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7005,7 +7005,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7264,7 +7264,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7426,7 +7426,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7573,7 +7573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563AG.json b/data/chips/STM32H563AG.json index 911866e..05ff629 100644 --- a/data/chips/STM32H563AG.json +++ b/data/chips/STM32H563AG.json @@ -7363,7 +7363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7820,7 +7820,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7957,7 +7957,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8059,7 +8059,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8161,7 +8161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8323,7 +8323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8485,7 +8485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8632,7 +8632,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8899,7 +8899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563AI.json b/data/chips/STM32H563AI.json index 8d8b1f8..f9b4e18 100644 --- a/data/chips/STM32H563AI.json +++ b/data/chips/STM32H563AI.json @@ -8418,7 +8418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8885,7 +8885,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9022,7 +9022,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9124,7 +9124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9226,7 +9226,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9388,7 +9388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9550,7 +9550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9697,7 +9697,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9964,7 +9964,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563IG.json b/data/chips/STM32H563IG.json index 5992ab6..c6b0393 100644 --- a/data/chips/STM32H563IG.json +++ b/data/chips/STM32H563IG.json @@ -8672,7 +8672,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9139,7 +9139,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9276,7 +9276,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9378,7 +9378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9480,7 +9480,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9642,7 +9642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9804,7 +9804,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9951,7 +9951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10218,7 +10218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563II.json b/data/chips/STM32H563II.json index 99a7bd4..6df6121 100644 --- a/data/chips/STM32H563II.json +++ b/data/chips/STM32H563II.json @@ -10946,7 +10946,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11413,7 +11413,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11550,7 +11550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11652,7 +11652,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11754,7 +11754,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11916,7 +11916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12078,7 +12078,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12225,7 +12225,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12492,7 +12492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563MI.json b/data/chips/STM32H563MI.json index 92c3129..46ba154 100644 --- a/data/chips/STM32H563MI.json +++ b/data/chips/STM32H563MI.json @@ -4715,7 +4715,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5077,7 +5077,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5194,7 +5194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5281,7 +5281,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5520,7 +5520,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5682,7 +5682,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5809,7 +5809,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563RG.json b/data/chips/STM32H563RG.json index 63b71bb..d78acfa 100644 --- a/data/chips/STM32H563RG.json +++ b/data/chips/STM32H563RG.json @@ -4969,7 +4969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5311,7 +5311,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5428,7 +5428,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5515,7 +5515,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5764,7 +5764,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5926,7 +5926,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6058,7 +6058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563RI.json b/data/chips/STM32H563RI.json index 57b105d..24e7fe2 100644 --- a/data/chips/STM32H563RI.json +++ b/data/chips/STM32H563RI.json @@ -4969,7 +4969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5311,7 +5311,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5428,7 +5428,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5515,7 +5515,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5602,7 +5602,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5764,7 +5764,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5926,7 +5926,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6058,7 +6058,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563VG.json b/data/chips/STM32H563VG.json index 6142fe1..10d9572 100644 --- a/data/chips/STM32H563VG.json +++ b/data/chips/STM32H563VG.json @@ -5580,7 +5580,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5982,7 +5982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6119,7 +6119,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6206,7 +6206,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6293,7 +6293,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6450,7 +6450,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6612,7 +6612,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6759,7 +6759,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7001,7 +7001,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563VI.json b/data/chips/STM32H563VI.json index b3ccd75..af9b2c3 100644 --- a/data/chips/STM32H563VI.json +++ b/data/chips/STM32H563VI.json @@ -6216,7 +6216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6618,7 +6618,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6755,7 +6755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6842,7 +6842,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6929,7 +6929,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7091,7 +7091,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7253,7 +7253,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7400,7 +7400,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7642,7 +7642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563ZG.json b/data/chips/STM32H563ZG.json index a2e5b23..6348ba6 100644 --- a/data/chips/STM32H563ZG.json +++ b/data/chips/STM32H563ZG.json @@ -6729,7 +6729,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7151,7 +7151,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7288,7 +7288,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7390,7 +7390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7492,7 +7492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7649,7 +7649,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7811,7 +7811,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7958,7 +7958,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8200,7 +8200,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H563ZI.json b/data/chips/STM32H563ZI.json index 3aa1185..8a5a350 100644 --- a/data/chips/STM32H563ZI.json +++ b/data/chips/STM32H563ZI.json @@ -7654,7 +7654,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8076,7 +8076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8213,7 +8213,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8315,7 +8315,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8417,7 +8417,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8579,7 +8579,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8741,7 +8741,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8888,7 +8888,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9130,7 +9130,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573AI.json b/data/chips/STM32H573AI.json index 89dc6fc..d3a8767 100644 --- a/data/chips/STM32H573AI.json +++ b/data/chips/STM32H573AI.json @@ -8543,7 +8543,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9010,7 +9010,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9147,7 +9147,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9249,7 +9249,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9351,7 +9351,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9513,7 +9513,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9675,7 +9675,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9822,7 +9822,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10089,7 +10089,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573II.json b/data/chips/STM32H573II.json index cd15a99..27e4f98 100644 --- a/data/chips/STM32H573II.json +++ b/data/chips/STM32H573II.json @@ -11071,7 +11071,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11538,7 +11538,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11675,7 +11675,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11777,7 +11777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11879,7 +11879,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12041,7 +12041,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12203,7 +12203,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12350,7 +12350,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12617,7 +12617,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573MI.json b/data/chips/STM32H573MI.json index ff3e644..55357bc 100644 --- a/data/chips/STM32H573MI.json +++ b/data/chips/STM32H573MI.json @@ -4840,7 +4840,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5202,7 +5202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5319,7 +5319,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5406,7 +5406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5488,7 +5488,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5645,7 +5645,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5807,7 +5807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5934,7 +5934,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6176,7 +6176,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573RI.json b/data/chips/STM32H573RI.json index b4b101e..ad9fc30 100644 --- a/data/chips/STM32H573RI.json +++ b/data/chips/STM32H573RI.json @@ -5094,7 +5094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5436,7 +5436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5553,7 +5553,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5640,7 +5640,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5727,7 +5727,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5889,7 +5889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6183,7 +6183,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6425,7 +6425,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573VI.json b/data/chips/STM32H573VI.json index 46e22cd..3c6afcb 100644 --- a/data/chips/STM32H573VI.json +++ b/data/chips/STM32H573VI.json @@ -6341,7 +6341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6880,7 +6880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6967,7 +6967,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7054,7 +7054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7216,7 +7216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7378,7 +7378,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7525,7 +7525,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7767,7 +7767,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H573ZI.json b/data/chips/STM32H573ZI.json index 1508a9a..35932f9 100644 --- a/data/chips/STM32H573ZI.json +++ b/data/chips/STM32H573ZI.json @@ -7779,7 +7779,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8201,7 +8201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8338,7 +8338,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8440,7 +8440,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8542,7 +8542,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8704,7 +8704,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8866,7 +8866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9013,7 +9013,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9255,7 +9255,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723VE.json b/data/chips/STM32H723VE.json index 8a53d26..7f0081b 100644 --- a/data/chips/STM32H723VE.json +++ b/data/chips/STM32H723VE.json @@ -6970,7 +6970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7367,7 +7367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7484,7 +7484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7556,7 +7556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7628,7 +7628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7760,7 +7760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7842,7 +7842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7924,7 +7924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8056,7 +8056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8168,7 +8168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8370,7 +8370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723VG.json b/data/chips/STM32H723VG.json index 77c16a4..cc8fcce 100644 --- a/data/chips/STM32H723VG.json +++ b/data/chips/STM32H723VG.json @@ -6970,7 +6970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7367,7 +7367,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7484,7 +7484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7556,7 +7556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7628,7 +7628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7760,7 +7760,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7842,7 +7842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7924,7 +7924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8056,7 +8056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8168,7 +8168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8370,7 +8370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723ZE.json b/data/chips/STM32H723ZE.json index d67d2a1..1dc5fb7 100644 --- a/data/chips/STM32H723ZE.json +++ b/data/chips/STM32H723ZE.json @@ -8373,7 +8373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8800,7 +8800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8917,7 +8917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9004,7 +9004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9091,7 +9091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9223,7 +9223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9365,7 +9365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9472,7 +9472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9604,7 +9604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9716,7 +9716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9918,7 +9918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H723ZG.json b/data/chips/STM32H723ZG.json index 2d1058a..a736453 100644 --- a/data/chips/STM32H723ZG.json +++ b/data/chips/STM32H723ZG.json @@ -8373,7 +8373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8800,7 +8800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8917,7 +8917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9004,7 +9004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9091,7 +9091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9223,7 +9223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9365,7 +9365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9472,7 +9472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9604,7 +9604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9716,7 +9716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9918,7 +9918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725AE.json b/data/chips/STM32H725AE.json index a9ac1dd..3b41b2a 100644 --- a/data/chips/STM32H725AE.json +++ b/data/chips/STM32H725AE.json @@ -7853,7 +7853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8280,7 +8280,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8397,7 +8397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8484,7 +8484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8571,7 +8571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8703,7 +8703,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8845,7 +8845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8952,7 +8952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9084,7 +9084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9196,7 +9196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9413,7 +9413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725AG.json b/data/chips/STM32H725AG.json index d08ac09..768d66d 100644 --- a/data/chips/STM32H725AG.json +++ b/data/chips/STM32H725AG.json @@ -7859,7 +7859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8286,7 +8286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8403,7 +8403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8490,7 +8490,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8577,7 +8577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8709,7 +8709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8851,7 +8851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8958,7 +8958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9090,7 +9090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9202,7 +9202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9419,7 +9419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725IE.json b/data/chips/STM32H725IE.json index 0b7b94c..361ce58 100644 --- a/data/chips/STM32H725IE.json +++ b/data/chips/STM32H725IE.json @@ -9339,7 +9339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9821,7 +9821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9938,7 +9938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10025,7 +10025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10112,7 +10112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10244,7 +10244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10386,7 +10386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10493,7 +10493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10625,7 +10625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10737,7 +10737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10959,7 +10959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725IG.json b/data/chips/STM32H725IG.json index 46b8112..af6e840 100644 --- a/data/chips/STM32H725IG.json +++ b/data/chips/STM32H725IG.json @@ -9345,7 +9345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9827,7 +9827,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9944,7 +9944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10031,7 +10031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10118,7 +10118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10250,7 +10250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10392,7 +10392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10499,7 +10499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10631,7 +10631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10743,7 +10743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10965,7 +10965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725RE.json b/data/chips/STM32H725RE.json index cee5689..ea57b99 100644 --- a/data/chips/STM32H725RE.json +++ b/data/chips/STM32H725RE.json @@ -4525,7 +4525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4852,7 +4852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4949,7 +4949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5021,7 +5021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5093,7 +5093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5220,7 +5220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5302,7 +5302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5384,7 +5384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5511,7 +5511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5598,7 +5598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5800,7 +5800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725RG.json b/data/chips/STM32H725RG.json index 608a283..67aa259 100644 --- a/data/chips/STM32H725RG.json +++ b/data/chips/STM32H725RG.json @@ -4531,7 +4531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4858,7 +4858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4955,7 +4955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5226,7 +5226,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5308,7 +5308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5390,7 +5390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5517,7 +5517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5604,7 +5604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5806,7 +5806,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725VE.json b/data/chips/STM32H725VE.json index 5d63cf9..1e3b5c6 100644 --- a/data/chips/STM32H725VE.json +++ b/data/chips/STM32H725VE.json @@ -6815,7 +6815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7177,7 +7177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7294,7 +7294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7366,7 +7366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7438,7 +7438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7570,7 +7570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7652,7 +7652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7734,7 +7734,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7866,7 +7866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7978,7 +7978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8180,7 +8180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725VG.json b/data/chips/STM32H725VG.json index 585df69..9e783e4 100644 --- a/data/chips/STM32H725VG.json +++ b/data/chips/STM32H725VG.json @@ -7517,7 +7517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7879,7 +7879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7996,7 +7996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8068,7 +8068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8140,7 +8140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8272,7 +8272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8354,7 +8354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8436,7 +8436,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8568,7 +8568,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8680,7 +8680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8882,7 +8882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725ZE.json b/data/chips/STM32H725ZE.json index 8b1c3ab..1042566 100644 --- a/data/chips/STM32H725ZE.json +++ b/data/chips/STM32H725ZE.json @@ -7240,7 +7240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7647,7 +7647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7764,7 +7764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7851,7 +7851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7938,7 +7938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8070,7 +8070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8187,7 +8187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8279,7 +8279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8411,7 +8411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8523,7 +8523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8725,7 +8725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H725ZG.json b/data/chips/STM32H725ZG.json index 8631e66..5602d56 100644 --- a/data/chips/STM32H725ZG.json +++ b/data/chips/STM32H725ZG.json @@ -7246,7 +7246,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7653,7 +7653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7770,7 +7770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7857,7 +7857,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7944,7 +7944,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8076,7 +8076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8193,7 +8193,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8285,7 +8285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8417,7 +8417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8529,7 +8529,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8731,7 +8731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730AB.json b/data/chips/STM32H730AB.json index 765576c..5b2fb6e 100644 --- a/data/chips/STM32H730AB.json +++ b/data/chips/STM32H730AB.json @@ -7974,7 +7974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8401,7 +8401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8518,7 +8518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8605,7 +8605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8692,7 +8692,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8824,7 +8824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8966,7 +8966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9073,7 +9073,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9205,7 +9205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9317,7 +9317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9534,7 +9534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730IB.json b/data/chips/STM32H730IB.json index e8186f2..6162f35 100644 --- a/data/chips/STM32H730IB.json +++ b/data/chips/STM32H730IB.json @@ -9460,7 +9460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9942,7 +9942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10059,7 +10059,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10146,7 +10146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10233,7 +10233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10365,7 +10365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10507,7 +10507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10614,7 +10614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10746,7 +10746,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10858,7 +10858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11080,7 +11080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730VB.json b/data/chips/STM32H730VB.json index 80fe8b5..9de655a 100644 --- a/data/chips/STM32H730VB.json +++ b/data/chips/STM32H730VB.json @@ -7085,7 +7085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7482,7 +7482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7599,7 +7599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7671,7 +7671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7743,7 +7743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7875,7 +7875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7957,7 +7957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8039,7 +8039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8171,7 +8171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8283,7 +8283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8485,7 +8485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H730ZB.json b/data/chips/STM32H730ZB.json index 4e89701..2c6ba18 100644 --- a/data/chips/STM32H730ZB.json +++ b/data/chips/STM32H730ZB.json @@ -8488,7 +8488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8915,7 +8915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9032,7 +9032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9119,7 +9119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9206,7 +9206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9338,7 +9338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9480,7 +9480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9587,7 +9587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9719,7 +9719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9831,7 +9831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10033,7 +10033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H733VG.json b/data/chips/STM32H733VG.json index 7374d69..1fd78f9 100644 --- a/data/chips/STM32H733VG.json +++ b/data/chips/STM32H733VG.json @@ -7085,7 +7085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7482,7 +7482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7599,7 +7599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7671,7 +7671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7743,7 +7743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7875,7 +7875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7957,7 +7957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8039,7 +8039,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8171,7 +8171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8283,7 +8283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8485,7 +8485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H733ZG.json b/data/chips/STM32H733ZG.json index 6ab7652..4b16259 100644 --- a/data/chips/STM32H733ZG.json +++ b/data/chips/STM32H733ZG.json @@ -8488,7 +8488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8915,7 +8915,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9032,7 +9032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9119,7 +9119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9206,7 +9206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9338,7 +9338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9480,7 +9480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9587,7 +9587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9719,7 +9719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9831,7 +9831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10033,7 +10033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735AG.json b/data/chips/STM32H735AG.json index 6f3eda7..10f1031 100644 --- a/data/chips/STM32H735AG.json +++ b/data/chips/STM32H735AG.json @@ -7979,7 +7979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8406,7 +8406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8523,7 +8523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8610,7 +8610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8697,7 +8697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8829,7 +8829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8971,7 +8971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9078,7 +9078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9210,7 +9210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9322,7 +9322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9539,7 +9539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735IG.json b/data/chips/STM32H735IG.json index e0fd43d..df32164 100644 --- a/data/chips/STM32H735IG.json +++ b/data/chips/STM32H735IG.json @@ -9465,7 +9465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9947,7 +9947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10064,7 +10064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10151,7 +10151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -10238,7 +10238,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10370,7 +10370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10512,7 +10512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10619,7 +10619,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10751,7 +10751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10863,7 +10863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -11085,7 +11085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735RG.json b/data/chips/STM32H735RG.json index e3697d7..36401f2 100644 --- a/data/chips/STM32H735RG.json +++ b/data/chips/STM32H735RG.json @@ -4556,7 +4556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4980,7 +4980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5052,7 +5052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5124,7 +5124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5251,7 +5251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5333,7 +5333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5415,7 +5415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5542,7 +5542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5629,7 +5629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5831,7 +5831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735VG.json b/data/chips/STM32H735VG.json index 2234027..7204f4d 100644 --- a/data/chips/STM32H735VG.json +++ b/data/chips/STM32H735VG.json @@ -7637,7 +7637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7999,7 +7999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8116,7 +8116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8188,7 +8188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8260,7 +8260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8392,7 +8392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8474,7 +8474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8556,7 +8556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8688,7 +8688,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8800,7 +8800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9002,7 +9002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H735ZG.json b/data/chips/STM32H735ZG.json index c69ec73..a92b2d5 100644 --- a/data/chips/STM32H735ZG.json +++ b/data/chips/STM32H735ZG.json @@ -7366,7 +7366,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7773,7 +7773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7890,7 +7890,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7977,7 +7977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8064,7 +8064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8196,7 +8196,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8313,7 +8313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8405,7 +8405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8537,7 +8537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8649,7 +8649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8851,7 +8851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742AG.json b/data/chips/STM32H742AG.json index 8941a7d..b6aa3e6 100644 --- a/data/chips/STM32H742AG.json +++ b/data/chips/STM32H742AG.json @@ -7012,7 +7012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7434,7 +7434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7541,7 +7541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7628,7 +7628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7715,7 +7715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7847,7 +7847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7979,7 +7979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8091,7 +8091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8313,7 +8313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742AI.json b/data/chips/STM32H742AI.json index b7a723d..55f5a16 100644 --- a/data/chips/STM32H742AI.json +++ b/data/chips/STM32H742AI.json @@ -7012,7 +7012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7434,7 +7434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7541,7 +7541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7628,7 +7628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7715,7 +7715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7847,7 +7847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7979,7 +7979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8091,7 +8091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8313,7 +8313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742BG.json b/data/chips/STM32H742BG.json index 5e75de2..d8150c4 100644 --- a/data/chips/STM32H742BG.json +++ b/data/chips/STM32H742BG.json @@ -7439,7 +7439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7916,7 +7916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8023,7 +8023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8110,7 +8110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8197,7 +8197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8329,7 +8329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8461,7 +8461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8573,7 +8573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8800,7 +8800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742BI.json b/data/chips/STM32H742BI.json index 088e6a0..c02e8e0 100644 --- a/data/chips/STM32H742BI.json +++ b/data/chips/STM32H742BI.json @@ -7439,7 +7439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7916,7 +7916,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8023,7 +8023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8110,7 +8110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8197,7 +8197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8329,7 +8329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8461,7 +8461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8573,7 +8573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8800,7 +8800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742IG.json b/data/chips/STM32H742IG.json index b8a2f8a..79f9799 100644 --- a/data/chips/STM32H742IG.json +++ b/data/chips/STM32H742IG.json @@ -8434,7 +8434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8866,7 +8866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8973,7 +8973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9060,7 +9060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9147,7 +9147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9279,7 +9279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9411,7 +9411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9523,7 +9523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9750,7 +9750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742II.json b/data/chips/STM32H742II.json index 0e130ed..95dec64 100644 --- a/data/chips/STM32H742II.json +++ b/data/chips/STM32H742II.json @@ -8434,7 +8434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8866,7 +8866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8973,7 +8973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9060,7 +9060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9147,7 +9147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9279,7 +9279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9411,7 +9411,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9523,7 +9523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9750,7 +9750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742VG.json b/data/chips/STM32H742VG.json index 67dd21c..4739677 100644 --- a/data/chips/STM32H742VG.json +++ b/data/chips/STM32H742VG.json @@ -6333,7 +6333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6725,7 +6725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6832,7 +6832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6904,7 +6904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6976,7 +6976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7108,7 +7108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7240,7 +7240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7352,7 +7352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7554,7 +7554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742VI.json b/data/chips/STM32H742VI.json index c5fd4b9..e83fad5 100644 --- a/data/chips/STM32H742VI.json +++ b/data/chips/STM32H742VI.json @@ -6333,7 +6333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6725,7 +6725,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6832,7 +6832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6904,7 +6904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6976,7 +6976,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7108,7 +7108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7240,7 +7240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7352,7 +7352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7554,7 +7554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742XG.json b/data/chips/STM32H742XG.json index 8005ca7..f133ca8 100644 --- a/data/chips/STM32H742XG.json +++ b/data/chips/STM32H742XG.json @@ -7845,7 +7845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8322,7 +8322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8429,7 +8429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8516,7 +8516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8603,7 +8603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8735,7 +8735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8867,7 +8867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8979,7 +8979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9206,7 +9206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742XI.json b/data/chips/STM32H742XI.json index b60667e..4b3ade7 100644 --- a/data/chips/STM32H742XI.json +++ b/data/chips/STM32H742XI.json @@ -7845,7 +7845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8322,7 +8322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8429,7 +8429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8516,7 +8516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8603,7 +8603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8735,7 +8735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8867,7 +8867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8979,7 +8979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9206,7 +9206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742ZG.json b/data/chips/STM32H742ZG.json index d826085..c6fb5de 100644 --- a/data/chips/STM32H742ZG.json +++ b/data/chips/STM32H742ZG.json @@ -6605,7 +6605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7027,7 +7027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7134,7 +7134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7221,7 +7221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7308,7 +7308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7440,7 +7440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7572,7 +7572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7684,7 +7684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7886,7 +7886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H742ZI.json b/data/chips/STM32H742ZI.json index 2e18c0b..1bbbd79 100644 --- a/data/chips/STM32H742ZI.json +++ b/data/chips/STM32H742ZI.json @@ -6605,7 +6605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7027,7 +7027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7134,7 +7134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7221,7 +7221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7308,7 +7308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7440,7 +7440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7572,7 +7572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7684,7 +7684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7886,7 +7886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743AG.json b/data/chips/STM32H743AG.json index 23529b0..81f1a5f 100644 --- a/data/chips/STM32H743AG.json +++ b/data/chips/STM32H743AG.json @@ -7436,7 +7436,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7858,7 +7858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7965,7 +7965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8052,7 +8052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8139,7 +8139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8271,7 +8271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8403,7 +8403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8515,7 +8515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8737,7 +8737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743AI.json b/data/chips/STM32H743AI.json index 7794f4e..b1c86fb 100644 --- a/data/chips/STM32H743AI.json +++ b/data/chips/STM32H743AI.json @@ -7436,7 +7436,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7858,7 +7858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7965,7 +7965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8052,7 +8052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8139,7 +8139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8271,7 +8271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8403,7 +8403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8515,7 +8515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8737,7 +8737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743BG.json b/data/chips/STM32H743BG.json index 7a569f1..355ce5d 100644 --- a/data/chips/STM32H743BG.json +++ b/data/chips/STM32H743BG.json @@ -8043,7 +8043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8520,7 +8520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8627,7 +8627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8714,7 +8714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8801,7 +8801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8933,7 +8933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9065,7 +9065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9177,7 +9177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9404,7 +9404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743BI.json b/data/chips/STM32H743BI.json index e485967..481c2ee 100644 --- a/data/chips/STM32H743BI.json +++ b/data/chips/STM32H743BI.json @@ -8043,7 +8043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8520,7 +8520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8627,7 +8627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8714,7 +8714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8801,7 +8801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8933,7 +8933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9065,7 +9065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9177,7 +9177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9404,7 +9404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743IG.json b/data/chips/STM32H743IG.json index cde40c2..7c3a03a 100644 --- a/data/chips/STM32H743IG.json +++ b/data/chips/STM32H743IG.json @@ -8878,7 +8878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9310,7 +9310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9417,7 +9417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9504,7 +9504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9591,7 +9591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9723,7 +9723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9855,7 +9855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9967,7 +9967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10194,7 +10194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743II.json b/data/chips/STM32H743II.json index 2f5f57e..a04ba86 100644 --- a/data/chips/STM32H743II.json +++ b/data/chips/STM32H743II.json @@ -8878,7 +8878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9310,7 +9310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9417,7 +9417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9504,7 +9504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9591,7 +9591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9723,7 +9723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9855,7 +9855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9967,7 +9967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10194,7 +10194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743VG.json b/data/chips/STM32H743VG.json index 5720f7e..232da90 100644 --- a/data/chips/STM32H743VG.json +++ b/data/chips/STM32H743VG.json @@ -6612,7 +6612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7004,7 +7004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7111,7 +7111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7183,7 +7183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7255,7 +7255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7387,7 +7387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7519,7 +7519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7631,7 +7631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7833,7 +7833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743VI.json b/data/chips/STM32H743VI.json index e1bbe43..ca8b9e2 100644 --- a/data/chips/STM32H743VI.json +++ b/data/chips/STM32H743VI.json @@ -6612,7 +6612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7004,7 +7004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7111,7 +7111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7183,7 +7183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7255,7 +7255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7387,7 +7387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7519,7 +7519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7631,7 +7631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7833,7 +7833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743XG.json b/data/chips/STM32H743XG.json index 52ab783..f31c849 100644 --- a/data/chips/STM32H743XG.json +++ b/data/chips/STM32H743XG.json @@ -8449,7 +8449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8926,7 +8926,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9033,7 +9033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9120,7 +9120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9207,7 +9207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9339,7 +9339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9471,7 +9471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9583,7 +9583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9810,7 +9810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743XI.json b/data/chips/STM32H743XI.json index fe6d8bc..e9107e7 100644 --- a/data/chips/STM32H743XI.json +++ b/data/chips/STM32H743XI.json @@ -8449,7 +8449,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8926,7 +8926,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9033,7 +9033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9120,7 +9120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9207,7 +9207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9339,7 +9339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9471,7 +9471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9583,7 +9583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9810,7 +9810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743ZG.json b/data/chips/STM32H743ZG.json index 04c45f0..28b7ef0 100644 --- a/data/chips/STM32H743ZG.json +++ b/data/chips/STM32H743ZG.json @@ -6939,7 +6939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7361,7 +7361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7468,7 +7468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7555,7 +7555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7642,7 +7642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7774,7 +7774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7906,7 +7906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8018,7 +8018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8220,7 +8220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H743ZI.json b/data/chips/STM32H743ZI.json index 8c62709..b42fd8a 100644 --- a/data/chips/STM32H743ZI.json +++ b/data/chips/STM32H743ZI.json @@ -6939,7 +6939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7361,7 +7361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7468,7 +7468,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7555,7 +7555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7642,7 +7642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7774,7 +7774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7906,7 +7906,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8018,7 +8018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8220,7 +8220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745BG.json b/data/chips/STM32H745BG.json index fc76fcd..8ca9927 100644 --- a/data/chips/STM32H745BG.json +++ b/data/chips/STM32H745BG.json @@ -7924,7 +7924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8401,7 +8401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8508,7 +8508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8595,7 +8595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8682,7 +8682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8814,7 +8814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8946,7 +8946,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9058,7 +9058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9285,7 +9285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17823,7 +17823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18300,7 +18300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18407,7 +18407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18494,7 +18494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18581,7 +18581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18713,7 +18713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18845,7 +18845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18957,7 +18957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19184,7 +19184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745BI.json b/data/chips/STM32H745BI.json index 683ba74..ac2375c 100644 --- a/data/chips/STM32H745BI.json +++ b/data/chips/STM32H745BI.json @@ -7924,7 +7924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8401,7 +8401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8508,7 +8508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8595,7 +8595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8682,7 +8682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8814,7 +8814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8946,7 +8946,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9058,7 +9058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9285,7 +9285,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17823,7 +17823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18300,7 +18300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18407,7 +18407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18494,7 +18494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18581,7 +18581,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18713,7 +18713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18845,7 +18845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18957,7 +18957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19184,7 +19184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745IG.json b/data/chips/STM32H745IG.json index 159ea70..ec07266 100644 --- a/data/chips/STM32H745IG.json +++ b/data/chips/STM32H745IG.json @@ -8766,7 +8766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9243,7 +9243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9350,7 +9350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9437,7 +9437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9524,7 +9524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9656,7 +9656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9788,7 +9788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9900,7 +9900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10122,7 +10122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18407,7 +18407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18884,7 +18884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18991,7 +18991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19078,7 +19078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19165,7 +19165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19297,7 +19297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19429,7 +19429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19541,7 +19541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19763,7 +19763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745II.json b/data/chips/STM32H745II.json index 16f237f..42c3724 100644 --- a/data/chips/STM32H745II.json +++ b/data/chips/STM32H745II.json @@ -8766,7 +8766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9243,7 +9243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9350,7 +9350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9437,7 +9437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9524,7 +9524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9656,7 +9656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9788,7 +9788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9900,7 +9900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10122,7 +10122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18407,7 +18407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18884,7 +18884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18991,7 +18991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19078,7 +19078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19165,7 +19165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19297,7 +19297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19429,7 +19429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19541,7 +19541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19763,7 +19763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745XG.json b/data/chips/STM32H745XG.json index f770e15..a191413 100644 --- a/data/chips/STM32H745XG.json +++ b/data/chips/STM32H745XG.json @@ -8440,7 +8440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8917,7 +8917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9024,7 +9024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9111,7 +9111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9198,7 +9198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9330,7 +9330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9462,7 +9462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9574,7 +9574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9801,7 +9801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18513,7 +18513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18990,7 +18990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19097,7 +19097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19184,7 +19184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19271,7 +19271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19403,7 +19403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19535,7 +19535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19647,7 +19647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19874,7 +19874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745XI.json b/data/chips/STM32H745XI.json index 3d140de..1b973c6 100644 --- a/data/chips/STM32H745XI.json +++ b/data/chips/STM32H745XI.json @@ -8440,7 +8440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8917,7 +8917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9024,7 +9024,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9111,7 +9111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9198,7 +9198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9330,7 +9330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9462,7 +9462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9574,7 +9574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9801,7 +9801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18513,7 +18513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18990,7 +18990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19097,7 +19097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19184,7 +19184,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19271,7 +19271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19403,7 +19403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19535,7 +19535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19647,7 +19647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19874,7 +19874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745ZG.json b/data/chips/STM32H745ZG.json index 6d3aa61..4f5fc00 100644 --- a/data/chips/STM32H745ZG.json +++ b/data/chips/STM32H745ZG.json @@ -6775,7 +6775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7177,7 +7177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7284,7 +7284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7371,7 +7371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7458,7 +7458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7590,7 +7590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7722,7 +7722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7834,7 +7834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8036,7 +8036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15609,7 +15609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16011,7 +16011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16118,7 +16118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16205,7 +16205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16292,7 +16292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16424,7 +16424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16556,7 +16556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16668,7 +16668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16870,7 +16870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H745ZI.json b/data/chips/STM32H745ZI.json index 9c09e35..9d8e238 100644 --- a/data/chips/STM32H745ZI.json +++ b/data/chips/STM32H745ZI.json @@ -6775,7 +6775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7177,7 +7177,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7284,7 +7284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7371,7 +7371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7458,7 +7458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7590,7 +7590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7722,7 +7722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7834,7 +7834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8036,7 +8036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15609,7 +15609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16011,7 +16011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16118,7 +16118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16205,7 +16205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16292,7 +16292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16424,7 +16424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16556,7 +16556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16668,7 +16668,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16870,7 +16870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747AG.json b/data/chips/STM32H747AG.json index 95fc44f..9e8b871 100644 --- a/data/chips/STM32H747AG.json +++ b/data/chips/STM32H747AG.json @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7657,7 +7657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7744,7 +7744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7831,7 +7831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7963,7 +7963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8095,7 +8095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8207,7 +8207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8409,7 +8409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16223,7 +16223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16645,7 +16645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16752,7 +16752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16839,7 +16839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16926,7 +16926,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17058,7 +17058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17190,7 +17190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17302,7 +17302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17504,7 +17504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747AI.json b/data/chips/STM32H747AI.json index 2b2b665..c438e1b 100644 --- a/data/chips/STM32H747AI.json +++ b/data/chips/STM32H747AI.json @@ -7128,7 +7128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7657,7 +7657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7744,7 +7744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7831,7 +7831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7963,7 +7963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8095,7 +8095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8207,7 +8207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8409,7 +8409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16223,7 +16223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16645,7 +16645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16752,7 +16752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16839,7 +16839,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16926,7 +16926,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17058,7 +17058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17190,7 +17190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17302,7 +17302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17504,7 +17504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747BG.json b/data/chips/STM32H747BG.json index 54c5e3d..b301407 100644 --- a/data/chips/STM32H747BG.json +++ b/data/chips/STM32H747BG.json @@ -7907,7 +7907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8339,7 +8339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8446,7 +8446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8533,7 +8533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8620,7 +8620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8752,7 +8752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8884,7 +8884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8996,7 +8996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9223,7 +9223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17677,7 +17677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18109,7 +18109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18216,7 +18216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18303,7 +18303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18390,7 +18390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18522,7 +18522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18654,7 +18654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18766,7 +18766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18993,7 +18993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747BI.json b/data/chips/STM32H747BI.json index 5c4fabc..42a2ff1 100644 --- a/data/chips/STM32H747BI.json +++ b/data/chips/STM32H747BI.json @@ -7907,7 +7907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8339,7 +8339,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8446,7 +8446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8533,7 +8533,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8620,7 +8620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8752,7 +8752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8884,7 +8884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8996,7 +8996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9223,7 +9223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17677,7 +17677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18109,7 +18109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18216,7 +18216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18303,7 +18303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18390,7 +18390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18522,7 +18522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18654,7 +18654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18766,7 +18766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18993,7 +18993,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747IG.json b/data/chips/STM32H747IG.json index d24c6b9..2605c70 100644 --- a/data/chips/STM32H747IG.json +++ b/data/chips/STM32H747IG.json @@ -7170,7 +7170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7592,7 +7592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7699,7 +7699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7786,7 +7786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7873,7 +7873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8005,7 +8005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8137,7 +8137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8249,7 +8249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8451,7 +8451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16265,7 +16265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16687,7 +16687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16794,7 +16794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16881,7 +16881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16968,7 +16968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17100,7 +17100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17232,7 +17232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17344,7 +17344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17546,7 +17546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747II.json b/data/chips/STM32H747II.json index 4afa92a..d4f8d51 100644 --- a/data/chips/STM32H747II.json +++ b/data/chips/STM32H747II.json @@ -7170,7 +7170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7592,7 +7592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7699,7 +7699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7786,7 +7786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7873,7 +7873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8005,7 +8005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8137,7 +8137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8249,7 +8249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8451,7 +8451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16265,7 +16265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16687,7 +16687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16794,7 +16794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16881,7 +16881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16968,7 +16968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17100,7 +17100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17232,7 +17232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17344,7 +17344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17546,7 +17546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747XG.json b/data/chips/STM32H747XG.json index d1bf575..1189c4e 100644 --- a/data/chips/STM32H747XG.json +++ b/data/chips/STM32H747XG.json @@ -8493,7 +8493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8970,7 +8970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9077,7 +9077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9164,7 +9164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9251,7 +9251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9383,7 +9383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9515,7 +9515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9627,7 +9627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9854,7 +9854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18617,7 +18617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19094,7 +19094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19201,7 +19201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19288,7 +19288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19375,7 +19375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19507,7 +19507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19639,7 +19639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19751,7 +19751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19978,7 +19978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747XI.json b/data/chips/STM32H747XI.json index 11ff245..139ca59 100644 --- a/data/chips/STM32H747XI.json +++ b/data/chips/STM32H747XI.json @@ -8493,7 +8493,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8970,7 +8970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9077,7 +9077,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9164,7 +9164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9251,7 +9251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9383,7 +9383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9515,7 +9515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9627,7 +9627,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9854,7 +9854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18617,7 +18617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19094,7 +19094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19201,7 +19201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19288,7 +19288,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19375,7 +19375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19507,7 +19507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19639,7 +19639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19751,7 +19751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19978,7 +19978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H747ZI.json b/data/chips/STM32H747ZI.json index 4c3dcd6..769892c 100644 --- a/data/chips/STM32H747ZI.json +++ b/data/chips/STM32H747ZI.json @@ -6604,7 +6604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7016,7 +7016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7123,7 +7123,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7195,7 +7195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7267,7 +7267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7399,7 +7399,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7531,7 +7531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7643,7 +7643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7845,7 +7845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15153,7 +15153,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15565,7 +15565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15672,7 +15672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15744,7 +15744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15816,7 +15816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -15948,7 +15948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16080,7 +16080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16192,7 +16192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16394,7 +16394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750IB.json b/data/chips/STM32H750IB.json index 8cc63ed..70a7909 100644 --- a/data/chips/STM32H750IB.json +++ b/data/chips/STM32H750IB.json @@ -8923,7 +8923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9355,7 +9355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9462,7 +9462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9549,7 +9549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9636,7 +9636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9768,7 +9768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9900,7 +9900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10012,7 +10012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10239,7 +10239,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750VB.json b/data/chips/STM32H750VB.json index db08ed9..7286c04 100644 --- a/data/chips/STM32H750VB.json +++ b/data/chips/STM32H750VB.json @@ -6051,7 +6051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6443,7 +6443,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6550,7 +6550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6622,7 +6622,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6694,7 +6694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6826,7 +6826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6958,7 +6958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7070,7 +7070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7272,7 +7272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750XB.json b/data/chips/STM32H750XB.json index 6147cab..493fb07 100644 --- a/data/chips/STM32H750XB.json +++ b/data/chips/STM32H750XB.json @@ -8494,7 +8494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8971,7 +8971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9078,7 +9078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9165,7 +9165,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9252,7 +9252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9384,7 +9384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9516,7 +9516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9628,7 +9628,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9855,7 +9855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H750ZB.json b/data/chips/STM32H750ZB.json index e4b195c..5339c07 100644 --- a/data/chips/STM32H750ZB.json +++ b/data/chips/STM32H750ZB.json @@ -6972,7 +6972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7394,7 +7394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7501,7 +7501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7588,7 +7588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7675,7 +7675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7807,7 +7807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7939,7 +7939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8051,7 +8051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8253,7 +8253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753AI.json b/data/chips/STM32H753AI.json index 9277277..46c8646 100644 --- a/data/chips/STM32H753AI.json +++ b/data/chips/STM32H753AI.json @@ -7515,7 +7515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7937,7 +7937,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8044,7 +8044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8131,7 +8131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8218,7 +8218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8350,7 +8350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8482,7 +8482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8594,7 +8594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8816,7 +8816,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753BI.json b/data/chips/STM32H753BI.json index b4150e7..e5cbfb2 100644 --- a/data/chips/STM32H753BI.json +++ b/data/chips/STM32H753BI.json @@ -8122,7 +8122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8599,7 +8599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8706,7 +8706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8793,7 +8793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8880,7 +8880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9012,7 +9012,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9144,7 +9144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9256,7 +9256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9483,7 +9483,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753II.json b/data/chips/STM32H753II.json index 1619e3e..d20cc4e 100644 --- a/data/chips/STM32H753II.json +++ b/data/chips/STM32H753II.json @@ -8957,7 +8957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9389,7 +9389,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9496,7 +9496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9583,7 +9583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9670,7 +9670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9802,7 +9802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9934,7 +9934,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10046,7 +10046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10273,7 +10273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753VI.json b/data/chips/STM32H753VI.json index fe9048e..d579129 100644 --- a/data/chips/STM32H753VI.json +++ b/data/chips/STM32H753VI.json @@ -6691,7 +6691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7083,7 +7083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7190,7 +7190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7262,7 +7262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7334,7 +7334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7466,7 +7466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7598,7 +7598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7710,7 +7710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7912,7 +7912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753XI.json b/data/chips/STM32H753XI.json index c687941..04b6ce8 100644 --- a/data/chips/STM32H753XI.json +++ b/data/chips/STM32H753XI.json @@ -8528,7 +8528,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9005,7 +9005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9112,7 +9112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9199,7 +9199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9286,7 +9286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9418,7 +9418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9550,7 +9550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9662,7 +9662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9889,7 +9889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H753ZI.json b/data/chips/STM32H753ZI.json index 6d99739..20ee003 100644 --- a/data/chips/STM32H753ZI.json +++ b/data/chips/STM32H753ZI.json @@ -7018,7 +7018,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7440,7 +7440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7547,7 +7547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7634,7 +7634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7721,7 +7721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7853,7 +7853,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7985,7 +7985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8097,7 +8097,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8299,7 +8299,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755BI.json b/data/chips/STM32H755BI.json index b197550..b2c4a52 100644 --- a/data/chips/STM32H755BI.json +++ b/data/chips/STM32H755BI.json @@ -8003,7 +8003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8480,7 +8480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8587,7 +8587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8674,7 +8674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8761,7 +8761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8893,7 +8893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9025,7 +9025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9137,7 +9137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9364,7 +9364,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17979,7 +17979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18456,7 +18456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18563,7 +18563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18650,7 +18650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18737,7 +18737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18869,7 +18869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19001,7 +19001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19113,7 +19113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19340,7 +19340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755II.json b/data/chips/STM32H755II.json index 3a51906..f49f351 100644 --- a/data/chips/STM32H755II.json +++ b/data/chips/STM32H755II.json @@ -8845,7 +8845,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9322,7 +9322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9429,7 +9429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9516,7 +9516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9603,7 +9603,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9735,7 +9735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9867,7 +9867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9979,7 +9979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10201,7 +10201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18563,7 +18563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19040,7 +19040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19147,7 +19147,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19234,7 +19234,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19321,7 +19321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19453,7 +19453,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19585,7 +19585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19697,7 +19697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19919,7 +19919,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755XI.json b/data/chips/STM32H755XI.json index 0aaf5c7..7528502 100644 --- a/data/chips/STM32H755XI.json +++ b/data/chips/STM32H755XI.json @@ -8519,7 +8519,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8996,7 +8996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9103,7 +9103,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9190,7 +9190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9277,7 +9277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9409,7 +9409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9541,7 +9541,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9653,7 +9653,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9880,7 +9880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18669,7 +18669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19146,7 +19146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19253,7 +19253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19340,7 +19340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19427,7 +19427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19559,7 +19559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19691,7 +19691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19803,7 +19803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20030,7 +20030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H755ZI.json b/data/chips/STM32H755ZI.json index c1046c7..ba86569 100644 --- a/data/chips/STM32H755ZI.json +++ b/data/chips/STM32H755ZI.json @@ -6854,7 +6854,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7256,7 +7256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7363,7 +7363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7450,7 +7450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7537,7 +7537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7669,7 +7669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7801,7 +7801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7913,7 +7913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8115,7 +8115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15765,7 +15765,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16167,7 +16167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16274,7 +16274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16361,7 +16361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16448,7 +16448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16580,7 +16580,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16712,7 +16712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16824,7 +16824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17026,7 +17026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757AI.json b/data/chips/STM32H757AI.json index 049b4cd..5ae8ed4 100644 --- a/data/chips/STM32H757AI.json +++ b/data/chips/STM32H757AI.json @@ -7207,7 +7207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7629,7 +7629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7736,7 +7736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7823,7 +7823,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7910,7 +7910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8042,7 +8042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8174,7 +8174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8286,7 +8286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8488,7 +8488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16379,7 +16379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16801,7 +16801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16908,7 +16908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16995,7 +16995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17082,7 +17082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17214,7 +17214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17346,7 +17346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17458,7 +17458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17660,7 +17660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757BI.json b/data/chips/STM32H757BI.json index 7bca3ba..01159e7 100644 --- a/data/chips/STM32H757BI.json +++ b/data/chips/STM32H757BI.json @@ -7986,7 +7986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8418,7 +8418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8525,7 +8525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8612,7 +8612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8699,7 +8699,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8831,7 +8831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8963,7 +8963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9075,7 +9075,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9302,7 +9302,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17833,7 +17833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18265,7 +18265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18372,7 +18372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18459,7 +18459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18546,7 +18546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -18678,7 +18678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18810,7 +18810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -18922,7 +18922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19149,7 +19149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757II.json b/data/chips/STM32H757II.json index ee475d2..222458f 100644 --- a/data/chips/STM32H757II.json +++ b/data/chips/STM32H757II.json @@ -7249,7 +7249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7671,7 +7671,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7778,7 +7778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7865,7 +7865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7952,7 +7952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8084,7 +8084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8216,7 +8216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8328,7 +8328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8530,7 +8530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16421,7 +16421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16843,7 +16843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -16950,7 +16950,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17037,7 +17037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -17124,7 +17124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17256,7 +17256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17388,7 +17388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -17500,7 +17500,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -17702,7 +17702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757XI.json b/data/chips/STM32H757XI.json index a652493..c8f2373 100644 --- a/data/chips/STM32H757XI.json +++ b/data/chips/STM32H757XI.json @@ -8572,7 +8572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9049,7 +9049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9156,7 +9156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9243,7 +9243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9330,7 +9330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9462,7 +9462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9594,7 +9594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9706,7 +9706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9933,7 +9933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -18773,7 +18773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19250,7 +19250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19357,7 +19357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19444,7 +19444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -19531,7 +19531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -19663,7 +19663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19795,7 +19795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -19907,7 +19907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -20134,7 +20134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H757ZI.json b/data/chips/STM32H757ZI.json index 9f88e12..68cfc76 100644 --- a/data/chips/STM32H757ZI.json +++ b/data/chips/STM32H757ZI.json @@ -6683,7 +6683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7095,7 +7095,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7202,7 +7202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7274,7 +7274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7346,7 +7346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7478,7 +7478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7610,7 +7610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7722,7 +7722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7924,7 +7924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15309,7 +15309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15721,7 +15721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15828,7 +15828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15900,7 +15900,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -15972,7 +15972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16104,7 +16104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16236,7 +16236,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -16348,7 +16348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -16550,7 +16550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3AG.json b/data/chips/STM32H7A3AG.json index 525f728..cbcb85a 100644 --- a/data/chips/STM32H7A3AG.json +++ b/data/chips/STM32H7A3AG.json @@ -7369,7 +7369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7908,7 +7908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7995,7 +7995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8082,7 +8082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8214,7 +8214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8346,7 +8346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8458,7 +8458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8675,7 +8675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3AI.json b/data/chips/STM32H7A3AI.json index ccd2653..1ff7e62 100644 --- a/data/chips/STM32H7A3AI.json +++ b/data/chips/STM32H7A3AI.json @@ -7369,7 +7369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7908,7 +7908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7995,7 +7995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8082,7 +8082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8214,7 +8214,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8346,7 +8346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8458,7 +8458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8675,7 +8675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3IG.json b/data/chips/STM32H7A3IG.json index e657d62..e7033b9 100644 --- a/data/chips/STM32H7A3IG.json +++ b/data/chips/STM32H7A3IG.json @@ -11393,7 +11393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11870,7 +11870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11987,7 +11987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12074,7 +12074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12161,7 +12161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12293,7 +12293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12425,7 +12425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12537,7 +12537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12764,7 +12764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3II.json b/data/chips/STM32H7A3II.json index 717d540..cfa1fce 100644 --- a/data/chips/STM32H7A3II.json +++ b/data/chips/STM32H7A3II.json @@ -11393,7 +11393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11870,7 +11870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11987,7 +11987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12074,7 +12074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12161,7 +12161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12293,7 +12293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12425,7 +12425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12537,7 +12537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12764,7 +12764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3LG.json b/data/chips/STM32H7A3LG.json index 548f3e5..1bec6d7 100644 --- a/data/chips/STM32H7A3LG.json +++ b/data/chips/STM32H7A3LG.json @@ -8365,7 +8365,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8842,7 +8842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8959,7 +8959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9046,7 +9046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9133,7 +9133,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9265,7 +9265,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9397,7 +9397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9509,7 +9509,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9736,7 +9736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3LI.json b/data/chips/STM32H7A3LI.json index 2aeac2d..3c2465d 100644 --- a/data/chips/STM32H7A3LI.json +++ b/data/chips/STM32H7A3LI.json @@ -8371,7 +8371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8848,7 +8848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8965,7 +8965,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9052,7 +9052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9139,7 +9139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9271,7 +9271,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9403,7 +9403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9515,7 +9515,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9742,7 +9742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3NG.json b/data/chips/STM32H7A3NG.json index 5dbb9ae..835818d 100644 --- a/data/chips/STM32H7A3NG.json +++ b/data/chips/STM32H7A3NG.json @@ -8273,7 +8273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8750,7 +8750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8867,7 +8867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8954,7 +8954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9041,7 +9041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9173,7 +9173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9305,7 +9305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9417,7 +9417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9644,7 +9644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3NI.json b/data/chips/STM32H7A3NI.json index d8b6d19..6d1e377 100644 --- a/data/chips/STM32H7A3NI.json +++ b/data/chips/STM32H7A3NI.json @@ -8273,7 +8273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8750,7 +8750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8867,7 +8867,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8954,7 +8954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9041,7 +9041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9173,7 +9173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9305,7 +9305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9417,7 +9417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9644,7 +9644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3QI.json b/data/chips/STM32H7A3QI.json index 60543c2..298a9f3 100644 --- a/data/chips/STM32H7A3QI.json +++ b/data/chips/STM32H7A3QI.json @@ -6460,7 +6460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6852,7 +6852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6969,7 +6969,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7041,7 +7041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7113,7 +7113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7245,7 +7245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7372,7 +7372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7484,7 +7484,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7686,7 +7686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3RG.json b/data/chips/STM32H7A3RG.json index 6915776..1dba6f7 100644 --- a/data/chips/STM32H7A3RG.json +++ b/data/chips/STM32H7A3RG.json @@ -4618,7 +4618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4930,7 +4930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5171,7 +5171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5298,7 +5298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5425,7 +5425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5512,7 +5512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5714,7 +5714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3RI.json b/data/chips/STM32H7A3RI.json index c290b48..1b6c5fc 100644 --- a/data/chips/STM32H7A3RI.json +++ b/data/chips/STM32H7A3RI.json @@ -4618,7 +4618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4930,7 +4930,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5027,7 +5027,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5099,7 +5099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5171,7 +5171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5298,7 +5298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5425,7 +5425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5512,7 +5512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5714,7 +5714,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3VG.json b/data/chips/STM32H7A3VG.json index 1d7d40d..7f51376 100644 --- a/data/chips/STM32H7A3VG.json +++ b/data/chips/STM32H7A3VG.json @@ -7851,7 +7851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8243,7 +8243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8360,7 +8360,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8432,7 +8432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8504,7 +8504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8636,7 +8636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8768,7 +8768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8880,7 +8880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9082,7 +9082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3VI.json b/data/chips/STM32H7A3VI.json index d631a29..c375d85 100644 --- a/data/chips/STM32H7A3VI.json +++ b/data/chips/STM32H7A3VI.json @@ -7851,7 +7851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8243,7 +8243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8360,7 +8360,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8432,7 +8432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8504,7 +8504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8636,7 +8636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8768,7 +8768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8880,7 +8880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9082,7 +9082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3ZG.json b/data/chips/STM32H7A3ZG.json index 285e768..d0e0dce 100644 --- a/data/chips/STM32H7A3ZG.json +++ b/data/chips/STM32H7A3ZG.json @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8307,7 +8307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8424,7 +8424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8511,7 +8511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8598,7 +8598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8730,7 +8730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8862,7 +8862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8974,7 +8974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9176,7 +9176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7A3ZI.json b/data/chips/STM32H7A3ZI.json index def9dcd..e8871dd 100644 --- a/data/chips/STM32H7A3ZI.json +++ b/data/chips/STM32H7A3ZI.json @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8307,7 +8307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8424,7 +8424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8511,7 +8511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8598,7 +8598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8730,7 +8730,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8862,7 +8862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8974,7 +8974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9176,7 +9176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0AB.json b/data/chips/STM32H7B0AB.json index 4901aac..f11730b 100644 --- a/data/chips/STM32H7B0AB.json +++ b/data/chips/STM32H7B0AB.json @@ -7467,7 +7467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7889,7 +7889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8006,7 +8006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8093,7 +8093,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8180,7 +8180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8312,7 +8312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8444,7 +8444,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8556,7 +8556,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8773,7 +8773,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0IB.json b/data/chips/STM32H7B0IB.json index f1e192a..319e7a0 100644 --- a/data/chips/STM32H7B0IB.json +++ b/data/chips/STM32H7B0IB.json @@ -9162,7 +9162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9594,7 +9594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9711,7 +9711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9798,7 +9798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9885,7 +9885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10017,7 +10017,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10149,7 +10149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -10261,7 +10261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -10488,7 +10488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0RB.json b/data/chips/STM32H7B0RB.json index 37642ae..50f1e0b 100644 --- a/data/chips/STM32H7B0RB.json +++ b/data/chips/STM32H7B0RB.json @@ -4701,7 +4701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5013,7 +5013,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5110,7 +5110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5182,7 +5182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5254,7 +5254,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5381,7 +5381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5508,7 +5508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5797,7 +5797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0VB.json b/data/chips/STM32H7B0VB.json index c345210..ca66eea 100644 --- a/data/chips/STM32H7B0VB.json +++ b/data/chips/STM32H7B0VB.json @@ -6116,7 +6116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6508,7 +6508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6625,7 +6625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6697,7 +6697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6769,7 +6769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6901,7 +6901,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7033,7 +7033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7145,7 +7145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7347,7 +7347,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B0ZB.json b/data/chips/STM32H7B0ZB.json index a6d860b..a544b51 100644 --- a/data/chips/STM32H7B0ZB.json +++ b/data/chips/STM32H7B0ZB.json @@ -7113,7 +7113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7535,7 +7535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7652,7 +7652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7739,7 +7739,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7826,7 +7826,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7958,7 +7958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8090,7 +8090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8202,7 +8202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8404,7 +8404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3AI.json b/data/chips/STM32H7B3AI.json index df3d92a..86010d6 100644 --- a/data/chips/STM32H7B3AI.json +++ b/data/chips/STM32H7B3AI.json @@ -7489,7 +7489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7911,7 +7911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8028,7 +8028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8115,7 +8115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8202,7 +8202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8334,7 +8334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8466,7 +8466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8578,7 +8578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8795,7 +8795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3II.json b/data/chips/STM32H7B3II.json index e057f64..d8d687a 100644 --- a/data/chips/STM32H7B3II.json +++ b/data/chips/STM32H7B3II.json @@ -11513,7 +11513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -11990,7 +11990,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12107,7 +12107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12194,7 +12194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -12281,7 +12281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12413,7 +12413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12545,7 +12545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -12657,7 +12657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -12884,7 +12884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3LI.json b/data/chips/STM32H7B3LI.json index 64876b6..35e32d5 100644 --- a/data/chips/STM32H7B3LI.json +++ b/data/chips/STM32H7B3LI.json @@ -8491,7 +8491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8968,7 +8968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9085,7 +9085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9172,7 +9172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9259,7 +9259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9391,7 +9391,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9523,7 +9523,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9635,7 +9635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9862,7 +9862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3NI.json b/data/chips/STM32H7B3NI.json index c1a0ab4..5c31620 100644 --- a/data/chips/STM32H7B3NI.json +++ b/data/chips/STM32H7B3NI.json @@ -8393,7 +8393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8870,7 +8870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8987,7 +8987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9074,7 +9074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9161,7 +9161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9293,7 +9293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9425,7 +9425,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9537,7 +9537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9764,7 +9764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3QI.json b/data/chips/STM32H7B3QI.json index 3bc8407..5c30d3f 100644 --- a/data/chips/STM32H7B3QI.json +++ b/data/chips/STM32H7B3QI.json @@ -6565,7 +6565,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6957,7 +6957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7074,7 +7074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7146,7 +7146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7218,7 +7218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7350,7 +7350,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7477,7 +7477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7589,7 +7589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7791,7 +7791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3RI.json b/data/chips/STM32H7B3RI.json index ebcd5be..e0b5e15 100644 --- a/data/chips/STM32H7B3RI.json +++ b/data/chips/STM32H7B3RI.json @@ -4723,7 +4723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5035,7 +5035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5132,7 +5132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5204,7 +5204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5276,7 +5276,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5403,7 +5403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5530,7 +5530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5617,7 +5617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5819,7 +5819,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3VI.json b/data/chips/STM32H7B3VI.json index 99ac055..94000e8 100644 --- a/data/chips/STM32H7B3VI.json +++ b/data/chips/STM32H7B3VI.json @@ -7956,7 +7956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8348,7 +8348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8465,7 +8465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8537,7 +8537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8609,7 +8609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8741,7 +8741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8873,7 +8873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8985,7 +8985,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9187,7 +9187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7B3ZI.json b/data/chips/STM32H7B3ZI.json index cdc9911..1fda374 100644 --- a/data/chips/STM32H7B3ZI.json +++ b/data/chips/STM32H7B3ZI.json @@ -8005,7 +8005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8427,7 +8427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8544,7 +8544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8631,7 +8631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8718,7 +8718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8850,7 +8850,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8982,7 +8982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9094,7 +9094,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9296,7 +9296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32H7R3A8.json b/data/chips/STM32H7R3A8.json index 4ade7fe..1f68f91 100644 --- a/data/chips/STM32H7R3A8.json +++ b/data/chips/STM32H7R3A8.json @@ -6120,7 +6120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6517,7 +6517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6634,7 +6634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6721,7 +6721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6808,7 +6808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6925,7 +6925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7042,7 +7042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7149,7 +7149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3I8.json b/data/chips/STM32H7R3I8.json index 728e34a..06de7bf 100644 --- a/data/chips/STM32H7R3I8.json +++ b/data/chips/STM32H7R3I8.json @@ -7526,7 +7526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7933,7 +7933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8050,7 +8050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8142,7 +8142,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8229,7 +8229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8346,7 +8346,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8463,7 +8463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8570,7 +8570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3L8.json b/data/chips/STM32H7R3L8.json index 2ae691e..1220e0f 100644 --- a/data/chips/STM32H7R3L8.json +++ b/data/chips/STM32H7R3L8.json @@ -8461,7 +8461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8878,7 +8878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8995,7 +8995,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9087,7 +9087,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9179,7 +9179,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9296,7 +9296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9413,7 +9413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9520,7 +9520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3R8.json b/data/chips/STM32H7R3R8.json index 4c75aef..570cde0 100644 --- a/data/chips/STM32H7R3R8.json +++ b/data/chips/STM32H7R3R8.json @@ -3142,7 +3142,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3429,7 +3429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3516,7 +3516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3593,7 +3593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3710,7 +3710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3V8.json b/data/chips/STM32H7R3V8.json index 0bf9671..2ea934e 100644 --- a/data/chips/STM32H7R3V8.json +++ b/data/chips/STM32H7R3V8.json @@ -5078,7 +5078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5380,7 +5380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5472,7 +5472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5549,7 +5549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5626,7 +5626,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5743,7 +5743,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R3Z8.json b/data/chips/STM32H7R3Z8.json index 8afa5b7..1fbe9ff 100644 --- a/data/chips/STM32H7R3Z8.json +++ b/data/chips/STM32H7R3Z8.json @@ -6586,7 +6586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6933,7 +6933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7050,7 +7050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7127,7 +7127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7204,7 +7204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7321,7 +7321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7438,7 +7438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7545,7 +7545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7A8.json b/data/chips/STM32H7R7A8.json index 1c5e941..61caabd 100644 --- a/data/chips/STM32H7R7A8.json +++ b/data/chips/STM32H7R7A8.json @@ -6278,7 +6278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6675,7 +6675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6792,7 +6792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6879,7 +6879,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6966,7 +6966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7083,7 +7083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7200,7 +7200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7287,7 +7287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7I8.json b/data/chips/STM32H7R7I8.json index f38c337..322afcc 100644 --- a/data/chips/STM32H7R7I8.json +++ b/data/chips/STM32H7R7I8.json @@ -7656,7 +7656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8053,7 +8053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8170,7 +8170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8262,7 +8262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8349,7 +8349,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8466,7 +8466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8583,7 +8583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8670,7 +8670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7L8.json b/data/chips/STM32H7R7L8.json index 60319b8..5a15717 100644 --- a/data/chips/STM32H7R7L8.json +++ b/data/chips/STM32H7R7L8.json @@ -8744,7 +8744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9161,7 +9161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9278,7 +9278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9370,7 +9370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9462,7 +9462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9579,7 +9579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9696,7 +9696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9803,7 +9803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7R7Z8.json b/data/chips/STM32H7R7Z8.json index 10c8287..e5004f5 100644 --- a/data/chips/STM32H7R7Z8.json +++ b/data/chips/STM32H7R7Z8.json @@ -5572,7 +5572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5909,7 +5909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6021,7 +6021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6098,7 +6098,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6175,7 +6175,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6292,7 +6292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6409,7 +6409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3A8.json b/data/chips/STM32H7S3A8.json index c9747fd..383a600 100644 --- a/data/chips/STM32H7S3A8.json +++ b/data/chips/STM32H7S3A8.json @@ -6245,7 +6245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6642,7 +6642,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6759,7 +6759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6846,7 +6846,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6933,7 +6933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7050,7 +7050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7167,7 +7167,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7274,7 +7274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3I8.json b/data/chips/STM32H7S3I8.json index d70e015..3995e9d 100644 --- a/data/chips/STM32H7S3I8.json +++ b/data/chips/STM32H7S3I8.json @@ -7651,7 +7651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8058,7 +8058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8175,7 +8175,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8267,7 +8267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8354,7 +8354,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8471,7 +8471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8588,7 +8588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8695,7 +8695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3L8.json b/data/chips/STM32H7S3L8.json index de3d4fe..6a181bd 100644 --- a/data/chips/STM32H7S3L8.json +++ b/data/chips/STM32H7S3L8.json @@ -8586,7 +8586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9003,7 +9003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9120,7 +9120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9212,7 +9212,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9304,7 +9304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9421,7 +9421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9538,7 +9538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9645,7 +9645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3R8.json b/data/chips/STM32H7S3R8.json index 66e551c..bd6afa2 100644 --- a/data/chips/STM32H7S3R8.json +++ b/data/chips/STM32H7S3R8.json @@ -3267,7 +3267,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3554,7 +3554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3641,7 +3641,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3718,7 +3718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3835,7 +3835,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3V8.json b/data/chips/STM32H7S3V8.json index df4013f..ec3359c 100644 --- a/data/chips/STM32H7S3V8.json +++ b/data/chips/STM32H7S3V8.json @@ -5203,7 +5203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5505,7 +5505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5597,7 +5597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5674,7 +5674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5751,7 +5751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5868,7 +5868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S3Z8.json b/data/chips/STM32H7S3Z8.json index 56cf61d..972fd4a 100644 --- a/data/chips/STM32H7S3Z8.json +++ b/data/chips/STM32H7S3Z8.json @@ -6711,7 +6711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7058,7 +7058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7175,7 +7175,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7252,7 +7252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7329,7 +7329,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7446,7 +7446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7563,7 +7563,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7670,7 +7670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7A8.json b/data/chips/STM32H7S7A8.json index a5c8443..f74f1db 100644 --- a/data/chips/STM32H7S7A8.json +++ b/data/chips/STM32H7S7A8.json @@ -6403,7 +6403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6800,7 +6800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6917,7 +6917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7004,7 +7004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7091,7 +7091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7208,7 +7208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7325,7 +7325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7412,7 +7412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7I8.json b/data/chips/STM32H7S7I8.json index 9ff9754..8a0d895 100644 --- a/data/chips/STM32H7S7I8.json +++ b/data/chips/STM32H7S7I8.json @@ -7781,7 +7781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8178,7 +8178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8295,7 +8295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8387,7 +8387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8474,7 +8474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8591,7 +8591,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8708,7 +8708,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8795,7 +8795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7L8.json b/data/chips/STM32H7S7L8.json index 9f725e4..18d251e 100644 --- a/data/chips/STM32H7S7L8.json +++ b/data/chips/STM32H7S7L8.json @@ -8869,7 +8869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9286,7 +9286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9403,7 +9403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9495,7 +9495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -9587,7 +9587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9704,7 +9704,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9821,7 +9821,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -9928,7 +9928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32H7S7Z8.json b/data/chips/STM32H7S7Z8.json index 9683137..e9802b8 100644 --- a/data/chips/STM32H7S7Z8.json +++ b/data/chips/STM32H7S7Z8.json @@ -5697,7 +5697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6034,7 +6034,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6146,7 +6146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6223,7 +6223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6300,7 +6300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6417,7 +6417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6534,7 +6534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010C6.json b/data/chips/STM32L010C6.json index 387cc25..bf12ef4 100644 --- a/data/chips/STM32L010C6.json +++ b/data/chips/STM32L010C6.json @@ -1571,7 +1571,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010F4.json b/data/chips/STM32L010F4.json index 7caf83e..dc642f1 100644 --- a/data/chips/STM32L010F4.json +++ b/data/chips/STM32L010F4.json @@ -1267,7 +1267,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010K4.json b/data/chips/STM32L010K4.json index 2c3c662..d964f12 100644 --- a/data/chips/STM32L010K4.json +++ b/data/chips/STM32L010K4.json @@ -1433,7 +1433,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010K8.json b/data/chips/STM32L010K8.json index 046729c..60f4ef0 100644 --- a/data/chips/STM32L010K8.json +++ b/data/chips/STM32L010K8.json @@ -1213,7 +1213,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010R8.json b/data/chips/STM32L010R8.json index 084d530..12fd509 100644 --- a/data/chips/STM32L010R8.json +++ b/data/chips/STM32L010R8.json @@ -1638,7 +1638,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L010RB.json b/data/chips/STM32L010RB.json index 3e4e175..0f0d3e6 100644 --- a/data/chips/STM32L010RB.json +++ b/data/chips/STM32L010RB.json @@ -1714,7 +1714,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011D3.json b/data/chips/STM32L011D3.json index 938101e..543a54b 100644 --- a/data/chips/STM32L011D3.json +++ b/data/chips/STM32L011D3.json @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011D4.json b/data/chips/STM32L011D4.json index a723820..19af041 100644 --- a/data/chips/STM32L011D4.json +++ b/data/chips/STM32L011D4.json @@ -1219,7 +1219,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011E3.json b/data/chips/STM32L011E3.json index 059033b..699aefe 100644 --- a/data/chips/STM32L011E3.json +++ b/data/chips/STM32L011E3.json @@ -1468,7 +1468,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011E4.json b/data/chips/STM32L011E4.json index ec29412..f80209d 100644 --- a/data/chips/STM32L011E4.json +++ b/data/chips/STM32L011E4.json @@ -1468,7 +1468,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011F3.json b/data/chips/STM32L011F3.json index 7aa63ba..f188058 100644 --- a/data/chips/STM32L011F3.json +++ b/data/chips/STM32L011F3.json @@ -1536,7 +1536,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011F4.json b/data/chips/STM32L011F4.json index 56eb7d1..ef443b8 100644 --- a/data/chips/STM32L011F4.json +++ b/data/chips/STM32L011F4.json @@ -1536,7 +1536,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011G3.json b/data/chips/STM32L011G3.json index f27b984..b71da3f 100644 --- a/data/chips/STM32L011G3.json +++ b/data/chips/STM32L011G3.json @@ -1519,7 +1519,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011G4.json b/data/chips/STM32L011G4.json index d0a856e..2b3515d 100644 --- a/data/chips/STM32L011G4.json +++ b/data/chips/STM32L011G4.json @@ -1519,7 +1519,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011K3.json b/data/chips/STM32L011K3.json index f630a5e..b2c1025 100644 --- a/data/chips/STM32L011K3.json +++ b/data/chips/STM32L011K3.json @@ -1781,7 +1781,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L011K4.json b/data/chips/STM32L011K4.json index 287e252..b3c36fb 100644 --- a/data/chips/STM32L011K4.json +++ b/data/chips/STM32L011K4.json @@ -1781,7 +1781,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021D4.json b/data/chips/STM32L021D4.json index 5ce069f..2dbb9ca 100644 --- a/data/chips/STM32L021D4.json +++ b/data/chips/STM32L021D4.json @@ -1256,7 +1256,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021F4.json b/data/chips/STM32L021F4.json index 340fb97..223b839 100644 --- a/data/chips/STM32L021F4.json +++ b/data/chips/STM32L021F4.json @@ -1573,7 +1573,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021G4.json b/data/chips/STM32L021G4.json index f37abf1..a46c4fd 100644 --- a/data/chips/STM32L021G4.json +++ b/data/chips/STM32L021G4.json @@ -1556,7 +1556,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L021K4.json b/data/chips/STM32L021K4.json index 107caab..4362fda 100644 --- a/data/chips/STM32L021K4.json +++ b/data/chips/STM32L021K4.json @@ -1818,7 +1818,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031C4.json b/data/chips/STM32L031C4.json index a58353c..ecc9f55 100644 --- a/data/chips/STM32L031C4.json +++ b/data/chips/STM32L031C4.json @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031C6.json b/data/chips/STM32L031C6.json index c4de6c1..a9ebe36 100644 --- a/data/chips/STM32L031C6.json +++ b/data/chips/STM32L031C6.json @@ -1971,7 +1971,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031E4.json b/data/chips/STM32L031E4.json index 2fbbb94..b91e68f 100644 --- a/data/chips/STM32L031E4.json +++ b/data/chips/STM32L031E4.json @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031E6.json b/data/chips/STM32L031E6.json index 51e79c8..34b8b35 100644 --- a/data/chips/STM32L031E6.json +++ b/data/chips/STM32L031E6.json @@ -1388,7 +1388,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031F4.json b/data/chips/STM32L031F4.json index 9c5d060..51115d1 100644 --- a/data/chips/STM32L031F4.json +++ b/data/chips/STM32L031F4.json @@ -1302,7 +1302,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031F6.json b/data/chips/STM32L031F6.json index 4e15898..f53af48 100644 --- a/data/chips/STM32L031F6.json +++ b/data/chips/STM32L031F6.json @@ -1302,7 +1302,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031G4.json b/data/chips/STM32L031G4.json index e0b3fc0..63be421 100644 --- a/data/chips/STM32L031G4.json +++ b/data/chips/STM32L031G4.json @@ -1439,7 +1439,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031G6.json b/data/chips/STM32L031G6.json index ff9d8ec..9f380ec 100644 --- a/data/chips/STM32L031G6.json +++ b/data/chips/STM32L031G6.json @@ -1613,7 +1613,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031K4.json b/data/chips/STM32L031K4.json index ca84e23..67fc745 100644 --- a/data/chips/STM32L031K4.json +++ b/data/chips/STM32L031K4.json @@ -1691,7 +1691,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L031K6.json b/data/chips/STM32L031K6.json index 2f3ea97..dd5f76b 100644 --- a/data/chips/STM32L031K6.json +++ b/data/chips/STM32L031K6.json @@ -1691,7 +1691,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041C4.json b/data/chips/STM32L041C4.json index a3a1458..4dff537 100644 --- a/data/chips/STM32L041C4.json +++ b/data/chips/STM32L041C4.json @@ -1431,7 +1431,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041C6.json b/data/chips/STM32L041C6.json index 1667f9f..d7c8d94 100644 --- a/data/chips/STM32L041C6.json +++ b/data/chips/STM32L041C6.json @@ -2008,7 +2008,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041E6.json b/data/chips/STM32L041E6.json index a254a0b..ec21eac 100644 --- a/data/chips/STM32L041E6.json +++ b/data/chips/STM32L041E6.json @@ -1419,7 +1419,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041F6.json b/data/chips/STM32L041F6.json index bd336ef..8acc47d 100644 --- a/data/chips/STM32L041F6.json +++ b/data/chips/STM32L041F6.json @@ -1339,7 +1339,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041G6.json b/data/chips/STM32L041G6.json index f097e2d..9b26690 100644 --- a/data/chips/STM32L041G6.json +++ b/data/chips/STM32L041G6.json @@ -1650,7 +1650,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L041K6.json b/data/chips/STM32L041K6.json index 476f990..ec350a7 100644 --- a/data/chips/STM32L041K6.json +++ b/data/chips/STM32L041K6.json @@ -1728,7 +1728,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051C6.json b/data/chips/STM32L051C6.json index 1ede39c..56f79a6 100644 --- a/data/chips/STM32L051C6.json +++ b/data/chips/STM32L051C6.json @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051C8.json b/data/chips/STM32L051C8.json index 091dcd1..459b84a 100644 --- a/data/chips/STM32L051C8.json +++ b/data/chips/STM32L051C8.json @@ -2039,7 +2039,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051K6.json b/data/chips/STM32L051K6.json index 54c73e9..20208a2 100644 --- a/data/chips/STM32L051K6.json +++ b/data/chips/STM32L051K6.json @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051K8.json b/data/chips/STM32L051K8.json index 5075ca4..abe0429 100644 --- a/data/chips/STM32L051K8.json +++ b/data/chips/STM32L051K8.json @@ -1527,7 +1527,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051R6.json b/data/chips/STM32L051R6.json index aaae31f..5cf2a02 100644 --- a/data/chips/STM32L051R6.json +++ b/data/chips/STM32L051R6.json @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051R8.json b/data/chips/STM32L051R8.json index f5c35fb..37003a7 100644 --- a/data/chips/STM32L051R8.json +++ b/data/chips/STM32L051R8.json @@ -2325,7 +2325,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051T6.json b/data/chips/STM32L051T6.json index fdac5fe..b6cd022 100644 --- a/data/chips/STM32L051T6.json +++ b/data/chips/STM32L051T6.json @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L051T8.json b/data/chips/STM32L051T8.json index 7ad27f5..aa3024b 100644 --- a/data/chips/STM32L051T8.json +++ b/data/chips/STM32L051T8.json @@ -1488,7 +1488,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052C6.json b/data/chips/STM32L052C6.json index 837f476..6e6f3b8 100644 --- a/data/chips/STM32L052C6.json +++ b/data/chips/STM32L052C6.json @@ -2155,7 +2155,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052C8.json b/data/chips/STM32L052C8.json index 1ea1e3c..bac027e 100644 --- a/data/chips/STM32L052C8.json +++ b/data/chips/STM32L052C8.json @@ -2155,7 +2155,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052K6.json b/data/chips/STM32L052K6.json index 58ba48d..ec4966e 100644 --- a/data/chips/STM32L052K6.json +++ b/data/chips/STM32L052K6.json @@ -1638,7 +1638,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052K8.json b/data/chips/STM32L052K8.json index 1e63fab..754d944 100644 --- a/data/chips/STM32L052K8.json +++ b/data/chips/STM32L052K8.json @@ -1638,7 +1638,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052R6.json b/data/chips/STM32L052R6.json index 42576e5..32ef447 100644 --- a/data/chips/STM32L052R6.json +++ b/data/chips/STM32L052R6.json @@ -2441,7 +2441,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052R8.json b/data/chips/STM32L052R8.json index 595ed41..d847d88 100644 --- a/data/chips/STM32L052R8.json +++ b/data/chips/STM32L052R8.json @@ -2441,7 +2441,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052T6.json b/data/chips/STM32L052T6.json index 8dad9bf..4de162e 100644 --- a/data/chips/STM32L052T6.json +++ b/data/chips/STM32L052T6.json @@ -1599,7 +1599,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L052T8.json b/data/chips/STM32L052T8.json index a46dc61..26c7610 100644 --- a/data/chips/STM32L052T8.json +++ b/data/chips/STM32L052T8.json @@ -1821,7 +1821,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053C6.json b/data/chips/STM32L053C6.json index 7ac0a42..abae427 100644 --- a/data/chips/STM32L053C6.json +++ b/data/chips/STM32L053C6.json @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053C8.json b/data/chips/STM32L053C8.json index da0a5e5..6961907 100644 --- a/data/chips/STM32L053C8.json +++ b/data/chips/STM32L053C8.json @@ -2294,7 +2294,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053R6.json b/data/chips/STM32L053R6.json index 872fe36..0c867f5 100644 --- a/data/chips/STM32L053R6.json +++ b/data/chips/STM32L053R6.json @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L053R8.json b/data/chips/STM32L053R8.json index 5f0e9d0..2776ee3 100644 --- a/data/chips/STM32L053R8.json +++ b/data/chips/STM32L053R8.json @@ -2670,7 +2670,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L062C8.json b/data/chips/STM32L062C8.json index 759072c..499404e 100644 --- a/data/chips/STM32L062C8.json +++ b/data/chips/STM32L062C8.json @@ -1886,7 +1886,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L062K8.json b/data/chips/STM32L062K8.json index 8f0e1da..5a2ce40 100644 --- a/data/chips/STM32L062K8.json +++ b/data/chips/STM32L062K8.json @@ -1675,7 +1675,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L063C8.json b/data/chips/STM32L063C8.json index f6164ce..bf2707f 100644 --- a/data/chips/STM32L063C8.json +++ b/data/chips/STM32L063C8.json @@ -2331,7 +2331,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L063R8.json b/data/chips/STM32L063R8.json index 83d07be..0beaaa5 100644 --- a/data/chips/STM32L063R8.json +++ b/data/chips/STM32L063R8.json @@ -2317,7 +2317,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071C8.json b/data/chips/STM32L071C8.json index 3c1a1ee..930473d 100644 --- a/data/chips/STM32L071C8.json +++ b/data/chips/STM32L071C8.json @@ -2183,7 +2183,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2465,7 +2465,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071CB.json b/data/chips/STM32L071CB.json index 5414738..7cbc38c 100644 --- a/data/chips/STM32L071CB.json +++ b/data/chips/STM32L071CB.json @@ -2540,7 +2540,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071CZ.json b/data/chips/STM32L071CZ.json index 68cab4c..8fb4a93 100644 --- a/data/chips/STM32L071CZ.json +++ b/data/chips/STM32L071CZ.json @@ -2540,7 +2540,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2822,7 +2822,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071K8.json b/data/chips/STM32L071K8.json index aa4a130..a4e8356 100644 --- a/data/chips/STM32L071K8.json +++ b/data/chips/STM32L071K8.json @@ -1499,7 +1499,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1746,7 +1746,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071KB.json b/data/chips/STM32L071KB.json index 5fa69f6..12ec762 100644 --- a/data/chips/STM32L071KB.json +++ b/data/chips/STM32L071KB.json @@ -1711,7 +1711,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071KZ.json b/data/chips/STM32L071KZ.json index 71392f6..af5b820 100644 --- a/data/chips/STM32L071KZ.json +++ b/data/chips/STM32L071KZ.json @@ -1711,7 +1711,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1973,7 +1973,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071RB.json b/data/chips/STM32L071RB.json index 075cac8..7ad2559 100644 --- a/data/chips/STM32L071RB.json +++ b/data/chips/STM32L071RB.json @@ -2494,7 +2494,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071RZ.json b/data/chips/STM32L071RZ.json index d93ba56..9b9af7f 100644 --- a/data/chips/STM32L071RZ.json +++ b/data/chips/STM32L071RZ.json @@ -2494,7 +2494,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2796,7 +2796,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071V8.json b/data/chips/STM32L071V8.json index 8101888..b43bbe5 100644 --- a/data/chips/STM32L071V8.json +++ b/data/chips/STM32L071V8.json @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071VB.json b/data/chips/STM32L071VB.json index 6ef8aef..dc10621 100644 --- a/data/chips/STM32L071VB.json +++ b/data/chips/STM32L071VB.json @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L071VZ.json b/data/chips/STM32L071VZ.json index 0422df3..b9253ca 100644 --- a/data/chips/STM32L071VZ.json +++ b/data/chips/STM32L071VZ.json @@ -3015,7 +3015,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3372,7 +3372,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072CB.json b/data/chips/STM32L072CB.json index 7470301..fdc2044 100644 --- a/data/chips/STM32L072CB.json +++ b/data/chips/STM32L072CB.json @@ -2659,7 +2659,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2941,7 +2941,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072CZ.json b/data/chips/STM32L072CZ.json index 065b5b0..32e4736 100644 --- a/data/chips/STM32L072CZ.json +++ b/data/chips/STM32L072CZ.json @@ -2959,7 +2959,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3241,7 +3241,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072KB.json b/data/chips/STM32L072KB.json index ccbcaab..b9deeac 100644 --- a/data/chips/STM32L072KB.json +++ b/data/chips/STM32L072KB.json @@ -1825,7 +1825,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072KZ.json b/data/chips/STM32L072KZ.json index 1485e78..b66c3e5 100644 --- a/data/chips/STM32L072KZ.json +++ b/data/chips/STM32L072KZ.json @@ -1825,7 +1825,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2087,7 +2087,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072RB.json b/data/chips/STM32L072RB.json index 03ba771..60b2379 100644 --- a/data/chips/STM32L072RB.json +++ b/data/chips/STM32L072RB.json @@ -3003,7 +3003,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3305,7 +3305,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072RZ.json b/data/chips/STM32L072RZ.json index 006f301..e10ae11 100644 --- a/data/chips/STM32L072RZ.json +++ b/data/chips/STM32L072RZ.json @@ -3003,7 +3003,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3305,7 +3305,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072V8.json b/data/chips/STM32L072V8.json index 5a25dc8..8e646e9 100644 --- a/data/chips/STM32L072V8.json +++ b/data/chips/STM32L072V8.json @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072VB.json b/data/chips/STM32L072VB.json index bcd1768..fd39bd0 100644 --- a/data/chips/STM32L072VB.json +++ b/data/chips/STM32L072VB.json @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L072VZ.json b/data/chips/STM32L072VZ.json index 37b45b7..b00e550 100644 --- a/data/chips/STM32L072VZ.json +++ b/data/chips/STM32L072VZ.json @@ -3139,7 +3139,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073CB.json b/data/chips/STM32L073CB.json index 97d88a3..4730f32 100644 --- a/data/chips/STM32L073CB.json +++ b/data/chips/STM32L073CB.json @@ -2513,7 +2513,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2795,7 +2795,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073CZ.json b/data/chips/STM32L073CZ.json index bdbdb7e..9fed5cf 100644 --- a/data/chips/STM32L073CZ.json +++ b/data/chips/STM32L073CZ.json @@ -2813,7 +2813,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3095,7 +3095,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073RB.json b/data/chips/STM32L073RB.json index f1746d8..5c704ff 100644 --- a/data/chips/STM32L073RB.json +++ b/data/chips/STM32L073RB.json @@ -2842,7 +2842,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3144,7 +3144,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073RZ.json b/data/chips/STM32L073RZ.json index 4bd925e..3b028a2 100644 --- a/data/chips/STM32L073RZ.json +++ b/data/chips/STM32L073RZ.json @@ -3232,7 +3232,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3534,7 +3534,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073V8.json b/data/chips/STM32L073V8.json index 73c7c9a..2fa2cc8 100644 --- a/data/chips/STM32L073V8.json +++ b/data/chips/STM32L073V8.json @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073VB.json b/data/chips/STM32L073VB.json index 15e2bfa..71811de 100644 --- a/data/chips/STM32L073VB.json +++ b/data/chips/STM32L073VB.json @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L073VZ.json b/data/chips/STM32L073VZ.json index f3f2ef9..2bb7a04 100644 --- a/data/chips/STM32L073VZ.json +++ b/data/chips/STM32L073VZ.json @@ -3496,7 +3496,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3853,7 +3853,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081CB.json b/data/chips/STM32L081CB.json index 4bd9f5b..3dad3b6 100644 --- a/data/chips/STM32L081CB.json +++ b/data/chips/STM32L081CB.json @@ -1920,7 +1920,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2202,7 +2202,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081CZ.json b/data/chips/STM32L081CZ.json index b3c6d05..d2b0acf 100644 --- a/data/chips/STM32L081CZ.json +++ b/data/chips/STM32L081CZ.json @@ -2220,7 +2220,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2502,7 +2502,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L081KZ.json b/data/chips/STM32L081KZ.json index 0ca7ba2..534a186 100644 --- a/data/chips/STM32L081KZ.json +++ b/data/chips/STM32L081KZ.json @@ -1748,7 +1748,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2010,7 +2010,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082CZ.json b/data/chips/STM32L082CZ.json index 1d5069a..87fe3d9 100644 --- a/data/chips/STM32L082CZ.json +++ b/data/chips/STM32L082CZ.json @@ -2402,7 +2402,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2684,7 +2684,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082KB.json b/data/chips/STM32L082KB.json index 1263434..1d50cb2 100644 --- a/data/chips/STM32L082KB.json +++ b/data/chips/STM32L082KB.json @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L082KZ.json b/data/chips/STM32L082KZ.json index bc56e0f..91624cc 100644 --- a/data/chips/STM32L082KZ.json +++ b/data/chips/STM32L082KZ.json @@ -1862,7 +1862,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2124,7 +2124,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083CB.json b/data/chips/STM32L083CB.json index 51042a2..299753a 100644 --- a/data/chips/STM32L083CB.json +++ b/data/chips/STM32L083CB.json @@ -2184,7 +2184,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083CZ.json b/data/chips/STM32L083CZ.json index d0ea9a0..67bf307 100644 --- a/data/chips/STM32L083CZ.json +++ b/data/chips/STM32L083CZ.json @@ -2478,7 +2478,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2760,7 +2760,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083RB.json b/data/chips/STM32L083RB.json index 698d6d0..2a1995b 100644 --- a/data/chips/STM32L083RB.json +++ b/data/chips/STM32L083RB.json @@ -2879,7 +2879,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083RZ.json b/data/chips/STM32L083RZ.json index e97d0f9..fbb8369 100644 --- a/data/chips/STM32L083RZ.json +++ b/data/chips/STM32L083RZ.json @@ -2879,7 +2879,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3181,7 +3181,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083V8.json b/data/chips/STM32L083V8.json index c2ede74..a32ce54 100644 --- a/data/chips/STM32L083V8.json +++ b/data/chips/STM32L083V8.json @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3890,7 +3890,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083VB.json b/data/chips/STM32L083VB.json index ffee624..04fd619 100644 --- a/data/chips/STM32L083VB.json +++ b/data/chips/STM32L083VB.json @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3890,7 +3890,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L083VZ.json b/data/chips/STM32L083VZ.json index b00d1e5..a48b963 100644 --- a/data/chips/STM32L083VZ.json +++ b/data/chips/STM32L083VZ.json @@ -3533,7 +3533,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3890,7 +3890,7 @@ "registers": { "kind": "timer", "version": "l0", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100C6-A.json b/data/chips/STM32L100C6-A.json index a394ff4..457d7f4 100644 --- a/data/chips/STM32L100C6-A.json +++ b/data/chips/STM32L100C6-A.json @@ -1812,7 +1812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1936,7 +1936,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2033,7 +2033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100C6.json b/data/chips/STM32L100C6.json index ccef700..e707c09 100644 --- a/data/chips/STM32L100C6.json +++ b/data/chips/STM32L100C6.json @@ -1797,7 +1797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1922,7 +1922,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2019,7 +2019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100R8-A.json b/data/chips/STM32L100R8-A.json index f0b158c..78f7ac6 100644 --- a/data/chips/STM32L100R8-A.json +++ b/data/chips/STM32L100R8-A.json @@ -2046,7 +2046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2170,7 +2170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2292,7 +2292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100R8.json b/data/chips/STM32L100R8.json index 73e3f39..b69fe62 100644 --- a/data/chips/STM32L100R8.json +++ b/data/chips/STM32L100R8.json @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RB-A.json b/data/chips/STM32L100RB-A.json index a1f5175..8b408f3 100644 --- a/data/chips/STM32L100RB-A.json +++ b/data/chips/STM32L100RB-A.json @@ -2046,7 +2046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2170,7 +2170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2292,7 +2292,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RB.json b/data/chips/STM32L100RB.json index 6551dfd..cd0af8d 100644 --- a/data/chips/STM32L100RB.json +++ b/data/chips/STM32L100RB.json @@ -2031,7 +2031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2156,7 +2156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2278,7 +2278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L100RC.json b/data/chips/STM32L100RC.json index e39f269..801d08d 100644 --- a/data/chips/STM32L100RC.json +++ b/data/chips/STM32L100RC.json @@ -2249,7 +2249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2373,7 +2373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2495,7 +2495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C6-A.json b/data/chips/STM32L151C6-A.json index 7274fb7..bbd9174 100644 --- a/data/chips/STM32L151C6-A.json +++ b/data/chips/STM32L151C6-A.json @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2209,7 +2209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C6.json b/data/chips/STM32L151C6.json index 8a1ba36..844e3b8 100644 --- a/data/chips/STM32L151C6.json +++ b/data/chips/STM32L151C6.json @@ -1979,7 +1979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2104,7 +2104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C8-A.json b/data/chips/STM32L151C8-A.json index 42238e9..e75a58e 100644 --- a/data/chips/STM32L151C8-A.json +++ b/data/chips/STM32L151C8-A.json @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2209,7 +2209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151C8.json b/data/chips/STM32L151C8.json index 6f8692a..fcc2d28 100644 --- a/data/chips/STM32L151C8.json +++ b/data/chips/STM32L151C8.json @@ -1979,7 +1979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2104,7 +2104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CB-A.json b/data/chips/STM32L151CB-A.json index 5953303..04d81b0 100644 --- a/data/chips/STM32L151CB-A.json +++ b/data/chips/STM32L151CB-A.json @@ -1988,7 +1988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2112,7 +2112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2209,7 +2209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CB.json b/data/chips/STM32L151CB.json index d125449..003ea12 100644 --- a/data/chips/STM32L151CB.json +++ b/data/chips/STM32L151CB.json @@ -1979,7 +1979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2104,7 +2104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2201,7 +2201,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151CC.json b/data/chips/STM32L151CC.json index da64834..effe88b 100644 --- a/data/chips/STM32L151CC.json +++ b/data/chips/STM32L151CC.json @@ -2188,7 +2188,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2492,7 +2492,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QC.json b/data/chips/STM32L151QC.json index a5c4320..8fe78c7 100644 --- a/data/chips/STM32L151QC.json +++ b/data/chips/STM32L151QC.json @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2843,7 +2843,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2980,7 +2980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3088,7 +3088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QD.json b/data/chips/STM32L151QD.json index 80abb8d..b869525 100644 --- a/data/chips/STM32L151QD.json +++ b/data/chips/STM32L151QD.json @@ -3161,7 +3161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3309,7 +3309,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3446,7 +3446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3554,7 +3554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151QE.json b/data/chips/STM32L151QE.json index e76dd49..00311c4 100644 --- a/data/chips/STM32L151QE.json +++ b/data/chips/STM32L151QE.json @@ -2726,7 +2726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2874,7 +2874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3011,7 +3011,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R6-A.json b/data/chips/STM32L151R6-A.json index 644c7fb..fe5da7d 100644 --- a/data/chips/STM32L151R6-A.json +++ b/data/chips/STM32L151R6-A.json @@ -2228,7 +2228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R6.json b/data/chips/STM32L151R6.json index f06c4a8..dbf417a 100644 --- a/data/chips/STM32L151R6.json +++ b/data/chips/STM32L151R6.json @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R8-A.json b/data/chips/STM32L151R8-A.json index 58877fe..ed09b0b 100644 --- a/data/chips/STM32L151R8-A.json +++ b/data/chips/STM32L151R8-A.json @@ -2228,7 +2228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151R8.json b/data/chips/STM32L151R8.json index f196579..64ebfac 100644 --- a/data/chips/STM32L151R8.json +++ b/data/chips/STM32L151R8.json @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RB-A.json b/data/chips/STM32L151RB-A.json index 4255b91..e6620be 100644 --- a/data/chips/STM32L151RB-A.json +++ b/data/chips/STM32L151RB-A.json @@ -2228,7 +2228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2352,7 +2352,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2474,7 +2474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RB.json b/data/chips/STM32L151RB.json index f2368a7..e441063 100644 --- a/data/chips/STM32L151RB.json +++ b/data/chips/STM32L151RB.json @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2344,7 +2344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2466,7 +2466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RC-A.json b/data/chips/STM32L151RC-A.json index d9b9b9e..689eb4c 100644 --- a/data/chips/STM32L151RC-A.json +++ b/data/chips/STM32L151RC-A.json @@ -2109,7 +2109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2233,7 +2233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2355,7 +2355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2438,7 +2438,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RC.json b/data/chips/STM32L151RC.json index f4ee69d..4424a4a 100644 --- a/data/chips/STM32L151RC.json +++ b/data/chips/STM32L151RC.json @@ -2469,7 +2469,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2593,7 +2593,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2715,7 +2715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2798,7 +2798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RD.json b/data/chips/STM32L151RD.json index 1568ea8..2d1f6ab 100644 --- a/data/chips/STM32L151RD.json +++ b/data/chips/STM32L151RD.json @@ -2613,7 +2613,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2737,7 +2737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2859,7 +2859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2942,7 +2942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151RE.json b/data/chips/STM32L151RE.json index a03a145..7533159 100644 --- a/data/chips/STM32L151RE.json +++ b/data/chips/STM32L151RE.json @@ -2149,7 +2149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2273,7 +2273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2395,7 +2395,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2478,7 +2478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151UC.json b/data/chips/STM32L151UC.json index 9fa6bff..4dc558d 100644 --- a/data/chips/STM32L151UC.json +++ b/data/chips/STM32L151UC.json @@ -2067,7 +2067,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2191,7 +2191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2313,7 +2313,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2396,7 +2396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151V8-A.json b/data/chips/STM32L151V8-A.json index 1e25b52..874e4ca 100644 --- a/data/chips/STM32L151V8-A.json +++ b/data/chips/STM32L151V8-A.json @@ -2747,7 +2747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151V8.json b/data/chips/STM32L151V8.json index 5fe1c39..1f39da3 100644 --- a/data/chips/STM32L151V8.json +++ b/data/chips/STM32L151V8.json @@ -2733,7 +2733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VB-A.json b/data/chips/STM32L151VB-A.json index a201b77..b06e1c7 100644 --- a/data/chips/STM32L151VB-A.json +++ b/data/chips/STM32L151VB-A.json @@ -2747,7 +2747,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2895,7 +2895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3032,7 +3032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VB.json b/data/chips/STM32L151VB.json index 9c6fb5d..74bedff 100644 --- a/data/chips/STM32L151VB.json +++ b/data/chips/STM32L151VB.json @@ -2733,7 +2733,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2882,7 +2882,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VC-A.json b/data/chips/STM32L151VC-A.json index 9ceb34e..8e4f429 100644 --- a/data/chips/STM32L151VC-A.json +++ b/data/chips/STM32L151VC-A.json @@ -2427,7 +2427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2575,7 +2575,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2820,7 +2820,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VC.json b/data/chips/STM32L151VC.json index c976aef..96fdf9c 100644 --- a/data/chips/STM32L151VC.json +++ b/data/chips/STM32L151VC.json @@ -2997,7 +2997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3145,7 +3145,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3282,7 +3282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VD-X.json b/data/chips/STM32L151VD-X.json index 6772e18..c54f578 100644 --- a/data/chips/STM32L151VD-X.json +++ b/data/chips/STM32L151VD-X.json @@ -3101,7 +3101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3386,7 +3386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3494,7 +3494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VD.json b/data/chips/STM32L151VD.json index 5921fcb..62d1f9f 100644 --- a/data/chips/STM32L151VD.json +++ b/data/chips/STM32L151VD.json @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2952,7 +2952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3089,7 +3089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3197,7 +3197,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151VE.json b/data/chips/STM32L151VE.json index 81a8317..310654a 100644 --- a/data/chips/STM32L151VE.json +++ b/data/chips/STM32L151VE.json @@ -3101,7 +3101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3249,7 +3249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3386,7 +3386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3494,7 +3494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZC.json b/data/chips/STM32L151ZC.json index f8f61e0..4e70056 100644 --- a/data/chips/STM32L151ZC.json +++ b/data/chips/STM32L151ZC.json @@ -2783,7 +2783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2931,7 +2931,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3068,7 +3068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3176,7 +3176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZD.json b/data/chips/STM32L151ZD.json index 4d16eba..d5456ce 100644 --- a/data/chips/STM32L151ZD.json +++ b/data/chips/STM32L151ZD.json @@ -3253,7 +3253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3401,7 +3401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3538,7 +3538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3646,7 +3646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L151ZE.json b/data/chips/STM32L151ZE.json index b2de075..76d26b4 100644 --- a/data/chips/STM32L151ZE.json +++ b/data/chips/STM32L151ZE.json @@ -2815,7 +2815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2963,7 +2963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3100,7 +3100,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3208,7 +3208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C6-A.json b/data/chips/STM32L152C6-A.json index 7545c7f..7f360ac 100644 --- a/data/chips/STM32L152C6-A.json +++ b/data/chips/STM32L152C6-A.json @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2251,7 +2251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2348,7 +2348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C6.json b/data/chips/STM32L152C6.json index 00d59aa..3b13ea4 100644 --- a/data/chips/STM32L152C6.json +++ b/data/chips/STM32L152C6.json @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2243,7 +2243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2340,7 +2340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C8-A.json b/data/chips/STM32L152C8-A.json index 14be614..da030e7 100644 --- a/data/chips/STM32L152C8-A.json +++ b/data/chips/STM32L152C8-A.json @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2251,7 +2251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2348,7 +2348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152C8.json b/data/chips/STM32L152C8.json index cf8f8e0..9484a21 100644 --- a/data/chips/STM32L152C8.json +++ b/data/chips/STM32L152C8.json @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2243,7 +2243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2340,7 +2340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CB-A.json b/data/chips/STM32L152CB-A.json index 68f8b88..729a633 100644 --- a/data/chips/STM32L152CB-A.json +++ b/data/chips/STM32L152CB-A.json @@ -2127,7 +2127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2251,7 +2251,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2348,7 +2348,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CB.json b/data/chips/STM32L152CB.json index bac83f3..bc9d0d3 100644 --- a/data/chips/STM32L152CB.json +++ b/data/chips/STM32L152CB.json @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2243,7 +2243,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2340,7 +2340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152CC.json b/data/chips/STM32L152CC.json index 7617334..bf288cb 100644 --- a/data/chips/STM32L152CC.json +++ b/data/chips/STM32L152CC.json @@ -2327,7 +2327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2451,7 +2451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2548,7 +2548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2631,7 +2631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QC.json b/data/chips/STM32L152QC.json index 82c8f4b..3285578 100644 --- a/data/chips/STM32L152QC.json +++ b/data/chips/STM32L152QC.json @@ -3004,7 +3004,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3152,7 +3152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3289,7 +3289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3397,7 +3397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QD.json b/data/chips/STM32L152QD.json index 67e4318..8a30822 100644 --- a/data/chips/STM32L152QD.json +++ b/data/chips/STM32L152QD.json @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3618,7 +3618,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3755,7 +3755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3863,7 +3863,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152QE.json b/data/chips/STM32L152QE.json index 050d841..f654cee 100644 --- a/data/chips/STM32L152QE.json +++ b/data/chips/STM32L152QE.json @@ -3035,7 +3035,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3183,7 +3183,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3320,7 +3320,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3428,7 +3428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R6-A.json b/data/chips/STM32L152R6-A.json index 31c72b8..99eccf5 100644 --- a/data/chips/STM32L152R6-A.json +++ b/data/chips/STM32L152R6-A.json @@ -2477,7 +2477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R6.json b/data/chips/STM32L152R6.json index 1464faa..b1a0d4a 100644 --- a/data/chips/STM32L152R6.json +++ b/data/chips/STM32L152R6.json @@ -2448,7 +2448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R8-A.json b/data/chips/STM32L152R8-A.json index 3b5fa14..2079ae4 100644 --- a/data/chips/STM32L152R8-A.json +++ b/data/chips/STM32L152R8-A.json @@ -2477,7 +2477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152R8.json b/data/chips/STM32L152R8.json index cf34e9b..4325925 100644 --- a/data/chips/STM32L152R8.json +++ b/data/chips/STM32L152R8.json @@ -2448,7 +2448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RB-A.json b/data/chips/STM32L152RB-A.json index eb97e56..7704745 100644 --- a/data/chips/STM32L152RB-A.json +++ b/data/chips/STM32L152RB-A.json @@ -2477,7 +2477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2601,7 +2601,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RB.json b/data/chips/STM32L152RB.json index 85adace..7c74690 100644 --- a/data/chips/STM32L152RB.json +++ b/data/chips/STM32L152RB.json @@ -2448,7 +2448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2695,7 +2695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RC-A.json b/data/chips/STM32L152RC-A.json index 286e13c..659cc8b 100644 --- a/data/chips/STM32L152RC-A.json +++ b/data/chips/STM32L152RC-A.json @@ -2358,7 +2358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2604,7 +2604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2687,7 +2687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RC.json b/data/chips/STM32L152RC.json index de934ba..248b918 100644 --- a/data/chips/STM32L152RC.json +++ b/data/chips/STM32L152RC.json @@ -2308,7 +2308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2432,7 +2432,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2554,7 +2554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2637,7 +2637,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RD.json b/data/chips/STM32L152RD.json index 8d35e3a..38c2233 100644 --- a/data/chips/STM32L152RD.json +++ b/data/chips/STM32L152RD.json @@ -2862,7 +2862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2986,7 +2986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3108,7 +3108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3191,7 +3191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152RE.json b/data/chips/STM32L152RE.json index 21a4114..4a0c8f3 100644 --- a/data/chips/STM32L152RE.json +++ b/data/chips/STM32L152RE.json @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2522,7 +2522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2644,7 +2644,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2727,7 +2727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152UC.json b/data/chips/STM32L152UC.json index 8159703..f11927d 100644 --- a/data/chips/STM32L152UC.json +++ b/data/chips/STM32L152UC.json @@ -2296,7 +2296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2420,7 +2420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2542,7 +2542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2625,7 +2625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152V8-A.json b/data/chips/STM32L152V8-A.json index a8da7dd..6f19c48 100644 --- a/data/chips/STM32L152V8-A.json +++ b/data/chips/STM32L152V8-A.json @@ -3056,7 +3056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152V8.json b/data/chips/STM32L152V8.json index c8365cc..8e93923 100644 --- a/data/chips/STM32L152V8.json +++ b/data/chips/STM32L152V8.json @@ -3042,7 +3042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3191,7 +3191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3328,7 +3328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VB-A.json b/data/chips/STM32L152VB-A.json index 30ecb5d..bc5fade 100644 --- a/data/chips/STM32L152VB-A.json +++ b/data/chips/STM32L152VB-A.json @@ -3056,7 +3056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3204,7 +3204,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3341,7 +3341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VB.json b/data/chips/STM32L152VB.json index 284b3c4..e08da91 100644 --- a/data/chips/STM32L152VB.json +++ b/data/chips/STM32L152VB.json @@ -3042,7 +3042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3191,7 +3191,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3328,7 +3328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VC-A.json b/data/chips/STM32L152VC-A.json index 466f622..2aa36ae 100644 --- a/data/chips/STM32L152VC-A.json +++ b/data/chips/STM32L152VC-A.json @@ -2736,7 +2736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2884,7 +2884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3021,7 +3021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VC.json b/data/chips/STM32L152VC.json index 17849a1..0dfbc23 100644 --- a/data/chips/STM32L152VC.json +++ b/data/chips/STM32L152VC.json @@ -3312,7 +3312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3460,7 +3460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3597,7 +3597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3705,7 +3705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VD-X.json b/data/chips/STM32L152VD-X.json index 901fb17..2c73d9b 100644 --- a/data/chips/STM32L152VD-X.json +++ b/data/chips/STM32L152VD-X.json @@ -2780,7 +2780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2928,7 +2928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3065,7 +3065,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3173,7 +3173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VD.json b/data/chips/STM32L152VD.json index e112c80..cbd647d 100644 --- a/data/chips/STM32L152VD.json +++ b/data/chips/STM32L152VD.json @@ -3113,7 +3113,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3261,7 +3261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3398,7 +3398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3506,7 +3506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152VE.json b/data/chips/STM32L152VE.json index ba2bac4..09bec2c 100644 --- a/data/chips/STM32L152VE.json +++ b/data/chips/STM32L152VE.json @@ -3410,7 +3410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3558,7 +3558,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3695,7 +3695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3803,7 +3803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZC.json b/data/chips/STM32L152ZC.json index 49cdd28..b94d7a9 100644 --- a/data/chips/STM32L152ZC.json +++ b/data/chips/STM32L152ZC.json @@ -3092,7 +3092,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3240,7 +3240,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3377,7 +3377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZD.json b/data/chips/STM32L152ZD.json index 6d58712..a6a79ab 100644 --- a/data/chips/STM32L152ZD.json +++ b/data/chips/STM32L152ZD.json @@ -3562,7 +3562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3710,7 +3710,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3847,7 +3847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3955,7 +3955,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L152ZE.json b/data/chips/STM32L152ZE.json index a18e5ef..544e5d6 100644 --- a/data/chips/STM32L152ZE.json +++ b/data/chips/STM32L152ZE.json @@ -3124,7 +3124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3272,7 +3272,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3409,7 +3409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3517,7 +3517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162QC.json b/data/chips/STM32L162QC.json index 3664857..5690637 100644 --- a/data/chips/STM32L162QC.json +++ b/data/chips/STM32L162QC.json @@ -3023,7 +3023,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3171,7 +3171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3308,7 +3308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3416,7 +3416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162QD.json b/data/chips/STM32L162QD.json index f0f7b08..c881941 100644 --- a/data/chips/STM32L162QD.json +++ b/data/chips/STM32L162QD.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3643,7 +3643,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3780,7 +3780,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3888,7 +3888,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RC-A.json b/data/chips/STM32L162RC-A.json index 177230b..beeef74 100644 --- a/data/chips/STM32L162RC-A.json +++ b/data/chips/STM32L162RC-A.json @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2507,7 +2507,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2629,7 +2629,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2712,7 +2712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RC.json b/data/chips/STM32L162RC.json index 7420d99..448fa71 100644 --- a/data/chips/STM32L162RC.json +++ b/data/chips/STM32L162RC.json @@ -2327,7 +2327,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2451,7 +2451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2573,7 +2573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2656,7 +2656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RD.json b/data/chips/STM32L162RD.json index a11ad43..76740f7 100644 --- a/data/chips/STM32L162RD.json +++ b/data/chips/STM32L162RD.json @@ -2881,7 +2881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3005,7 +3005,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3127,7 +3127,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3210,7 +3210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162RE.json b/data/chips/STM32L162RE.json index b7736b5..a07e8e1 100644 --- a/data/chips/STM32L162RE.json +++ b/data/chips/STM32L162RE.json @@ -2423,7 +2423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2547,7 +2547,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2669,7 +2669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2752,7 +2752,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VC-A.json b/data/chips/STM32L162VC-A.json index 942b320..cd59ef9 100644 --- a/data/chips/STM32L162VC-A.json +++ b/data/chips/STM32L162VC-A.json @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2909,7 +2909,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3046,7 +3046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3154,7 +3154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VC.json b/data/chips/STM32L162VC.json index dbed68f..c2f7183 100644 --- a/data/chips/STM32L162VC.json +++ b/data/chips/STM32L162VC.json @@ -3331,7 +3331,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3479,7 +3479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3616,7 +3616,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3724,7 +3724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VD-X.json b/data/chips/STM32L162VD-X.json index 0ff3ce5..626f1a1 100644 --- a/data/chips/STM32L162VD-X.json +++ b/data/chips/STM32L162VD-X.json @@ -2829,7 +2829,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2977,7 +2977,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3114,7 +3114,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3222,7 +3222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VD.json b/data/chips/STM32L162VD.json index a3e7a24..3eed4c6 100644 --- a/data/chips/STM32L162VD.json +++ b/data/chips/STM32L162VD.json @@ -3138,7 +3138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3286,7 +3286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3423,7 +3423,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3531,7 +3531,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162VE.json b/data/chips/STM32L162VE.json index 57cfd28..8e8864f 100644 --- a/data/chips/STM32L162VE.json +++ b/data/chips/STM32L162VE.json @@ -3435,7 +3435,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3583,7 +3583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3720,7 +3720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3828,7 +3828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZC.json b/data/chips/STM32L162ZC.json index 4b0aa26..afc5030 100644 --- a/data/chips/STM32L162ZC.json +++ b/data/chips/STM32L162ZC.json @@ -3111,7 +3111,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3259,7 +3259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3396,7 +3396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3504,7 +3504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZD.json b/data/chips/STM32L162ZD.json index 5a4b503..527e6cb 100644 --- a/data/chips/STM32L162ZD.json +++ b/data/chips/STM32L162ZD.json @@ -3587,7 +3587,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3735,7 +3735,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3872,7 +3872,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3980,7 +3980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L162ZE.json b/data/chips/STM32L162ZE.json index 3856113..0408d85 100644 --- a/data/chips/STM32L162ZE.json +++ b/data/chips/STM32L162ZE.json @@ -3149,7 +3149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3297,7 +3297,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3434,7 +3434,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3542,7 +3542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412C8.json b/data/chips/STM32L412C8.json index b90b161..192d91f 100644 --- a/data/chips/STM32L412C8.json +++ b/data/chips/STM32L412C8.json @@ -2517,7 +2517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2674,7 +2674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2781,7 +2781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2868,7 +2868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412CB.json b/data/chips/STM32L412CB.json index ace68f3..a29cc58 100644 --- a/data/chips/STM32L412CB.json +++ b/data/chips/STM32L412CB.json @@ -3105,7 +3105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3262,7 +3262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3369,7 +3369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3456,7 +3456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412K8.json b/data/chips/STM32L412K8.json index 24782d0..3321d61 100644 --- a/data/chips/STM32L412K8.json +++ b/data/chips/STM32L412K8.json @@ -2082,7 +2082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2306,7 +2306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2388,7 +2388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412KB.json b/data/chips/STM32L412KB.json index acef0c7..4105fc8 100644 --- a/data/chips/STM32L412KB.json +++ b/data/chips/STM32L412KB.json @@ -2082,7 +2082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2306,7 +2306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2388,7 +2388,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412R8.json b/data/chips/STM32L412R8.json index b6dfbd8..48a86e4 100644 --- a/data/chips/STM32L412R8.json +++ b/data/chips/STM32L412R8.json @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2982,7 +2982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3089,7 +3089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3176,7 +3176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412RB.json b/data/chips/STM32L412RB.json index 14117dc..5d8558e 100644 --- a/data/chips/STM32L412RB.json +++ b/data/chips/STM32L412RB.json @@ -3611,7 +3611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3768,7 +3768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3875,7 +3875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3962,7 +3962,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412T8.json b/data/chips/STM32L412T8.json index afafae6..3a561c0 100644 --- a/data/chips/STM32L412T8.json +++ b/data/chips/STM32L412T8.json @@ -1952,7 +1952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2089,7 +2089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2176,7 +2176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2263,7 +2263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L412TB.json b/data/chips/STM32L412TB.json index 2f2b67f..1be063f 100644 --- a/data/chips/STM32L412TB.json +++ b/data/chips/STM32L412TB.json @@ -2174,7 +2174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2311,7 +2311,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2398,7 +2398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2485,7 +2485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422CB.json b/data/chips/STM32L422CB.json index 4cd08a9..5c2da8a 100644 --- a/data/chips/STM32L422CB.json +++ b/data/chips/STM32L422CB.json @@ -2566,7 +2566,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2723,7 +2723,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2830,7 +2830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2917,7 +2917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422KB.json b/data/chips/STM32L422KB.json index 9b93c40..ff66794 100644 --- a/data/chips/STM32L422KB.json +++ b/data/chips/STM32L422KB.json @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2268,7 +2268,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2355,7 +2355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2437,7 +2437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422RB.json b/data/chips/STM32L422RB.json index 9e5c460..7bdcd8b 100644 --- a/data/chips/STM32L422RB.json +++ b/data/chips/STM32L422RB.json @@ -2880,7 +2880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3037,7 +3037,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3144,7 +3144,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3231,7 +3231,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L422TB.json b/data/chips/STM32L422TB.json index 2dc38ef..e86e78a 100644 --- a/data/chips/STM32L422TB.json +++ b/data/chips/STM32L422TB.json @@ -2001,7 +2001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2138,7 +2138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2225,7 +2225,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2312,7 +2312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431CB.json b/data/chips/STM32L431CB.json index 98c8e53..6b81415 100644 --- a/data/chips/STM32L431CB.json +++ b/data/chips/STM32L431CB.json @@ -3248,7 +3248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3415,7 +3415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3522,7 +3522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3609,7 +3609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431CC.json b/data/chips/STM32L431CC.json index eae0409..9d7aade 100644 --- a/data/chips/STM32L431CC.json +++ b/data/chips/STM32L431CC.json @@ -3248,7 +3248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3415,7 +3415,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3522,7 +3522,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3609,7 +3609,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431KB.json b/data/chips/STM32L431KB.json index a7dc148..1482b1c 100644 --- a/data/chips/STM32L431KB.json +++ b/data/chips/STM32L431KB.json @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2363,7 +2363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2450,7 +2450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431KC.json b/data/chips/STM32L431KC.json index c6f62c5..4f235a9 100644 --- a/data/chips/STM32L431KC.json +++ b/data/chips/STM32L431KC.json @@ -2221,7 +2221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2363,7 +2363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2450,7 +2450,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2532,7 +2532,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431RB.json b/data/chips/STM32L431RB.json index c285d51..f473465 100644 --- a/data/chips/STM32L431RB.json +++ b/data/chips/STM32L431RB.json @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3896,7 +3896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4003,7 +4003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4090,7 +4090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431RC.json b/data/chips/STM32L431RC.json index a2d4555..140abcf 100644 --- a/data/chips/STM32L431RC.json +++ b/data/chips/STM32L431RC.json @@ -3729,7 +3729,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3896,7 +3896,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4003,7 +4003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4090,7 +4090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L431VC.json b/data/chips/STM32L431VC.json index 2d607dd..3571514 100644 --- a/data/chips/STM32L431VC.json +++ b/data/chips/STM32L431VC.json @@ -3945,7 +3945,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4172,7 +4172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4279,7 +4279,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4371,7 +4371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L432KB.json b/data/chips/STM32L432KB.json index a85a29e..70bf5ff 100644 --- a/data/chips/STM32L432KB.json +++ b/data/chips/STM32L432KB.json @@ -2192,7 +2192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L432KC.json b/data/chips/STM32L432KC.json index 41149f1..e40dcc1 100644 --- a/data/chips/STM32L432KC.json +++ b/data/chips/STM32L432KC.json @@ -2192,7 +2192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2334,7 +2334,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2421,7 +2421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2503,7 +2503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433CB.json b/data/chips/STM32L433CB.json index b38d45f..cb0cd2a 100644 --- a/data/chips/STM32L433CB.json +++ b/data/chips/STM32L433CB.json @@ -3421,7 +3421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3588,7 +3588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3695,7 +3695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3782,7 +3782,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433CC.json b/data/chips/STM32L433CC.json index 64706a0..93c9275 100644 --- a/data/chips/STM32L433CC.json +++ b/data/chips/STM32L433CC.json @@ -3421,7 +3421,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3588,7 +3588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3695,7 +3695,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3782,7 +3782,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433RB.json b/data/chips/STM32L433RB.json index b288753..3c25823 100644 --- a/data/chips/STM32L433RB.json +++ b/data/chips/STM32L433RB.json @@ -4007,7 +4007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4174,7 +4174,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4281,7 +4281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4368,7 +4368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433RC.json b/data/chips/STM32L433RC.json index ea7c9fc..7e18587 100644 --- a/data/chips/STM32L433RC.json +++ b/data/chips/STM32L433RC.json @@ -4403,7 +4403,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4570,7 +4570,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4677,7 +4677,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4764,7 +4764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L433VC.json b/data/chips/STM32L433VC.json index 9e6dc95..ae8f825 100644 --- a/data/chips/STM32L433VC.json +++ b/data/chips/STM32L433VC.json @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4510,7 +4510,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4617,7 +4617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4709,7 +4709,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L442KC.json b/data/chips/STM32L442KC.json index bc1793f..da22dab 100644 --- a/data/chips/STM32L442KC.json +++ b/data/chips/STM32L442KC.json @@ -2241,7 +2241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2383,7 +2383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2470,7 +2470,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2552,7 +2552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443CC.json b/data/chips/STM32L443CC.json index fc7c09d..73bad87 100644 --- a/data/chips/STM32L443CC.json +++ b/data/chips/STM32L443CC.json @@ -3770,7 +3770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3937,7 +3937,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4044,7 +4044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4131,7 +4131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443RC.json b/data/chips/STM32L443RC.json index 0b00f49..ad452b0 100644 --- a/data/chips/STM32L443RC.json +++ b/data/chips/STM32L443RC.json @@ -4056,7 +4056,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4223,7 +4223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4330,7 +4330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4417,7 +4417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L443VC.json b/data/chips/STM32L443VC.json index ae46e89..8458bf8 100644 --- a/data/chips/STM32L443VC.json +++ b/data/chips/STM32L443VC.json @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4559,7 +4559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4666,7 +4666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4758,7 +4758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451CC.json b/data/chips/STM32L451CC.json index 4200d6d..0a4d2b6 100644 --- a/data/chips/STM32L451CC.json +++ b/data/chips/STM32L451CC.json @@ -2757,7 +2757,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2924,7 +2924,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3031,7 +3031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3118,7 +3118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3250,7 +3250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451CE.json b/data/chips/STM32L451CE.json index cd2f683..21ef4f0 100644 --- a/data/chips/STM32L451CE.json +++ b/data/chips/STM32L451CE.json @@ -3051,7 +3051,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3218,7 +3218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3325,7 +3325,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3412,7 +3412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3544,7 +3544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451RC.json b/data/chips/STM32L451RC.json index 38e4796..4d5c8fe 100644 --- a/data/chips/STM32L451RC.json +++ b/data/chips/STM32L451RC.json @@ -3881,7 +3881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4048,7 +4048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4155,7 +4155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4242,7 +4242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4374,7 +4374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451RE.json b/data/chips/STM32L451RE.json index 44ab3a9..c4b3b37 100644 --- a/data/chips/STM32L451RE.json +++ b/data/chips/STM32L451RE.json @@ -3881,7 +3881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4048,7 +4048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4155,7 +4155,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4242,7 +4242,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4374,7 +4374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451VC.json b/data/chips/STM32L451VC.json index e61f462..d3b399a 100644 --- a/data/chips/STM32L451VC.json +++ b/data/chips/STM32L451VC.json @@ -4157,7 +4157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4491,7 +4491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4583,7 +4583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4715,7 +4715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L451VE.json b/data/chips/STM32L451VE.json index fdc2522..71905d7 100644 --- a/data/chips/STM32L451VE.json +++ b/data/chips/STM32L451VE.json @@ -4157,7 +4157,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4491,7 +4491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4583,7 +4583,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4715,7 +4715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452CC.json b/data/chips/STM32L452CC.json index 9a91e3a..7e70ecf 100644 --- a/data/chips/STM32L452CC.json +++ b/data/chips/STM32L452CC.json @@ -2770,7 +2770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2937,7 +2937,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3044,7 +3044,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3131,7 +3131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3263,7 +3263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452CE.json b/data/chips/STM32L452CE.json index 7a73794..a6e2c29 100644 --- a/data/chips/STM32L452CE.json +++ b/data/chips/STM32L452CE.json @@ -3358,7 +3358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3525,7 +3525,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3632,7 +3632,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3719,7 +3719,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3851,7 +3851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452RC.json b/data/chips/STM32L452RC.json index 859a3c8..80e670b 100644 --- a/data/chips/STM32L452RC.json +++ b/data/chips/STM32L452RC.json @@ -3894,7 +3894,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4061,7 +4061,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4168,7 +4168,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4255,7 +4255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4387,7 +4387,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452RE.json b/data/chips/STM32L452RE.json index 250f9c0..ecb1feb 100644 --- a/data/chips/STM32L452RE.json +++ b/data/chips/STM32L452RE.json @@ -4680,7 +4680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4847,7 +4847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4954,7 +4954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5041,7 +5041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5173,7 +5173,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452VC.json b/data/chips/STM32L452VC.json index 5016b3b..b44ef85 100644 --- a/data/chips/STM32L452VC.json +++ b/data/chips/STM32L452VC.json @@ -4170,7 +4170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4504,7 +4504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4728,7 +4728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L452VE.json b/data/chips/STM32L452VE.json index da732fe..3130ccb 100644 --- a/data/chips/STM32L452VE.json +++ b/data/chips/STM32L452VE.json @@ -4170,7 +4170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4504,7 +4504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4596,7 +4596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4728,7 +4728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462CE.json b/data/chips/STM32L462CE.json index 24e6001..908f30e 100644 --- a/data/chips/STM32L462CE.json +++ b/data/chips/STM32L462CE.json @@ -3119,7 +3119,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3286,7 +3286,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3393,7 +3393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3480,7 +3480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3612,7 +3612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462RE.json b/data/chips/STM32L462RE.json index 45b96a9..3921d03 100644 --- a/data/chips/STM32L462RE.json +++ b/data/chips/STM32L462RE.json @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4110,7 +4110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4217,7 +4217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4304,7 +4304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4436,7 +4436,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L462VE.json b/data/chips/STM32L462VE.json index 5c5e101..238d219 100644 --- a/data/chips/STM32L462VE.json +++ b/data/chips/STM32L462VE.json @@ -4219,7 +4219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4446,7 +4446,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4553,7 +4553,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4645,7 +4645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4777,7 +4777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32L471QE.json b/data/chips/STM32L471QE.json index 234092e..7947531 100644 --- a/data/chips/STM32L471QE.json +++ b/data/chips/STM32L471QE.json @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4791,7 +4791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4980,7 +4980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5112,7 +5112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5264,7 +5264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5376,7 +5376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5588,7 +5588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471QG.json b/data/chips/STM32L471QG.json index eefef7b..53c16f6 100644 --- a/data/chips/STM32L471QG.json +++ b/data/chips/STM32L471QG.json @@ -4442,7 +4442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4669,7 +4669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4791,7 +4791,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4883,7 +4883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4980,7 +4980,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5112,7 +5112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5264,7 +5264,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5376,7 +5376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5588,7 +5588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471RE.json b/data/chips/STM32L471RE.json index 1ca7a2e..4ce0369 100644 --- a/data/chips/STM32L471RE.json +++ b/data/chips/STM32L471RE.json @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3572,7 +3572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3664,7 +3664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3796,7 +3796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471RG.json b/data/chips/STM32L471RG.json index 77aa7d6..dda4167 100644 --- a/data/chips/STM32L471RG.json +++ b/data/chips/STM32L471RG.json @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3378,7 +3378,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3485,7 +3485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3572,7 +3572,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3664,7 +3664,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3796,7 +3796,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3923,7 +3923,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4010,7 +4010,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4222,7 +4222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471VE.json b/data/chips/STM32L471VE.json index 263a6b9..3a071f7 100644 --- a/data/chips/STM32L471VE.json +++ b/data/chips/STM32L471VE.json @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4170,7 +4170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4598,7 +4598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4750,7 +4750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4862,7 +4862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471VG.json b/data/chips/STM32L471VG.json index c526bf5..245634a 100644 --- a/data/chips/STM32L471VG.json +++ b/data/chips/STM32L471VG.json @@ -3943,7 +3943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4170,7 +4170,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4277,7 +4277,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4466,7 +4466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4598,7 +4598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4750,7 +4750,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4862,7 +4862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471ZE.json b/data/chips/STM32L471ZE.json index f3aeb57..f1330b7 100644 --- a/data/chips/STM32L471ZE.json +++ b/data/chips/STM32L471ZE.json @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5651,7 +5651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5783,7 +5783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5875,7 +5875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5972,7 +5972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6104,7 +6104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6256,7 +6256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6368,7 +6368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6605,7 +6605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L471ZG.json b/data/chips/STM32L471ZG.json index 515d3f8..276ab9d 100644 --- a/data/chips/STM32L471ZG.json +++ b/data/chips/STM32L471ZG.json @@ -5424,7 +5424,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5651,7 +5651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5783,7 +5783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5875,7 +5875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5972,7 +5972,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6104,7 +6104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6256,7 +6256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6368,7 +6368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6605,7 +6605,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RC.json b/data/chips/STM32L475RC.json index 86c5a29..8e0cbcb 100644 --- a/data/chips/STM32L475RC.json +++ b/data/chips/STM32L475RC.json @@ -3217,7 +3217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3384,7 +3384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3929,7 +3929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4016,7 +4016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4228,7 +4228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RE.json b/data/chips/STM32L475RE.json index 8ed2121..1a8e738 100644 --- a/data/chips/STM32L475RE.json +++ b/data/chips/STM32L475RE.json @@ -3217,7 +3217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3384,7 +3384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3929,7 +3929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4016,7 +4016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4228,7 +4228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475RG.json b/data/chips/STM32L475RG.json index f073701..563f1c0 100644 --- a/data/chips/STM32L475RG.json +++ b/data/chips/STM32L475RG.json @@ -3217,7 +3217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3384,7 +3384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3491,7 +3491,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3578,7 +3578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3670,7 +3670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3802,7 +3802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3929,7 +3929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4016,7 +4016,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4228,7 +4228,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VC.json b/data/chips/STM32L475VC.json index 2974ee1..4e6886c 100644 --- a/data/chips/STM32L475VC.json +++ b/data/chips/STM32L475VC.json @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4472,7 +4472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4756,7 +4756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4868,7 +4868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VE.json b/data/chips/STM32L475VE.json index 8104c32..de9c022 100644 --- a/data/chips/STM32L475VE.json +++ b/data/chips/STM32L475VE.json @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4472,7 +4472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4756,7 +4756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4868,7 +4868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L475VG.json b/data/chips/STM32L475VG.json index d6bb613..ebc2134 100644 --- a/data/chips/STM32L475VG.json +++ b/data/chips/STM32L475VG.json @@ -3949,7 +3949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4176,7 +4176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4283,7 +4283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4375,7 +4375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4472,7 +4472,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4604,7 +4604,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4756,7 +4756,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4868,7 +4868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476JE.json b/data/chips/STM32L476JE.json index 700f9b3..e8920b8 100644 --- a/data/chips/STM32L476JE.json +++ b/data/chips/STM32L476JE.json @@ -3608,7 +3608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3775,7 +3775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3897,7 +3897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3984,7 +3984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4076,7 +4076,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4208,7 +4208,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4335,7 +4335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4422,7 +4422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4634,7 +4634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476JG.json b/data/chips/STM32L476JG.json index 9cb570c..97eabbd 100644 --- a/data/chips/STM32L476JG.json +++ b/data/chips/STM32L476JG.json @@ -4052,7 +4052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4219,7 +4219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4341,7 +4341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4428,7 +4428,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4520,7 +4520,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4652,7 +4652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4779,7 +4779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4866,7 +4866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5078,7 +5078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ME.json b/data/chips/STM32L476ME.json index db75d74..8772e3c 100644 --- a/data/chips/STM32L476ME.json +++ b/data/chips/STM32L476ME.json @@ -3722,7 +3722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4021,7 +4021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4108,7 +4108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4200,7 +4200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4758,7 +4758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476MG.json b/data/chips/STM32L476MG.json index f4d3287..47cbdc4 100644 --- a/data/chips/STM32L476MG.json +++ b/data/chips/STM32L476MG.json @@ -3722,7 +3722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3899,7 +3899,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4021,7 +4021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4108,7 +4108,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4200,7 +4200,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4332,7 +4332,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4459,7 +4459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4546,7 +4546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4758,7 +4758,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476QE.json b/data/chips/STM32L476QE.json index 97b27c2..aef7ca9 100644 --- a/data/chips/STM32L476QE.json +++ b/data/chips/STM32L476QE.json @@ -4792,7 +4792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5019,7 +5019,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5141,7 +5141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5233,7 +5233,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5330,7 +5330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5462,7 +5462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5614,7 +5614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5938,7 +5938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476QG.json b/data/chips/STM32L476QG.json index 156c69f..94a59ee 100644 --- a/data/chips/STM32L476QG.json +++ b/data/chips/STM32L476QG.json @@ -5590,7 +5590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5939,7 +5939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6031,7 +6031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6128,7 +6128,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6260,7 +6260,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6412,7 +6412,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6524,7 +6524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6736,7 +6736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RC.json b/data/chips/STM32L476RC.json index 3385314..5b18339 100644 --- a/data/chips/STM32L476RC.json +++ b/data/chips/STM32L476RC.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3856,7 +3856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RE.json b/data/chips/STM32L476RE.json index 51f6023..3b00c24 100644 --- a/data/chips/STM32L476RE.json +++ b/data/chips/STM32L476RE.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3856,7 +3856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476RG.json b/data/chips/STM32L476RG.json index 36291d8..449cc69 100644 --- a/data/chips/STM32L476RG.json +++ b/data/chips/STM32L476RG.json @@ -3495,7 +3495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3662,7 +3662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3856,7 +3856,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3948,7 +3948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4080,7 +4080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4207,7 +4207,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VC.json b/data/chips/STM32L476VC.json index 7970b82..a2975ee 100644 --- a/data/chips/STM32L476VC.json +++ b/data/chips/STM32L476VC.json @@ -4448,7 +4448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4675,7 +4675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4797,7 +4797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4889,7 +4889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4986,7 +4986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5270,7 +5270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5382,7 +5382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5594,7 +5594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VE.json b/data/chips/STM32L476VE.json index 210eda7..acccdb1 100644 --- a/data/chips/STM32L476VE.json +++ b/data/chips/STM32L476VE.json @@ -4448,7 +4448,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4675,7 +4675,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4797,7 +4797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4889,7 +4889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4986,7 +4986,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5270,7 +5270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5382,7 +5382,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5594,7 +5594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476VG.json b/data/chips/STM32L476VG.json index 9289013..90e2356 100644 --- a/data/chips/STM32L476VG.json +++ b/data/chips/STM32L476VG.json @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5275,7 +5275,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5397,7 +5397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5489,7 +5489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5586,7 +5586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5718,7 +5718,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5870,7 +5870,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5982,7 +5982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6194,7 +6194,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ZE.json b/data/chips/STM32L476ZE.json index debe5d4..1486081 100644 --- a/data/chips/STM32L476ZE.json +++ b/data/chips/STM32L476ZE.json @@ -4904,7 +4904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5131,7 +5131,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5263,7 +5263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5355,7 +5355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5452,7 +5452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5584,7 +5584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5736,7 +5736,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5848,7 +5848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6085,7 +6085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L476ZG.json b/data/chips/STM32L476ZG.json index dc205cd..dd7e8be 100644 --- a/data/chips/STM32L476ZG.json +++ b/data/chips/STM32L476ZG.json @@ -6650,7 +6650,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6877,7 +6877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7009,7 +7009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7101,7 +7101,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7198,7 +7198,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7330,7 +7330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7482,7 +7482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7594,7 +7594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7831,7 +7831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486JG.json b/data/chips/STM32L486JG.json index 969f5dc..f2a11b8 100644 --- a/data/chips/STM32L486JG.json +++ b/data/chips/STM32L486JG.json @@ -3657,7 +3657,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3824,7 +3824,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3946,7 +3946,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4033,7 +4033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4125,7 +4125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4257,7 +4257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4384,7 +4384,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4471,7 +4471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4683,7 +4683,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486QG.json b/data/chips/STM32L486QG.json index c11539a..f05aea4 100644 --- a/data/chips/STM32L486QG.json +++ b/data/chips/STM32L486QG.json @@ -4841,7 +4841,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5068,7 +5068,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5190,7 +5190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5511,7 +5511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5663,7 +5663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5775,7 +5775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5987,7 +5987,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486RG.json b/data/chips/STM32L486RG.json index e54188c..7c76df6 100644 --- a/data/chips/STM32L486RG.json +++ b/data/chips/STM32L486RG.json @@ -3544,7 +3544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3711,7 +3711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3818,7 +3818,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3905,7 +3905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3997,7 +3997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4129,7 +4129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4256,7 +4256,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4343,7 +4343,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486VG.json b/data/chips/STM32L486VG.json index 15e50ea..4ef1744 100644 --- a/data/chips/STM32L486VG.json +++ b/data/chips/STM32L486VG.json @@ -4342,7 +4342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4676,7 +4676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4865,7 +4865,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4997,7 +4997,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5149,7 +5149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5261,7 +5261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5473,7 +5473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L486ZG.json b/data/chips/STM32L486ZG.json index f879cb9..b4543f6 100644 --- a/data/chips/STM32L486ZG.json +++ b/data/chips/STM32L486ZG.json @@ -4953,7 +4953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5180,7 +5180,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5312,7 +5312,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5404,7 +5404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5501,7 +5501,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5633,7 +5633,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5785,7 +5785,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5897,7 +5897,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6134,7 +6134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496AE.json b/data/chips/STM32L496AE.json index a63e317..6322bec 100644 --- a/data/chips/STM32L496AE.json +++ b/data/chips/STM32L496AE.json @@ -5836,7 +5836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6063,7 +6063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6190,7 +6190,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6282,7 +6282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6379,7 +6379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6511,7 +6511,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6663,7 +6663,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6775,7 +6775,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7007,7 +7007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496AG.json b/data/chips/STM32L496AG.json index 68f393e..178012f 100644 --- a/data/chips/STM32L496AG.json +++ b/data/chips/STM32L496AG.json @@ -6862,7 +6862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7089,7 +7089,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7216,7 +7216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7308,7 +7308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7405,7 +7405,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7537,7 +7537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7689,7 +7689,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7801,7 +7801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8033,7 +8033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496QE.json b/data/chips/STM32L496QE.json index d64f08d..11b3295 100644 --- a/data/chips/STM32L496QE.json +++ b/data/chips/STM32L496QE.json @@ -5440,7 +5440,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5667,7 +5667,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5789,7 +5789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5881,7 +5881,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5978,7 +5978,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6110,7 +6110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6262,7 +6262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6374,7 +6374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6586,7 +6586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496QG.json b/data/chips/STM32L496QG.json index 60468ad..e4e824f 100644 --- a/data/chips/STM32L496QG.json +++ b/data/chips/STM32L496QG.json @@ -7036,7 +7036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7263,7 +7263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7385,7 +7385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7477,7 +7477,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7574,7 +7574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7706,7 +7706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7858,7 +7858,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7970,7 +7970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8182,7 +8182,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496RE.json b/data/chips/STM32L496RE.json index da32872..a749c6f 100644 --- a/data/chips/STM32L496RE.json +++ b/data/chips/STM32L496RE.json @@ -4032,7 +4032,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4199,7 +4199,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4306,7 +4306,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4393,7 +4393,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4485,7 +4485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4617,7 +4617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4744,7 +4744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4831,7 +4831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5043,7 +5043,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496RG.json b/data/chips/STM32L496RG.json index 6b7c715..cb0c1ca 100644 --- a/data/chips/STM32L496RG.json +++ b/data/chips/STM32L496RG.json @@ -4422,7 +4422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4589,7 +4589,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4696,7 +4696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4783,7 +4783,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4875,7 +4875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5134,7 +5134,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5433,7 +5433,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496VE.json b/data/chips/STM32L496VE.json index 8ae1d97..8a21017 100644 --- a/data/chips/STM32L496VE.json +++ b/data/chips/STM32L496VE.json @@ -4979,7 +4979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5206,7 +5206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5328,7 +5328,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5420,7 +5420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5517,7 +5517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5649,7 +5649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5801,7 +5801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5913,7 +5913,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6125,7 +6125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496VG.json b/data/chips/STM32L496VG.json index 9f020f1..9ac2d35 100644 --- a/data/chips/STM32L496VG.json +++ b/data/chips/STM32L496VG.json @@ -6803,7 +6803,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7030,7 +7030,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7152,7 +7152,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7244,7 +7244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7341,7 +7341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7473,7 +7473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7625,7 +7625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7737,7 +7737,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7949,7 +7949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496WG.json b/data/chips/STM32L496WG.json index c7b9e40..ab84ccc 100644 --- a/data/chips/STM32L496WG.json +++ b/data/chips/STM32L496WG.json @@ -5273,7 +5273,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5495,7 +5495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5612,7 +5612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5694,7 +5694,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5786,7 +5786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5918,7 +5918,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6162,7 +6162,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6374,7 +6374,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496ZE.json b/data/chips/STM32L496ZE.json index fe71ef0..6842c5a 100644 --- a/data/chips/STM32L496ZE.json +++ b/data/chips/STM32L496ZE.json @@ -5590,7 +5590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5817,7 +5817,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5949,7 +5949,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6041,7 +6041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6138,7 +6138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6270,7 +6270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6422,7 +6422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6534,7 +6534,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6771,7 +6771,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L496ZG.json b/data/chips/STM32L496ZG.json index 1205d3a..d28eac4 100644 --- a/data/chips/STM32L496ZG.json +++ b/data/chips/STM32L496ZG.json @@ -6466,7 +6466,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6693,7 +6693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6825,7 +6825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6917,7 +6917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7014,7 +7014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7146,7 +7146,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7298,7 +7298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7410,7 +7410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7647,7 +7647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6AG.json b/data/chips/STM32L4A6AG.json index f3a66b7..57fbb53 100644 --- a/data/chips/STM32L4A6AG.json +++ b/data/chips/STM32L4A6AG.json @@ -6939,7 +6939,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7166,7 +7166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7293,7 +7293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7385,7 +7385,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7482,7 +7482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7614,7 +7614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7766,7 +7766,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7878,7 +7878,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8110,7 +8110,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6QG.json b/data/chips/STM32L4A6QG.json index cca0af5..803c11f 100644 --- a/data/chips/STM32L4A6QG.json +++ b/data/chips/STM32L4A6QG.json @@ -6321,7 +6321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6548,7 +6548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6670,7 +6670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6762,7 +6762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6859,7 +6859,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7143,7 +7143,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7255,7 +7255,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7467,7 +7467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6RG.json b/data/chips/STM32L4A6RG.json index f90fd06..a0aa09f 100644 --- a/data/chips/STM32L4A6RG.json +++ b/data/chips/STM32L4A6RG.json @@ -4505,7 +4505,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4672,7 +4672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4779,7 +4779,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4866,7 +4866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4958,7 +4958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5090,7 +5090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5217,7 +5217,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5304,7 +5304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5516,7 +5516,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6VG.json b/data/chips/STM32L4A6VG.json index cb414ba..658b659 100644 --- a/data/chips/STM32L4A6VG.json +++ b/data/chips/STM32L4A6VG.json @@ -6880,7 +6880,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7107,7 +7107,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7229,7 +7229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7321,7 +7321,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7418,7 +7418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7550,7 +7550,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7702,7 +7702,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7814,7 +7814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8026,7 +8026,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4A6ZG.json b/data/chips/STM32L4A6ZG.json index a6cc68d..65e5aaa 100644 --- a/data/chips/STM32L4A6ZG.json +++ b/data/chips/STM32L4A6ZG.json @@ -6543,7 +6543,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6770,7 +6770,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6994,7 +6994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7091,7 +7091,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7223,7 +7223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7375,7 +7375,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7487,7 +7487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7724,7 +7724,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5AE.json b/data/chips/STM32L4P5AE.json index e362edd..03c6462 100644 --- a/data/chips/STM32L4P5AE.json +++ b/data/chips/STM32L4P5AE.json @@ -6333,7 +6333,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6535,7 +6535,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6662,7 +6662,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6744,7 +6744,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6831,7 +6831,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6963,7 +6963,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7120,7 +7120,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7237,7 +7237,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7454,7 +7454,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5AG.json b/data/chips/STM32L4P5AG.json index fde2dbc..e088f20 100644 --- a/data/chips/STM32L4P5AG.json +++ b/data/chips/STM32L4P5AG.json @@ -7353,7 +7353,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7555,7 +7555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7682,7 +7682,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7764,7 +7764,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7851,7 +7851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7983,7 +7983,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8140,7 +8140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8257,7 +8257,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8474,7 +8474,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5CE.json b/data/chips/STM32L4P5CE.json index 20bbc8b..bbd7b7f 100644 --- a/data/chips/STM32L4P5CE.json +++ b/data/chips/STM32L4P5CE.json @@ -3549,7 +3549,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3701,7 +3701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3808,7 +3808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3885,7 +3885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3967,7 +3967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4099,7 +4099,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4206,7 +4206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4298,7 +4298,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4495,7 +4495,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5CG.json b/data/chips/STM32L4P5CG.json index b43c588..e8aa60c 100644 --- a/data/chips/STM32L4P5CG.json +++ b/data/chips/STM32L4P5CG.json @@ -4137,7 +4137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4289,7 +4289,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4396,7 +4396,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4473,7 +4473,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4555,7 +4555,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4687,7 +4687,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4794,7 +4794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4886,7 +4886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5083,7 +5083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5QE.json b/data/chips/STM32L4P5QE.json index b0086cf..47a0be4 100644 --- a/data/chips/STM32L4P5QE.json +++ b/data/chips/STM32L4P5QE.json @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6050,7 +6050,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6132,7 +6132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6219,7 +6219,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6351,7 +6351,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6508,7 +6508,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6625,7 +6625,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6822,7 +6822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5QG.json b/data/chips/STM32L4P5QG.json index 421f64f..f351655 100644 --- a/data/chips/STM32L4P5QG.json +++ b/data/chips/STM32L4P5QG.json @@ -7322,7 +7322,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7524,7 +7524,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7646,7 +7646,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7728,7 +7728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7947,7 +7947,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8104,7 +8104,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8221,7 +8221,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8418,7 +8418,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5RE.json b/data/chips/STM32L4P5RE.json index 71e98f7..9684fc5 100644 --- a/data/chips/STM32L4P5RE.json +++ b/data/chips/STM32L4P5RE.json @@ -4002,7 +4002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4154,7 +4154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4338,7 +4338,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4420,7 +4420,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4552,7 +4552,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4684,7 +4684,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4776,7 +4776,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4973,7 +4973,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5RG.json b/data/chips/STM32L4P5RG.json index 1a9220b..19329fc 100644 --- a/data/chips/STM32L4P5RG.json +++ b/data/chips/STM32L4P5RG.json @@ -4392,7 +4392,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4544,7 +4544,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4651,7 +4651,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4728,7 +4728,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4810,7 +4810,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4942,7 +4942,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5074,7 +5074,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5166,7 +5166,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5363,7 +5363,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5VE.json b/data/chips/STM32L4P5VE.json index 78c0c3f..b0b00f0 100644 --- a/data/chips/STM32L4P5VE.json +++ b/data/chips/STM32L4P5VE.json @@ -5755,7 +5755,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5957,7 +5957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6079,7 +6079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6161,7 +6161,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6248,7 +6248,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6380,7 +6380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6537,7 +6537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6654,7 +6654,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6851,7 +6851,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5VG.json b/data/chips/STM32L4P5VG.json index 23f8917..4cebcb5 100644 --- a/data/chips/STM32L4P5VG.json +++ b/data/chips/STM32L4P5VG.json @@ -6967,7 +6967,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7291,7 +7291,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7373,7 +7373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7460,7 +7460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7592,7 +7592,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7749,7 +7749,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7866,7 +7866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8063,7 +8063,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5ZE.json b/data/chips/STM32L4P5ZE.json index 6114c0d..03c9722 100644 --- a/data/chips/STM32L4P5ZE.json +++ b/data/chips/STM32L4P5ZE.json @@ -5868,7 +5868,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6070,7 +6070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6202,7 +6202,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6284,7 +6284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6371,7 +6371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6503,7 +6503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6660,7 +6660,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6777,7 +6777,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6999,7 +6999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4P5ZG.json b/data/chips/STM32L4P5ZG.json index c87be2d..8e0da61 100644 --- a/data/chips/STM32L4P5ZG.json +++ b/data/chips/STM32L4P5ZG.json @@ -6738,7 +6738,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6940,7 +6940,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7072,7 +7072,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7154,7 +7154,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7241,7 +7241,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7373,7 +7373,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7530,7 +7530,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7647,7 +7647,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7869,7 +7869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5AG.json b/data/chips/STM32L4Q5AG.json index ac01dce..7039e7f 100644 --- a/data/chips/STM32L4Q5AG.json +++ b/data/chips/STM32L4Q5AG.json @@ -7419,7 +7419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7621,7 +7621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7748,7 +7748,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7830,7 +7830,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7917,7 +7917,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8049,7 +8049,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8206,7 +8206,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8323,7 +8323,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8540,7 +8540,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5CG.json b/data/chips/STM32L4Q5CG.json index bff3af4..fcd83a8 100644 --- a/data/chips/STM32L4Q5CG.json +++ b/data/chips/STM32L4Q5CG.json @@ -4203,7 +4203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4355,7 +4355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4462,7 +4462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4621,7 +4621,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4753,7 +4753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4860,7 +4860,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4952,7 +4952,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5149,7 +5149,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5QG.json b/data/chips/STM32L4Q5QG.json index a5ce8f3..727defa 100644 --- a/data/chips/STM32L4Q5QG.json +++ b/data/chips/STM32L4Q5QG.json @@ -6590,7 +6590,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6792,7 +6792,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6914,7 +6914,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6996,7 +6996,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7083,7 +7083,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7215,7 +7215,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7372,7 +7372,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7489,7 +7489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7686,7 +7686,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5RG.json b/data/chips/STM32L4Q5RG.json index 7898331..296745c 100644 --- a/data/chips/STM32L4Q5RG.json +++ b/data/chips/STM32L4Q5RG.json @@ -4458,7 +4458,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4610,7 +4610,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4717,7 +4717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4794,7 +4794,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4876,7 +4876,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5008,7 +5008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5140,7 +5140,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5232,7 +5232,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5429,7 +5429,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5VG.json b/data/chips/STM32L4Q5VG.json index 41f2f1b..a0b0aa6 100644 --- a/data/chips/STM32L4Q5VG.json +++ b/data/chips/STM32L4Q5VG.json @@ -7033,7 +7033,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7235,7 +7235,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7357,7 +7357,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7439,7 +7439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7526,7 +7526,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7658,7 +7658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7815,7 +7815,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7932,7 +7932,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8129,7 +8129,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4Q5ZG.json b/data/chips/STM32L4Q5ZG.json index 5956503..102ffb5 100644 --- a/data/chips/STM32L4Q5ZG.json +++ b/data/chips/STM32L4Q5ZG.json @@ -6804,7 +6804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7006,7 +7006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7138,7 +7138,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7220,7 +7220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7307,7 +7307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7439,7 +7439,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7596,7 +7596,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7713,7 +7713,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7935,7 +7935,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5AG.json b/data/chips/STM32L4R5AG.json index e6950f5..51084f9 100644 --- a/data/chips/STM32L4R5AG.json +++ b/data/chips/STM32L4R5AG.json @@ -5476,7 +5476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5678,7 +5678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5805,7 +5805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5887,7 +5887,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5974,7 +5974,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6106,7 +6106,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6263,7 +6263,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6380,7 +6380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6597,7 +6597,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5AI.json b/data/chips/STM32L4R5AI.json index 3c96ed7..e78ad5e 100644 --- a/data/chips/STM32L4R5AI.json +++ b/data/chips/STM32L4R5AI.json @@ -6496,7 +6496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6698,7 +6698,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6825,7 +6825,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6907,7 +6907,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6994,7 +6994,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7126,7 +7126,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7283,7 +7283,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7400,7 +7400,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7617,7 +7617,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5QG.json b/data/chips/STM32L4R5QG.json index 41ce423..f0ccb3d 100644 --- a/data/chips/STM32L4R5QG.json +++ b/data/chips/STM32L4R5QG.json @@ -5797,7 +5797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5999,7 +5999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6121,7 +6121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6290,7 +6290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6422,7 +6422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6579,7 +6579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6696,7 +6696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6893,7 +6893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5QI.json b/data/chips/STM32L4R5QI.json index 1168bbc..159abbd 100644 --- a/data/chips/STM32L4R5QI.json +++ b/data/chips/STM32L4R5QI.json @@ -5797,7 +5797,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5999,7 +5999,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6121,7 +6121,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6290,7 +6290,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6422,7 +6422,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6579,7 +6579,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6696,7 +6696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6893,7 +6893,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5VG.json b/data/chips/STM32L4R5VG.json index f3405dc..f8b2a5d 100644 --- a/data/chips/STM32L4R5VG.json +++ b/data/chips/STM32L4R5VG.json @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4599,7 +4599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4706,7 +4706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4875,7 +4875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5164,7 +5164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5281,7 +5281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5478,7 +5478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5VI.json b/data/chips/STM32L4R5VI.json index 53c0a9f..b41ddb5 100644 --- a/data/chips/STM32L4R5VI.json +++ b/data/chips/STM32L4R5VI.json @@ -4397,7 +4397,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4599,7 +4599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4706,7 +4706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4788,7 +4788,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4875,7 +4875,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5164,7 +5164,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5281,7 +5281,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5478,7 +5478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5ZG.json b/data/chips/STM32L4R5ZG.json index c5806bc..1db931b 100644 --- a/data/chips/STM32L4R5ZG.json +++ b/data/chips/STM32L4R5ZG.json @@ -6001,7 +6001,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6203,7 +6203,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6335,7 +6335,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6417,7 +6417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6504,7 +6504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6636,7 +6636,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6793,7 +6793,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6910,7 +6910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7132,7 +7132,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R5ZI.json b/data/chips/STM32L4R5ZI.json index 70fa18d..9e86141 100644 --- a/data/chips/STM32L4R5ZI.json +++ b/data/chips/STM32L4R5ZI.json @@ -6877,7 +6877,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7079,7 +7079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7211,7 +7211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7293,7 +7293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7380,7 +7380,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7512,7 +7512,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7669,7 +7669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7786,7 +7786,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8008,7 +8008,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7AI.json b/data/chips/STM32L4R7AI.json index f48537b..ca9246f 100644 --- a/data/chips/STM32L4R7AI.json +++ b/data/chips/STM32L4R7AI.json @@ -5731,7 +5731,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5933,7 +5933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6060,7 +6060,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6142,7 +6142,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6229,7 +6229,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6361,7 +6361,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6518,7 +6518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6635,7 +6635,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6852,7 +6852,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7VI.json b/data/chips/STM32L4R7VI.json index fee15c5..29706f9 100644 --- a/data/chips/STM32L4R7VI.json +++ b/data/chips/STM32L4R7VI.json @@ -4612,7 +4612,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4814,7 +4814,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4921,7 +4921,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5003,7 +5003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5090,7 +5090,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5222,7 +5222,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5379,7 +5379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5496,7 +5496,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5693,7 +5693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R7ZI.json b/data/chips/STM32L4R7ZI.json index 9ed7796..ddf30d9 100644 --- a/data/chips/STM32L4R7ZI.json +++ b/data/chips/STM32L4R7ZI.json @@ -5386,7 +5386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5588,7 +5588,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5720,7 +5720,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5802,7 +5802,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5889,7 +5889,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6021,7 +6021,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6178,7 +6178,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6295,7 +6295,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6517,7 +6517,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9AG.json b/data/chips/STM32L4R9AG.json index 89200e2..6914f1d 100644 --- a/data/chips/STM32L4R9AG.json +++ b/data/chips/STM32L4R9AG.json @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6055,7 +6055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6137,7 +6137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6224,7 +6224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6356,7 +6356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6513,7 +6513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6630,7 +6630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6847,7 +6847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9AI.json b/data/chips/STM32L4R9AI.json index 76e51ad..37d57a4 100644 --- a/data/chips/STM32L4R9AI.json +++ b/data/chips/STM32L4R9AI.json @@ -5726,7 +5726,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5928,7 +5928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6055,7 +6055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6137,7 +6137,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6224,7 +6224,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6356,7 +6356,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6513,7 +6513,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6630,7 +6630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6847,7 +6847,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9VG.json b/data/chips/STM32L4R9VG.json index cf3bc9e..537d456 100644 --- a/data/chips/STM32L4R9VG.json +++ b/data/chips/STM32L4R9VG.json @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4741,7 +4741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4925,7 +4925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5139,7 +5139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5296,7 +5296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5398,7 +5398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9VI.json b/data/chips/STM32L4R9VI.json index e7a586f..4adf7e8 100644 --- a/data/chips/STM32L4R9VI.json +++ b/data/chips/STM32L4R9VI.json @@ -4539,7 +4539,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4741,7 +4741,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4848,7 +4848,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4925,7 +4925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5007,7 +5007,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5139,7 +5139,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5296,7 +5296,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5398,7 +5398,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5595,7 +5595,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9ZG.json b/data/chips/STM32L4R9ZG.json index 849c226..33288d6 100644 --- a/data/chips/STM32L4R9ZG.json +++ b/data/chips/STM32L4R9ZG.json @@ -7169,7 +7169,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7371,7 +7371,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7503,7 +7503,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7585,7 +7585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7672,7 +7672,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7804,7 +7804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7961,7 +7961,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8078,7 +8078,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8300,7 +8300,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4R9ZI.json b/data/chips/STM32L4R9ZI.json index de0107c..f4e4049 100644 --- a/data/chips/STM32L4R9ZI.json +++ b/data/chips/STM32L4R9ZI.json @@ -8045,7 +8045,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8247,7 +8247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8379,7 +8379,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8461,7 +8461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8548,7 +8548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8680,7 +8680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8837,7 +8837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8954,7 +8954,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9176,7 +9176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5AI.json b/data/chips/STM32L4S5AI.json index b7efc0e..18474fc 100644 --- a/data/chips/STM32L4S5AI.json +++ b/data/chips/STM32L4S5AI.json @@ -5557,7 +5557,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5759,7 +5759,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5886,7 +5886,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5968,7 +5968,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6055,7 +6055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6187,7 +6187,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6344,7 +6344,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6678,7 +6678,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5QI.json b/data/chips/STM32L4S5QI.json index b32a3c1..484deb6 100644 --- a/data/chips/STM32L4S5QI.json +++ b/data/chips/STM32L4S5QI.json @@ -5080,7 +5080,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5404,7 +5404,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5486,7 +5486,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5573,7 +5573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5705,7 +5705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5862,7 +5862,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5979,7 +5979,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6176,7 +6176,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5VI.json b/data/chips/STM32L4S5VI.json index db2c78f..ae7c127 100644 --- a/data/chips/STM32L4S5VI.json +++ b/data/chips/STM32L4S5VI.json @@ -4478,7 +4478,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4680,7 +4680,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4787,7 +4787,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4869,7 +4869,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4956,7 +4956,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5088,7 +5088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5245,7 +5245,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5362,7 +5362,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5559,7 +5559,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S5ZI.json b/data/chips/STM32L4S5ZI.json index 9b7695d..dc941b8 100644 --- a/data/chips/STM32L4S5ZI.json +++ b/data/chips/STM32L4S5ZI.json @@ -6082,7 +6082,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6284,7 +6284,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6416,7 +6416,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6498,7 +6498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6585,7 +6585,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6717,7 +6717,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6874,7 +6874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6991,7 +6991,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7213,7 +7213,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7AI.json b/data/chips/STM32L4S7AI.json index cb7631e..030e802 100644 --- a/data/chips/STM32L4S7AI.json +++ b/data/chips/STM32L4S7AI.json @@ -5812,7 +5812,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6014,7 +6014,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6141,7 +6141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6223,7 +6223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6310,7 +6310,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6442,7 +6442,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6599,7 +6599,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6716,7 +6716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6933,7 +6933,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7VI.json b/data/chips/STM32L4S7VI.json index a04e1b1..4da913c 100644 --- a/data/chips/STM32L4S7VI.json +++ b/data/chips/STM32L4S7VI.json @@ -4693,7 +4693,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4895,7 +4895,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5002,7 +5002,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5084,7 +5084,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5171,7 +5171,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5303,7 +5303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5460,7 +5460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5577,7 +5577,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5774,7 +5774,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S7ZI.json b/data/chips/STM32L4S7ZI.json index f1e7fdf..f56c96c 100644 --- a/data/chips/STM32L4S7ZI.json +++ b/data/chips/STM32L4S7ZI.json @@ -5467,7 +5467,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5669,7 +5669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5801,7 +5801,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5883,7 +5883,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5970,7 +5970,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6102,7 +6102,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6259,7 +6259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6376,7 +6376,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6598,7 +6598,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9AI.json b/data/chips/STM32L4S9AI.json index b72dfc0..98651cf 100644 --- a/data/chips/STM32L4S9AI.json +++ b/data/chips/STM32L4S9AI.json @@ -5807,7 +5807,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6009,7 +6009,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6136,7 +6136,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6218,7 +6218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6305,7 +6305,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6437,7 +6437,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6594,7 +6594,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6711,7 +6711,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6928,7 +6928,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9VI.json b/data/chips/STM32L4S9VI.json index 8addf72..d4ce2e2 100644 --- a/data/chips/STM32L4S9VI.json +++ b/data/chips/STM32L4S9VI.json @@ -4620,7 +4620,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4822,7 +4822,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5006,7 +5006,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5088,7 +5088,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5220,7 +5220,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5377,7 +5377,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5479,7 +5479,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5676,7 +5676,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L4S9ZI.json b/data/chips/STM32L4S9ZI.json index 208d08a..f218685 100644 --- a/data/chips/STM32L4S9ZI.json +++ b/data/chips/STM32L4S9ZI.json @@ -7250,7 +7250,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7452,7 +7452,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7584,7 +7584,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7666,7 +7666,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7753,7 +7753,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7885,7 +7885,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8042,7 +8042,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -8159,7 +8159,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8381,7 +8381,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552CC.json b/data/chips/STM32L552CC.json index 19cb49a..f481e2f 100644 --- a/data/chips/STM32L552CC.json +++ b/data/chips/STM32L552CC.json @@ -3124,7 +3124,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3276,7 +3276,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3383,7 +3383,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3460,7 +3460,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3542,7 +3542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3674,7 +3674,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3781,7 +3781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3873,7 +3873,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4070,7 +4070,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552CE.json b/data/chips/STM32L552CE.json index 595f1a9..a492f29 100644 --- a/data/chips/STM32L552CE.json +++ b/data/chips/STM32L552CE.json @@ -3712,7 +3712,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3864,7 +3864,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3971,7 +3971,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4048,7 +4048,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4130,7 +4130,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4262,7 +4262,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4461,7 +4461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4658,7 +4658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ME.json b/data/chips/STM32L552ME.json index d901e45..747249c 100644 --- a/data/chips/STM32L552ME.json +++ b/data/chips/STM32L552ME.json @@ -3953,7 +3953,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4125,7 +4125,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4247,7 +4247,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4324,7 +4324,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4538,7 +4538,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4670,7 +4670,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4762,7 +4762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4959,7 +4959,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552QC.json b/data/chips/STM32L552QC.json index e0294e7..a62e981 100644 --- a/data/chips/STM32L552QC.json +++ b/data/chips/STM32L552QC.json @@ -4560,7 +4560,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4762,7 +4762,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4884,7 +4884,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4966,7 +4966,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5053,7 +5053,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5185,7 +5185,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5342,7 +5342,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5459,7 +5459,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5656,7 +5656,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552QE.json b/data/chips/STM32L552QE.json index 95fa4a0..e7d9de1 100644 --- a/data/chips/STM32L552QE.json +++ b/data/chips/STM32L552QE.json @@ -6156,7 +6156,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6358,7 +6358,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6480,7 +6480,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6562,7 +6562,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6649,7 +6649,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6781,7 +6781,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6938,7 +6938,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7055,7 +7055,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7252,7 +7252,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552RC.json b/data/chips/STM32L552RC.json index 1c49634..ea85177 100644 --- a/data/chips/STM32L552RC.json +++ b/data/chips/STM32L552RC.json @@ -3278,7 +3278,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3430,7 +3430,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3537,7 +3537,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3614,7 +3614,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3696,7 +3696,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3828,7 +3828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3960,7 +3960,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4052,7 +4052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4249,7 +4249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552RE.json b/data/chips/STM32L552RE.json index 3070bd8..4786924 100644 --- a/data/chips/STM32L552RE.json +++ b/data/chips/STM32L552RE.json @@ -4058,7 +4058,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4210,7 +4210,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4317,7 +4317,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4394,7 +4394,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4476,7 +4476,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4608,7 +4608,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4740,7 +4740,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4832,7 +4832,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5029,7 +5029,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552VC.json b/data/chips/STM32L552VC.json index e1a6642..274a7c1 100644 --- a/data/chips/STM32L552VC.json +++ b/data/chips/STM32L552VC.json @@ -4028,7 +4028,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4230,7 +4230,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4337,7 +4337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4419,7 +4419,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4506,7 +4506,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4638,7 +4638,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4795,7 +4795,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4912,7 +4912,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552VE.json b/data/chips/STM32L552VE.json index f767c3f..2835d09 100644 --- a/data/chips/STM32L552VE.json +++ b/data/chips/STM32L552VE.json @@ -4634,7 +4634,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4836,7 +4836,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4943,7 +4943,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5025,7 +5025,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5112,7 +5112,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5244,7 +5244,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5401,7 +5401,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5518,7 +5518,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5715,7 +5715,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ZC.json b/data/chips/STM32L552ZC.json index ade083c..3ea2916 100644 --- a/data/chips/STM32L552ZC.json +++ b/data/chips/STM32L552ZC.json @@ -4706,7 +4706,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4908,7 +4908,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5040,7 +5040,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5122,7 +5122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5209,7 +5209,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5341,7 +5341,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5498,7 +5498,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5615,7 +5615,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5837,7 +5837,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L552ZE.json b/data/chips/STM32L552ZE.json index 926be0a..1a0f8ae 100644 --- a/data/chips/STM32L552ZE.json +++ b/data/chips/STM32L552ZE.json @@ -5576,7 +5576,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5778,7 +5778,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5910,7 +5910,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5992,7 +5992,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6079,7 +6079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6211,7 +6211,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6368,7 +6368,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6485,7 +6485,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6707,7 +6707,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562CE.json b/data/chips/STM32L562CE.json index b46dbb6..88f04ec 100644 --- a/data/chips/STM32L562CE.json +++ b/data/chips/STM32L562CE.json @@ -3805,7 +3805,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3957,7 +3957,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4064,7 +4064,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4141,7 +4141,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4223,7 +4223,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4355,7 +4355,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4462,7 +4462,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4554,7 +4554,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4751,7 +4751,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562ME.json b/data/chips/STM32L562ME.json index 309391b..2233688 100644 --- a/data/chips/STM32L562ME.json +++ b/data/chips/STM32L562ME.json @@ -4046,7 +4046,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4218,7 +4218,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4340,7 +4340,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4417,7 +4417,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4499,7 +4499,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4631,7 +4631,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4763,7 +4763,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4855,7 +4855,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5052,7 +5052,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562QE.json b/data/chips/STM32L562QE.json index 5a020b8..29cca2e 100644 --- a/data/chips/STM32L562QE.json +++ b/data/chips/STM32L562QE.json @@ -6249,7 +6249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6451,7 +6451,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6655,7 +6655,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6742,7 +6742,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6874,7 +6874,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7031,7 +7031,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -7148,7 +7148,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7345,7 +7345,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562RE.json b/data/chips/STM32L562RE.json index a48b24f..b4cb68e 100644 --- a/data/chips/STM32L562RE.json +++ b/data/chips/STM32L562RE.json @@ -4151,7 +4151,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4303,7 +4303,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4410,7 +4410,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4487,7 +4487,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4569,7 +4569,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4701,7 +4701,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4833,7 +4833,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4925,7 +4925,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5122,7 +5122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562VE.json b/data/chips/STM32L562VE.json index 018e7ff..01e9aa8 100644 --- a/data/chips/STM32L562VE.json +++ b/data/chips/STM32L562VE.json @@ -4727,7 +4727,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4929,7 +4929,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5036,7 +5036,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5118,7 +5118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5205,7 +5205,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5337,7 +5337,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5494,7 +5494,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -5611,7 +5611,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5808,7 +5808,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32L562ZE.json b/data/chips/STM32L562ZE.json index abc2d59..a073203 100644 --- a/data/chips/STM32L562ZE.json +++ b/data/chips/STM32L562ZE.json @@ -5669,7 +5669,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5871,7 +5871,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6003,7 +6003,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6085,7 +6085,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6172,7 +6172,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6304,7 +6304,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6461,7 +6461,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -6578,7 +6578,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6800,7 +6800,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U031C6.json b/data/chips/STM32U031C6.json index aba82fb..809dc86 100644 --- a/data/chips/STM32U031C6.json +++ b/data/chips/STM32U031C6.json @@ -2198,7 +2198,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2348,7 +2348,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2458,7 +2458,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2540,7 +2540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2677,7 +2677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031C8.json b/data/chips/STM32U031C8.json index c243951..a908d42 100644 --- a/data/chips/STM32U031C8.json +++ b/data/chips/STM32U031C8.json @@ -2198,7 +2198,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2348,7 +2348,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2458,7 +2458,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2540,7 +2540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2677,7 +2677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F4.json b/data/chips/STM32U031F4.json index 90f919d..118823d 100644 --- a/data/chips/STM32U031F4.json +++ b/data/chips/STM32U031F4.json @@ -1573,7 +1573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1703,7 +1703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1793,7 +1793,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1875,7 +1875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1987,7 +1987,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F6.json b/data/chips/STM32U031F6.json index a492d9b..371e5ac 100644 --- a/data/chips/STM32U031F6.json +++ b/data/chips/STM32U031F6.json @@ -1573,7 +1573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1703,7 +1703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1793,7 +1793,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1875,7 +1875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1987,7 +1987,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031F8.json b/data/chips/STM32U031F8.json index 67b96ae..33d8753 100644 --- a/data/chips/STM32U031F8.json +++ b/data/chips/STM32U031F8.json @@ -1573,7 +1573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1703,7 +1703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1793,7 +1793,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1875,7 +1875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1987,7 +1987,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031G6.json b/data/chips/STM32U031G6.json index fe2b6f0..c401935 100644 --- a/data/chips/STM32U031G6.json +++ b/data/chips/STM32U031G6.json @@ -1550,7 +1550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1680,7 +1680,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1770,7 +1770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1847,7 +1847,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1959,7 +1959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031G8.json b/data/chips/STM32U031G8.json index 827fb18..7cf8525 100644 --- a/data/chips/STM32U031G8.json +++ b/data/chips/STM32U031G8.json @@ -1550,7 +1550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1680,7 +1680,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1770,7 +1770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1847,7 +1847,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1959,7 +1959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K4.json b/data/chips/STM32U031K4.json index 842e308..7839ae6 100644 --- a/data/chips/STM32U031K4.json +++ b/data/chips/STM32U031K4.json @@ -1625,7 +1625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1755,7 +1755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1922,7 +1922,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K6.json b/data/chips/STM32U031K6.json index d038757..f25783a 100644 --- a/data/chips/STM32U031K6.json +++ b/data/chips/STM32U031K6.json @@ -1625,7 +1625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1755,7 +1755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1922,7 +1922,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031K8.json b/data/chips/STM32U031K8.json index fffe76d..d49ba8a 100644 --- a/data/chips/STM32U031K8.json +++ b/data/chips/STM32U031K8.json @@ -1625,7 +1625,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1755,7 +1755,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1845,7 +1845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -1922,7 +1922,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2049,7 +2049,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031R6.json b/data/chips/STM32U031R6.json index e2f278d..1879251 100644 --- a/data/chips/STM32U031R6.json +++ b/data/chips/STM32U031R6.json @@ -2524,7 +2524,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2674,7 +2674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2784,7 +2784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2866,7 +2866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3003,7 +3003,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U031R8.json b/data/chips/STM32U031R8.json index de770ad..5cd23a1 100644 --- a/data/chips/STM32U031R8.json +++ b/data/chips/STM32U031R8.json @@ -2524,7 +2524,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2674,7 +2674,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2784,7 +2784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2866,7 +2866,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3003,7 +3003,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073C8.json b/data/chips/STM32U073C8.json index 4e08e00..9faa029 100644 --- a/data/chips/STM32U073C8.json +++ b/data/chips/STM32U073C8.json @@ -2869,7 +2869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3348,7 +3348,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073CB.json b/data/chips/STM32U073CB.json index 9809856..78a75a5 100644 --- a/data/chips/STM32U073CB.json +++ b/data/chips/STM32U073CB.json @@ -2869,7 +2869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3348,7 +3348,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073CC.json b/data/chips/STM32U073CC.json index 1d6f2a2..f002b60 100644 --- a/data/chips/STM32U073CC.json +++ b/data/chips/STM32U073CC.json @@ -2869,7 +2869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3019,7 +3019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3129,7 +3129,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3211,7 +3211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3348,7 +3348,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073H8.json b/data/chips/STM32U073H8.json index 53aacae..e4cd0de 100644 --- a/data/chips/STM32U073H8.json +++ b/data/chips/STM32U073H8.json @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073HB.json b/data/chips/STM32U073HB.json index 29e66fa..796e255 100644 --- a/data/chips/STM32U073HB.json +++ b/data/chips/STM32U073HB.json @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073HC.json b/data/chips/STM32U073HC.json index e9190d0..b900a2c 100644 --- a/data/chips/STM32U073HC.json +++ b/data/chips/STM32U073HC.json @@ -2391,7 +2391,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2521,7 +2521,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2611,7 +2611,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2693,7 +2693,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2825,7 +2825,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073K8.json b/data/chips/STM32U073K8.json index e62046a..a3661ad 100644 --- a/data/chips/STM32U073K8.json +++ b/data/chips/STM32U073K8.json @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073KB.json b/data/chips/STM32U073KB.json index 9aeb869..bce10dc 100644 --- a/data/chips/STM32U073KB.json +++ b/data/chips/STM32U073KB.json @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073KC.json b/data/chips/STM32U073KC.json index e11268e..01ec7ad 100644 --- a/data/chips/STM32U073KC.json +++ b/data/chips/STM32U073KC.json @@ -2211,7 +2211,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2341,7 +2341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2431,7 +2431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2508,7 +2508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2635,7 +2635,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073M8.json b/data/chips/STM32U073M8.json index f7d75d3..9ffe104 100644 --- a/data/chips/STM32U073M8.json +++ b/data/chips/STM32U073M8.json @@ -3767,7 +3767,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4042,7 +4042,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4124,7 +4124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073MB.json b/data/chips/STM32U073MB.json index f4aed3c..ba799f5 100644 --- a/data/chips/STM32U073MB.json +++ b/data/chips/STM32U073MB.json @@ -3767,7 +3767,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4042,7 +4042,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4124,7 +4124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073MC.json b/data/chips/STM32U073MC.json index be90dfb..aa4c21b 100644 --- a/data/chips/STM32U073MC.json +++ b/data/chips/STM32U073MC.json @@ -3767,7 +3767,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3932,7 +3932,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4042,7 +4042,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4124,7 +4124,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4261,7 +4261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073R8.json b/data/chips/STM32U073R8.json index baa2e3f..2734125 100644 --- a/data/chips/STM32U073R8.json +++ b/data/chips/STM32U073R8.json @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3650,7 +3650,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3732,7 +3732,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3869,7 +3869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073RB.json b/data/chips/STM32U073RB.json index 57b2180..bc3359f 100644 --- a/data/chips/STM32U073RB.json +++ b/data/chips/STM32U073RB.json @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3650,7 +3650,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3732,7 +3732,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3869,7 +3869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U073RC.json b/data/chips/STM32U073RC.json index 79d7895..736a230 100644 --- a/data/chips/STM32U073RC.json +++ b/data/chips/STM32U073RC.json @@ -3390,7 +3390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3540,7 +3540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3650,7 +3650,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3732,7 +3732,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3869,7 +3869,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083CC.json b/data/chips/STM32U083CC.json index 1f5881b..fbc05df 100644 --- a/data/chips/STM32U083CC.json +++ b/data/chips/STM32U083CC.json @@ -2902,7 +2902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3052,7 +3052,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3162,7 +3162,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3244,7 +3244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3381,7 +3381,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083HC.json b/data/chips/STM32U083HC.json index 803a354..627f8c7 100644 --- a/data/chips/STM32U083HC.json +++ b/data/chips/STM32U083HC.json @@ -2424,7 +2424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2554,7 +2554,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2644,7 +2644,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2726,7 +2726,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2858,7 +2858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083KC.json b/data/chips/STM32U083KC.json index b654a13..14a8bf8 100644 --- a/data/chips/STM32U083KC.json +++ b/data/chips/STM32U083KC.json @@ -2244,7 +2244,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2374,7 +2374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2464,7 +2464,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -2541,7 +2541,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2668,7 +2668,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083MC.json b/data/chips/STM32U083MC.json index 3225c48..346ad72 100644 --- a/data/chips/STM32U083MC.json +++ b/data/chips/STM32U083MC.json @@ -3800,7 +3800,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3965,7 +3965,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4075,7 +4075,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -4157,7 +4157,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4294,7 +4294,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U083RC.json b/data/chips/STM32U083RC.json index d4ec8f4..e434170 100644 --- a/data/chips/STM32U083RC.json +++ b/data/chips/STM32U083RC.json @@ -3423,7 +3423,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3573,7 +3573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3683,7 +3683,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK1", @@ -3765,7 +3765,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3902,7 +3902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32U535CB.json b/data/chips/STM32U535CB.json index 4656296..2fe53a5 100644 --- a/data/chips/STM32U535CB.json +++ b/data/chips/STM32U535CB.json @@ -3910,7 +3910,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4062,7 +4062,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4169,7 +4169,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4246,7 +4246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4455,7 +4455,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4562,7 +4562,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4654,7 +4654,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4851,7 +4851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535CC.json b/data/chips/STM32U535CC.json index c7800ee..e12e140 100644 --- a/data/chips/STM32U535CC.json +++ b/data/chips/STM32U535CC.json @@ -3910,7 +3910,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4062,7 +4062,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4169,7 +4169,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4246,7 +4246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4455,7 +4455,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4562,7 +4562,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4654,7 +4654,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4851,7 +4851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535CE.json b/data/chips/STM32U535CE.json index 9f9cceb..ca11d30 100644 --- a/data/chips/STM32U535CE.json +++ b/data/chips/STM32U535CE.json @@ -3910,7 +3910,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4062,7 +4062,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4169,7 +4169,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4246,7 +4246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4328,7 +4328,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4455,7 +4455,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4562,7 +4562,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4654,7 +4654,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4851,7 +4851,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535JE.json b/data/chips/STM32U535JE.json index df81b5b..317d559 100644 --- a/data/chips/STM32U535JE.json +++ b/data/chips/STM32U535JE.json @@ -3335,7 +3335,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3482,7 +3482,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3599,7 +3599,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3676,7 +3676,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3753,7 +3753,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3880,7 +3880,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3987,7 +3987,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4074,7 +4074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4271,7 +4271,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535NC.json b/data/chips/STM32U535NC.json index 238c81f..a9cffae 100644 --- a/data/chips/STM32U535NC.json +++ b/data/chips/STM32U535NC.json @@ -3094,7 +3094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3246,7 +3246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3353,7 +3353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3430,7 +3430,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3512,7 +3512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3634,7 +3634,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3756,7 +3756,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3848,7 +3848,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4045,7 +4045,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535NE.json b/data/chips/STM32U535NE.json index fcc4421..34f0cd7 100644 --- a/data/chips/STM32U535NE.json +++ b/data/chips/STM32U535NE.json @@ -3094,7 +3094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3246,7 +3246,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3353,7 +3353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3430,7 +3430,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3512,7 +3512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3634,7 +3634,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3756,7 +3756,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3848,7 +3848,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4045,7 +4045,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RB.json b/data/chips/STM32U535RB.json index fd1ad6a..9f0c606 100644 --- a/data/chips/STM32U535RB.json +++ b/data/chips/STM32U535RB.json @@ -4671,7 +4671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4828,7 +4828,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4935,7 +4935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5012,7 +5012,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5094,7 +5094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5353,7 +5353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5445,7 +5445,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5642,7 +5642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RC.json b/data/chips/STM32U535RC.json index caaf0a6..05dae86 100644 --- a/data/chips/STM32U535RC.json +++ b/data/chips/STM32U535RC.json @@ -4671,7 +4671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4828,7 +4828,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4935,7 +4935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5012,7 +5012,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5094,7 +5094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5353,7 +5353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5445,7 +5445,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5642,7 +5642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535RE.json b/data/chips/STM32U535RE.json index 3f1dd0a..ca8e131 100644 --- a/data/chips/STM32U535RE.json +++ b/data/chips/STM32U535RE.json @@ -4671,7 +4671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4828,7 +4828,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4935,7 +4935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5012,7 +5012,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5094,7 +5094,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5221,7 +5221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5353,7 +5353,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5445,7 +5445,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5642,7 +5642,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535VC.json b/data/chips/STM32U535VC.json index f22e535..e6672e7 100644 --- a/data/chips/STM32U535VC.json +++ b/data/chips/STM32U535VC.json @@ -6282,7 +6282,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6494,7 +6494,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6601,7 +6601,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6683,7 +6683,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6770,7 +6770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7059,7 +7059,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7176,7 +7176,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7373,7 +7373,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U535VE.json b/data/chips/STM32U535VE.json index 741b0f6..bea70df 100644 --- a/data/chips/STM32U535VE.json +++ b/data/chips/STM32U535VE.json @@ -6282,7 +6282,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6494,7 +6494,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6601,7 +6601,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6683,7 +6683,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6770,7 +6770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6902,7 +6902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7059,7 +7059,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7176,7 +7176,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7373,7 +7373,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545CE.json b/data/chips/STM32U545CE.json index 4f42cb8..3b3c780 100644 --- a/data/chips/STM32U545CE.json +++ b/data/chips/STM32U545CE.json @@ -4045,7 +4045,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4197,7 +4197,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4304,7 +4304,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4381,7 +4381,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4463,7 +4463,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4590,7 +4590,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4697,7 +4697,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4789,7 +4789,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4986,7 +4986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545JE.json b/data/chips/STM32U545JE.json index d3907c0..45e083c 100644 --- a/data/chips/STM32U545JE.json +++ b/data/chips/STM32U545JE.json @@ -3470,7 +3470,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3617,7 +3617,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3734,7 +3734,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3811,7 +3811,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3888,7 +3888,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4015,7 +4015,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4122,7 +4122,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4209,7 +4209,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4406,7 +4406,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545NE.json b/data/chips/STM32U545NE.json index 372aca5..fd953cf 100644 --- a/data/chips/STM32U545NE.json +++ b/data/chips/STM32U545NE.json @@ -3229,7 +3229,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3381,7 +3381,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3488,7 +3488,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3565,7 +3565,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3647,7 +3647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3769,7 +3769,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3891,7 +3891,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -3983,7 +3983,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4180,7 +4180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545RE.json b/data/chips/STM32U545RE.json index 1a710e8..422e027 100644 --- a/data/chips/STM32U545RE.json +++ b/data/chips/STM32U545RE.json @@ -4806,7 +4806,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4963,7 +4963,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5070,7 +5070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5147,7 +5147,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5229,7 +5229,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5356,7 +5356,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5488,7 +5488,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5580,7 +5580,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5777,7 +5777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U545VE.json b/data/chips/STM32U545VE.json index 1fe5a23..a4a86be 100644 --- a/data/chips/STM32U545VE.json +++ b/data/chips/STM32U545VE.json @@ -6417,7 +6417,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6629,7 +6629,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6736,7 +6736,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6818,7 +6818,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6905,7 +6905,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7037,7 +7037,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7194,7 +7194,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7311,7 +7311,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7508,7 +7508,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575AG.json b/data/chips/STM32U575AG.json index db4fbc8..a828a02 100644 --- a/data/chips/STM32U575AG.json +++ b/data/chips/STM32U575AG.json @@ -7979,7 +7979,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8191,7 +8191,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8323,7 +8323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8405,7 +8405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8492,7 +8492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8624,7 +8624,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8781,7 +8781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8898,7 +8898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9140,7 +9140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575AI.json b/data/chips/STM32U575AI.json index 0960179..31f891d 100644 --- a/data/chips/STM32U575AI.json +++ b/data/chips/STM32U575AI.json @@ -7979,7 +7979,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8191,7 +8191,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8323,7 +8323,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8405,7 +8405,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8492,7 +8492,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8624,7 +8624,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8781,7 +8781,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8898,7 +8898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9140,7 +9140,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575CG.json b/data/chips/STM32U575CG.json index 32e5eba..e69060b 100644 --- a/data/chips/STM32U575CG.json +++ b/data/chips/STM32U575CG.json @@ -4509,7 +4509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4661,7 +4661,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4845,7 +4845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4927,7 +4927,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5054,7 +5054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5161,7 +5161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5253,7 +5253,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5450,7 +5450,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575CI.json b/data/chips/STM32U575CI.json index 68defc3..bdbd3b5 100644 --- a/data/chips/STM32U575CI.json +++ b/data/chips/STM32U575CI.json @@ -4509,7 +4509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4661,7 +4661,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4768,7 +4768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4845,7 +4845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4927,7 +4927,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5054,7 +5054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5161,7 +5161,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5253,7 +5253,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5450,7 +5450,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575OG.json b/data/chips/STM32U575OG.json index 043e19b..b35dc7b 100644 --- a/data/chips/STM32U575OG.json +++ b/data/chips/STM32U575OG.json @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5220,7 +5220,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5337,7 +5337,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5414,7 +5414,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5496,7 +5496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5623,7 +5623,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5775,7 +5775,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5877,7 +5877,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6074,7 +6074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575OI.json b/data/chips/STM32U575OI.json index 79fd6f7..1a97e06 100644 --- a/data/chips/STM32U575OI.json +++ b/data/chips/STM32U575OI.json @@ -5048,7 +5048,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5220,7 +5220,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5337,7 +5337,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5414,7 +5414,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5496,7 +5496,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5623,7 +5623,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5775,7 +5775,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5877,7 +5877,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6074,7 +6074,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575QG.json b/data/chips/STM32U575QG.json index e6c34d7..6fb1050 100644 --- a/data/chips/STM32U575QG.json +++ b/data/chips/STM32U575QG.json @@ -7095,7 +7095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7307,7 +7307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7429,7 +7429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7511,7 +7511,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7598,7 +7598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7730,7 +7730,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7887,7 +7887,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8004,7 +8004,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8201,7 +8201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575QI.json b/data/chips/STM32U575QI.json index 462d922..5c6becd 100644 --- a/data/chips/STM32U575QI.json +++ b/data/chips/STM32U575QI.json @@ -7095,7 +7095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7307,7 +7307,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7429,7 +7429,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7511,7 +7511,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7598,7 +7598,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7730,7 +7730,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7887,7 +7887,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8004,7 +8004,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8201,7 +8201,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575RG.json b/data/chips/STM32U575RG.json index d67aa3b..d7d9bfd 100644 --- a/data/chips/STM32U575RG.json +++ b/data/chips/STM32U575RG.json @@ -4845,7 +4845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5002,7 +5002,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5186,7 +5186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5268,7 +5268,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5395,7 +5395,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5527,7 +5527,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5619,7 +5619,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5816,7 +5816,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575RI.json b/data/chips/STM32U575RI.json index b59a002..114d1aa 100644 --- a/data/chips/STM32U575RI.json +++ b/data/chips/STM32U575RI.json @@ -4845,7 +4845,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5002,7 +5002,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5109,7 +5109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5186,7 +5186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5268,7 +5268,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5395,7 +5395,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5527,7 +5527,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5619,7 +5619,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5816,7 +5816,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575VG.json b/data/chips/STM32U575VG.json index 87ce54b..e10d1b8 100644 --- a/data/chips/STM32U575VG.json +++ b/data/chips/STM32U575VG.json @@ -6221,7 +6221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6433,7 +6433,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6540,7 +6540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6622,7 +6622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6709,7 +6709,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6841,7 +6841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6998,7 +6998,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7115,7 +7115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7312,7 +7312,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575VI.json b/data/chips/STM32U575VI.json index dac5889..7d1f72d 100644 --- a/data/chips/STM32U575VI.json +++ b/data/chips/STM32U575VI.json @@ -6221,7 +6221,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6433,7 +6433,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6540,7 +6540,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6622,7 +6622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6709,7 +6709,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6841,7 +6841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6998,7 +6998,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7115,7 +7115,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7312,7 +7312,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575ZG.json b/data/chips/STM32U575ZG.json index 0358ef8..2c9a1b1 100644 --- a/data/chips/STM32U575ZG.json +++ b/data/chips/STM32U575ZG.json @@ -7344,7 +7344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7556,7 +7556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7688,7 +7688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7770,7 +7770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7857,7 +7857,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7989,7 +7989,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8146,7 +8146,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8263,7 +8263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8485,7 +8485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U575ZI.json b/data/chips/STM32U575ZI.json index 60f7982..83e817f 100644 --- a/data/chips/STM32U575ZI.json +++ b/data/chips/STM32U575ZI.json @@ -7344,7 +7344,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7556,7 +7556,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7688,7 +7688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7770,7 +7770,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7857,7 +7857,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7989,7 +7989,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8146,7 +8146,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8263,7 +8263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8485,7 +8485,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585AI.json b/data/chips/STM32U585AI.json index e58baf5..b16d6b6 100644 --- a/data/chips/STM32U585AI.json +++ b/data/chips/STM32U585AI.json @@ -8147,7 +8147,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8359,7 +8359,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8491,7 +8491,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8573,7 +8573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8660,7 +8660,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8792,7 +8792,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8949,7 +8949,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9066,7 +9066,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9308,7 +9308,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585CI.json b/data/chips/STM32U585CI.json index 3fb97a0..a445445 100644 --- a/data/chips/STM32U585CI.json +++ b/data/chips/STM32U585CI.json @@ -4677,7 +4677,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4829,7 +4829,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4936,7 +4936,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5013,7 +5013,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5095,7 +5095,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5222,7 +5222,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5329,7 +5329,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5421,7 +5421,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5618,7 +5618,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585OI.json b/data/chips/STM32U585OI.json index 6d218e1..f6a3325 100644 --- a/data/chips/STM32U585OI.json +++ b/data/chips/STM32U585OI.json @@ -5216,7 +5216,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5388,7 +5388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5505,7 +5505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5582,7 +5582,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5664,7 +5664,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5791,7 +5791,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5943,7 +5943,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6045,7 +6045,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6242,7 +6242,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585QI.json b/data/chips/STM32U585QI.json index d49eb9a..9fdd5ef 100644 --- a/data/chips/STM32U585QI.json +++ b/data/chips/STM32U585QI.json @@ -7263,7 +7263,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7475,7 +7475,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7597,7 +7597,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7679,7 +7679,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7766,7 +7766,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7898,7 +7898,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8055,7 +8055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8172,7 +8172,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8369,7 +8369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585RI.json b/data/chips/STM32U585RI.json index cec49f9..ff7fc5a 100644 --- a/data/chips/STM32U585RI.json +++ b/data/chips/STM32U585RI.json @@ -5013,7 +5013,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5170,7 +5170,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5277,7 +5277,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5354,7 +5354,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5436,7 +5436,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5563,7 +5563,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5695,7 +5695,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5787,7 +5787,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5984,7 +5984,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585VI.json b/data/chips/STM32U585VI.json index e6859c7..c1b7e6e 100644 --- a/data/chips/STM32U585VI.json +++ b/data/chips/STM32U585VI.json @@ -6389,7 +6389,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6601,7 +6601,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6708,7 +6708,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6790,7 +6790,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6877,7 +6877,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7009,7 +7009,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7166,7 +7166,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7283,7 +7283,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7480,7 +7480,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U585ZI.json b/data/chips/STM32U585ZI.json index 9f1a049..eaef0cb 100644 --- a/data/chips/STM32U585ZI.json +++ b/data/chips/STM32U585ZI.json @@ -7512,7 +7512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7724,7 +7724,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7856,7 +7856,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7938,7 +7938,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8025,7 +8025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8157,7 +8157,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8314,7 +8314,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8431,7 +8431,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8653,7 +8653,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595AI.json b/data/chips/STM32U595AI.json index 60ee02b..9493078 100644 --- a/data/chips/STM32U595AI.json +++ b/data/chips/STM32U595AI.json @@ -7901,7 +7901,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8113,7 +8113,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8245,7 +8245,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8327,7 +8327,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8414,7 +8414,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8546,7 +8546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8703,7 +8703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8820,7 +8820,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9062,7 +9062,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595AJ.json b/data/chips/STM32U595AJ.json index 2beef65..454389f 100644 --- a/data/chips/STM32U595AJ.json +++ b/data/chips/STM32U595AJ.json @@ -7901,7 +7901,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8113,7 +8113,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8245,7 +8245,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8327,7 +8327,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8414,7 +8414,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8546,7 +8546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8703,7 +8703,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8820,7 +8820,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9062,7 +9062,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595QI.json b/data/chips/STM32U595QI.json index 611ead5..ee3ba1b 100644 --- a/data/chips/STM32U595QI.json +++ b/data/chips/STM32U595QI.json @@ -7002,7 +7002,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7214,7 +7214,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7336,7 +7336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7418,7 +7418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7505,7 +7505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7637,7 +7637,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7794,7 +7794,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7911,7 +7911,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8108,7 +8108,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595QJ.json b/data/chips/STM32U595QJ.json index 73c86cd..90b353c 100644 --- a/data/chips/STM32U595QJ.json +++ b/data/chips/STM32U595QJ.json @@ -7002,7 +7002,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7214,7 +7214,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7336,7 +7336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7418,7 +7418,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7505,7 +7505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7637,7 +7637,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7794,7 +7794,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7911,7 +7911,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8108,7 +8108,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595RI.json b/data/chips/STM32U595RI.json index 1723dd6..02d0f04 100644 --- a/data/chips/STM32U595RI.json +++ b/data/chips/STM32U595RI.json @@ -4600,7 +4600,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4757,7 +4757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4864,7 +4864,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4941,7 +4941,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5023,7 +5023,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5150,7 +5150,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5571,7 +5571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595RJ.json b/data/chips/STM32U595RJ.json index 1baf68d..d073025 100644 --- a/data/chips/STM32U595RJ.json +++ b/data/chips/STM32U595RJ.json @@ -4600,7 +4600,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4757,7 +4757,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4864,7 +4864,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4941,7 +4941,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5023,7 +5023,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5150,7 +5150,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5282,7 +5282,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5374,7 +5374,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5571,7 +5571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595VI.json b/data/chips/STM32U595VI.json index 01abc0b..fb21f94 100644 --- a/data/chips/STM32U595VI.json +++ b/data/chips/STM32U595VI.json @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6305,7 +6305,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6412,7 +6412,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6494,7 +6494,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6581,7 +6581,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6713,7 +6713,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6870,7 +6870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6987,7 +6987,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7184,7 +7184,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595VJ.json b/data/chips/STM32U595VJ.json index 402ffbc..ea85cb2 100644 --- a/data/chips/STM32U595VJ.json +++ b/data/chips/STM32U595VJ.json @@ -6093,7 +6093,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6305,7 +6305,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6412,7 +6412,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6494,7 +6494,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6581,7 +6581,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6713,7 +6713,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6870,7 +6870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6987,7 +6987,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7184,7 +7184,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595ZI.json b/data/chips/STM32U595ZI.json index ac21bc9..a532c29 100644 --- a/data/chips/STM32U595ZI.json +++ b/data/chips/STM32U595ZI.json @@ -8157,7 +8157,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8369,7 +8369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8501,7 +8501,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8583,7 +8583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8670,7 +8670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8802,7 +8802,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8959,7 +8959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9076,7 +9076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9298,7 +9298,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U595ZJ.json b/data/chips/STM32U595ZJ.json index 17a81cc..f4917b4 100644 --- a/data/chips/STM32U595ZJ.json +++ b/data/chips/STM32U595ZJ.json @@ -8157,7 +8157,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8369,7 +8369,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8501,7 +8501,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8583,7 +8583,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8670,7 +8670,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8802,7 +8802,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8959,7 +8959,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9076,7 +9076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9298,7 +9298,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599BJ.json b/data/chips/STM32U599BJ.json index 7a35582..63fd2ce 100644 --- a/data/chips/STM32U599BJ.json +++ b/data/chips/STM32U599BJ.json @@ -7607,7 +7607,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7819,7 +7819,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7951,7 +7951,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8033,7 +8033,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8120,7 +8120,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8252,7 +8252,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8409,7 +8409,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8526,7 +8526,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8768,7 +8768,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599NI.json b/data/chips/STM32U599NI.json index 85c452d..513dc03 100644 --- a/data/chips/STM32U599NI.json +++ b/data/chips/STM32U599NI.json @@ -7680,7 +7680,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7892,7 +7892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8024,7 +8024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8106,7 +8106,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8193,7 +8193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8325,7 +8325,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8482,7 +8482,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8599,7 +8599,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8841,7 +8841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599NJ.json b/data/chips/STM32U599NJ.json index 7afe61b..70155c7 100644 --- a/data/chips/STM32U599NJ.json +++ b/data/chips/STM32U599NJ.json @@ -7680,7 +7680,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7892,7 +7892,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8024,7 +8024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8106,7 +8106,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8193,7 +8193,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8325,7 +8325,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8482,7 +8482,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8599,7 +8599,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8841,7 +8841,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599VI.json b/data/chips/STM32U599VI.json index 56646f7..935cb58 100644 --- a/data/chips/STM32U599VI.json +++ b/data/chips/STM32U599VI.json @@ -5631,7 +5631,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5833,7 +5833,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5935,7 +5935,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6017,7 +6017,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6099,7 +6099,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6231,7 +6231,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6388,7 +6388,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6505,7 +6505,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6702,7 +6702,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599VJ.json b/data/chips/STM32U599VJ.json index 96007b8..6ed5a19 100644 --- a/data/chips/STM32U599VJ.json +++ b/data/chips/STM32U599VJ.json @@ -6361,7 +6361,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6573,7 +6573,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6680,7 +6680,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6762,7 +6762,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6849,7 +6849,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6981,7 +6981,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7138,7 +7138,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7255,7 +7255,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7452,7 +7452,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599ZI.json b/data/chips/STM32U599ZI.json index 073d886..cc0ec15 100644 --- a/data/chips/STM32U599ZI.json +++ b/data/chips/STM32U599ZI.json @@ -7622,7 +7622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7834,7 +7834,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7961,7 +7961,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8043,7 +8043,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8130,7 +8130,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8262,7 +8262,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8419,7 +8419,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8536,7 +8536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8758,7 +8758,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U599ZJ.json b/data/chips/STM32U599ZJ.json index 92605da..2e2411f 100644 --- a/data/chips/STM32U599ZJ.json +++ b/data/chips/STM32U599ZJ.json @@ -7622,7 +7622,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7834,7 +7834,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7961,7 +7961,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8043,7 +8043,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8130,7 +8130,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8262,7 +8262,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8419,7 +8419,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8536,7 +8536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8758,7 +8758,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5AJ.json b/data/chips/STM32U5A5AJ.json index 390a07e..6190638 100644 --- a/data/chips/STM32U5A5AJ.json +++ b/data/chips/STM32U5A5AJ.json @@ -8063,7 +8063,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8275,7 +8275,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8407,7 +8407,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8489,7 +8489,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8576,7 +8576,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8708,7 +8708,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8865,7 +8865,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8982,7 +8982,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9224,7 +9224,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5QI.json b/data/chips/STM32U5A5QI.json index d501d0e..c3e9551 100644 --- a/data/chips/STM32U5A5QI.json +++ b/data/chips/STM32U5A5QI.json @@ -6291,7 +6291,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6503,7 +6503,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6620,7 +6620,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6702,7 +6702,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6789,7 +6789,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6921,7 +6921,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7078,7 +7078,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7195,7 +7195,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7392,7 +7392,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5QJ.json b/data/chips/STM32U5A5QJ.json index c7c33a1..20094ca 100644 --- a/data/chips/STM32U5A5QJ.json +++ b/data/chips/STM32U5A5QJ.json @@ -7164,7 +7164,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7376,7 +7376,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7498,7 +7498,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7580,7 +7580,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7667,7 +7667,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7799,7 +7799,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7956,7 +7956,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8073,7 +8073,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8270,7 +8270,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5RJ.json b/data/chips/STM32U5A5RJ.json index 4a7665f..b0e4767 100644 --- a/data/chips/STM32U5A5RJ.json +++ b/data/chips/STM32U5A5RJ.json @@ -4762,7 +4762,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4919,7 +4919,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5026,7 +5026,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5103,7 +5103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5185,7 +5185,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5312,7 +5312,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5444,7 +5444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5536,7 +5536,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5733,7 +5733,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5VJ.json b/data/chips/STM32U5A5VJ.json index 7481d7c..25c2c5e 100644 --- a/data/chips/STM32U5A5VJ.json +++ b/data/chips/STM32U5A5VJ.json @@ -6255,7 +6255,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6467,7 +6467,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6574,7 +6574,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6656,7 +6656,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6743,7 +6743,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6875,7 +6875,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7032,7 +7032,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7149,7 +7149,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7346,7 +7346,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A5ZJ.json b/data/chips/STM32U5A5ZJ.json index cff3b8b..4d86533 100644 --- a/data/chips/STM32U5A5ZJ.json +++ b/data/chips/STM32U5A5ZJ.json @@ -8319,7 +8319,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8531,7 +8531,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8663,7 +8663,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8745,7 +8745,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8832,7 +8832,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8964,7 +8964,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9121,7 +9121,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9238,7 +9238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9460,7 +9460,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9BJ.json b/data/chips/STM32U5A9BJ.json index 1fba75f..7b50ba6 100644 --- a/data/chips/STM32U5A9BJ.json +++ b/data/chips/STM32U5A9BJ.json @@ -7769,7 +7769,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7981,7 +7981,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8113,7 +8113,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8195,7 +8195,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8282,7 +8282,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8414,7 +8414,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8571,7 +8571,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8688,7 +8688,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8930,7 +8930,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9NJ.json b/data/chips/STM32U5A9NJ.json index f984bfc..f368886 100644 --- a/data/chips/STM32U5A9NJ.json +++ b/data/chips/STM32U5A9NJ.json @@ -7842,7 +7842,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8054,7 +8054,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8186,7 +8186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8268,7 +8268,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8355,7 +8355,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8487,7 +8487,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8644,7 +8644,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8761,7 +8761,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9003,7 +9003,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9VJ.json b/data/chips/STM32U5A9VJ.json index 0358048..18569ef 100644 --- a/data/chips/STM32U5A9VJ.json +++ b/data/chips/STM32U5A9VJ.json @@ -5793,7 +5793,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5995,7 +5995,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6097,7 +6097,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6179,7 +6179,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6261,7 +6261,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6393,7 +6393,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6550,7 +6550,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6667,7 +6667,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6864,7 +6864,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5A9ZJ.json b/data/chips/STM32U5A9ZJ.json index 88e32e9..7c0981c 100644 --- a/data/chips/STM32U5A9ZJ.json +++ b/data/chips/STM32U5A9ZJ.json @@ -7784,7 +7784,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7996,7 +7996,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8123,7 +8123,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8205,7 +8205,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8292,7 +8292,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8424,7 +8424,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8581,7 +8581,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8698,7 +8698,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8920,7 +8920,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F7VI.json b/data/chips/STM32U5F7VI.json index 65434cb..7241db7 100644 --- a/data/chips/STM32U5F7VI.json +++ b/data/chips/STM32U5F7VI.json @@ -6483,7 +6483,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6695,7 +6695,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6802,7 +6802,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6884,7 +6884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6971,7 +6971,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7103,7 +7103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7260,7 +7260,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7377,7 +7377,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7574,7 +7574,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F7VJ.json b/data/chips/STM32U5F7VJ.json index 9886b8f..d72be07 100644 --- a/data/chips/STM32U5F7VJ.json +++ b/data/chips/STM32U5F7VJ.json @@ -6483,7 +6483,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6695,7 +6695,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6802,7 +6802,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6884,7 +6884,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6971,7 +6971,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7103,7 +7103,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7260,7 +7260,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7377,7 +7377,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7574,7 +7574,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9BJ.json b/data/chips/STM32U5F9BJ.json index f3d9770..4c15253 100644 --- a/data/chips/STM32U5F9BJ.json +++ b/data/chips/STM32U5F9BJ.json @@ -7696,7 +7696,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7908,7 +7908,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8040,7 +8040,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8122,7 +8122,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8209,7 +8209,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8341,7 +8341,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8498,7 +8498,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8615,7 +8615,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8857,7 +8857,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9NJ.json b/data/chips/STM32U5F9NJ.json index 4a689e4..61fd224 100644 --- a/data/chips/STM32U5F9NJ.json +++ b/data/chips/STM32U5F9NJ.json @@ -7864,7 +7864,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8076,7 +8076,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8208,7 +8208,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8290,7 +8290,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8377,7 +8377,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8509,7 +8509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8666,7 +8666,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8783,7 +8783,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9025,7 +9025,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9VI.json b/data/chips/STM32U5F9VI.json index 78aa3cf..b437be8 100644 --- a/data/chips/STM32U5F9VI.json +++ b/data/chips/STM32U5F9VI.json @@ -5142,7 +5142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5309,7 +5309,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5411,7 +5411,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5488,7 +5488,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5570,7 +5570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5692,7 +5692,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5804,7 +5804,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5896,7 +5896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6113,7 +6113,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9VJ.json b/data/chips/STM32U5F9VJ.json index f8522e6..017b9a8 100644 --- a/data/chips/STM32U5F9VJ.json +++ b/data/chips/STM32U5F9VJ.json @@ -5142,7 +5142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5309,7 +5309,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5411,7 +5411,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5488,7 +5488,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5570,7 +5570,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5692,7 +5692,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5804,7 +5804,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5896,7 +5896,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6113,7 +6113,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9ZI.json b/data/chips/STM32U5F9ZI.json index 756a247..6f7bee0 100644 --- a/data/chips/STM32U5F9ZI.json +++ b/data/chips/STM32U5F9ZI.json @@ -7411,7 +7411,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7613,7 +7613,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7725,7 +7725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7807,7 +7807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7889,7 +7889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8021,7 +8021,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8178,7 +8178,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8295,7 +8295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8512,7 +8512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5F9ZJ.json b/data/chips/STM32U5F9ZJ.json index 5850a48..ce059ce 100644 --- a/data/chips/STM32U5F9ZJ.json +++ b/data/chips/STM32U5F9ZJ.json @@ -7411,7 +7411,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7613,7 +7613,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7725,7 +7725,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7807,7 +7807,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7889,7 +7889,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8021,7 +8021,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8178,7 +8178,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8295,7 +8295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8512,7 +8512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G7VJ.json b/data/chips/STM32U5G7VJ.json index aa0cd72..b84d601 100644 --- a/data/chips/STM32U5G7VJ.json +++ b/data/chips/STM32U5G7VJ.json @@ -6618,7 +6618,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6830,7 +6830,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -6937,7 +6937,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7019,7 +7019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7106,7 +7106,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7238,7 +7238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7395,7 +7395,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7512,7 +7512,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -7709,7 +7709,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9BJ.json b/data/chips/STM32U5G9BJ.json index b1f2c08..7b48661 100644 --- a/data/chips/STM32U5G9BJ.json +++ b/data/chips/STM32U5G9BJ.json @@ -7858,7 +7858,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8070,7 +8070,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8202,7 +8202,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8284,7 +8284,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8371,7 +8371,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8503,7 +8503,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8660,7 +8660,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8777,7 +8777,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9019,7 +9019,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9NJ.json b/data/chips/STM32U5G9NJ.json index 7da0ff4..ab270f4 100644 --- a/data/chips/STM32U5G9NJ.json +++ b/data/chips/STM32U5G9NJ.json @@ -8026,7 +8026,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8238,7 +8238,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8370,7 +8370,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8452,7 +8452,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8539,7 +8539,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8671,7 +8671,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8828,7 +8828,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8945,7 +8945,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -9187,7 +9187,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9VJ.json b/data/chips/STM32U5G9VJ.json index a7204cc..f6d733b 100644 --- a/data/chips/STM32U5G9VJ.json +++ b/data/chips/STM32U5G9VJ.json @@ -5277,7 +5277,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5444,7 +5444,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5546,7 +5546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5623,7 +5623,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5705,7 +5705,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5827,7 +5827,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5939,7 +5939,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6031,7 +6031,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -6248,7 +6248,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32U5G9ZJ.json b/data/chips/STM32U5G9ZJ.json index 17747e4..283a448 100644 --- a/data/chips/STM32U5G9ZJ.json +++ b/data/chips/STM32U5G9ZJ.json @@ -7546,7 +7546,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7748,7 +7748,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_2CH_CMP" + "block": "TIM_ADV2CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7860,7 +7860,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -7942,7 +7942,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -8024,7 +8024,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8156,7 +8156,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8313,7 +8313,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8430,7 +8430,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -8647,7 +8647,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", diff --git a/data/chips/STM32WB10CC.json b/data/chips/STM32WB10CC.json index 9028d0a..69aba98 100644 --- a/data/chips/STM32WB10CC.json +++ b/data/chips/STM32WB10CC.json @@ -1842,7 +1842,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1984,7 +1984,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB15CC.json b/data/chips/STM32WB15CC.json index f9d171b..593981f 100644 --- a/data/chips/STM32WB15CC.json +++ b/data/chips/STM32WB15CC.json @@ -2574,7 +2574,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2721,7 +2721,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB30CE.json b/data/chips/STM32WB30CE.json index 338a002..d1bb182 100644 --- a/data/chips/STM32WB30CE.json +++ b/data/chips/STM32WB30CE.json @@ -1652,7 +1652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1789,7 +1789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1866,7 +1866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1948,7 +1948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB35CC.json b/data/chips/STM32WB35CC.json index 119ca19..0bdd6e6 100644 --- a/data/chips/STM32WB35CC.json +++ b/data/chips/STM32WB35CC.json @@ -2249,7 +2249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2386,7 +2386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2463,7 +2463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2545,7 +2545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB35CE.json b/data/chips/STM32WB35CE.json index 31050fd..382f93f 100644 --- a/data/chips/STM32WB35CE.json +++ b/data/chips/STM32WB35CE.json @@ -2249,7 +2249,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2386,7 +2386,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2463,7 +2463,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2545,7 +2545,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB50CG.json b/data/chips/STM32WB50CG.json index 282add9..7f55792 100644 --- a/data/chips/STM32WB50CG.json +++ b/data/chips/STM32WB50CG.json @@ -1652,7 +1652,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1789,7 +1789,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1866,7 +1866,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1948,7 +1948,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CC.json b/data/chips/STM32WB55CC.json index 03fc897..322bcec 100644 --- a/data/chips/STM32WB55CC.json +++ b/data/chips/STM32WB55CC.json @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2546,7 +2546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2623,7 +2623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CE.json b/data/chips/STM32WB55CE.json index 87bf304..8d61ed8 100644 --- a/data/chips/STM32WB55CE.json +++ b/data/chips/STM32WB55CE.json @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2546,7 +2546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2623,7 +2623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55CG.json b/data/chips/STM32WB55CG.json index 5c6f191..05ace3c 100644 --- a/data/chips/STM32WB55CG.json +++ b/data/chips/STM32WB55CG.json @@ -2409,7 +2409,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2546,7 +2546,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2623,7 +2623,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2705,7 +2705,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RC.json b/data/chips/STM32WB55RC.json index 1f344e6..dbf7fda 100644 --- a/data/chips/STM32WB55RC.json +++ b/data/chips/STM32WB55RC.json @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3115,7 +3115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3192,7 +3192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3274,7 +3274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RE.json b/data/chips/STM32WB55RE.json index 31cdcf2..597eedf 100644 --- a/data/chips/STM32WB55RE.json +++ b/data/chips/STM32WB55RE.json @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3115,7 +3115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3192,7 +3192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3274,7 +3274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55RG.json b/data/chips/STM32WB55RG.json index 4f1e265..e8128ef 100644 --- a/data/chips/STM32WB55RG.json +++ b/data/chips/STM32WB55RG.json @@ -2958,7 +2958,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3115,7 +3115,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3192,7 +3192,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3274,7 +3274,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VC.json b/data/chips/STM32WB55VC.json index 5c2a61f..811989b 100644 --- a/data/chips/STM32WB55VC.json +++ b/data/chips/STM32WB55VC.json @@ -4105,7 +4105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4456,7 +4456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VE.json b/data/chips/STM32WB55VE.json index 8bfd1eb..9337ebd 100644 --- a/data/chips/STM32WB55VE.json +++ b/data/chips/STM32WB55VE.json @@ -4105,7 +4105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4456,7 +4456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VG.json b/data/chips/STM32WB55VG.json index 40175c7..1014b50 100644 --- a/data/chips/STM32WB55VG.json +++ b/data/chips/STM32WB55VG.json @@ -4105,7 +4105,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4287,7 +4287,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4369,7 +4369,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4456,7 +4456,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WB55VY.json b/data/chips/STM32WB55VY.json index b1b644c..a5ed857 100644 --- a/data/chips/STM32WB55VY.json +++ b/data/chips/STM32WB55VY.json @@ -3307,7 +3307,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3489,7 +3489,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3571,7 +3571,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -3658,7 +3658,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA50KE.json b/data/chips/STM32WBA50KE.json index 80f5f82..3403748 100644 --- a/data/chips/STM32WBA50KE.json +++ b/data/chips/STM32WBA50KE.json @@ -1258,7 +1258,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1390,7 +1390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1467,7 +1467,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA50KG.json b/data/chips/STM32WBA50KG.json index 77bd675..b4068e7 100644 --- a/data/chips/STM32WBA50KG.json +++ b/data/chips/STM32WBA50KG.json @@ -1258,7 +1258,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1390,7 +1390,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1467,7 +1467,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52CE.json b/data/chips/STM32WBA52CE.json index a64066e..6f2a884 100644 --- a/data/chips/STM32WBA52CE.json +++ b/data/chips/STM32WBA52CE.json @@ -1737,7 +1737,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1899,7 +1899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2180,7 +2180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52CG.json b/data/chips/STM32WBA52CG.json index cef8389..efa5d39 100644 --- a/data/chips/STM32WBA52CG.json +++ b/data/chips/STM32WBA52CG.json @@ -1737,7 +1737,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1899,7 +1899,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1986,7 +1986,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2063,7 +2063,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2180,7 +2180,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52KE.json b/data/chips/STM32WBA52KE.json index 2ee05f5..e840b23 100644 --- a/data/chips/STM32WBA52KE.json +++ b/data/chips/STM32WBA52KE.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1641,7 +1641,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1795,7 +1795,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA52KG.json b/data/chips/STM32WBA52KG.json index e6174f1..8b72b37 100644 --- a/data/chips/STM32WBA52KG.json +++ b/data/chips/STM32WBA52KG.json @@ -1509,7 +1509,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1641,7 +1641,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1718,7 +1718,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1795,7 +1795,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -1902,7 +1902,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54CE.json b/data/chips/STM32WBA54CE.json index d5a4759..8aa5ca5 100644 --- a/data/chips/STM32WBA54CE.json +++ b/data/chips/STM32WBA54CE.json @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2142,7 +2142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54CG.json b/data/chips/STM32WBA54CG.json index 18f936f..27a5469 100644 --- a/data/chips/STM32WBA54CG.json +++ b/data/chips/STM32WBA54CG.json @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2142,7 +2142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54KE.json b/data/chips/STM32WBA54KE.json index 2074ecb..820e11c 100644 --- a/data/chips/STM32WBA54KE.json +++ b/data/chips/STM32WBA54KE.json @@ -1630,7 +1630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1762,7 +1762,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1839,7 +1839,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1916,7 +1916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2023,7 +2023,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA54KG.json b/data/chips/STM32WBA54KG.json index d8d8794..dad26ca 100644 --- a/data/chips/STM32WBA54KG.json +++ b/data/chips/STM32WBA54KG.json @@ -1630,7 +1630,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1762,7 +1762,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1839,7 +1839,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -1916,7 +1916,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2023,7 +2023,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55CE.json b/data/chips/STM32WBA55CE.json index 45a3b95..4f15f53 100644 --- a/data/chips/STM32WBA55CE.json +++ b/data/chips/STM32WBA55CE.json @@ -1870,7 +1870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2032,7 +2032,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2109,7 +2109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55CG.json b/data/chips/STM32WBA55CG.json index 06b320d..47b805d 100644 --- a/data/chips/STM32WBA55CG.json +++ b/data/chips/STM32WBA55CG.json @@ -1870,7 +1870,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2032,7 +2032,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2109,7 +2109,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2186,7 +2186,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2303,7 +2303,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55HE.json b/data/chips/STM32WBA55HE.json index 0930569..cb5b42b 100644 --- a/data/chips/STM32WBA55HE.json +++ b/data/chips/STM32WBA55HE.json @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2142,7 +2142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55HG.json b/data/chips/STM32WBA55HG.json index 169ac9b..67480c6 100644 --- a/data/chips/STM32WBA55HG.json +++ b/data/chips/STM32WBA55HG.json @@ -1893,7 +1893,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2055,7 +2055,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2142,7 +2142,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2219,7 +2219,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55UE.json b/data/chips/STM32WBA55UE.json index dab0245..d45d2bb 100644 --- a/data/chips/STM32WBA55UE.json +++ b/data/chips/STM32WBA55UE.json @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2218,7 +2218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WBA55UG.json b/data/chips/STM32WBA55UG.json index 0242805..af75177 100644 --- a/data/chips/STM32WBA55UG.json +++ b/data/chips/STM32WBA55UG.json @@ -1969,7 +1969,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2131,7 +2131,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2218,7 +2218,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2295,7 +2295,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -2412,7 +2412,7 @@ "registers": { "kind": "timer", "version": "v2", - "block": "TIM_GP16" + "block": "TIM_4CH" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL54CC.json b/data/chips/STM32WL54CC.json index a53cb95..a1d2141 100644 --- a/data/chips/STM32WL54CC.json +++ b/data/chips/STM32WL54CC.json @@ -2116,7 +2116,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2253,7 +2253,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2330,7 +2330,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2407,7 +2407,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4691,7 +4691,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4828,7 +4828,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4905,7 +4905,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4982,7 +4982,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL54JC.json b/data/chips/STM32WL54JC.json index 62d33c6..df5ec23 100644 --- a/data/chips/STM32WL54JC.json +++ b/data/chips/STM32WL54JC.json @@ -2482,7 +2482,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2639,7 +2639,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2716,7 +2716,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2798,7 +2798,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5308,7 +5308,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5465,7 +5465,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5542,7 +5542,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5624,7 +5624,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL55CC.json b/data/chips/STM32WL55CC.json index 25d52ee..be652ff 100644 --- a/data/chips/STM32WL55CC.json +++ b/data/chips/STM32WL55CC.json @@ -2122,7 +2122,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2259,7 +2259,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2336,7 +2336,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2413,7 +2413,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -4697,7 +4697,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4834,7 +4834,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4911,7 +4911,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -4988,7 +4988,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WL55JC.json b/data/chips/STM32WL55JC.json index b510379..5ee7567 100644 --- a/data/chips/STM32WL55JC.json +++ b/data/chips/STM32WL55JC.json @@ -2488,7 +2488,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2645,7 +2645,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2722,7 +2722,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2804,7 +2804,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", @@ -5314,7 +5314,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5471,7 +5471,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5548,7 +5548,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -5630,7 +5630,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4C8.json b/data/chips/STM32WLE4C8.json index 6c59219..1ea7416 100644 --- a/data/chips/STM32WLE4C8.json +++ b/data/chips/STM32WLE4C8.json @@ -1904,7 +1904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4CB.json b/data/chips/STM32WLE4CB.json index bf6882f..0dfaaa6 100644 --- a/data/chips/STM32WLE4CB.json +++ b/data/chips/STM32WLE4CB.json @@ -1904,7 +1904,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2041,7 +2041,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2118,7 +2118,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2195,7 +2195,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4CC.json b/data/chips/STM32WLE4CC.json index e92fa0a..80c0aea 100644 --- a/data/chips/STM32WLE4CC.json +++ b/data/chips/STM32WLE4CC.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2216,7 +2216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4J8.json b/data/chips/STM32WLE4J8.json index eafae42..2625aff 100644 --- a/data/chips/STM32WLE4J8.json +++ b/data/chips/STM32WLE4J8.json @@ -2270,7 +2270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2427,7 +2427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4JB.json b/data/chips/STM32WLE4JB.json index 724bc12..51c9eaf 100644 --- a/data/chips/STM32WLE4JB.json +++ b/data/chips/STM32WLE4JB.json @@ -2270,7 +2270,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2427,7 +2427,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2504,7 +2504,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2586,7 +2586,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE4JC.json b/data/chips/STM32WLE4JC.json index 70d5c42..eb231be 100644 --- a/data/chips/STM32WLE4JC.json +++ b/data/chips/STM32WLE4JC.json @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2679,7 +2679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5C8.json b/data/chips/STM32WLE5C8.json index e4e3b4a..8b18a53 100644 --- a/data/chips/STM32WLE5C8.json +++ b/data/chips/STM32WLE5C8.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2216,7 +2216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5CB.json b/data/chips/STM32WLE5CB.json index 1e991b0..45d8346 100644 --- a/data/chips/STM32WLE5CB.json +++ b/data/chips/STM32WLE5CB.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2216,7 +2216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5CC.json b/data/chips/STM32WLE5CC.json index fe46f63..4531752 100644 --- a/data/chips/STM32WLE5CC.json +++ b/data/chips/STM32WLE5CC.json @@ -2079,7 +2079,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2216,7 +2216,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2293,7 +2293,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2370,7 +2370,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5J8.json b/data/chips/STM32WLE5J8.json index 8e684d8..0e7343c 100644 --- a/data/chips/STM32WLE5J8.json +++ b/data/chips/STM32WLE5J8.json @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2679,7 +2679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5JB.json b/data/chips/STM32WLE5JB.json index ab73602..172df91 100644 --- a/data/chips/STM32WLE5JB.json +++ b/data/chips/STM32WLE5JB.json @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2679,7 +2679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/chips/STM32WLE5JC.json b/data/chips/STM32WLE5JC.json index 97737cd..74d8b3e 100644 --- a/data/chips/STM32WLE5JC.json +++ b/data/chips/STM32WLE5JC.json @@ -2445,7 +2445,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_ADV" + "block": "TIM_ADV4CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2602,7 +2602,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2679,7 +2679,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_1CH_CMP" + "block": "TIM_ADV1CH" }, "rcc": { "bus_clock": "PCLK2", @@ -2761,7 +2761,7 @@ "registers": { "kind": "timer", "version": "v1", - "block": "TIM_GP32" + "block": "TIM_32BIT" }, "rcc": { "bus_clock": "PCLK1", diff --git a/data/registers/timer_l0.json b/data/registers/timer_l0.json index 92b61bd..e1d6bd3 100644 --- a/data/registers/timer_l0.json +++ b/data/registers/timer_l0.json @@ -1,7 +1,7 @@ { "block/TIM_1CH": { "extends": "TIM_CORE", - "description": "Virtual 1-channel timers", + "description": "1-channel timers", "items": [ { "name": "CR1", @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -77,6 +77,13 @@ "extends": "TIM_1CH", "description": "2-channel timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_2CH" + }, { "name": "CR2", "description": "control register 2", @@ -87,7 +94,7 @@ "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_2CH" }, { "name": "DIER", @@ -108,71 +115,87 @@ "access": "Write", "bit_size": 16, "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", + "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_4CH" }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_TRIGDMA" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_4CH" + }, + { + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_4CH" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_4CH" }, { "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", + "description": "capture/compare mode register 1-2 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 72, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 76 } ] }, "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", + "extends": "TIM_CORE", "description": "Basic timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ + "fieldset": "CR2_MMS" + }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" + "fieldset": "DIER_UPDMA" } ] }, "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", + "description": "Virtual timer for common parts of all timers", "items": [ { "name": "CR1", @@ -221,99 +244,6 @@ } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", - "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, - { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_GP16" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_GP16" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_GP16" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 72, - "fieldset": "DCR_GP16" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" - } - ] - }, "fieldset/ARR_CORE": { "description": "auto-reload register", "fields": [ @@ -326,77 +256,6 @@ ] }, "fieldset/CCER_1CH": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_GP16": { "description": "capture/compare enable register", "fields": [ { @@ -432,45 +291,7 @@ ] }, "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", + "description": "capture/compare mode register (input mode)", "fields": [ { "name": "CCS", @@ -507,55 +328,7 @@ ] }, "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "CCS", @@ -601,9 +374,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -658,6 +431,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -691,43 +489,27 @@ "description": "Auto-reload preload enable", "bit_offset": 7, "bit_size": 1 - }, - { - "name": "UIFREMAP", - "description": "UIF status bit remapping enable", - "bit_offset": 11, - "bit_size": 1 } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", + "fields": [] + }, + "fieldset/CR2_CCDMA": { + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "CCDS" } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -736,17 +518,11 @@ "bit_offset": 4, "bit_size": 3, "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -755,19 +531,6 @@ "bit_offset": 4, "bit_size": 3, "enum": "MMS" - } - ] - }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", - "description": "control register 2", - "fields": [ - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" }, { "name": "TI1S", @@ -778,7 +541,7 @@ } ] }, - "fieldset/DCR_GP16": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -801,11 +564,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -815,16 +578,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -833,15 +586,24 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", + "description": "DMA/Interrupt enable register", + "fields": [] + }, + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 + "name": "CCDE", + "description": "Capture/Compare x (x=1-4) DMA request enable", + "bit_offset": 9, + "bit_size": 1, + "array": { + "len": 4, + "stride": 1 + } } ] }, @@ -856,36 +618,10 @@ } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1-4) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "TDE", "description": "Trigger DMA request enable", @@ -894,14 +630,15 @@ } ] }, - "fieldset/DMAR_GP16": { - "description": "DMA address for full transfer", + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "DMAB", - "description": "DMA register for burst accesses", - "bit_offset": 0, - "bit_size": 16 + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, + "bit_size": 1 } ] }, @@ -911,11 +648,11 @@ "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -925,16 +662,6 @@ "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -954,29 +681,7 @@ } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", - "description": "event generation register", - "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, - "bit_size": 1 - } - ] - }, - "fieldset/SMCR_GP16": { + "fieldset/SMCR_2CH": { "description": "slave mode control register", "fields": [ { @@ -1029,27 +734,37 @@ } ] }, + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", + "description": "slave mode control register", + "fields": [] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [] + }, "fieldset/SR_1CH": { "extends": "SR_CORE", "description": "status register", "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1059,34 +774,19 @@ "extends": "SR_1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, + "fieldset/SR_4CH": { + "extends": "SR_2CH", + "description": "status register", + "fields": [] + }, "fieldset/SR_CORE": { "description": "status register", "fields": [ @@ -1098,38 +798,6 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - } - ] - }, "enum/CCDS": { "bit_size": 1, "variants": [ diff --git a/data/registers/timer_v1.json b/data/registers/timer_v1.json index 7c2ea9f..8e75607 100644 --- a/data/registers/timer_v1.json +++ b/data/registers/timer_v1.json @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -79,27 +79,40 @@ } ] }, - "block/TIM_1CH_CMP": { + "block/TIM_2CH": { "extends": "TIM_1CH", - "description": "1-channel with one complementary output timers", + "description": "2-channel timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_2CH" + }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_1CH_CMP" + "fieldset": "CR2_2CH" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_2CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_1CH_CMP" + "fieldset": "DIER_2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_1CH_CMP" + "fieldset": "SR_2CH" }, { "name": "EGR", @@ -107,74 +120,120 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_1CH_CMP" + "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_32BIT": { + "extends": "TIM_4CH", + "description": "General purpose 32-bit timers", + "items": [ + { + "name": "CNT", + "description": "counter", + "byte_offset": 36 }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_1CH_CMP" + "name": "ARR", + "description": "auto-reload register", + "byte_offset": 44 }, { - "name": "RCR", - "description": "repetition counter register", - "byte_offset": 48, + "name": "CCR", + "description": "capture/compare register x (x=1-4)", + "array": { + "len": 4, + "stride": 4 + }, + "byte_offset": 52 + } + ] + }, + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", + "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, "bit_size": 16, - "fieldset": "RCR_1CH_CMP" + "fieldset": "CR1_4CH" }, { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_TRIGDMA" + }, + { + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_4CH" + }, + { + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_4CH" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_4CH" + }, + { + "name": "CCMR_Output", + "description": "capture/compare mode register 1-2 (output mode)", + "array": { + "len": 2, + "stride": 4 + }, + "byte_offset": 24, + "fieldset": "CCMR_Output_4CH" }, { "name": "DCR", "description": "DMA control register", "byte_offset": 72, - "fieldset": "DCR_1CH_CMP" + "fieldset": "DCR_CCDMA" }, { "name": "DMAR", "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" + "byte_offset": 76 }, { "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_1CH_CMP" + "fieldset": "AF1_4CH" } ] }, - "block/TIM_2CH": { + "block/TIM_ADV1CH": { "extends": "TIM_1CH", - "description": "2-channel timers", + "description": "1-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_2CH" + "fieldset": "CR2_ADV1CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH" + "fieldset": "DIER_ADV1CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH" + "fieldset": "SR_ADV1CH" }, { "name": "EGR", @@ -182,79 +241,73 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_2CH" + "fieldset": "EGR_ADV1CH" }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CCER", + "description": "capture/compare enable register", + "byte_offset": 32, + "fieldset": "CCER_ADV1CH" }, { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "name": "RCR", + "description": "repetition counter register", + "byte_offset": 48, + "bit_size": 16, + "fieldset": "RCR_ADV1CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "BDTR", + "description": "break and dead-time register", + "byte_offset": 68, + "fieldset": "BDTR_ADV1CH" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 72, + "fieldset": "DCR_CCDMA" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_2CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 76 + }, + { + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_ADV1CH" } ] }, - "block/TIM_2CH_CMP": { - "extends": "TIM_1CH_CMP", + "block/TIM_ADV2CH": { + "extends": "TIM_ADV1CH", "description": "2-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH_CMP" + "fieldset": "CR2_ADV2CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_2CH" + "fieldset": "SMCR_TRIGDMA" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH_CMP" + "fieldset": "DIER_ADV2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH_CMP" + "fieldset": "SR_ADV2CH" }, { "name": "EGR", @@ -262,60 +315,12 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_2CH_CMP" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_1CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_1CH" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH_CMP" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_2CH" + "fieldset": "EGR_ADV2CH" } ] }, - "block/TIM_ADV": { - "extends": "TIM_2CH_CMP", + "block/TIM_ADV4CH": { + "extends": "TIM_ADV2CH", "description": "Advanced Control timers", "items": [ { @@ -323,49 +328,31 @@ "description": "control register 1", "byte_offset": 0, "bit_size": 16, - "fieldset": "CR1_GP16" + "fieldset": "CR1_4CH" }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_ADV" + "fieldset": "CR2_ADV4CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_ADV4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_ADV" + "fieldset": "DIER_ADV4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_ADV" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_ADV" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "fieldset": "SR_ADV4CH" }, { "name": "CCMR_Output", @@ -375,53 +362,26 @@ "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_ADV" + "fieldset": "CCMR_Output_4CH" }, { "name": "RCR", "description": "repetition counter register", "byte_offset": 48, "bit_size": 16, - "fieldset": "RCR_ADV" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_ADV" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76 + "fieldset": "RCR_ADV4CH" }, { - "name": "CCMR3", - "description": "capture/compare mode register 3", + "name": "CCMR3_Output", + "description": "capture/compare mode register 3 (output mode)", "byte_offset": 84, - "fieldset": "CCMR3_ADV" + "fieldset": "CCMR3_Output_ADV4CH" }, { "name": "CCR5", "description": "capture/compare register 5", "byte_offset": 88, - "fieldset": "CCR5_ADV" + "fieldset": "CCR5_ADV4CH" }, { "name": "CCR6", @@ -433,48 +393,36 @@ "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_ADV" + "fieldset": "AF1_ADV4CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_ADV" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_GP16" + "fieldset": "AF2_ADV4CH" } ] }, "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", + "extends": "TIM_CORE", "description": "Basic timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ + "fieldset": "CR2_MMS" + }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" + "fieldset": "DIER_UPDMA" } ] }, "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", + "description": "Virtual timer for common parts of all timers", "items": [ { "name": "CR1", @@ -523,137 +471,18 @@ } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", - "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, + "fieldset/AF1_4CH": { + "description": "alternate function register 1", + "fields": [ { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_GP16" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_GP16" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_GP16" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 72, - "fieldset": "DCR_1CH_CMP" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 76, - "fieldset": "DMAR_GP16" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_GP16" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 104, - "fieldset": "TISEL_GP16" - } - ] - }, - "block/TIM_GP32": { - "extends": "TIM_GP16", - "description": "General purpose 32-bit timers", - "items": [ - { - "name": "CNT", - "description": "counter", - "byte_offset": 36 - }, - { - "name": "ARR", - "description": "auto-reload register", - "byte_offset": 44 - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52 + "name": "ETRSEL", + "description": "etr_in source selection", + "bit_offset": 14, + "bit_size": 4 } ] }, - "fieldset/AF1_1CH_CMP": { + "fieldset/AF1_ADV1CH": { "description": "alternate function register 1", "fields": [ { @@ -698,19 +527,8 @@ } ] }, - "fieldset/AF1_ADV": { - "extends": "AF1_1CH_CMP", - "description": "alternate function register 1", - "fields": [ - { - "name": "ETRSEL", - "description": "etr_in source selection", - "bit_offset": 14, - "bit_size": 4 - } - ] - }, - "fieldset/AF1_GP16": { + "fieldset/AF1_ADV4CH": { + "extends": "AF1_ADV1CH", "description": "alternate function register 1", "fields": [ { @@ -721,7 +539,8 @@ } ] }, - "fieldset/AF2_ADV": { + "fieldset/AF2_ADV4CH": { + "extends": "AF2_CCDMA", "description": "alternate function register 2", "fields": [ { @@ -732,12 +551,12 @@ }, { "name": "BK2CMPE", - "description": "TIM_BRK2_CMPx (x=1-8) enable", + "description": "TIM_BRK2_CMPx (x=1-2) enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 8 + "len": 2, + "stride": 1 } }, { @@ -766,6 +585,10 @@ } ] }, + "fieldset/AF2_CCDMA": { + "description": "alternate function register 2", + "fields": [] + }, "fieldset/ARR_CORE": { "description": "auto-reload register", "fields": [ @@ -777,7 +600,7 @@ } ] }, - "fieldset/BDTR_1CH_CMP": { + "fieldset/BDTR_ADV1CH": { "description": "break and dead-time register", "fields": [ { @@ -809,21 +632,21 @@ }, { "name": "BKE", - "description": "Break x (x=1) enable", + "description": "Break x (x=1,2) enable", "bit_offset": 12, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 } }, { "name": "BKP", - "description": "Break x (x=1) polarity", + "description": "Break x (x=1,2) polarity", "bit_offset": 13, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 }, "enum": "BKP" @@ -840,44 +663,6 @@ "bit_offset": 15, "bit_size": 1 }, - { - "name": "BKF", - "description": "Break x (x=1) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 1, - "stride": 4 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/BDTR_ADV": { - "extends": "BDTR_1CH_CMP", - "description": "break and dead-time register", - "fields": [ - { - "name": "BKE", - "description": "Break x (x=1,2) enable", - "bit_offset": 12, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - } - }, - { - "name": "BKP", - "description": "Break x (x=1,2) polarity", - "bit_offset": 13, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - }, - "enum": "BKP" - }, { "name": "BKF", "description": "Break x (x=1,2) filter", @@ -896,376 +681,157 @@ "fields": [ { "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", + "description": "Capture/Compare x (x=1-4) output enable", "bit_offset": 0, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } }, { "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", + "description": "Capture/Compare x (x=1-4) output Polarity", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } }, { "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", + "description": "Capture/Compare x (x=1-4) output Polarity", "bit_offset": 3, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 4 } } ] }, - "fieldset/CCER_1CH_CMP": { + "fieldset/CCER_ADV1CH": { "extends": "CCER_1CH", "description": "capture/compare enable register", "fields": [ { "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", + "description": "Capture/Compare x (x=1-3) complementary output enable", "bit_offset": 2, "bit_size": 1, "array": { - "len": 1, + "len": 3, "stride": 4 } } ] }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", + "fieldset/CCMR3_Output_ADV4CH": { + "description": "capture/compare mode register 3", "fields": [ { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, + "name": "OCFE", + "description": "Output compare x (x=5,6) fast enable", + "bit_offset": 2, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } }, { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, + "name": "OCPE", + "description": "Output compare x (x=5,6) preload enable", + "bit_offset": 3, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } }, { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, + "name": "OCM", + "description": "Output compare x (x=5,6) mode", + "bit_offset": 4, + "bit_size": 3, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "OCM" + }, + { + "name": "OCCE", + "description": "Output compare x (x=5,6) clear enable", + "bit_offset": 7, "bit_size": 1, "array": { "len": 2, - "stride": 4 + "stride": 8 } } ] }, - "fieldset/CCER_2CH_CMP": { - "extends": "CCER_2CH", - "description": "capture/compare enable register", + "fieldset/CCMR_Input_1CH": { + "description": "capture/compare mode register (input mode)", "fields": [ { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", + "name": "CCS", + "description": "Capture/Compare y selection", + "bit_offset": 0, + "bit_size": 2, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "CCMR_Input_CCS" + }, + { + "name": "ICPSC", + "description": "Input capture y prescaler", "bit_offset": 2, - "bit_size": 1, + "bit_size": 2, "array": { - "len": 1, - "stride": 4 + "len": 2, + "stride": 8 } + }, + { + "name": "ICF", + "description": "Input capture y filter", + "bit_offset": 4, + "bit_size": 4, + "array": { + "len": 2, + "stride": 8 + }, + "enum": "FilterValue" } ] }, - "fieldset/CCER_ADV": { - "extends": "CCER_2CH_CMP", - "description": "capture/compare enable register", + "fieldset/CCMR_Output_1CH": { + "description": "capture/compare mode register (output mode)", "fields": [ { - "name": "CCE", - "description": "Capture/Compare x (x=1-6) output enable", + "name": "CCS", + "description": "Capture/Compare y selection", "bit_offset": 0, - "bit_size": 1, + "bit_size": 2, "array": { - "len": 6, - "stride": 4 - } + "len": 2, + "stride": 8 + }, + "enum": "CCMR_Output_CCS" }, { - "name": "CCP", - "description": "Capture/Compare x (x=1-6) output Polarity", - "bit_offset": 1, + "name": "OCFE", + "description": "Output compare y fast enable", + "bit_offset": 2, "bit_size": 1, "array": { - "len": 6, - "stride": 4 - } - }, - { - "name": "CCNE", - "description": "Capture/Compare x (x=1-3) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 3, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_GP16": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-4) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 4, - "stride": 4 - } - } - ] - }, - "fieldset/CCMR3_ADV": { - "description": "capture/compare mode register 3", - "fields": [ - { - "name": "OCFE", - "description": "Output compare x (x=5,6) fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare x (x=5,6) preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare x (x=5,6) mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "OCM" - }, - { - "name": "OCCE", - "description": "Output compare x (x=5,6) clear enable", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": 4, - "bit_size": 3, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 2, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 2, - "stride": 8 + "len": 2, + "stride": 8 } }, { @@ -1291,9 +857,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -1307,7 +873,7 @@ } ] }, - "fieldset/CCR5_ADV": { + "fieldset/CCR5_ADV4CH": { "extends": "CCR_1CH", "description": "capture/compare register 5", "fields": [ @@ -1365,6 +931,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -1407,34 +998,21 @@ } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "TI1S", + "description": "TI1 selection", + "bit_offset": 7, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "TI1S" } ] }, - "fieldset/CR2_1CH_CMP": { + "fieldset/CR2_ADV1CH": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -1449,36 +1027,30 @@ "bit_offset": 2, "bit_size": 1 }, - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" - }, { "name": "OIS", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x (x=1-6)", "bit_offset": 8, "bit_size": 1, "array": { - "len": 1, + "len": 6, "stride": 2 } }, { "name": "OISN", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x N x (x=1-4)", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 2 } } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_ADV2CH": { + "extends": "CR2_ADV1CH", "description": "control register 2", "fields": [ { @@ -1497,70 +1069,32 @@ } ] }, - "fieldset/CR2_2CH_CMP": { - "extends": "CR2_1CH_CMP", + "fieldset/CR2_ADV4CH": { + "extends": "CR2_ADV2CH", "description": "control register 2", "fields": [ { - "name": "MMS", - "description": "Master mode selection", - "bit_offset": 4, - "bit_size": 3, - "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" - }, - { - "name": "OIS", - "description": "Output Idle state x (x=1,2)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 2, - "stride": 2 - } + "name": "MMS2", + "description": "Master mode selection 2", + "bit_offset": 20, + "bit_size": 4, + "enum": "MMS2" } ] }, - "fieldset/CR2_ADV": { - "extends": "CR2_2CH_CMP", + "fieldset/CR2_CCDMA": { "description": "control register 2", "fields": [ { - "name": "OIS", - "description": "Output Idle state x (x=1-6)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 6, - "stride": 2 - } - }, - { - "name": "OISN", - "description": "Output Idle state x N x (x=1-4)", - "bit_offset": 9, + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, "bit_size": 1, - "array": { - "len": 4, - "stride": 2 - } - }, - { - "name": "MMS2", - "description": "Master mode selection 2", - "bit_offset": 20, - "bit_size": 4, - "enum": "MMS2" + "enum": "CCDS" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -1572,8 +1106,8 @@ } ] }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_2CH", "description": "control register 2", "fields": [ { @@ -1582,17 +1116,10 @@ "bit_offset": 3, "bit_size": 1, "enum": "CCDS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/DCR_1CH_CMP": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -1615,45 +1142,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/DIER_1CH_CMP": { - "extends": "DIER_1CH", - "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "COMIE", - "description": "COM interrupt enable", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIE", - "description": "Break interrupt enable", - "bit_offset": 7, - "bit_size": 1 - }, - { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1663,16 +1156,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -1681,32 +1164,13 @@ } ] }, - "fieldset/DIER_2CH_CMP": { - "extends": "DIER_1CH_CMP", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "COMDE", - "description": "COM DMA request enable", - "bit_offset": 13, - "bit_size": 1 - }, - { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, - "bit_size": 1 - } - ] + "fields": [] }, - "fieldset/DIER_ADV": { - "extends": "DIER_2CH_CMP", + "fieldset/DIER_ADV1CH": { + "extends": "DIER_UPDMA", "description": "DMA/Interrupt enable register", "fields": [ { @@ -1719,6 +1183,18 @@ "stride": 1 } }, + { + "name": "COMIE", + "description": "COM interrupt enable", + "bit_offset": 5, + "bit_size": 1 + }, + { + "name": "BIE", + "description": "Break interrupt enable", + "bit_offset": 7, + "bit_size": 1 + }, { "name": "CCDE", "description": "Capture/Compare x (x=1-4) DMA request enable", @@ -1731,152 +1207,100 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_ADV2CH": { + "extends": "DIER_ADV1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, + "name": "COMDE", + "description": "COM DMA request enable", + "bit_offset": 13, "bit_size": 1 - } - ] - }, - "fieldset/DIER_CORE": { - "description": "DMA/Interrupt enable register", - "fields": [ + }, { - "name": "UIE", - "description": "Update interrupt enable", - "bit_offset": 0, + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, "bit_size": 1 } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_ADV4CH": { + "extends": "DIER_ADV2CH", + "description": "DMA/Interrupt enable register", + "fields": [] + }, + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, { "name": "CCDE", "description": "Capture/Compare x (x=1-4) DMA request enable", "bit_offset": 9, "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, - "bit_size": 1 + "array": { + "len": 4, + "stride": 1 + } } ] }, - "fieldset/DMAR_GP16": { - "description": "DMA address for full transfer", + "fieldset/DIER_CORE": { + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "DMAB", - "description": "DMA register for burst accesses", + "name": "UIE", + "description": "Update interrupt enable", "bit_offset": 0, - "bit_size": 16 + "bit_size": 1 } ] }, - "fieldset/EGR_1CH": { - "extends": "EGR_CORE", - "description": "event generation register", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, + "bit_size": 1 } ] }, - "fieldset/EGR_1CH_CMP": { - "extends": "EGR_1CH", - "description": "event generation register", + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", "fields": [ { - "name": "COMG", - "description": "Capture/Compare control update generation", - "bit_offset": 5, + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, "bit_size": 1 - }, - { - "name": "BG", - "description": "Break x (x=1) generation", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } } ] }, - "fieldset/EGR_2CH": { - "extends": "EGR_1CH", + "fieldset/EGR_1CH": { + "extends": "EGR_CORE", "description": "event generation register", "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 2, + "len": 4, "stride": 1 } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, - "bit_size": 1 } ] }, - "fieldset/EGR_2CH_CMP": { - "extends": "EGR_1CH_CMP", + "fieldset/EGR_2CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1,2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -1885,19 +1309,15 @@ } ] }, - "fieldset/EGR_ADV": { - "extends": "EGR_2CH_CMP", + "fieldset/EGR_ADV1CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } + "name": "COMG", + "description": "Capture/Compare control update generation", + "bit_offset": 5, + "bit_size": 1 }, { "name": "BG", @@ -1911,40 +1331,30 @@ } ] }, - "fieldset/EGR_CORE": { + "fieldset/EGR_ADV2CH": { + "extends": "EGR_ADV1CH", "description": "event generation register", "fields": [ { - "name": "UG", - "description": "Update generation", - "bit_offset": 0, + "name": "TG", + "description": "Trigger generation", + "bit_offset": 6, "bit_size": 1 } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", + "fieldset/EGR_CORE": { "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "UG", + "description": "Update generation", + "bit_offset": 0, "bit_size": 1 } ] }, - "fieldset/RCR_1CH_CMP": { + "fieldset/RCR_ADV1CH": { "description": "repetition counter register", "fields": [ { @@ -1955,7 +1365,7 @@ } ] }, - "fieldset/RCR_ADV": { + "fieldset/RCR_ADV4CH": { "description": "repetition counter register", "fields": [ { @@ -2010,8 +1420,8 @@ } ] }, - "fieldset/SMCR_GP16": { - "extends": "SMCR_2CH", + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", "description": "slave mode control register", "fields": [ { @@ -2043,78 +1453,73 @@ } ] }, + "fieldset/SMCR_ADV4CH": { + "extends": "SMCR_4CH", + "description": "slave mode control register", + "fields": [] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [] + }, "fieldset/SR_1CH": { "extends": "SR_CORE", "description": "status register", "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } } ] }, - "fieldset/SR_1CH_CMP": { + "fieldset/SR_2CH": { "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "COMIF", - "description": "COM interrupt flag", - "bit_offset": 5, + "name": "TIF", + "description": "Trigger interrupt flag", + "bit_offset": 6, "bit_size": 1 - }, - { - "name": "BIF", - "description": "Break x (x=1) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - } } ] }, - "fieldset/SR_2CH": { + "fieldset/SR_4CH": { + "extends": "SR_2CH", + "description": "status register", + "fields": [] + }, + "fieldset/SR_ADV1CH": { "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, + "name": "COMIF", + "description": "COM interrupt flag", + "bit_offset": 5, "bit_size": 1 }, { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, + "name": "BIF", + "description": "Break x (x=1,2) interrupt flag", + "bit_offset": 7, "bit_size": 1, "array": { "len": 2, @@ -2123,72 +1528,22 @@ } ] }, - "fieldset/SR_2CH_CMP": { - "extends": "SR_1CH_CMP", + "fieldset/SR_ADV2CH": { + "extends": "SR_ADV1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1,2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1,2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, - "fieldset/SR_ADV": { - "extends": "SR_2CH_CMP", + "fieldset/SR_ADV4CH": { + "extends": "SR_ADV2CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "BIF", - "description": "Break x (x=1,2) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "SBIF", "description": "System break interrupt flag", @@ -2220,70 +1575,7 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - } - ] - }, "fieldset/TISEL_1CH": { - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_2CH": { - "extends": "TISEL_1CH", - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1-2) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_GP16": { "description": "input selection register", "fields": [ { diff --git a/data/registers/timer_v2.json b/data/registers/timer_v2.json index 918d05e..fde1969 100644 --- a/data/registers/timer_v2.json +++ b/data/registers/timer_v2.json @@ -34,7 +34,7 @@ "name": "CCMR_Input", "description": "capture/compare mode register 1 (input mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -44,7 +44,7 @@ "name": "CCMR_Output", "description": "capture/compare mode register 1 (output mode)", "array": { - "len": 1, + "len": 2, "stride": 4 }, "byte_offset": 24, @@ -58,9 +58,9 @@ }, { "name": "CCR", - "description": "capture/compare register x (x=1) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -68,9 +68,9 @@ }, { "name": "CCR_DITHER", - "description": "capture/compare register x (x=1) (Dither mode enabled)", + "description": "capture/compare register x (x=1-4) (dither mode enabled)", "array": { - "len": 1, + "len": 4, "stride": 4 }, "byte_offset": 52, @@ -89,90 +89,17 @@ } ] }, - "block/TIM_1CH_CMP": { + "block/TIM_2CH": { "extends": "TIM_1CH", - "description": "1-channel with one complementary output timers", + "description": "2-channel timers", "items": [ { - "name": "CR2", - "description": "control register 2", - "byte_offset": 4, - "fieldset": "CR2_1CH_CMP" - }, - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_1CH_CMP" - }, - { - "name": "SR", - "description": "status register", - "byte_offset": 16, - "fieldset": "SR_1CH_CMP" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_1CH_CMP" - }, - { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_1CH_CMP" - }, - { - "name": "RCR", - "description": "repetition counter register", - "byte_offset": 48, + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, "bit_size": 16, - "fieldset": "RCR_1CH_CMP" - }, - { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" - }, - { - "name": "DTR2", - "description": "break and dead-time register", - "byte_offset": 84, - "fieldset": "DTR2_1CH_CMP" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_1CH_CMP" - }, - { - "name": "AF2", - "description": "alternate function register 2", - "byte_offset": 100, - "fieldset": "AF2_1CH_CMP" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 988, - "fieldset": "DCR_1CH_CMP" + "fieldset": "CR1_2CH" }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 992 - } - ] - }, - "block/TIM_2CH": { - "extends": "TIM_1CH", - "description": "2-channel timers", - "items": [ { "name": "CR2", "description": "control register 2", @@ -204,191 +131,153 @@ "access": "Write", "bit_size": 16, "fieldset": "EGR_2CH" + } + ] + }, + "block/TIM_32BIT": { + "extends": "TIM_4CH", + "description": "General purpose 32-bit timers", + "items": [ + { + "name": "CNT", + "description": "counter", + "byte_offset": 36 }, { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "name": "CNT_DITHER", + "description": "counter (dither mode enabled)", + "byte_offset": 36, + "fieldset": "CNT_DITHER_32BIT" }, { - "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", - "array": { - "len": 1, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_2CH" + "name": "ARR", + "description": "auto-reload register", + "byte_offset": 44 }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH" + "name": "ARR_DITHER", + "description": "auto-reload register (dither mode enabled)", + "byte_offset": 44, + "fieldset": "ARR_DITHER_32BIT" }, { "name": "CCR", - "description": "capture/compare register x (x=1-2) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4)", "array": { - "len": 2, + "len": 4, "stride": 4 }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "byte_offset": 52 }, { "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-2) (Dither mode enabled)", + "description": "capture/compare register x (x=1-4) (dither mode enabled)", "array": { - "len": 2, + "len": 4, "stride": 4 }, "byte_offset": 52, - "fieldset": "CCR_DITHER_1CH" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_2CH" + "fieldset": "CCR_DITHER_32BIT" } ] }, - "block/TIM_2CH_CMP": { - "extends": "TIM_1CH_CMP", - "description": "2-channel with one complementary output timers", + "block/TIM_4CH": { + "extends": "TIM_2CH", + "description": "General purpose 16-bit timers", "items": [ + { + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_4CH" + }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_2CH_CMP" + "fieldset": "CR2_TRIGDMA" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_2CH_CMP" + "fieldset": "SMCR_4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_2CH_CMP" + "fieldset": "DIER_4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_2CH_CMP" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_2CH_CMP" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_1CH" + "fieldset": "SR_4CH" }, { "name": "CCMR_Output", - "description": "capture/compare mode register 1 (output mode)", + "description": "capture/compare mode register 1-2 (output mode)", "array": { "len": 2, "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_1CH" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_2CH_CMP" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 988, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-2)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 992 }, { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-2) (Dither mode enabled)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_DITHER_1CH" + "name": "ECR", + "description": "encoder control register", + "byte_offset": 88, + "fieldset": "ECR_4CH" }, { - "name": "BDTR", - "description": "break and dead-time register", - "byte_offset": 68, - "fieldset": "BDTR_1CH_CMP" + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_4CH" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_2CH" + "name": "AF2", + "description": "alternate function register 2", + "byte_offset": 100, + "fieldset": "AF2_CCDMA" } ] }, - "block/TIM_ADV": { - "extends": "TIM_2CH_CMP", - "description": "Advanced Control timers", + "block/TIM_ADV1CH": { + "extends": "TIM_1CH", + "description": "1-channel with one complementary output timers", "items": [ - { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_GP16" - }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_ADV" - }, - { - "name": "SMCR", - "description": "slave mode control register", - "byte_offset": 8, - "fieldset": "SMCR_ADV" + "fieldset": "CR2_ADV1CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_ADV" + "fieldset": "DIER_ADV1CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_ADV" + "fieldset": "SR_ADV1CH" }, { "name": "EGR", @@ -396,158 +285,85 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_ADV" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" - }, - { - "name": "CCMR_Output", - "description": "capture/compare mode register 1-2 (output mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" + "fieldset": "EGR_ADV1CH" }, { "name": "CCER", "description": "capture/compare enable register", "byte_offset": 32, - "fieldset": "CCER_ADV" + "fieldset": "CCER_ADV1CH" }, { "name": "RCR", "description": "repetition counter register", "byte_offset": 48, "bit_size": 16, - "fieldset": "RCR_ADV" - }, - { - "name": "CCR", - "description": "capture/compare register x (x=1-4)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_1CH" - }, - { - "name": "ECR", - "description": "encoder control register", - "byte_offset": 88, - "fieldset": "ECR_GP16" + "fieldset": "RCR_ADV1CH" }, { "name": "BDTR", "description": "break and dead-time register", "byte_offset": 68, - "fieldset": "BDTR_ADV" + "fieldset": "BDTR_ADV1CH" }, { - "name": "CCR5", - "description": "capture/compare register 5 (Dither mode disabled)", - "byte_offset": 72, - "fieldset": "CCR5_ADV" + "name": "DTR2", + "description": "break and dead-time register", + "byte_offset": 84, + "fieldset": "DTR2_ADV1CH" }, { - "name": "CCR5_DITHER", - "description": "capture/compare register 5 (Dither mode enabled)", - "byte_offset": 72, - "fieldset": "CCR5_DITHER_ADV" + "name": "DCR", + "description": "DMA control register", + "byte_offset": 988, + "fieldset": "DCR_CCDMA" }, { - "name": "CCR6", - "description": "capture/compare register 6 (Dither mode disabled)", - "byte_offset": 76, - "fieldset": "CCR_1CH" + "name": "DMAR", + "description": "DMA address for full transfer", + "byte_offset": 992 }, { - "name": "CCR6_DITHER", - "description": "capture/compare register 6 (Dither mode enabled)", - "byte_offset": 76, - "fieldset": "CCR_DITHER_1CH" - }, - { - "name": "CCMR3", - "description": "capture/compare mode register 3", - "byte_offset": 80, - "fieldset": "CCMR3_ADV" - }, - { - "name": "AF1", - "description": "alternate function register 1", - "byte_offset": 96, - "fieldset": "AF1_ADV" + "name": "AF1", + "description": "alternate function register 1", + "byte_offset": 96, + "fieldset": "AF1_ADV1CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_ADV" - }, - { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_GP16" + "fieldset": "AF2_CCDMA" } ] }, - "block/TIM_BASIC": { - "extends": "TIM_BASIC_NO_CR2", - "description": "Basic timers", + "block/TIM_ADV2CH": { + "extends": "TIM_ADV1CH", + "description": "2-channel with one complementary output timers", "items": [ { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_BASIC" - } - ] - }, - "block/TIM_BASIC_NO_CR2": { - "extends": "TIM_CORE", - "description": "Virtual Basic timers without CR2 register for common part of TIM_BASIC and TIM_1CH_CMP", - "items": [ - { - "name": "DIER", - "description": "DMA/Interrupt enable register", - "byte_offset": 12, - "fieldset": "DIER_BASIC_NO_CR2" - } - ] - }, - "block/TIM_CORE": { - "description": "Virtual timer for common part of TIM_BASIC and TIM_1CH", - "items": [ + "fieldset": "CR2_ADV2CH" + }, { - "name": "CR1", - "description": "control register 1", - "byte_offset": 0, - "bit_size": 16, - "fieldset": "CR1_CORE" + "name": "SMCR", + "description": "slave mode control register", + "byte_offset": 8, + "fieldset": "SMCR_TRIGDMA" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_CORE" + "fieldset": "DIER_ADV2CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_CORE" + "fieldset": "SR_ADV2CH" }, { "name": "EGR", @@ -555,86 +371,44 @@ "byte_offset": 20, "access": "Write", "bit_size": 16, - "fieldset": "EGR_CORE" - }, - { - "name": "CNT", - "description": "counter", - "byte_offset": 36, - "fieldset": "CNT_CORE" - }, - { - "name": "PSC", - "description": "prescaler", - "byte_offset": 40, - "bit_size": 16 - }, - { - "name": "ARR", - "description": "auto-reload register (Dither mode disabled)", - "byte_offset": 44, - "fieldset": "ARR_CORE" - }, - { - "name": "ARR_DITHER", - "description": "auto-reload register (Dither mode enabled)", - "byte_offset": 44, - "fieldset": "ARR_DITHER_CORE" + "fieldset": "EGR_ADV2CH" } ] }, - "block/TIM_GP16": { - "extends": "TIM_2CH", - "description": "General purpose 16-bit timers", + "block/TIM_ADV4CH": { + "extends": "TIM_ADV2CH", + "description": "Advanced Control timers", "items": [ { "name": "CR1", "description": "control register 1", "byte_offset": 0, "bit_size": 16, - "fieldset": "CR1_GP16" + "fieldset": "CR1_4CH" }, { "name": "CR2", "description": "control register 2", "byte_offset": 4, - "fieldset": "CR2_GP16" + "fieldset": "CR2_ADV4CH" }, { "name": "SMCR", "description": "slave mode control register", "byte_offset": 8, - "fieldset": "SMCR_GP16" + "fieldset": "SMCR_ADV4CH" }, { "name": "DIER", "description": "DMA/Interrupt enable register", "byte_offset": 12, - "fieldset": "DIER_GP16" + "fieldset": "DIER_ADV4CH" }, { "name": "SR", "description": "status register", "byte_offset": 16, - "fieldset": "SR_GP16" - }, - { - "name": "EGR", - "description": "event generation register", - "byte_offset": 20, - "access": "Write", - "bit_size": 16, - "fieldset": "EGR_GP16" - }, - { - "name": "CCMR_Input", - "description": "capture/compare mode register 1-2 (input mode)", - "array": { - "len": 2, - "stride": 4 - }, - "byte_offset": 24, - "fieldset": "CCMR_Input_2CH" + "fieldset": "SR_ADV4CH" }, { "name": "CCMR_Output", @@ -644,119 +418,151 @@ "stride": 4 }, "byte_offset": 24, - "fieldset": "CCMR_Output_GP16" + "fieldset": "CCMR_Output_4CH" }, { - "name": "CCER", - "description": "capture/compare enable register", - "byte_offset": 32, - "fieldset": "CCER_GP16" + "name": "RCR", + "description": "repetition counter register", + "byte_offset": 48, + "bit_size": 16, + "fieldset": "RCR_ADV4CH" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-4) (Dither mode disabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, + "name": "CCMR3_Output", + "description": "capture/compare mode register 3 (output mode)", + "byte_offset": 80, + "fieldset": "CCMR3_Output_ADV4CH" + }, + { + "name": "CCR5", + "description": "capture/compare register 5", + "byte_offset": 72, + "fieldset": "CCR5_ADV4CH" + }, + { + "name": "CCR5_DITHER", + "description": "capture/compare register 5 (dither mode enabled)", + "byte_offset": 72, + "fieldset": "CCR5_DITHER_ADV4CH" + }, + { + "name": "CCR6", + "description": "capture/compare register 6", + "byte_offset": 76, "fieldset": "CCR_1CH" }, { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-4) (Dither mode enabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, + "name": "CCR6_DITHER", + "description": "capture/compare register 6 (dither mode enabled)", + "byte_offset": 76, "fieldset": "CCR_DITHER_1CH" }, { "name": "ECR", "description": "encoder control register", "byte_offset": 88, - "fieldset": "ECR_GP16" - }, - { - "name": "DCR", - "description": "DMA control register", - "byte_offset": 988, - "fieldset": "DCR_1CH_CMP" - }, - { - "name": "DMAR", - "description": "DMA address for full transfer", - "byte_offset": 992 + "fieldset": "ECR_4CH" }, { "name": "AF1", "description": "alternate function register 1", "byte_offset": 96, - "fieldset": "AF1_GP16" + "fieldset": "AF1_ADV4CH" }, { "name": "AF2", "description": "alternate function register 2", "byte_offset": 100, - "fieldset": "AF2_1CH_CMP" + "fieldset": "AF2_ADV4CH" + } + ] + }, + "block/TIM_BASIC": { + "extends": "TIM_CORE", + "description": "Basic timers", + "items": [ + { + "name": "CR2", + "description": "control register 2", + "byte_offset": 4, + "fieldset": "CR2_MMS" }, { - "name": "TISEL", - "description": "input selection register", - "byte_offset": 92, - "fieldset": "TISEL_GP16" + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_UPDMA" } ] }, - "block/TIM_GP32": { - "extends": "TIM_GP16", - "description": "General purpose 32-bit timers", + "block/TIM_CORE": { + "description": "Virtual timer for common parts of all timers", "items": [ { - "name": "CNT", - "description": "counter (Dither mode disabled)", - "byte_offset": 36 + "name": "CR1", + "description": "control register 1", + "byte_offset": 0, + "bit_size": 16, + "fieldset": "CR1_CORE" }, { - "name": "CNT_DITHER", - "description": "counter (Dither mode enbled)", + "name": "DIER", + "description": "DMA/Interrupt enable register", + "byte_offset": 12, + "fieldset": "DIER_CORE" + }, + { + "name": "SR", + "description": "status register", + "byte_offset": 16, + "fieldset": "SR_CORE" + }, + { + "name": "EGR", + "description": "event generation register", + "byte_offset": 20, + "access": "Write", + "bit_size": 16, + "fieldset": "EGR_CORE" + }, + { + "name": "CNT", + "description": "counter", "byte_offset": 36, - "fieldset": "CNT_DITHER_GP32" + "fieldset": "CNT_CORE" }, { - "name": "ARR", - "description": "auto-reload register (Dither mode disabled)", - "byte_offset": 44 + "name": "PSC", + "description": "prescaler", + "byte_offset": 40, + "bit_size": 16 }, { - "name": "ARR_DITHER", - "description": "auto-reload register (Dither mode enabled)", + "name": "ARR", + "description": "auto-reload register", "byte_offset": 44, - "fieldset": "ARR_DITHER_GP32" + "fieldset": "ARR_CORE" }, { - "name": "CCR", - "description": "capture/compare register x (x=1-4) (Dither mode disabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52 - }, + "name": "ARR_DITHER", + "description": "auto-reload register (dither mode enabled)", + "byte_offset": 44, + "fieldset": "ARR_DITHER_CORE" + } + ] + }, + "fieldset/AF1_4CH": { + "description": "alternate function register 1", + "fields": [ { - "name": "CCR_DITHER", - "description": "capture/compare register x (x=1-4) (Dither mode enabled)", - "array": { - "len": 4, - "stride": 4 - }, - "byte_offset": 52, - "fieldset": "CCR_DITHER_GP32" + "name": "ETRSEL", + "description": "etr_in source selection", + "bit_offset": 14, + "bit_size": 4 } ] }, - "fieldset/AF1_1CH_CMP": { + "fieldset/AF1_ADV1CH": { "description": "alternate function register 1", "fields": [ { @@ -784,7 +590,7 @@ }, { "name": "BKCMPP", - "description": "TIM_BRK_CMPx (x=1-4) input polarity", + "description": "TIM_BRK_CMPx (x=1-3) input polarity", "bit_offset": 10, "bit_size": 1, "array": { @@ -795,19 +601,8 @@ } ] }, - "fieldset/AF1_ADV": { - "extends": "AF1_1CH_CMP", - "description": "alternate function register 1", - "fields": [ - { - "name": "ETRSEL", - "description": "etr_in source selection", - "bit_offset": 14, - "bit_size": 4 - } - ] - }, - "fieldset/AF1_GP16": { + "fieldset/AF1_ADV4CH": { + "extends": "AF1_ADV1CH", "description": "alternate function register 1", "fields": [ { @@ -818,19 +613,8 @@ } ] }, - "fieldset/AF2_1CH_CMP": { - "description": "alternate function register 2", - "fields": [ - { - "name": "OCRSEL", - "description": "ocref_clr source selection", - "bit_offset": 16, - "bit_size": 3 - } - ] - }, - "fieldset/AF2_ADV": { - "extends": "AF2_1CH_CMP", + "fieldset/AF2_ADV4CH": { + "extends": "AF2_CCDMA", "description": "alternate function register 2", "fields": [ { @@ -869,8 +653,19 @@ } ] }, + "fieldset/AF2_CCDMA": { + "description": "alternate function register 2", + "fields": [ + { + "name": "OCRSEL", + "description": "ocref_clr source selection", + "bit_offset": 16, + "bit_size": 3 + } + ] + }, "fieldset/ARR_CORE": { - "description": "auto-reload register (Dither mode disabled)", + "description": "auto-reload register", "fields": [ { "name": "ARR", @@ -880,7 +675,7 @@ } ] }, - "fieldset/ARR_DITHER_CORE": { + "fieldset/ARR_DITHER_32BIT": { "description": "auto-reload register (Dither mode enabled)", "fields": [ { @@ -893,11 +688,11 @@ "name": "ARR", "description": "Auto-reload value", "bit_offset": 4, - "bit_size": 16 + "bit_size": 28 } ] }, - "fieldset/ARR_DITHER_GP32": { + "fieldset/ARR_DITHER_CORE": { "description": "auto-reload register (Dither mode enabled)", "fields": [ { @@ -910,11 +705,11 @@ "name": "ARR", "description": "Auto-reload value", "bit_offset": 4, - "bit_size": 28 + "bit_size": 16 } ] }, - "fieldset/BDTR_1CH_CMP": { + "fieldset/BDTR_ADV1CH": { "description": "break and dead-time register", "fields": [ { @@ -946,21 +741,21 @@ }, { "name": "BKE", - "description": "Break x (x=1) enable", + "description": "Break x (x=1,2) enable", "bit_offset": 12, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 } }, { "name": "BKP", - "description": "Break x (x=1) polarity", + "description": "Break x (x=1,2) polarity", "bit_offset": 13, "bit_size": 1, "array": { - "len": 1, + "len": 2, "stride": 12 }, "enum": "BKP" @@ -978,250 +773,41 @@ "bit_size": 1 }, { - "name": "BKF", - "description": "Break x (x=1) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 1, - "stride": 4 - }, - "enum": "FilterValue" - }, - { - "name": "BKDSRM", - "description": "Break x (x=1) Disarm", - "bit_offset": 26, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - }, - "enum": "BKDSRM" - }, - { - "name": "BKBID", - "description": "Break x (x=1) bidirectional", - "bit_offset": 28, - "bit_size": 1, - "array": { - "len": 1, - "stride": 1 - }, - "enum": "BKBID" - } - ] - }, - "fieldset/BDTR_ADV": { - "extends": "BDTR_1CH_CMP", - "description": "break and dead-time register", - "fields": [ - { - "name": "BKE", - "description": "Break x (x=1,2) enable", - "bit_offset": 12, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - } - }, - { - "name": "BKP", - "description": "Break x (x=1,2) polarity", - "bit_offset": 13, - "bit_size": 1, - "array": { - "len": 2, - "stride": 12 - }, - "enum": "BKP" - }, - { - "name": "BKF", - "description": "Break x (x=1,2) filter", - "bit_offset": 16, - "bit_size": 4, - "array": { - "len": 2, - "stride": 4 - }, - "enum": "FilterValue" - }, - { - "name": "BKDSRM", - "description": "Break x (x=1,2) Disarm", - "bit_offset": 26, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - }, - "enum": "BKDSRM" - }, - { - "name": "BKBID", - "description": "Break x (x=1,2) bidirectional", - "bit_offset": 28, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - }, - "enum": "BKBID" - } - ] - }, - "fieldset/CCER_1CH": { - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_1CH_CMP": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH": { - "extends": "CCER_1CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-2) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - }, - { - "name": "CCNP", - "description": "Capture/Compare x (x=1-2) output Polarity", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 2, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_2CH_CMP": { - "extends": "CCER_2CH", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCNE", - "description": "Capture/Compare x (x=1) complementary output enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 4 - } - } - ] - }, - "fieldset/CCER_ADV": { - "extends": "CCER_2CH_CMP", - "description": "capture/compare enable register", - "fields": [ - { - "name": "CCE", - "description": "Capture/Compare x (x=1-6) output enable", - "bit_offset": 0, - "bit_size": 1, - "array": { - "len": 6, - "stride": 4 - } - }, - { - "name": "CCP", - "description": "Capture/Compare x (x=1-6) output Polarity", - "bit_offset": 1, - "bit_size": 1, + "name": "BKF", + "description": "Break x (x=1,2) filter", + "bit_offset": 16, + "bit_size": 4, "array": { - "len": 6, + "len": 2, "stride": 4 - } + }, + "enum": "FilterValue" }, { - "name": "CCNE", - "description": "Capture/Compare x (x=1-4) complementary output enable", - "bit_offset": 2, + "name": "BKDSRM", + "description": "Break x (x=1,2) Disarm", + "bit_offset": 26, "bit_size": 1, "array": { - "len": 4, - "stride": 4 - } + "len": 2, + "stride": 1 + }, + "enum": "BKDSRM" }, { - "name": "CCNP", - "description": "Capture/Compare x (x=1-4) output Polarity", - "bit_offset": 3, + "name": "BKBID", + "description": "Break x (x=1,2) bidirectional", + "bit_offset": 28, "bit_size": 1, "array": { - "len": 4, - "stride": 4 - } + "len": 2, + "stride": 1 + }, + "enum": "BKBID" } ] }, - "fieldset/CCER_GP16": { + "fieldset/CCER_1CH": { "description": "capture/compare enable register", "fields": [ { @@ -1256,7 +842,23 @@ } ] }, - "fieldset/CCMR3_ADV": { + "fieldset/CCER_ADV1CH": { + "extends": "CCER_1CH", + "description": "capture/compare enable register", + "fields": [ + { + "name": "CCNE", + "description": "Capture/Compare x (x=1-4) complementary output enable", + "bit_offset": 2, + "bit_size": 1, + "array": { + "len": 4, + "stride": 4 + } + } + ] + }, + "fieldset/CCMR3_Output_ADV4CH": { "description": "capture/compare mode register 3", "fields": [ { @@ -1312,45 +914,7 @@ ] }, "fieldset/CCMR_Input_1CH": { - "description": "capture/compare mode register x (x=1) (input mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Input_CCS" - }, - { - "name": "ICPSC", - "description": "Input capture y prescaler", - "bit_offset": 2, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "ICF", - "description": "Input capture y filter", - "bit_offset": 4, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "FilterValue" - } - ] - }, - "fieldset/CCMR_Input_2CH": { - "extends": "CCMR_Input_1CH", - "description": "capture/compare mode register x (x=1) (input mode)", + "description": "capture/compare mode register (input mode)", "fields": [ { "name": "CCS", @@ -1387,64 +951,7 @@ ] }, "fieldset/CCMR_Output_1CH": { - "description": "capture/compare mode register x (x=1) (output mode)", - "fields": [ - { - "name": "CCS", - "description": "Capture/Compare y selection", - "bit_offset": 0, - "bit_size": 2, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "CCMR_Output_CCS" - }, - { - "name": "OCFE", - "description": "Output compare y fast enable", - "bit_offset": 2, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCPE", - "description": "Output compare y preload enable", - "bit_offset": 3, - "bit_size": 1, - "array": { - "len": 1, - "stride": 8 - } - }, - { - "name": "OCM", - "description": "Output compare y mode", - "bit_offset": [ - { - "start": 4, - "end": 6 - }, - { - "start": 16, - "end": 16 - } - ], - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - }, - "enum": "OCM" - } - ] - }, - "fieldset/CCMR_Output_2CH": { - "extends": "CCMR_Output_1CH", - "description": "capture/compare mode register x (x=1) (output mode)", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "CCS", @@ -1499,9 +1006,9 @@ } ] }, - "fieldset/CCMR_Output_GP16": { - "extends": "CCMR_Output_2CH", - "description": "capture/compare mode register x (x=1-2) (output mode)", + "fieldset/CCMR_Output_4CH": { + "extends": "CCMR_Output_1CH", + "description": "capture/compare mode register (output mode)", "fields": [ { "name": "OCCE", @@ -1515,9 +1022,9 @@ } ] }, - "fieldset/CCR5_ADV": { + "fieldset/CCR5_ADV4CH": { "extends": "CCR_1CH", - "description": "capture/compare register 5 (Dither mode disabled)", + "description": "capture/compare register 5", "fields": [ { "name": "GC5C", @@ -1532,9 +1039,9 @@ } ] }, - "fieldset/CCR5_DITHER_ADV": { + "fieldset/CCR5_DITHER_ADV4CH": { "extends": "CCR_DITHER_1CH", - "description": "capture/compare register 5 (Dither mode enabled)", + "description": "capture/compare register 5", "fields": [ { "name": "GC5C", @@ -1550,7 +1057,7 @@ ] }, "fieldset/CCR_1CH": { - "description": "capture/compare register x (x=1-4,6) (Dither mode disabled)", + "description": "capture/compare register x (x=1-4,6)", "fields": [ { "name": "CCR", @@ -1577,7 +1084,7 @@ } ] }, - "fieldset/CCR_DITHER_GP32": { + "fieldset/CCR_DITHER_32BIT": { "description": "capture/compare register x (x=1-4,6) (Dither mode enabled)", "fields": [ { @@ -1611,8 +1118,8 @@ } ] }, - "fieldset/CNT_DITHER_GP32": { - "description": "counter (Dither mode enabled)", + "fieldset/CNT_DITHER_32BIT": { + "description": "counter (dither mode enabled)", "fields": [ { "name": "CNT", @@ -1641,6 +1148,31 @@ } ] }, + "fieldset/CR1_2CH": { + "extends": "CR1_1CH", + "description": "control register 1", + "fields": [] + }, + "fieldset/CR1_4CH": { + "extends": "CR1_2CH", + "description": "control register 1", + "fields": [ + { + "name": "DIR", + "description": "Direction", + "bit_offset": 4, + "bit_size": 1, + "enum": "DIR" + }, + { + "name": "CMS", + "description": "Center-aligned mode selection", + "bit_offset": 5, + "bit_size": 2, + "enum": "CMS" + } + ] + }, "fieldset/CR1_CORE": { "description": "control register 1", "fields": [ @@ -1689,34 +1221,21 @@ } ] }, - "fieldset/CR1_GP16": { - "extends": "CR1_CORE", - "description": "control register 1", + "fieldset/CR2_2CH": { + "extends": "CR2_MMS", + "description": "control register 2", "fields": [ { - "name": "DIR", - "description": "Direction", - "bit_offset": 4, + "name": "TI1S", + "description": "TI1 selection", + "bit_offset": 7, "bit_size": 1, - "enum": "DIR" - }, - { - "name": "CMS", - "description": "Center-aligned mode selection", - "bit_offset": 5, - "bit_size": 2, - "enum": "CMS" - }, - { - "name": "CKD", - "description": "Clock division", - "bit_offset": 8, - "bit_size": 2, - "enum": "CKD" + "enum": "TI1S" } ] }, - "fieldset/CR2_1CH_CMP": { + "fieldset/CR2_ADV1CH": { + "extends": "CR2_CCDMA", "description": "control register 2", "fields": [ { @@ -1731,36 +1250,30 @@ "bit_offset": 2, "bit_size": 1 }, - { - "name": "CCDS", - "description": "Capture/compare DMA selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "CCDS" - }, { "name": "OIS", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x (x=1-6)", "bit_offset": 8, "bit_size": 1, "array": { - "len": 1, + "len": 6, "stride": 2 } }, { "name": "OISN", - "description": "Output Idle state x (x=1)", + "description": "Output Idle state x N x (x=1-4)", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 2 } } ] }, - "fieldset/CR2_2CH": { + "fieldset/CR2_ADV2CH": { + "extends": "CR2_ADV1CH", "description": "control register 2", "fields": [ { @@ -1788,79 +1301,32 @@ } ] }, - "fieldset/CR2_2CH_CMP": { - "extends": "CR2_1CH_CMP", + "fieldset/CR2_ADV4CH": { + "extends": "CR2_ADV2CH", "description": "control register 2", "fields": [ { - "name": "MMS", - "description": "Master mode selection", - "bit_offset": [ - { - "start": 4, - "end": 6 - }, - { - "start": 25, - "end": 25 - } - ], + "name": "MMS2", + "description": "Master mode selection 2", + "bit_offset": 20, "bit_size": 4, - "enum": "MMS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" - }, - { - "name": "OIS", - "description": "Output Idle state x (x=1,2)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 2, - "stride": 2 - } + "enum": "MMS2" } ] }, - "fieldset/CR2_ADV": { - "extends": "CR2_2CH_CMP", + "fieldset/CR2_CCDMA": { "description": "control register 2", "fields": [ { - "name": "OIS", - "description": "Output Idle state x (x=1-6)", - "bit_offset": 8, - "bit_size": 1, - "array": { - "len": 6, - "stride": 2 - } - }, - { - "name": "OISN", - "description": "Output Idle state x N x (x=1-4)", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 2 - } - }, - { - "name": "MMS2", - "description": "Master mode selection 2", - "bit_offset": 20, - "bit_size": 4, - "enum": "MMS2" + "name": "CCDS", + "description": "Capture/compare DMA selection", + "bit_offset": 3, + "bit_size": 1, + "enum": "CCDS" } ] }, - "fieldset/CR2_BASIC": { + "fieldset/CR2_MMS": { "description": "control register 2", "fields": [ { @@ -1881,8 +1347,8 @@ } ] }, - "fieldset/CR2_GP16": { - "extends": "CR2_BASIC", + "fieldset/CR2_TRIGDMA": { + "extends": "CR2_2CH", "description": "control register 2", "fields": [ { @@ -1891,17 +1357,10 @@ "bit_offset": 3, "bit_size": 1, "enum": "CCDS" - }, - { - "name": "TI1S", - "description": "TI1 selection", - "bit_offset": 7, - "bit_size": 1, - "enum": "TI1S" } ] }, - "fieldset/DCR_1CH_CMP": { + "fieldset/DCR_CCDMA": { "description": "DMA control register", "fields": [ { @@ -1931,45 +1390,11 @@ "fields": [ { "name": "CCIE", - "description": "Capture/Compare x (x=1) interrupt enable", + "description": "Capture/Compare x (x=1-4) interrupt enable", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/DIER_1CH_CMP": { - "extends": "DIER_1CH", - "description": "DMA/Interrupt enable register", - "fields": [ - { - "name": "COMIE", - "description": "COM interrupt enable", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIE", - "description": "Break interrupt enable", - "bit_offset": 7, - "bit_size": 1 - }, - { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -1979,16 +1404,6 @@ "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-2) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIE", "description": "Trigger interrupt enable", @@ -1997,32 +1412,38 @@ } ] }, - "fieldset/DIER_2CH_CMP": { - "extends": "DIER_1CH_CMP", + "fieldset/DIER_4CH": { + "extends": "DIER_TRIGDMA", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, + "name": "IDXIE", + "description": "Index interrupt enable", + "bit_offset": 20, "bit_size": 1 }, { - "name": "COMDE", - "description": "COM DMA request enable", - "bit_offset": 13, + "name": "DIRIE", + "description": "Direction change interrupt enable", + "bit_offset": 21, "bit_size": 1 }, { - "name": "TDE", - "description": "Trigger DMA request enable", - "bit_offset": 14, + "name": "IERRIE", + "description": "Index error interrupt enable", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "TERRIE", + "description": "Transition error interrupt enable", + "bit_offset": 23, "bit_size": 1 } ] }, - "fieldset/DIER_ADV": { - "extends": "DIER_2CH_CMP", + "fieldset/DIER_ADV1CH": { + "extends": "DIER_UPDMA", "description": "DMA/Interrupt enable register", "fields": [ { @@ -2035,6 +1456,12 @@ "stride": 1 } }, + { + "name": "COMIE", + "description": "COM interrupt enable", + "bit_offset": 5, + "bit_size": 1 + }, { "name": "BIE", "description": "Break interrupt enable", @@ -2043,14 +1470,38 @@ }, { "name": "CCDE", - "description": "Capture/Compare x (x=1) DMA request enable", + "description": "Capture/Compare x (x=1-4) DMA request enable", "bit_offset": 9, "bit_size": 1, "array": { "len": 4, "stride": 1 } + } + ] + }, + "fieldset/DIER_ADV2CH": { + "extends": "DIER_ADV1CH", + "description": "DMA/Interrupt enable register", + "fields": [ + { + "name": "COMDE", + "description": "COM DMA request enable", + "bit_offset": 13, + "bit_size": 1 }, + { + "name": "TDE", + "description": "Trigger DMA request enable", + "bit_offset": 14, + "bit_size": 1 + } + ] + }, + "fieldset/DIER_ADV4CH": { + "extends": "DIER_ADV2CH", + "description": "DMA/Interrupt enable register", + "fields": [ { "name": "IDXIE", "description": "Index interrupt enable", @@ -2077,15 +1528,19 @@ } ] }, - "fieldset/DIER_BASIC_NO_CR2": { - "extends": "DIER_CORE", + "fieldset/DIER_CCDMA": { + "extends": "DIER_1CH", "description": "DMA/Interrupt enable register", "fields": [ { - "name": "UDE", - "description": "Update DMA request enable", - "bit_offset": 8, - "bit_size": 1 + "name": "CCDE", + "description": "Capture/Compare x (x=1-4) DMA request enable", + "bit_offset": 9, + "bit_size": 1, + "array": { + "len": 4, + "stride": 1 + } } ] }, @@ -2100,69 +1555,31 @@ } ] }, - "fieldset/DIER_GP16": { - "extends": "DIER_BASIC_NO_CR2", + "fieldset/DIER_TRIGDMA": { + "extends": "DIER_CCDMA", "description": "DMA/Interrupt enable register", "fields": [ - { - "name": "CCIE", - "description": "Capture/Compare x (x=1-4) interrupt enable", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIE", - "description": "Trigger interrupt enable", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCDE", - "description": "Capture/Compare x (x=1-4) DMA request enable", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, { "name": "TDE", "description": "Trigger DMA request enable", "bit_offset": 14, "bit_size": 1 - }, - { - "name": "IDXIE", - "description": "Index interrupt enable", - "bit_offset": 20, - "bit_size": 1 - }, - { - "name": "DIRIE", - "description": "Direction change interrupt enable", - "bit_offset": 21, - "bit_size": 1 - }, - { - "name": "IERRIE", - "description": "Index error interrupt enable", - "bit_offset": 22, - "bit_size": 1 - }, + } + ] + }, + "fieldset/DIER_UPDMA": { + "extends": "DIER_CORE", + "description": "DMA/Interrupt enable register", + "fields": [ { - "name": "TERRIE", - "description": "Transition error interrupt enable", - "bit_offset": 23, + "name": "UDE", + "description": "Update DMA request enable", + "bit_offset": 8, "bit_size": 1 } ] }, - "fieldset/DTR2_1CH_CMP": { + "fieldset/DTR2_ADV1CH": { "description": "deadtime register 2", "fields": [ { @@ -2186,7 +1603,7 @@ } ] }, - "fieldset/ECR_GP16": { + "fieldset/ECR_4CH": { "description": "encoder control register", "fields": [ { @@ -2242,33 +1659,11 @@ "fields": [ { "name": "CCG", - "description": "Capture/compare x (x=1) generation", + "description": "Capture/compare x (x=1-4) generation", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/EGR_1CH_CMP": { - "extends": "EGR_1CH", - "description": "event generation register", - "fields": [ - { - "name": "COMG", - "description": "Capture/Compare control update generation", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BG", - "description": "Break x (x=1) generation", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -2278,16 +1673,6 @@ "extends": "EGR_1CH", "description": "event generation register", "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TG", "description": "Trigger generation", @@ -2296,41 +1681,15 @@ } ] }, - "fieldset/EGR_2CH_CMP": { - "extends": "EGR_1CH_CMP", + "fieldset/EGR_ADV1CH": { + "extends": "EGR_1CH", "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1,2) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "COMG", + "description": "Capture/Compare control update generation", + "bit_offset": 5, "bit_size": 1 - } - ] - }, - "fieldset/EGR_ADV": { - "extends": "EGR_2CH_CMP", - "description": "event generation register", - "fields": [ - { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } }, { "name": "BG", @@ -2344,40 +1703,30 @@ } ] }, - "fieldset/EGR_CORE": { + "fieldset/EGR_ADV2CH": { + "extends": "EGR_ADV1CH", "description": "event generation register", "fields": [ { - "name": "UG", - "description": "Update generation", - "bit_offset": 0, + "name": "TG", + "description": "Trigger generation", + "bit_offset": 6, "bit_size": 1 } ] }, - "fieldset/EGR_GP16": { - "extends": "EGR_CORE", + "fieldset/EGR_CORE": { "description": "event generation register", "fields": [ { - "name": "CCG", - "description": "Capture/compare x (x=1-4) generation", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TG", - "description": "Trigger generation", - "bit_offset": 6, + "name": "UG", + "description": "Update generation", + "bit_offset": 0, "bit_size": 1 } ] }, - "fieldset/RCR_1CH_CMP": { + "fieldset/RCR_ADV1CH": { "description": "repetition counter register", "fields": [ { @@ -2388,7 +1737,7 @@ } ] }, - "fieldset/RCR_ADV": { + "fieldset/RCR_ADV4CH": { "description": "repetition counter register", "fields": [ { @@ -2443,29 +1792,10 @@ } ] }, - "fieldset/SMCR_2CH_CMP": { - "extends": "SMCR_2CH", - "description": "slave mode control register", - "fields": [ - { - "name": "SMSPE", - "description": "SMS preload enable", - "bit_offset": 24, - "bit_size": 1 - } - ] - }, - "fieldset/SMCR_ADV": { - "extends": "SMCR_2CH_CMP", + "fieldset/SMCR_4CH": { + "extends": "SMCR_TRIGDMA", "description": "slave mode control register", "fields": [ - { - "name": "OCCS", - "description": "OCREF clear selection", - "bit_offset": 3, - "bit_size": 1, - "enum": "OCCS" - }, { "name": "ETF", "description": "External trigger filter", @@ -2502,49 +1832,28 @@ } ] }, - "fieldset/SMCR_GP16": { - "extends": "SMCR_2CH", + "fieldset/SMCR_ADV4CH": { + "extends": "SMCR_4CH", "description": "slave mode control register", "fields": [ { - "name": "ETF", - "description": "External trigger filter", - "bit_offset": 8, - "bit_size": 4, - "enum": "FilterValue" - }, - { - "name": "ETPS", - "description": "External trigger prescaler", - "bit_offset": 12, - "bit_size": 2, - "enum": "ETPS" - }, - { - "name": "ECE", - "description": "External clock mode 2 enable", - "bit_offset": 14, - "bit_size": 1 - }, - { - "name": "ETP", - "description": "External trigger polarity", - "bit_offset": 15, + "name": "OCCS", + "description": "OCREF clear selection", + "bit_offset": 3, "bit_size": 1, - "enum": "ETP" - }, + "enum": "OCCS" + } + ] + }, + "fieldset/SMCR_TRIGDMA": { + "extends": "SMCR_2CH", + "description": "slave mode control register", + "fields": [ { "name": "SMSPE", "description": "SMS preload enable", "bit_offset": 24, "bit_size": 1 - }, - { - "name": "SMSPS", - "description": "SMS preload source", - "bit_offset": 25, - "bit_size": 1, - "enum": "SMSPS" } ] }, @@ -2554,43 +1863,21 @@ "fields": [ { "name": "CCIF", - "description": "Capture/compare x (x=1) interrupt flag", + "description": "Capture/compare x (x=1-4) interrupt flag", "bit_offset": 1, "bit_size": 1, "array": { - "len": 1, + "len": 4, "stride": 1 } }, { "name": "CCOF", - "description": "Capture/Compare x (x=1) overcapture flag", + "description": "Capture/Compare x (x=1-4) overcapture flag", "bit_offset": 9, "bit_size": 1, "array": { - "len": 1, - "stride": 1 - } - } - ] - }, - "fieldset/SR_1CH_CMP": { - "extends": "SR_1CH", - "description": "status register", - "fields": [ - { - "name": "COMIF", - "description": "COM interrupt flag", - "bit_offset": 5, - "bit_size": 1 - }, - { - "name": "BIF", - "description": "Break x (x=1) interrupt flag", - "bit_offset": 7, - "bit_size": 1, - "array": { - "len": 1, + "len": 4, "stride": 1 } } @@ -2600,79 +1887,53 @@ "extends": "SR_1CH", "description": "status register", "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } - }, { "name": "TIF", "description": "Trigger interrupt flag", "bit_offset": 6, "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } } ] }, - "fieldset/SR_2CH_CMP": { - "extends": "SR_1CH_CMP", + "fieldset/SR_4CH": { + "extends": "SR_2CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1,2) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } + "name": "IDXIF", + "description": "Index interrupt flag", + "bit_offset": 20, + "bit_size": 1 }, { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, + "name": "DIRIF", + "description": "Direction change interrupt flag", + "bit_offset": 21, "bit_size": 1 }, { - "name": "CCOF", - "description": "Capture/Compare x (x=1,2) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 2, - "stride": 1 - } + "name": "IERRIF", + "description": "Index error interrupt flag", + "bit_offset": 22, + "bit_size": 1 + }, + { + "name": "TERRIF", + "description": "Transition error interrupt flag", + "bit_offset": 23, + "bit_size": 1 } ] }, - "fieldset/SR_ADV": { - "extends": "SR_2CH_CMP", + "fieldset/SR_ADV1CH": { + "extends": "SR_1CH", "description": "status register", "fields": [ { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } + "name": "COMIF", + "description": "COM interrupt flag", + "bit_offset": 5, + "bit_size": 1 }, { "name": "BIF", @@ -2683,17 +1944,25 @@ "len": 2, "stride": 1 } - }, + } + ] + }, + "fieldset/SR_ADV2CH": { + "extends": "SR_ADV1CH", + "description": "status register", + "fields": [ { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, + "name": "TIF", + "description": "Trigger interrupt flag", + "bit_offset": 6, + "bit_size": 1 + } + ] + }, + "fieldset/SR_ADV4CH": { + "extends": "SR_ADV2CH", + "description": "status register", + "fields": [ { "name": "SBIF", "description": "System break interrupt flag", @@ -2749,94 +2018,7 @@ } ] }, - "fieldset/SR_GP16": { - "extends": "SR_CORE", - "description": "status register", - "fields": [ - { - "name": "CCIF", - "description": "Capture/compare x (x=1-4) interrupt flag", - "bit_offset": 1, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "TIF", - "description": "Trigger interrupt flag", - "bit_offset": 6, - "bit_size": 1 - }, - { - "name": "CCOF", - "description": "Capture/Compare x (x=1-4) overcapture flag", - "bit_offset": 9, - "bit_size": 1, - "array": { - "len": 4, - "stride": 1 - } - }, - { - "name": "IDXIF", - "description": "Index interrupt flag", - "bit_offset": 20, - "bit_size": 1 - }, - { - "name": "DIRIF", - "description": "Direction change interrupt flag", - "bit_offset": 21, - "bit_size": 1 - }, - { - "name": "IERRIF", - "description": "Index error interrupt flag", - "bit_offset": 22, - "bit_size": 1 - }, - { - "name": "TERRIF", - "description": "Transition error interrupt flag", - "bit_offset": 23, - "bit_size": 1 - } - ] - }, "fieldset/TISEL_1CH": { - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 1, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_2CH": { - "extends": "TISEL_1CH", - "description": "input selection register", - "fields": [ - { - "name": "TISEL", - "description": "Selects TIM_TIx (x=1-2) input", - "bit_offset": 0, - "bit_size": 4, - "array": { - "len": 2, - "stride": 8 - } - } - ] - }, - "fieldset/TISEL_GP16": { "description": "input selection register", "fields": [ {