diff --git a/data/chips/STM32F301C6.json b/data/chips/STM32F301C6.json index dbdd2ab..0584876 100644 --- a/data/chips/STM32F301C6.json +++ b/data/chips/STM32F301C6.json @@ -1726,6 +1726,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F301C8.json b/data/chips/STM32F301C8.json index a93de2d..869563a 100644 --- a/data/chips/STM32F301C8.json +++ b/data/chips/STM32F301C8.json @@ -2032,6 +2032,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F301K6.json b/data/chips/STM32F301K6.json index 22d691e..2fd0b51 100644 --- a/data/chips/STM32F301K6.json +++ b/data/chips/STM32F301K6.json @@ -1690,6 +1690,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F301K8.json b/data/chips/STM32F301K8.json index 82b50a0..d4ed060 100644 --- a/data/chips/STM32F301K8.json +++ b/data/chips/STM32F301K8.json @@ -1696,6 +1696,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F301R6.json b/data/chips/STM32F301R6.json index 004c258..5a14b2c 100644 --- a/data/chips/STM32F301R6.json +++ b/data/chips/STM32F301R6.json @@ -1896,6 +1896,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F301R8.json b/data/chips/STM32F301R8.json index 002106c..113c0ab 100644 --- a/data/chips/STM32F301R8.json +++ b/data/chips/STM32F301R8.json @@ -1902,6 +1902,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302C6.json b/data/chips/STM32F302C6.json index 39b2b6e..58c53fc 100644 --- a/data/chips/STM32F302C6.json +++ b/data/chips/STM32F302C6.json @@ -1799,6 +1799,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302C8.json b/data/chips/STM32F302C8.json index 8dad0c7..eaa3545 100644 --- a/data/chips/STM32F302C8.json +++ b/data/chips/STM32F302C8.json @@ -2099,6 +2099,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302CB.json b/data/chips/STM32F302CB.json index 690a5ff..d1ce1fa 100644 --- a/data/chips/STM32F302CB.json +++ b/data/chips/STM32F302CB.json @@ -2032,6 +2032,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302CC.json b/data/chips/STM32F302CC.json index db368a9..7737b38 100644 --- a/data/chips/STM32F302CC.json +++ b/data/chips/STM32F302CC.json @@ -2032,6 +2032,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302K6.json b/data/chips/STM32F302K6.json index 9fea8b7..0ee212d 100644 --- a/data/chips/STM32F302K6.json +++ b/data/chips/STM32F302K6.json @@ -1546,6 +1546,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302K8.json b/data/chips/STM32F302K8.json index 118658e..e8acdb2 100644 --- a/data/chips/STM32F302K8.json +++ b/data/chips/STM32F302K8.json @@ -1546,6 +1546,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302R6.json b/data/chips/STM32F302R6.json index c4c6a45..9b20707 100644 --- a/data/chips/STM32F302R6.json +++ b/data/chips/STM32F302R6.json @@ -1969,6 +1969,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302R8.json b/data/chips/STM32F302R8.json index d6f385a..72acdbf 100644 --- a/data/chips/STM32F302R8.json +++ b/data/chips/STM32F302R8.json @@ -1969,6 +1969,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302RB.json b/data/chips/STM32F302RB.json index e1d8330..fe22604 100644 --- a/data/chips/STM32F302RB.json +++ b/data/chips/STM32F302RB.json @@ -2238,6 +2238,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302RC.json b/data/chips/STM32F302RC.json index b38be45..5232098 100644 --- a/data/chips/STM32F302RC.json +++ b/data/chips/STM32F302RC.json @@ -2238,6 +2238,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302RD.json b/data/chips/STM32F302RD.json index ec0caff..15fe97d 100644 --- a/data/chips/STM32F302RD.json +++ b/data/chips/STM32F302RD.json @@ -2370,6 +2370,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302RE.json b/data/chips/STM32F302RE.json index cab44b2..a751b9b 100644 --- a/data/chips/STM32F302RE.json +++ b/data/chips/STM32F302RE.json @@ -2370,6 +2370,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302VB.json b/data/chips/STM32F302VB.json index 88071b3..bb12708 100644 --- a/data/chips/STM32F302VB.json +++ b/data/chips/STM32F302VB.json @@ -2520,6 +2520,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302VC.json b/data/chips/STM32F302VC.json index 429220e..573a5cd 100644 --- a/data/chips/STM32F302VC.json +++ b/data/chips/STM32F302VC.json @@ -3126,6 +3126,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302VD.json b/data/chips/STM32F302VD.json index 4fb8724..818c4ca 100644 --- a/data/chips/STM32F302VD.json +++ b/data/chips/STM32F302VD.json @@ -3615,6 +3615,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302VE.json b/data/chips/STM32F302VE.json index cb9215a..2498ab7 100644 --- a/data/chips/STM32F302VE.json +++ b/data/chips/STM32F302VE.json @@ -3615,6 +3615,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302ZD.json b/data/chips/STM32F302ZD.json index 1e81437..5fce650 100644 --- a/data/chips/STM32F302ZD.json +++ b/data/chips/STM32F302ZD.json @@ -3417,6 +3417,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F302ZE.json b/data/chips/STM32F302ZE.json index a4b45ac..a863a83 100644 --- a/data/chips/STM32F302ZE.json +++ b/data/chips/STM32F302ZE.json @@ -3417,6 +3417,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303C6.json b/data/chips/STM32F303C6.json index 6443638..1733ebb 100644 --- a/data/chips/STM32F303C6.json +++ b/data/chips/STM32F303C6.json @@ -1697,6 +1697,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303C8.json b/data/chips/STM32F303C8.json index dd56fa0..b7d4548 100644 --- a/data/chips/STM32F303C8.json +++ b/data/chips/STM32F303C8.json @@ -1997,6 +1997,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303CB.json b/data/chips/STM32F303CB.json index 3e1f835..b7cc5d5 100644 --- a/data/chips/STM32F303CB.json +++ b/data/chips/STM32F303CB.json @@ -2399,6 +2399,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303CC.json b/data/chips/STM32F303CC.json index 25e9f3a..8231762 100644 --- a/data/chips/STM32F303CC.json +++ b/data/chips/STM32F303CC.json @@ -2399,6 +2399,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303K6.json b/data/chips/STM32F303K6.json index 092a84f..3c3da19 100644 --- a/data/chips/STM32F303K6.json +++ b/data/chips/STM32F303K6.json @@ -1661,6 +1661,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303K8.json b/data/chips/STM32F303K8.json index dd7c8f4..2aa55b9 100644 --- a/data/chips/STM32F303K8.json +++ b/data/chips/STM32F303K8.json @@ -1661,6 +1661,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303R6.json b/data/chips/STM32F303R6.json index c911f83..f8e79d7 100644 --- a/data/chips/STM32F303R6.json +++ b/data/chips/STM32F303R6.json @@ -1822,6 +1822,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303R8.json b/data/chips/STM32F303R8.json index 784ef22..c36c894 100644 --- a/data/chips/STM32F303R8.json +++ b/data/chips/STM32F303R8.json @@ -1822,6 +1822,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303RB.json b/data/chips/STM32F303RB.json index 8b36fc6..1b372df 100644 --- a/data/chips/STM32F303RB.json +++ b/data/chips/STM32F303RB.json @@ -2628,6 +2628,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303RC.json b/data/chips/STM32F303RC.json index b2cc06d..306b7b2 100644 --- a/data/chips/STM32F303RC.json +++ b/data/chips/STM32F303RC.json @@ -2634,6 +2634,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303RD.json b/data/chips/STM32F303RD.json index 7c1c177..f8e2667 100644 --- a/data/chips/STM32F303RD.json +++ b/data/chips/STM32F303RD.json @@ -2756,6 +2756,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303RE.json b/data/chips/STM32F303RE.json index c019685..ca3b708 100644 --- a/data/chips/STM32F303RE.json +++ b/data/chips/STM32F303RE.json @@ -2756,6 +2756,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303VB.json b/data/chips/STM32F303VB.json index babae90..207f1b1 100644 --- a/data/chips/STM32F303VB.json +++ b/data/chips/STM32F303VB.json @@ -3030,6 +3030,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303VC.json b/data/chips/STM32F303VC.json index 9977354..49873bb 100644 --- a/data/chips/STM32F303VC.json +++ b/data/chips/STM32F303VC.json @@ -3636,6 +3636,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303VD.json b/data/chips/STM32F303VD.json index 9b1b724..cc64f3d 100644 --- a/data/chips/STM32F303VD.json +++ b/data/chips/STM32F303VD.json @@ -4113,6 +4113,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303VE.json b/data/chips/STM32F303VE.json index a778264..588c967 100644 --- a/data/chips/STM32F303VE.json +++ b/data/chips/STM32F303VE.json @@ -4719,6 +4719,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303ZD.json b/data/chips/STM32F303ZD.json index cd616ab..15bd700 100644 --- a/data/chips/STM32F303ZD.json +++ b/data/chips/STM32F303ZD.json @@ -3915,6 +3915,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F303ZE.json b/data/chips/STM32F303ZE.json index f918eb8..a7a1aeb 100644 --- a/data/chips/STM32F303ZE.json +++ b/data/chips/STM32F303ZE.json @@ -3915,6 +3915,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F318C8.json b/data/chips/STM32F318C8.json index ba81f21..45a3e5c 100644 --- a/data/chips/STM32F318C8.json +++ b/data/chips/STM32F318C8.json @@ -2022,6 +2022,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F318K8.json b/data/chips/STM32F318K8.json index ac8c200..84e0d9d 100644 --- a/data/chips/STM32F318K8.json +++ b/data/chips/STM32F318K8.json @@ -1478,6 +1478,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F328C8.json b/data/chips/STM32F328C8.json index ed172d5..ab34cc8 100644 --- a/data/chips/STM32F328C8.json +++ b/data/chips/STM32F328C8.json @@ -1641,6 +1641,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F334C4.json b/data/chips/STM32F334C4.json index b13571b..a64e116 100644 --- a/data/chips/STM32F334C4.json +++ b/data/chips/STM32F334C4.json @@ -1904,6 +1904,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F334C6.json b/data/chips/STM32F334C6.json index a932260..5b66bfb 100644 --- a/data/chips/STM32F334C6.json +++ b/data/chips/STM32F334C6.json @@ -1904,6 +1904,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F334C8.json b/data/chips/STM32F334C8.json index 373da39..7f386a2 100644 --- a/data/chips/STM32F334C8.json +++ b/data/chips/STM32F334C8.json @@ -2204,6 +2204,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F334K4.json b/data/chips/STM32F334K4.json index 0b68de8..04f69c0 100644 --- a/data/chips/STM32F334K4.json +++ b/data/chips/STM32F334K4.json @@ -1818,6 +1818,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F334K6.json b/data/chips/STM32F334K6.json index a44b618..28eab4c 100644 --- a/data/chips/STM32F334K6.json +++ b/data/chips/STM32F334K6.json @@ -1818,6 +1818,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F334K8.json b/data/chips/STM32F334K8.json index fb8916e..6dffb53 100644 --- a/data/chips/STM32F334K8.json +++ b/data/chips/STM32F334K8.json @@ -1818,6 +1818,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F334R6.json b/data/chips/STM32F334R6.json index 9c1fb40..6db6cbb 100644 --- a/data/chips/STM32F334R6.json +++ b/data/chips/STM32F334R6.json @@ -2054,6 +2054,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F334R8.json b/data/chips/STM32F334R8.json index 4b88135..91f076f 100644 --- a/data/chips/STM32F334R8.json +++ b/data/chips/STM32F334R8.json @@ -2054,6 +2054,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F358CC.json b/data/chips/STM32F358CC.json index efbfc2c..827af05 100644 --- a/data/chips/STM32F358CC.json +++ b/data/chips/STM32F358CC.json @@ -2347,6 +2347,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F358RC.json b/data/chips/STM32F358RC.json index 991329a..310c72e 100644 --- a/data/chips/STM32F358RC.json +++ b/data/chips/STM32F358RC.json @@ -2576,6 +2576,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F358VC.json b/data/chips/STM32F358VC.json index c64369b..c3fb013 100644 --- a/data/chips/STM32F358VC.json +++ b/data/chips/STM32F358VC.json @@ -2978,6 +2978,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32F373C8.json b/data/chips/STM32F373C8.json index 5523c27..af23ee9 100644 --- a/data/chips/STM32F373C8.json +++ b/data/chips/STM32F373C8.json @@ -2181,6 +2181,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F373CB.json b/data/chips/STM32F373CB.json index c9119c0..bbe3c09 100644 --- a/data/chips/STM32F373CB.json +++ b/data/chips/STM32F373CB.json @@ -2181,6 +2181,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F373CC.json b/data/chips/STM32F373CC.json index 364c296..c2408ff 100644 --- a/data/chips/STM32F373CC.json +++ b/data/chips/STM32F373CC.json @@ -2181,6 +2181,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F373R8.json b/data/chips/STM32F373R8.json index 4eb5a4a..6ed8f82 100644 --- a/data/chips/STM32F373R8.json +++ b/data/chips/STM32F373R8.json @@ -2410,6 +2410,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F373RB.json b/data/chips/STM32F373RB.json index bf2ff91..5787cb6 100644 --- a/data/chips/STM32F373RB.json +++ b/data/chips/STM32F373RB.json @@ -2410,6 +2410,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F373RC.json b/data/chips/STM32F373RC.json index 76cf576..2822a82 100644 --- a/data/chips/STM32F373RC.json +++ b/data/chips/STM32F373RC.json @@ -2410,6 +2410,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F373V8.json b/data/chips/STM32F373V8.json index 91e6113..621502d 100644 --- a/data/chips/STM32F373V8.json +++ b/data/chips/STM32F373V8.json @@ -3404,6 +3404,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F373VB.json b/data/chips/STM32F373VB.json index 9abab94..6bdf9c2 100644 --- a/data/chips/STM32F373VB.json +++ b/data/chips/STM32F373VB.json @@ -3404,6 +3404,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F373VC.json b/data/chips/STM32F373VC.json index 86b7cd3..1418e26 100644 --- a/data/chips/STM32F373VC.json +++ b/data/chips/STM32F373VC.json @@ -3404,6 +3404,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F378CC.json b/data/chips/STM32F378CC.json index fe7ab00..d08d9fb 100644 --- a/data/chips/STM32F378CC.json +++ b/data/chips/STM32F378CC.json @@ -2130,6 +2130,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F378RC.json b/data/chips/STM32F378RC.json index beb5868..93a9ead 100644 --- a/data/chips/STM32F378RC.json +++ b/data/chips/STM32F378RC.json @@ -2761,6 +2761,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F378VC.json b/data/chips/STM32F378VC.json index 8c84055..16db26d 100644 --- a/data/chips/STM32F378VC.json +++ b/data/chips/STM32F378VC.json @@ -3353,6 +3353,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM12", "address": 1073747968, diff --git a/data/chips/STM32F398VE.json b/data/chips/STM32F398VE.json index c8f38a7..1584d22 100644 --- a/data/chips/STM32F398VE.json +++ b/data/chips/STM32F398VE.json @@ -3461,6 +3461,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835512, + "registers": { + "kind": "tempcal", + "version": "v1", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32G030C6.json b/data/chips/STM32G030C6.json index b06e9c9..c20dade 100644 --- a/data/chips/STM32G030C6.json +++ b/data/chips/STM32G030C6.json @@ -1559,6 +1559,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2327,6 +2336,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G030C8.json b/data/chips/STM32G030C8.json index eb357e0..695fee7 100644 --- a/data/chips/STM32G030C8.json +++ b/data/chips/STM32G030C8.json @@ -1559,6 +1559,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2327,6 +2336,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G030F6.json b/data/chips/STM32G030F6.json index 8b6635a..f161283 100644 --- a/data/chips/STM32G030F6.json +++ b/data/chips/STM32G030F6.json @@ -1312,6 +1312,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2005,6 +2014,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G030J6.json b/data/chips/STM32G030J6.json index 093ba9a..fee7a5d 100644 --- a/data/chips/STM32G030J6.json +++ b/data/chips/STM32G030J6.json @@ -1114,6 +1114,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -1722,6 +1731,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G030K6.json b/data/chips/STM32G030K6.json index d2c5109..a2f4a9a 100644 --- a/data/chips/STM32G030K6.json +++ b/data/chips/STM32G030K6.json @@ -1377,6 +1377,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2075,6 +2084,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G030K8.json b/data/chips/STM32G030K8.json index 809e283..e2c249b 100644 --- a/data/chips/STM32G030K8.json +++ b/data/chips/STM32G030K8.json @@ -1377,6 +1377,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2075,6 +2084,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031C4.json b/data/chips/STM32G031C4.json index 771b5e1..e194f02 100644 --- a/data/chips/STM32G031C4.json +++ b/data/chips/STM32G031C4.json @@ -2073,6 +2073,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2988,6 +2997,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031C6.json b/data/chips/STM32G031C6.json index 2dfaf76..d9f3d7f 100644 --- a/data/chips/STM32G031C6.json +++ b/data/chips/STM32G031C6.json @@ -2073,6 +2073,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2988,6 +2997,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031C8.json b/data/chips/STM32G031C8.json index 3dcb050..ab70c2b 100644 --- a/data/chips/STM32G031C8.json +++ b/data/chips/STM32G031C8.json @@ -2073,6 +2073,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2988,6 +2997,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031F4.json b/data/chips/STM32G031F4.json index e3853c8..8ac9d97 100644 --- a/data/chips/STM32G031F4.json +++ b/data/chips/STM32G031F4.json @@ -1503,6 +1503,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2323,6 +2332,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031F6.json b/data/chips/STM32G031F6.json index 07afc94..6721659 100644 --- a/data/chips/STM32G031F6.json +++ b/data/chips/STM32G031F6.json @@ -1503,6 +1503,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2323,6 +2332,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031F8.json b/data/chips/STM32G031F8.json index 10ffb13..1dc1c8d 100644 --- a/data/chips/STM32G031F8.json +++ b/data/chips/STM32G031F8.json @@ -1503,6 +1503,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2323,6 +2332,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031G4.json b/data/chips/STM32G031G4.json index aed90d7..6dffba4 100644 --- a/data/chips/STM32G031G4.json +++ b/data/chips/STM32G031G4.json @@ -1518,6 +1518,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2343,6 +2352,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031G6.json b/data/chips/STM32G031G6.json index c14e4ed..e5eea2d 100644 --- a/data/chips/STM32G031G6.json +++ b/data/chips/STM32G031G6.json @@ -1518,6 +1518,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2343,6 +2352,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031G8.json b/data/chips/STM32G031G8.json index 0c5b9e4..e0bf872 100644 --- a/data/chips/STM32G031G8.json +++ b/data/chips/STM32G031G8.json @@ -1518,6 +1518,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2343,6 +2352,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031J4.json b/data/chips/STM32G031J4.json index 16950fa..12c7cc1 100644 --- a/data/chips/STM32G031J4.json +++ b/data/chips/STM32G031J4.json @@ -1280,6 +1280,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -1995,6 +2004,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031J6.json b/data/chips/STM32G031J6.json index 32d05b7..dc27531 100644 --- a/data/chips/STM32G031J6.json +++ b/data/chips/STM32G031J6.json @@ -1280,6 +1280,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -1995,6 +2004,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031K4.json b/data/chips/STM32G031K4.json index 14cafba..bcef78e 100644 --- a/data/chips/STM32G031K4.json +++ b/data/chips/STM32G031K4.json @@ -1770,6 +1770,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2600,6 +2609,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031K6.json b/data/chips/STM32G031K6.json index 522c2d2..9159c52 100644 --- a/data/chips/STM32G031K6.json +++ b/data/chips/STM32G031K6.json @@ -1770,6 +1770,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2600,6 +2609,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031K8.json b/data/chips/STM32G031K8.json index 699d709..563350c 100644 --- a/data/chips/STM32G031K8.json +++ b/data/chips/STM32G031K8.json @@ -1770,6 +1770,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2600,6 +2609,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G031Y8.json b/data/chips/STM32G031Y8.json index cf0482d..f63966c 100644 --- a/data/chips/STM32G031Y8.json +++ b/data/chips/STM32G031Y8.json @@ -1493,6 +1493,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2313,6 +2322,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041C6.json b/data/chips/STM32G041C6.json index 2048122..2bba0cf 100644 --- a/data/chips/STM32G041C6.json +++ b/data/chips/STM32G041C6.json @@ -2142,6 +2142,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3057,6 +3066,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041C8.json b/data/chips/STM32G041C8.json index 7953054..3579a93 100644 --- a/data/chips/STM32G041C8.json +++ b/data/chips/STM32G041C8.json @@ -2142,6 +2142,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3057,6 +3066,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041F6.json b/data/chips/STM32G041F6.json index a10bddb..ce56e6c 100644 --- a/data/chips/STM32G041F6.json +++ b/data/chips/STM32G041F6.json @@ -1572,6 +1572,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2392,6 +2401,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041F8.json b/data/chips/STM32G041F8.json index 1ca4f98..daa1b5e 100644 --- a/data/chips/STM32G041F8.json +++ b/data/chips/STM32G041F8.json @@ -1572,6 +1572,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2392,6 +2401,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041G6.json b/data/chips/STM32G041G6.json index 3f856cd..b597916 100644 --- a/data/chips/STM32G041G6.json +++ b/data/chips/STM32G041G6.json @@ -1587,6 +1587,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2412,6 +2421,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041G8.json b/data/chips/STM32G041G8.json index 39e5db9..7c2a03f 100644 --- a/data/chips/STM32G041G8.json +++ b/data/chips/STM32G041G8.json @@ -1587,6 +1587,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2412,6 +2421,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041J6.json b/data/chips/STM32G041J6.json index 2098699..1c0100c 100644 --- a/data/chips/STM32G041J6.json +++ b/data/chips/STM32G041J6.json @@ -1349,6 +1349,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2064,6 +2073,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041K6.json b/data/chips/STM32G041K6.json index ed41430..026fed7 100644 --- a/data/chips/STM32G041K6.json +++ b/data/chips/STM32G041K6.json @@ -1839,6 +1839,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2669,6 +2678,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041K8.json b/data/chips/STM32G041K8.json index 8c4cba6..6b7bb1d 100644 --- a/data/chips/STM32G041K8.json +++ b/data/chips/STM32G041K8.json @@ -1839,6 +1839,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2669,6 +2678,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G041Y8.json b/data/chips/STM32G041Y8.json index 2d369d9..7582847 100644 --- a/data/chips/STM32G041Y8.json +++ b/data/chips/STM32G041Y8.json @@ -1562,6 +1562,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2382,6 +2391,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G050C6.json b/data/chips/STM32G050C6.json index 4bfa7a8..4bbf8b3 100644 --- a/data/chips/STM32G050C6.json +++ b/data/chips/STM32G050C6.json @@ -1750,6 +1750,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2748,6 +2757,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G050C8.json b/data/chips/STM32G050C8.json index aebd8bb..c748700 100644 --- a/data/chips/STM32G050C8.json +++ b/data/chips/STM32G050C8.json @@ -1750,6 +1750,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2748,6 +2757,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G050F6.json b/data/chips/STM32G050F6.json index 852f503..89c0004 100644 --- a/data/chips/STM32G050F6.json +++ b/data/chips/STM32G050F6.json @@ -1507,6 +1507,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2400,6 +2409,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G050K6.json b/data/chips/STM32G050K6.json index 6f3fc3e..c67aaf5 100644 --- a/data/chips/STM32G050K6.json +++ b/data/chips/STM32G050K6.json @@ -1572,6 +1572,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2470,6 +2479,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G050K8.json b/data/chips/STM32G050K8.json index 0b1e7c3..5a5fbef 100644 --- a/data/chips/STM32G050K8.json +++ b/data/chips/STM32G050K8.json @@ -1572,6 +1572,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2470,6 +2479,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G051C6.json b/data/chips/STM32G051C6.json index 5cc7698..d1341c7 100644 --- a/data/chips/STM32G051C6.json +++ b/data/chips/STM32G051C6.json @@ -2432,6 +2432,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3577,6 +3586,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G051C8.json b/data/chips/STM32G051C8.json index 095be3b..0433ad1 100644 --- a/data/chips/STM32G051C8.json +++ b/data/chips/STM32G051C8.json @@ -2432,6 +2432,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3577,6 +3586,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G051F6.json b/data/chips/STM32G051F6.json index 9566680..663a254 100644 --- a/data/chips/STM32G051F6.json +++ b/data/chips/STM32G051F6.json @@ -1856,6 +1856,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2876,6 +2885,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G051F8.json b/data/chips/STM32G051F8.json index 0775b13..d4e316c 100644 --- a/data/chips/STM32G051F8.json +++ b/data/chips/STM32G051F8.json @@ -1993,6 +1993,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3013,6 +3022,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G051G6.json b/data/chips/STM32G051G6.json index 0fc51bf..13ab307 100644 --- a/data/chips/STM32G051G6.json +++ b/data/chips/STM32G051G6.json @@ -1867,6 +1867,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2892,6 +2901,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G051G8.json b/data/chips/STM32G051G8.json index c4e2d82..71759c4 100644 --- a/data/chips/STM32G051G8.json +++ b/data/chips/STM32G051G8.json @@ -1867,6 +1867,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2892,6 +2901,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G051K6.json b/data/chips/STM32G051K6.json index dac2a5e..9534bb8 100644 --- a/data/chips/STM32G051K6.json +++ b/data/chips/STM32G051K6.json @@ -2123,6 +2123,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3153,6 +3162,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G051K8.json b/data/chips/STM32G051K8.json index 1f19977..463fd2b 100644 --- a/data/chips/STM32G051K8.json +++ b/data/chips/STM32G051K8.json @@ -2123,6 +2123,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3153,6 +3162,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G061C6.json b/data/chips/STM32G061C6.json index 5bc304f..5e2136a 100644 --- a/data/chips/STM32G061C6.json +++ b/data/chips/STM32G061C6.json @@ -2501,6 +2501,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3646,6 +3655,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G061C8.json b/data/chips/STM32G061C8.json index e17798c..703ffce 100644 --- a/data/chips/STM32G061C8.json +++ b/data/chips/STM32G061C8.json @@ -2501,6 +2501,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3646,6 +3655,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G061F6.json b/data/chips/STM32G061F6.json index 741d182..1f06583 100644 --- a/data/chips/STM32G061F6.json +++ b/data/chips/STM32G061F6.json @@ -1925,6 +1925,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2945,6 +2954,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G061F8.json b/data/chips/STM32G061F8.json index 76c5a8c..7aef0da 100644 --- a/data/chips/STM32G061F8.json +++ b/data/chips/STM32G061F8.json @@ -2062,6 +2062,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3082,6 +3091,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G061G6.json b/data/chips/STM32G061G6.json index 8edfe2b..4fb7b26 100644 --- a/data/chips/STM32G061G6.json +++ b/data/chips/STM32G061G6.json @@ -1936,6 +1936,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2961,6 +2970,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G061G8.json b/data/chips/STM32G061G8.json index 2424e40..a4d9cd0 100644 --- a/data/chips/STM32G061G8.json +++ b/data/chips/STM32G061G8.json @@ -1936,6 +1936,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2961,6 +2970,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G061K6.json b/data/chips/STM32G061K6.json index 2fcad7c..740206c 100644 --- a/data/chips/STM32G061K6.json +++ b/data/chips/STM32G061K6.json @@ -2192,6 +2192,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3222,6 +3231,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G061K8.json b/data/chips/STM32G061K8.json index 7e65c18..23b8066 100644 --- a/data/chips/STM32G061K8.json +++ b/data/chips/STM32G061K8.json @@ -2192,6 +2192,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3222,6 +3231,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G070CB.json b/data/chips/STM32G070CB.json index ffe6651..618e2c3 100644 --- a/data/chips/STM32G070CB.json +++ b/data/chips/STM32G070CB.json @@ -1559,6 +1559,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2792,6 +2801,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G070KB.json b/data/chips/STM32G070KB.json index 3ee99a9..bfd13c2 100644 --- a/data/chips/STM32G070KB.json +++ b/data/chips/STM32G070KB.json @@ -1365,6 +1365,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2448,6 +2457,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G070RB.json b/data/chips/STM32G070RB.json index 6a4779a..f64c886 100644 --- a/data/chips/STM32G070RB.json +++ b/data/chips/STM32G070RB.json @@ -1718,6 +1718,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3086,6 +3095,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071C6.json b/data/chips/STM32G071C6.json index f5ebdd4..aed594e 100644 --- a/data/chips/STM32G071C6.json +++ b/data/chips/STM32G071C6.json @@ -2101,6 +2101,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3691,6 +3700,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071C8.json b/data/chips/STM32G071C8.json index 5e03da4..dc8f4f7 100644 --- a/data/chips/STM32G071C8.json +++ b/data/chips/STM32G071C8.json @@ -2276,6 +2276,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3866,6 +3875,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071CB.json b/data/chips/STM32G071CB.json index 7baf27e..da7f8ad 100644 --- a/data/chips/STM32G071CB.json +++ b/data/chips/STM32G071CB.json @@ -2276,6 +2276,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3866,6 +3875,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071EB.json b/data/chips/STM32G071EB.json index 064846c..80d795e 100644 --- a/data/chips/STM32G071EB.json +++ b/data/chips/STM32G071EB.json @@ -1649,6 +1649,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2871,6 +2880,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071G6.json b/data/chips/STM32G071G6.json index d1a632b..6b41c2f 100644 --- a/data/chips/STM32G071G6.json +++ b/data/chips/STM32G071G6.json @@ -1544,6 +1544,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2987,6 +2996,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071G8.json b/data/chips/STM32G071G8.json index 1f7ddd1..2881668 100644 --- a/data/chips/STM32G071G8.json +++ b/data/chips/STM32G071G8.json @@ -1895,6 +1895,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3338,6 +3347,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071GB.json b/data/chips/STM32G071GB.json index d380acd..518f531 100644 --- a/data/chips/STM32G071GB.json +++ b/data/chips/STM32G071GB.json @@ -1895,6 +1895,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3338,6 +3347,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071K6.json b/data/chips/STM32G071K6.json index 42cd0c3..4b67b81 100644 --- a/data/chips/STM32G071K6.json +++ b/data/chips/STM32G071K6.json @@ -1800,6 +1800,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3266,6 +3275,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071K8.json b/data/chips/STM32G071K8.json index 9a3b812..4e188d6 100644 --- a/data/chips/STM32G071K8.json +++ b/data/chips/STM32G071K8.json @@ -2379,6 +2379,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3845,6 +3854,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071KB.json b/data/chips/STM32G071KB.json index 2c2c104..788b082 100644 --- a/data/chips/STM32G071KB.json +++ b/data/chips/STM32G071KB.json @@ -2379,6 +2379,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3845,6 +3854,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071R6.json b/data/chips/STM32G071R6.json index 7109883..4c417d2 100644 --- a/data/chips/STM32G071R6.json +++ b/data/chips/STM32G071R6.json @@ -2025,6 +2025,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3781,6 +3790,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071R8.json b/data/chips/STM32G071R8.json index 3ed0b1f..d325850 100644 --- a/data/chips/STM32G071R8.json +++ b/data/chips/STM32G071R8.json @@ -2200,6 +2200,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3956,6 +3965,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G071RB.json b/data/chips/STM32G071RB.json index 8a4684b..47a14f7 100644 --- a/data/chips/STM32G071RB.json +++ b/data/chips/STM32G071RB.json @@ -2594,6 +2594,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4350,6 +4359,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G081CB.json b/data/chips/STM32G081CB.json index 9f2be0b..8b0e068 100644 --- a/data/chips/STM32G081CB.json +++ b/data/chips/STM32G081CB.json @@ -2345,6 +2345,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3935,6 +3944,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G081EB.json b/data/chips/STM32G081EB.json index e9cfe69..a390ca9 100644 --- a/data/chips/STM32G081EB.json +++ b/data/chips/STM32G081EB.json @@ -1718,6 +1718,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -2940,6 +2949,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G081GB.json b/data/chips/STM32G081GB.json index 7173136..6862b3c 100644 --- a/data/chips/STM32G081GB.json +++ b/data/chips/STM32G081GB.json @@ -1964,6 +1964,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3407,6 +3416,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G081KB.json b/data/chips/STM32G081KB.json index d518100..ff01f13 100644 --- a/data/chips/STM32G081KB.json +++ b/data/chips/STM32G081KB.json @@ -2448,6 +2448,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3914,6 +3923,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G081RB.json b/data/chips/STM32G081RB.json index cc2ffb6..77fa93a 100644 --- a/data/chips/STM32G081RB.json +++ b/data/chips/STM32G081RB.json @@ -2663,6 +2663,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4419,6 +4428,15 @@ } ] }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B0CE.json b/data/chips/STM32G0B0CE.json index bb147d3..e6ad7b0 100644 --- a/data/chips/STM32G0B0CE.json +++ b/data/chips/STM32G0B0CE.json @@ -2085,6 +2085,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3694,6 +3703,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B0KE.json b/data/chips/STM32G0B0KE.json index fdfe206..2f91190 100644 --- a/data/chips/STM32G0B0KE.json +++ b/data/chips/STM32G0B0KE.json @@ -1845,6 +1845,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -3206,6 +3215,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B0RE.json b/data/chips/STM32G0B0RE.json index 0e11c24..81e1280 100644 --- a/data/chips/STM32G0B0RE.json +++ b/data/chips/STM32G0B0RE.json @@ -2284,6 +2284,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4073,6 +4082,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B0VE.json b/data/chips/STM32G0B0VE.json index 7439858..51e0f3b 100644 --- a/data/chips/STM32G0B0VE.json +++ b/data/chips/STM32G0B0VE.json @@ -2554,6 +2554,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4583,6 +4592,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1CB.json b/data/chips/STM32G0B1CB.json index 833e442..fe19823 100644 --- a/data/chips/STM32G0B1CB.json +++ b/data/chips/STM32G0B1CB.json @@ -3687,6 +3687,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5677,6 +5686,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1CC.json b/data/chips/STM32G0B1CC.json index de0bd92..2be1210 100644 --- a/data/chips/STM32G0B1CC.json +++ b/data/chips/STM32G0B1CC.json @@ -3687,6 +3687,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5677,6 +5686,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1CE.json b/data/chips/STM32G0B1CE.json index f9a0f45..7e46664 100644 --- a/data/chips/STM32G0B1CE.json +++ b/data/chips/STM32G0B1CE.json @@ -3698,6 +3698,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5688,6 +5697,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1KB.json b/data/chips/STM32G0B1KB.json index 9c5d19b..2dad47b 100644 --- a/data/chips/STM32G0B1KB.json +++ b/data/chips/STM32G0B1KB.json @@ -3153,6 +3153,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4998,6 +5007,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1KC.json b/data/chips/STM32G0B1KC.json index f8d7c15..2e351eb 100644 --- a/data/chips/STM32G0B1KC.json +++ b/data/chips/STM32G0B1KC.json @@ -3153,6 +3153,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4998,6 +5007,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1KE.json b/data/chips/STM32G0B1KE.json index 4f89783..fcba85d 100644 --- a/data/chips/STM32G0B1KE.json +++ b/data/chips/STM32G0B1KE.json @@ -3164,6 +3164,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5009,6 +5018,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1MB.json b/data/chips/STM32G0B1MB.json index 3f5671d..78d74b4 100644 --- a/data/chips/STM32G0B1MB.json +++ b/data/chips/STM32G0B1MB.json @@ -3282,6 +3282,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5602,6 +5611,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1MC.json b/data/chips/STM32G0B1MC.json index bb7e3c3..193d585 100644 --- a/data/chips/STM32G0B1MC.json +++ b/data/chips/STM32G0B1MC.json @@ -3282,6 +3282,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5602,6 +5611,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1ME.json b/data/chips/STM32G0B1ME.json index 11ed4c7..f41a3ea 100644 --- a/data/chips/STM32G0B1ME.json +++ b/data/chips/STM32G0B1ME.json @@ -3293,6 +3293,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5613,6 +5622,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1NE.json b/data/chips/STM32G0B1NE.json index 09769ba..91ff43d 100644 --- a/data/chips/STM32G0B1NE.json +++ b/data/chips/STM32G0B1NE.json @@ -2499,6 +2499,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4524,6 +4533,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1RB.json b/data/chips/STM32G0B1RB.json index cec3c44..dc441c8 100644 --- a/data/chips/STM32G0B1RB.json +++ b/data/chips/STM32G0B1RB.json @@ -3906,6 +3906,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6111,6 +6120,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1RC.json b/data/chips/STM32G0B1RC.json index 210d12a..351fa7a 100644 --- a/data/chips/STM32G0B1RC.json +++ b/data/chips/STM32G0B1RC.json @@ -3906,6 +3906,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6111,6 +6120,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1RE.json b/data/chips/STM32G0B1RE.json index 70a8d36..9cd4aa6 100644 --- a/data/chips/STM32G0B1RE.json +++ b/data/chips/STM32G0B1RE.json @@ -3917,6 +3917,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6122,6 +6131,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1VB.json b/data/chips/STM32G0B1VB.json index 060177f..845257c 100644 --- a/data/chips/STM32G0B1VB.json +++ b/data/chips/STM32G0B1VB.json @@ -4086,6 +4086,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6531,6 +6540,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1VC.json b/data/chips/STM32G0B1VC.json index 195d8fa..68af988 100644 --- a/data/chips/STM32G0B1VC.json +++ b/data/chips/STM32G0B1VC.json @@ -4086,6 +4086,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6531,6 +6540,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0B1VE.json b/data/chips/STM32G0B1VE.json index 7653284..065e01b 100644 --- a/data/chips/STM32G0B1VE.json +++ b/data/chips/STM32G0B1VE.json @@ -4097,6 +4097,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6542,6 +6551,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1CC.json b/data/chips/STM32G0C1CC.json index a15f4e4..1d14f89 100644 --- a/data/chips/STM32G0C1CC.json +++ b/data/chips/STM32G0C1CC.json @@ -3756,6 +3756,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5746,6 +5755,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1CE.json b/data/chips/STM32G0C1CE.json index a8d1f7b..ca76c5c 100644 --- a/data/chips/STM32G0C1CE.json +++ b/data/chips/STM32G0C1CE.json @@ -3767,6 +3767,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5757,6 +5766,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1KC.json b/data/chips/STM32G0C1KC.json index 18c1bde..7006b7a 100644 --- a/data/chips/STM32G0C1KC.json +++ b/data/chips/STM32G0C1KC.json @@ -3222,6 +3222,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5067,6 +5076,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1KE.json b/data/chips/STM32G0C1KE.json index f1b8350..019a5a7 100644 --- a/data/chips/STM32G0C1KE.json +++ b/data/chips/STM32G0C1KE.json @@ -3233,6 +3233,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5078,6 +5087,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1MC.json b/data/chips/STM32G0C1MC.json index aa14e92..25da230 100644 --- a/data/chips/STM32G0C1MC.json +++ b/data/chips/STM32G0C1MC.json @@ -3351,6 +3351,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5671,6 +5680,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1ME.json b/data/chips/STM32G0C1ME.json index 06c76c5..440fa5e 100644 --- a/data/chips/STM32G0C1ME.json +++ b/data/chips/STM32G0C1ME.json @@ -3362,6 +3362,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5682,6 +5691,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1NE.json b/data/chips/STM32G0C1NE.json index f51ee98..823ce12 100644 --- a/data/chips/STM32G0C1NE.json +++ b/data/chips/STM32G0C1NE.json @@ -2568,6 +2568,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4593,6 +4602,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1RC.json b/data/chips/STM32G0C1RC.json index 5ebc66a..21f779d 100644 --- a/data/chips/STM32G0C1RC.json +++ b/data/chips/STM32G0C1RC.json @@ -3975,6 +3975,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6180,6 +6189,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1RE.json b/data/chips/STM32G0C1RE.json index 89b551c..f20ebf0 100644 --- a/data/chips/STM32G0C1RE.json +++ b/data/chips/STM32G0C1RE.json @@ -3986,6 +3986,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6191,6 +6200,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1VC.json b/data/chips/STM32G0C1VC.json index e0b2732..75e472d 100644 --- a/data/chips/STM32G0C1VC.json +++ b/data/chips/STM32G0C1VC.json @@ -4155,6 +4155,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6600,6 +6609,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G0C1VE.json b/data/chips/STM32G0C1VE.json index cdbc863..0b3bf16 100644 --- a/data/chips/STM32G0C1VE.json +++ b/data/chips/STM32G0C1VE.json @@ -4166,6 +4166,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6611,6 +6620,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431C6.json b/data/chips/STM32G431C6.json index b338065..ba40c4d 100644 --- a/data/chips/STM32G431C6.json +++ b/data/chips/STM32G431C6.json @@ -3089,6 +3089,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4782,6 +4791,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431C8.json b/data/chips/STM32G431C8.json index 88a6842..399afdb 100644 --- a/data/chips/STM32G431C8.json +++ b/data/chips/STM32G431C8.json @@ -3089,6 +3089,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4782,6 +4791,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431CB.json b/data/chips/STM32G431CB.json index b9eb1d0..c642837 100644 --- a/data/chips/STM32G431CB.json +++ b/data/chips/STM32G431CB.json @@ -3389,6 +3389,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5082,6 +5091,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431K6.json b/data/chips/STM32G431K6.json index e0f1b1f..4b81562 100644 --- a/data/chips/STM32G431K6.json +++ b/data/chips/STM32G431K6.json @@ -2623,6 +2623,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4014,6 +4023,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431K8.json b/data/chips/STM32G431K8.json index ab023cd..37e6944 100644 --- a/data/chips/STM32G431K8.json +++ b/data/chips/STM32G431K8.json @@ -2623,6 +2623,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4014,6 +4023,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431KB.json b/data/chips/STM32G431KB.json index 2ce711e..9cf08fd 100644 --- a/data/chips/STM32G431KB.json +++ b/data/chips/STM32G431KB.json @@ -2623,6 +2623,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4014,6 +4023,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431M6.json b/data/chips/STM32G431M6.json index 9222e9b..e3b6e27 100644 --- a/data/chips/STM32G431M6.json +++ b/data/chips/STM32G431M6.json @@ -3173,6 +3173,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5061,6 +5070,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431M8.json b/data/chips/STM32G431M8.json index 7a68d78..c71046e 100644 --- a/data/chips/STM32G431M8.json +++ b/data/chips/STM32G431M8.json @@ -3173,6 +3173,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5061,6 +5070,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431MB.json b/data/chips/STM32G431MB.json index 7c472e0..6b9e7b3 100644 --- a/data/chips/STM32G431MB.json +++ b/data/chips/STM32G431MB.json @@ -3173,6 +3173,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5061,6 +5070,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431R6.json b/data/chips/STM32G431R6.json index 0db72e0..94cdd61 100644 --- a/data/chips/STM32G431R6.json +++ b/data/chips/STM32G431R6.json @@ -3429,6 +3429,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5227,6 +5236,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431R8.json b/data/chips/STM32G431R8.json index d6b3bd8..f03d040 100644 --- a/data/chips/STM32G431R8.json +++ b/data/chips/STM32G431R8.json @@ -3429,6 +3429,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5227,6 +5236,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431RB.json b/data/chips/STM32G431RB.json index 3a9abf6..a4f78b6 100644 --- a/data/chips/STM32G431RB.json +++ b/data/chips/STM32G431RB.json @@ -3429,6 +3429,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5227,6 +5236,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431V6.json b/data/chips/STM32G431V6.json index 2c8d793..f60ef12 100644 --- a/data/chips/STM32G431V6.json +++ b/data/chips/STM32G431V6.json @@ -3390,6 +3390,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5433,6 +5442,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431V8.json b/data/chips/STM32G431V8.json index 6f960e9..44dac80 100644 --- a/data/chips/STM32G431V8.json +++ b/data/chips/STM32G431V8.json @@ -3390,6 +3390,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5433,6 +5442,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G431VB.json b/data/chips/STM32G431VB.json index 347156a..8ff40bc 100644 --- a/data/chips/STM32G431VB.json +++ b/data/chips/STM32G431VB.json @@ -3390,6 +3390,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5433,6 +5442,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G441CB.json b/data/chips/STM32G441CB.json index 3119154..efd5c62 100644 --- a/data/chips/STM32G441CB.json +++ b/data/chips/STM32G441CB.json @@ -3422,6 +3422,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5115,6 +5124,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G441KB.json b/data/chips/STM32G441KB.json index e1ad2b0..98ae0a9 100644 --- a/data/chips/STM32G441KB.json +++ b/data/chips/STM32G441KB.json @@ -2656,6 +2656,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4047,6 +4056,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G441MB.json b/data/chips/STM32G441MB.json index d97d2b4..f41a3bc 100644 --- a/data/chips/STM32G441MB.json +++ b/data/chips/STM32G441MB.json @@ -3206,6 +3206,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5094,6 +5103,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G441RB.json b/data/chips/STM32G441RB.json index 7daf592..f5a5665 100644 --- a/data/chips/STM32G441RB.json +++ b/data/chips/STM32G441RB.json @@ -3462,6 +3462,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5260,6 +5269,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G441VB.json b/data/chips/STM32G441VB.json index 463a359..43f8f7b 100644 --- a/data/chips/STM32G441VB.json +++ b/data/chips/STM32G441VB.json @@ -3423,6 +3423,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5466,6 +5475,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471CC.json b/data/chips/STM32G471CC.json index f8973ef..cd65b74 100644 --- a/data/chips/STM32G471CC.json +++ b/data/chips/STM32G471CC.json @@ -3169,6 +3169,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4949,6 +4958,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471CE.json b/data/chips/STM32G471CE.json index 09c2f70..04d55d8 100644 --- a/data/chips/STM32G471CE.json +++ b/data/chips/STM32G471CE.json @@ -3169,6 +3169,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4949,6 +4958,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471MC.json b/data/chips/STM32G471MC.json index 904c518..55663d1 100644 --- a/data/chips/STM32G471MC.json +++ b/data/chips/STM32G471MC.json @@ -3405,6 +3405,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5466,6 +5475,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471ME.json b/data/chips/STM32G471ME.json index a609a36..984aba0 100644 --- a/data/chips/STM32G471ME.json +++ b/data/chips/STM32G471ME.json @@ -3897,6 +3897,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5958,6 +5967,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471QC.json b/data/chips/STM32G471QC.json index 7b7e7ff..feb8e2c 100644 --- a/data/chips/STM32G471QC.json +++ b/data/chips/STM32G471QC.json @@ -4012,6 +4012,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6383,6 +6392,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471QE.json b/data/chips/STM32G471QE.json index 6d765d3..3bcb29a 100644 --- a/data/chips/STM32G471QE.json +++ b/data/chips/STM32G471QE.json @@ -4012,6 +4012,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6383,6 +6392,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471RC.json b/data/chips/STM32G471RC.json index 20b701c..6443ddc 100644 --- a/data/chips/STM32G471RC.json +++ b/data/chips/STM32G471RC.json @@ -3139,6 +3139,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5100,6 +5109,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471RE.json b/data/chips/STM32G471RE.json index d553c6a..104d538 100644 --- a/data/chips/STM32G471RE.json +++ b/data/chips/STM32G471RE.json @@ -3139,6 +3139,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5100,6 +5109,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471VC.json b/data/chips/STM32G471VC.json index 202f8d9..58d8445 100644 --- a/data/chips/STM32G471VC.json +++ b/data/chips/STM32G471VC.json @@ -4906,6 +4906,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7167,6 +7176,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G471VE.json b/data/chips/STM32G471VE.json index 68f6d66..c140f2f 100644 --- a/data/chips/STM32G471VE.json +++ b/data/chips/STM32G471VE.json @@ -4906,6 +4906,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7167,6 +7176,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473CB.json b/data/chips/STM32G473CB.json index 387ed1c..5c63bd3 100644 --- a/data/chips/STM32G473CB.json +++ b/data/chips/STM32G473CB.json @@ -3886,6 +3886,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5773,6 +5782,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473CC.json b/data/chips/STM32G473CC.json index 1e56127..9482798 100644 --- a/data/chips/STM32G473CC.json +++ b/data/chips/STM32G473CC.json @@ -3886,6 +3886,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5773,6 +5782,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473CE.json b/data/chips/STM32G473CE.json index ca09b49..002e686 100644 --- a/data/chips/STM32G473CE.json +++ b/data/chips/STM32G473CE.json @@ -3886,6 +3886,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5773,6 +5782,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473MB.json b/data/chips/STM32G473MB.json index 605be53..953e844 100644 --- a/data/chips/STM32G473MB.json +++ b/data/chips/STM32G473MB.json @@ -4248,6 +4248,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6436,6 +6445,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473MC.json b/data/chips/STM32G473MC.json index 6b9ef84..b9aa7b0 100644 --- a/data/chips/STM32G473MC.json +++ b/data/chips/STM32G473MC.json @@ -4248,6 +4248,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6436,6 +6445,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473ME.json b/data/chips/STM32G473ME.json index deedc6f..4f89e21 100644 --- a/data/chips/STM32G473ME.json +++ b/data/chips/STM32G473ME.json @@ -4740,6 +4740,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6928,6 +6937,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473PB.json b/data/chips/STM32G473PB.json index be7492d..945122a 100644 --- a/data/chips/STM32G473PB.json +++ b/data/chips/STM32G473PB.json @@ -5162,6 +5162,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7665,6 +7674,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473PC.json b/data/chips/STM32G473PC.json index eb867d3..7dbcb1d 100644 --- a/data/chips/STM32G473PC.json +++ b/data/chips/STM32G473PC.json @@ -5162,6 +5162,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7665,6 +7674,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473PE.json b/data/chips/STM32G473PE.json index 538c8b7..a808cc8 100644 --- a/data/chips/STM32G473PE.json +++ b/data/chips/STM32G473PE.json @@ -5162,6 +5162,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7665,6 +7674,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473QB.json b/data/chips/STM32G473QB.json index 8592293..cf7c68c 100644 --- a/data/chips/STM32G473QB.json +++ b/data/chips/STM32G473QB.json @@ -5300,6 +5300,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7823,6 +7832,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473QC.json b/data/chips/STM32G473QC.json index 7267d2c..e2054e7 100644 --- a/data/chips/STM32G473QC.json +++ b/data/chips/STM32G473QC.json @@ -5300,6 +5300,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7823,6 +7832,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473QE.json b/data/chips/STM32G473QE.json index e17c7a9..1896036 100644 --- a/data/chips/STM32G473QE.json +++ b/data/chips/STM32G473QE.json @@ -5300,6 +5300,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7823,6 +7832,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473RB.json b/data/chips/STM32G473RB.json index ead84ea..1969567 100644 --- a/data/chips/STM32G473RB.json +++ b/data/chips/STM32G473RB.json @@ -3874,6 +3874,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5947,6 +5956,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473RC.json b/data/chips/STM32G473RC.json index 4c90877..adf79dc 100644 --- a/data/chips/STM32G473RC.json +++ b/data/chips/STM32G473RC.json @@ -3874,6 +3874,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5947,6 +5956,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473RE.json b/data/chips/STM32G473RE.json index 4726f33..e815c41 100644 --- a/data/chips/STM32G473RE.json +++ b/data/chips/STM32G473RE.json @@ -3874,6 +3874,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5947,6 +5956,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473VB.json b/data/chips/STM32G473VB.json index d8cac54..8e11e98 100644 --- a/data/chips/STM32G473VB.json +++ b/data/chips/STM32G473VB.json @@ -5483,6 +5483,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7876,6 +7885,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473VC.json b/data/chips/STM32G473VC.json index 9cd1757..e6fdd3f 100644 --- a/data/chips/STM32G473VC.json +++ b/data/chips/STM32G473VC.json @@ -5483,6 +5483,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7876,6 +7885,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G473VE.json b/data/chips/STM32G473VE.json index 42540b8..2d6a605 100644 --- a/data/chips/STM32G473VE.json +++ b/data/chips/STM32G473VE.json @@ -5483,6 +5483,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7876,6 +7885,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474CB.json b/data/chips/STM32G474CB.json index 5b0f19a..db27299 100644 --- a/data/chips/STM32G474CB.json +++ b/data/chips/STM32G474CB.json @@ -4132,6 +4132,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6019,6 +6028,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474CC.json b/data/chips/STM32G474CC.json index 4e2b1df..3a1ed0d 100644 --- a/data/chips/STM32G474CC.json +++ b/data/chips/STM32G474CC.json @@ -4132,6 +4132,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6019,6 +6028,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474CE.json b/data/chips/STM32G474CE.json index 410ac80..95387e1 100644 --- a/data/chips/STM32G474CE.json +++ b/data/chips/STM32G474CE.json @@ -4132,6 +4132,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6019,6 +6028,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474MB.json b/data/chips/STM32G474MB.json index e8013ae..c88cf5d 100644 --- a/data/chips/STM32G474MB.json +++ b/data/chips/STM32G474MB.json @@ -4524,6 +4524,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6712,6 +6721,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474MC.json b/data/chips/STM32G474MC.json index 0f20c60..9b9f858 100644 --- a/data/chips/STM32G474MC.json +++ b/data/chips/STM32G474MC.json @@ -4524,6 +4524,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6712,6 +6721,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474ME.json b/data/chips/STM32G474ME.json index dbcc558..6de769e 100644 --- a/data/chips/STM32G474ME.json +++ b/data/chips/STM32G474ME.json @@ -5016,6 +5016,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7204,6 +7213,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474PB.json b/data/chips/STM32G474PB.json index a7f33eb..d136b37 100644 --- a/data/chips/STM32G474PB.json +++ b/data/chips/STM32G474PB.json @@ -5426,6 +5426,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7929,6 +7938,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474PC.json b/data/chips/STM32G474PC.json index d50bec7..a568ae2 100644 --- a/data/chips/STM32G474PC.json +++ b/data/chips/STM32G474PC.json @@ -5426,6 +5426,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7929,6 +7938,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474PE.json b/data/chips/STM32G474PE.json index 48a034a..2900eb1 100644 --- a/data/chips/STM32G474PE.json +++ b/data/chips/STM32G474PE.json @@ -5426,6 +5426,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7929,6 +7938,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474QB.json b/data/chips/STM32G474QB.json index 661d57e..45e91b5 100644 --- a/data/chips/STM32G474QB.json +++ b/data/chips/STM32G474QB.json @@ -5576,6 +5576,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -8099,6 +8108,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474QC.json b/data/chips/STM32G474QC.json index a49a2f9..2e1c0d2 100644 --- a/data/chips/STM32G474QC.json +++ b/data/chips/STM32G474QC.json @@ -5576,6 +5576,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -8099,6 +8108,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474QE.json b/data/chips/STM32G474QE.json index 8dde062..07723c6 100644 --- a/data/chips/STM32G474QE.json +++ b/data/chips/STM32G474QE.json @@ -5576,6 +5576,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -8099,6 +8108,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474RB.json b/data/chips/STM32G474RB.json index 72d5e4b..e0d7224 100644 --- a/data/chips/STM32G474RB.json +++ b/data/chips/STM32G474RB.json @@ -4150,6 +4150,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6223,6 +6232,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474RC.json b/data/chips/STM32G474RC.json index 5aed277..ad10647 100644 --- a/data/chips/STM32G474RC.json +++ b/data/chips/STM32G474RC.json @@ -4150,6 +4150,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6223,6 +6232,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474RE.json b/data/chips/STM32G474RE.json index 8c6a4ce..925b6bd 100644 --- a/data/chips/STM32G474RE.json +++ b/data/chips/STM32G474RE.json @@ -4150,6 +4150,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6223,6 +6232,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474VB.json b/data/chips/STM32G474VB.json index 2167e1f..49ddff5 100644 --- a/data/chips/STM32G474VB.json +++ b/data/chips/STM32G474VB.json @@ -5759,6 +5759,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -8152,6 +8161,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474VC.json b/data/chips/STM32G474VC.json index 1701fcc..b2306bb 100644 --- a/data/chips/STM32G474VC.json +++ b/data/chips/STM32G474VC.json @@ -5759,6 +5759,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -8152,6 +8161,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G474VE.json b/data/chips/STM32G474VE.json index 114d15c..503ef52 100644 --- a/data/chips/STM32G474VE.json +++ b/data/chips/STM32G474VE.json @@ -5759,6 +5759,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -8152,6 +8161,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G483CE.json b/data/chips/STM32G483CE.json index 739a576..c2e5fd8 100644 --- a/data/chips/STM32G483CE.json +++ b/data/chips/STM32G483CE.json @@ -3925,6 +3925,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5812,6 +5821,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G483ME.json b/data/chips/STM32G483ME.json index 328931a..7862afd 100644 --- a/data/chips/STM32G483ME.json +++ b/data/chips/STM32G483ME.json @@ -4779,6 +4779,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6967,6 +6976,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G483PE.json b/data/chips/STM32G483PE.json index 0a0c9c6..ffaef84 100644 --- a/data/chips/STM32G483PE.json +++ b/data/chips/STM32G483PE.json @@ -5201,6 +5201,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7704,6 +7713,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G483QE.json b/data/chips/STM32G483QE.json index 0895544..0f8c29a 100644 --- a/data/chips/STM32G483QE.json +++ b/data/chips/STM32G483QE.json @@ -5339,6 +5339,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7862,6 +7871,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G483RE.json b/data/chips/STM32G483RE.json index 66a038e..bf04277 100644 --- a/data/chips/STM32G483RE.json +++ b/data/chips/STM32G483RE.json @@ -3913,6 +3913,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5986,6 +5995,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G483VE.json b/data/chips/STM32G483VE.json index 5ae5127..283fcb7 100644 --- a/data/chips/STM32G483VE.json +++ b/data/chips/STM32G483VE.json @@ -5522,6 +5522,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7915,6 +7924,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G484CE.json b/data/chips/STM32G484CE.json index 07d06bb..20548a0 100644 --- a/data/chips/STM32G484CE.json +++ b/data/chips/STM32G484CE.json @@ -4165,6 +4165,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6052,6 +6061,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G484ME.json b/data/chips/STM32G484ME.json index 757f492..826589c 100644 --- a/data/chips/STM32G484ME.json +++ b/data/chips/STM32G484ME.json @@ -5049,6 +5049,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7237,6 +7246,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G484PE.json b/data/chips/STM32G484PE.json index 770e495..966720a 100644 --- a/data/chips/STM32G484PE.json +++ b/data/chips/STM32G484PE.json @@ -5465,6 +5465,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -7968,6 +7977,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G484QE.json b/data/chips/STM32G484QE.json index 398cab5..92a9cee 100644 --- a/data/chips/STM32G484QE.json +++ b/data/chips/STM32G484QE.json @@ -5609,6 +5609,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -8132,6 +8141,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G484RE.json b/data/chips/STM32G484RE.json index 7fb45de..5819d5e 100644 --- a/data/chips/STM32G484RE.json +++ b/data/chips/STM32G484RE.json @@ -4183,6 +4183,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6256,6 +6265,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G484VE.json b/data/chips/STM32G484VE.json index c89635f..50431e4 100644 --- a/data/chips/STM32G484VE.json +++ b/data/chips/STM32G484VE.json @@ -5792,6 +5792,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -8185,6 +8194,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491CC.json b/data/chips/STM32G491CC.json index 03d9212..b8557df 100644 --- a/data/chips/STM32G491CC.json +++ b/data/chips/STM32G491CC.json @@ -3364,6 +3364,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5083,6 +5092,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491CE.json b/data/chips/STM32G491CE.json index 6ec5a6c..6e2dd7b 100644 --- a/data/chips/STM32G491CE.json +++ b/data/chips/STM32G491CE.json @@ -3364,6 +3364,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5083,6 +5092,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491KC.json b/data/chips/STM32G491KC.json index f3d68e6..002e410 100644 --- a/data/chips/STM32G491KC.json +++ b/data/chips/STM32G491KC.json @@ -2625,6 +2625,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4103,6 +4112,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491KE.json b/data/chips/STM32G491KE.json index cd1ae38..2f1e653 100644 --- a/data/chips/STM32G491KE.json +++ b/data/chips/STM32G491KE.json @@ -2625,6 +2625,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4103,6 +4112,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491MC.json b/data/chips/STM32G491MC.json index 9f6007f..47bf994 100644 --- a/data/chips/STM32G491MC.json +++ b/data/chips/STM32G491MC.json @@ -4019,6 +4019,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6075,6 +6084,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491ME.json b/data/chips/STM32G491ME.json index dfc5466..06a1537 100644 --- a/data/chips/STM32G491ME.json +++ b/data/chips/STM32G491ME.json @@ -4019,6 +4019,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6075,6 +6084,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491RC.json b/data/chips/STM32G491RC.json index 1865d3d..5c71a07 100644 --- a/data/chips/STM32G491RC.json +++ b/data/chips/STM32G491RC.json @@ -3719,6 +3719,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5685,6 +5694,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491RE.json b/data/chips/STM32G491RE.json index 04cc4c6..362c8ea 100644 --- a/data/chips/STM32G491RE.json +++ b/data/chips/STM32G491RE.json @@ -4109,6 +4109,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6075,6 +6084,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491VC.json b/data/chips/STM32G491VC.json index 74cbcbd..5a08434 100644 --- a/data/chips/STM32G491VC.json +++ b/data/chips/STM32G491VC.json @@ -3801,6 +3801,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6067,6 +6076,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G491VE.json b/data/chips/STM32G491VE.json index 229fe43..c3041c3 100644 --- a/data/chips/STM32G491VE.json +++ b/data/chips/STM32G491VE.json @@ -3801,6 +3801,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6067,6 +6076,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G4A1CE.json b/data/chips/STM32G4A1CE.json index 30db8f2..2ba547e 100644 --- a/data/chips/STM32G4A1CE.json +++ b/data/chips/STM32G4A1CE.json @@ -3403,6 +3403,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5122,6 +5131,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G4A1KE.json b/data/chips/STM32G4A1KE.json index be5c19a..5e44f57 100644 --- a/data/chips/STM32G4A1KE.json +++ b/data/chips/STM32G4A1KE.json @@ -2664,6 +2664,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4142,6 +4151,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G4A1ME.json b/data/chips/STM32G4A1ME.json index 2eacf2b..6972ea3 100644 --- a/data/chips/STM32G4A1ME.json +++ b/data/chips/STM32G4A1ME.json @@ -4058,6 +4058,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6114,6 +6123,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G4A1RE.json b/data/chips/STM32G4A1RE.json index 6ecdcb1..188587a 100644 --- a/data/chips/STM32G4A1RE.json +++ b/data/chips/STM32G4A1RE.json @@ -4148,6 +4148,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6114,6 +6123,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32G4A1VE.json b/data/chips/STM32G4A1VE.json index 3d09302..4e4ac94 100644 --- a/data/chips/STM32G4A1VE.json +++ b/data/chips/STM32G4A1VE.json @@ -3840,6 +3840,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -6106,6 +6115,15 @@ "block": "USBRAM" } }, + { + "name": "VREFINTCAL", + "address": 536835498, + "registers": { + "kind": "vrefintcal", + "version": "v1", + "block": "VREFINTCAL" + } + }, { "name": "WWDG", "address": 1073753088, diff --git a/data/chips/STM32L412C8.json b/data/chips/STM32L412C8.json index b90b161..c3946c0 100644 --- a/data/chips/STM32L412C8.json +++ b/data/chips/STM32L412C8.json @@ -2511,6 +2511,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L412CB.json b/data/chips/STM32L412CB.json index ace68f3..8e2adad 100644 --- a/data/chips/STM32L412CB.json +++ b/data/chips/STM32L412CB.json @@ -3099,6 +3099,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L412K8.json b/data/chips/STM32L412K8.json index 24782d0..01d4549 100644 --- a/data/chips/STM32L412K8.json +++ b/data/chips/STM32L412K8.json @@ -2076,6 +2076,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L412KB.json b/data/chips/STM32L412KB.json index acef0c7..f22c936 100644 --- a/data/chips/STM32L412KB.json +++ b/data/chips/STM32L412KB.json @@ -2076,6 +2076,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L412R8.json b/data/chips/STM32L412R8.json index b6dfbd8..fd3df3f 100644 --- a/data/chips/STM32L412R8.json +++ b/data/chips/STM32L412R8.json @@ -2819,6 +2819,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L412RB.json b/data/chips/STM32L412RB.json index 14117dc..f730a87 100644 --- a/data/chips/STM32L412RB.json +++ b/data/chips/STM32L412RB.json @@ -3605,6 +3605,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L412T8.json b/data/chips/STM32L412T8.json index afafae6..e995c4c 100644 --- a/data/chips/STM32L412T8.json +++ b/data/chips/STM32L412T8.json @@ -1946,6 +1946,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L412TB.json b/data/chips/STM32L412TB.json index 2f2b67f..b8b9f49 100644 --- a/data/chips/STM32L412TB.json +++ b/data/chips/STM32L412TB.json @@ -2168,6 +2168,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L422CB.json b/data/chips/STM32L422CB.json index 4cd08a9..5de5c2a 100644 --- a/data/chips/STM32L422CB.json +++ b/data/chips/STM32L422CB.json @@ -2560,6 +2560,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L422KB.json b/data/chips/STM32L422KB.json index 9b93c40..94a3ede 100644 --- a/data/chips/STM32L422KB.json +++ b/data/chips/STM32L422KB.json @@ -2125,6 +2125,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L422RB.json b/data/chips/STM32L422RB.json index 9e5c460..08c310a 100644 --- a/data/chips/STM32L422RB.json +++ b/data/chips/STM32L422RB.json @@ -2874,6 +2874,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L422TB.json b/data/chips/STM32L422TB.json index 2dc38ef..6d821ce 100644 --- a/data/chips/STM32L422TB.json +++ b/data/chips/STM32L422TB.json @@ -1995,6 +1995,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L431CB.json b/data/chips/STM32L431CB.json index 98c8e53..148f8c3 100644 --- a/data/chips/STM32L431CB.json +++ b/data/chips/STM32L431CB.json @@ -3242,6 +3242,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L431CC.json b/data/chips/STM32L431CC.json index eae0409..d6b95fa 100644 --- a/data/chips/STM32L431CC.json +++ b/data/chips/STM32L431CC.json @@ -3242,6 +3242,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L431KB.json b/data/chips/STM32L431KB.json index a7dc148..6a5eb9e 100644 --- a/data/chips/STM32L431KB.json +++ b/data/chips/STM32L431KB.json @@ -2215,6 +2215,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L431KC.json b/data/chips/STM32L431KC.json index c6f62c5..be1ec98 100644 --- a/data/chips/STM32L431KC.json +++ b/data/chips/STM32L431KC.json @@ -2215,6 +2215,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L431RB.json b/data/chips/STM32L431RB.json index c285d51..06b0aad 100644 --- a/data/chips/STM32L431RB.json +++ b/data/chips/STM32L431RB.json @@ -3723,6 +3723,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L431RC.json b/data/chips/STM32L431RC.json index a2d4555..ef6bda6 100644 --- a/data/chips/STM32L431RC.json +++ b/data/chips/STM32L431RC.json @@ -3723,6 +3723,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L431VC.json b/data/chips/STM32L431VC.json index 2d607dd..336e216 100644 --- a/data/chips/STM32L431VC.json +++ b/data/chips/STM32L431VC.json @@ -3939,6 +3939,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L432KB.json b/data/chips/STM32L432KB.json index a85a29e..a98d3ea 100644 --- a/data/chips/STM32L432KB.json +++ b/data/chips/STM32L432KB.json @@ -2186,6 +2186,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L432KC.json b/data/chips/STM32L432KC.json index 41149f1..9a943ea 100644 --- a/data/chips/STM32L432KC.json +++ b/data/chips/STM32L432KC.json @@ -2186,6 +2186,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L433CB.json b/data/chips/STM32L433CB.json index b38d45f..06e566c 100644 --- a/data/chips/STM32L433CB.json +++ b/data/chips/STM32L433CB.json @@ -3415,6 +3415,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L433CC.json b/data/chips/STM32L433CC.json index 64706a0..79af681 100644 --- a/data/chips/STM32L433CC.json +++ b/data/chips/STM32L433CC.json @@ -3415,6 +3415,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L433RB.json b/data/chips/STM32L433RB.json index b288753..155b044 100644 --- a/data/chips/STM32L433RB.json +++ b/data/chips/STM32L433RB.json @@ -4001,6 +4001,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L433RC.json b/data/chips/STM32L433RC.json index ea7c9fc..c594840 100644 --- a/data/chips/STM32L433RC.json +++ b/data/chips/STM32L433RC.json @@ -4397,6 +4397,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L433VC.json b/data/chips/STM32L433VC.json index 9e6dc95..e53882b 100644 --- a/data/chips/STM32L433VC.json +++ b/data/chips/STM32L433VC.json @@ -4277,6 +4277,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L442KC.json b/data/chips/STM32L442KC.json index bc1793f..688177e 100644 --- a/data/chips/STM32L442KC.json +++ b/data/chips/STM32L442KC.json @@ -2235,6 +2235,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L443CC.json b/data/chips/STM32L443CC.json index fc7c09d..e78eee9 100644 --- a/data/chips/STM32L443CC.json +++ b/data/chips/STM32L443CC.json @@ -3764,6 +3764,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L443RC.json b/data/chips/STM32L443RC.json index 0b00f49..4c79067 100644 --- a/data/chips/STM32L443RC.json +++ b/data/chips/STM32L443RC.json @@ -4050,6 +4050,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L443VC.json b/data/chips/STM32L443VC.json index ae46e89..d6b29d3 100644 --- a/data/chips/STM32L443VC.json +++ b/data/chips/STM32L443VC.json @@ -4326,6 +4326,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L451CC.json b/data/chips/STM32L451CC.json index 4200d6d..5ebf36a 100644 --- a/data/chips/STM32L451CC.json +++ b/data/chips/STM32L451CC.json @@ -2751,6 +2751,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L451CE.json b/data/chips/STM32L451CE.json index cd2f683..eeb37a4 100644 --- a/data/chips/STM32L451CE.json +++ b/data/chips/STM32L451CE.json @@ -3045,6 +3045,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L451RC.json b/data/chips/STM32L451RC.json index 38e4796..d852a70 100644 --- a/data/chips/STM32L451RC.json +++ b/data/chips/STM32L451RC.json @@ -3875,6 +3875,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L451RE.json b/data/chips/STM32L451RE.json index 44ab3a9..916f657 100644 --- a/data/chips/STM32L451RE.json +++ b/data/chips/STM32L451RE.json @@ -3875,6 +3875,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L451VC.json b/data/chips/STM32L451VC.json index e61f462..27ba094 100644 --- a/data/chips/STM32L451VC.json +++ b/data/chips/STM32L451VC.json @@ -4151,6 +4151,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L451VE.json b/data/chips/STM32L451VE.json index fdc2522..70c235a 100644 --- a/data/chips/STM32L451VE.json +++ b/data/chips/STM32L451VE.json @@ -4151,6 +4151,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L452CC.json b/data/chips/STM32L452CC.json index 9a91e3a..e521a7e 100644 --- a/data/chips/STM32L452CC.json +++ b/data/chips/STM32L452CC.json @@ -2764,6 +2764,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L452CE.json b/data/chips/STM32L452CE.json index 7a73794..c267187 100644 --- a/data/chips/STM32L452CE.json +++ b/data/chips/STM32L452CE.json @@ -3352,6 +3352,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L452RC.json b/data/chips/STM32L452RC.json index 859a3c8..0429e41 100644 --- a/data/chips/STM32L452RC.json +++ b/data/chips/STM32L452RC.json @@ -3888,6 +3888,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L452RE.json b/data/chips/STM32L452RE.json index 250f9c0..3dd1293 100644 --- a/data/chips/STM32L452RE.json +++ b/data/chips/STM32L452RE.json @@ -4674,6 +4674,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L452VC.json b/data/chips/STM32L452VC.json index 5016b3b..1256927 100644 --- a/data/chips/STM32L452VC.json +++ b/data/chips/STM32L452VC.json @@ -4164,6 +4164,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L452VE.json b/data/chips/STM32L452VE.json index da732fe..01ca37b 100644 --- a/data/chips/STM32L452VE.json +++ b/data/chips/STM32L452VE.json @@ -4164,6 +4164,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L462CE.json b/data/chips/STM32L462CE.json index 24e6001..a90b69b 100644 --- a/data/chips/STM32L462CE.json +++ b/data/chips/STM32L462CE.json @@ -3113,6 +3113,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L462RE.json b/data/chips/STM32L462RE.json index 45b96a9..dd2ed1b 100644 --- a/data/chips/STM32L462RE.json +++ b/data/chips/STM32L462RE.json @@ -3937,6 +3937,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L462VE.json b/data/chips/STM32L462VE.json index 5c5e101..3d484e7 100644 --- a/data/chips/STM32L462VE.json +++ b/data/chips/STM32L462VE.json @@ -4213,6 +4213,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L471QE.json b/data/chips/STM32L471QE.json index 234092e..c57ba9b 100644 --- a/data/chips/STM32L471QE.json +++ b/data/chips/STM32L471QE.json @@ -4436,6 +4436,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L471QG.json b/data/chips/STM32L471QG.json index eefef7b..b1db367 100644 --- a/data/chips/STM32L471QG.json +++ b/data/chips/STM32L471QG.json @@ -4436,6 +4436,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L471RE.json b/data/chips/STM32L471RE.json index 1ca7a2e..f2e5d9b 100644 --- a/data/chips/STM32L471RE.json +++ b/data/chips/STM32L471RE.json @@ -3205,6 +3205,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L471RG.json b/data/chips/STM32L471RG.json index 77aa7d6..893d8d8 100644 --- a/data/chips/STM32L471RG.json +++ b/data/chips/STM32L471RG.json @@ -3205,6 +3205,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L471VE.json b/data/chips/STM32L471VE.json index 263a6b9..2afd450 100644 --- a/data/chips/STM32L471VE.json +++ b/data/chips/STM32L471VE.json @@ -3937,6 +3937,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L471VG.json b/data/chips/STM32L471VG.json index c526bf5..ee7a7fa 100644 --- a/data/chips/STM32L471VG.json +++ b/data/chips/STM32L471VG.json @@ -3937,6 +3937,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L471ZE.json b/data/chips/STM32L471ZE.json index f3aeb57..da997b1 100644 --- a/data/chips/STM32L471ZE.json +++ b/data/chips/STM32L471ZE.json @@ -5418,6 +5418,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L471ZG.json b/data/chips/STM32L471ZG.json index 515d3f8..6998c28 100644 --- a/data/chips/STM32L471ZG.json +++ b/data/chips/STM32L471ZG.json @@ -5418,6 +5418,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L475RC.json b/data/chips/STM32L475RC.json index 86c5a29..1778d43 100644 --- a/data/chips/STM32L475RC.json +++ b/data/chips/STM32L475RC.json @@ -3211,6 +3211,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L475RE.json b/data/chips/STM32L475RE.json index 8ed2121..db23fd4 100644 --- a/data/chips/STM32L475RE.json +++ b/data/chips/STM32L475RE.json @@ -3211,6 +3211,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L475RG.json b/data/chips/STM32L475RG.json index f073701..a400968 100644 --- a/data/chips/STM32L475RG.json +++ b/data/chips/STM32L475RG.json @@ -3211,6 +3211,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L475VC.json b/data/chips/STM32L475VC.json index 2974ee1..8994b4d 100644 --- a/data/chips/STM32L475VC.json +++ b/data/chips/STM32L475VC.json @@ -3943,6 +3943,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L475VE.json b/data/chips/STM32L475VE.json index 8104c32..7870fd7 100644 --- a/data/chips/STM32L475VE.json +++ b/data/chips/STM32L475VE.json @@ -3943,6 +3943,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L475VG.json b/data/chips/STM32L475VG.json index d6bb613..23e468c 100644 --- a/data/chips/STM32L475VG.json +++ b/data/chips/STM32L475VG.json @@ -3943,6 +3943,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476JE.json b/data/chips/STM32L476JE.json index 700f9b3..fba9679 100644 --- a/data/chips/STM32L476JE.json +++ b/data/chips/STM32L476JE.json @@ -3602,6 +3602,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476JG.json b/data/chips/STM32L476JG.json index 9cb570c..bfc46de 100644 --- a/data/chips/STM32L476JG.json +++ b/data/chips/STM32L476JG.json @@ -4046,6 +4046,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476ME.json b/data/chips/STM32L476ME.json index db75d74..18a5fb9 100644 --- a/data/chips/STM32L476ME.json +++ b/data/chips/STM32L476ME.json @@ -3716,6 +3716,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476MG.json b/data/chips/STM32L476MG.json index f4d3287..3329413 100644 --- a/data/chips/STM32L476MG.json +++ b/data/chips/STM32L476MG.json @@ -3716,6 +3716,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476QE.json b/data/chips/STM32L476QE.json index 97b27c2..90c3a7f 100644 --- a/data/chips/STM32L476QE.json +++ b/data/chips/STM32L476QE.json @@ -4786,6 +4786,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476QG.json b/data/chips/STM32L476QG.json index 156c69f..e25ca6f 100644 --- a/data/chips/STM32L476QG.json +++ b/data/chips/STM32L476QG.json @@ -5584,6 +5584,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476RC.json b/data/chips/STM32L476RC.json index 3385314..55a722c 100644 --- a/data/chips/STM32L476RC.json +++ b/data/chips/STM32L476RC.json @@ -3489,6 +3489,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476RE.json b/data/chips/STM32L476RE.json index 51f6023..dc4a1eb 100644 --- a/data/chips/STM32L476RE.json +++ b/data/chips/STM32L476RE.json @@ -3489,6 +3489,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476RG.json b/data/chips/STM32L476RG.json index 36291d8..b9be431 100644 --- a/data/chips/STM32L476RG.json +++ b/data/chips/STM32L476RG.json @@ -3489,6 +3489,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476VC.json b/data/chips/STM32L476VC.json index 7970b82..d52a0c5 100644 --- a/data/chips/STM32L476VC.json +++ b/data/chips/STM32L476VC.json @@ -4442,6 +4442,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476VE.json b/data/chips/STM32L476VE.json index 210eda7..7d6db99 100644 --- a/data/chips/STM32L476VE.json +++ b/data/chips/STM32L476VE.json @@ -4442,6 +4442,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476VG.json b/data/chips/STM32L476VG.json index 9289013..a724d5e 100644 --- a/data/chips/STM32L476VG.json +++ b/data/chips/STM32L476VG.json @@ -5042,6 +5042,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476ZE.json b/data/chips/STM32L476ZE.json index debe5d4..9f611a2 100644 --- a/data/chips/STM32L476ZE.json +++ b/data/chips/STM32L476ZE.json @@ -4898,6 +4898,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L476ZG.json b/data/chips/STM32L476ZG.json index dc205cd..1cce95e 100644 --- a/data/chips/STM32L476ZG.json +++ b/data/chips/STM32L476ZG.json @@ -6644,6 +6644,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L486JG.json b/data/chips/STM32L486JG.json index 969f5dc..735825e 100644 --- a/data/chips/STM32L486JG.json +++ b/data/chips/STM32L486JG.json @@ -3651,6 +3651,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L486QG.json b/data/chips/STM32L486QG.json index c11539a..6bf6f17 100644 --- a/data/chips/STM32L486QG.json +++ b/data/chips/STM32L486QG.json @@ -4835,6 +4835,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L486RG.json b/data/chips/STM32L486RG.json index e54188c..345a676 100644 --- a/data/chips/STM32L486RG.json +++ b/data/chips/STM32L486RG.json @@ -3538,6 +3538,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L486VG.json b/data/chips/STM32L486VG.json index 15e50ea..2fd8925 100644 --- a/data/chips/STM32L486VG.json +++ b/data/chips/STM32L486VG.json @@ -4336,6 +4336,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L486ZG.json b/data/chips/STM32L486ZG.json index f879cb9..f91d88a 100644 --- a/data/chips/STM32L486ZG.json +++ b/data/chips/STM32L486ZG.json @@ -4947,6 +4947,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496AE.json b/data/chips/STM32L496AE.json index a63e317..d00307e 100644 --- a/data/chips/STM32L496AE.json +++ b/data/chips/STM32L496AE.json @@ -5830,6 +5830,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496AG.json b/data/chips/STM32L496AG.json index 68f393e..0365e30 100644 --- a/data/chips/STM32L496AG.json +++ b/data/chips/STM32L496AG.json @@ -6856,6 +6856,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496QE.json b/data/chips/STM32L496QE.json index d64f08d..216dc5e 100644 --- a/data/chips/STM32L496QE.json +++ b/data/chips/STM32L496QE.json @@ -5434,6 +5434,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496QG.json b/data/chips/STM32L496QG.json index 60468ad..5269668 100644 --- a/data/chips/STM32L496QG.json +++ b/data/chips/STM32L496QG.json @@ -7030,6 +7030,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496RE.json b/data/chips/STM32L496RE.json index da32872..c9848ea 100644 --- a/data/chips/STM32L496RE.json +++ b/data/chips/STM32L496RE.json @@ -4026,6 +4026,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496RG.json b/data/chips/STM32L496RG.json index 6b7c715..47c4469 100644 --- a/data/chips/STM32L496RG.json +++ b/data/chips/STM32L496RG.json @@ -4416,6 +4416,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496VE.json b/data/chips/STM32L496VE.json index 8ae1d97..e174c8b 100644 --- a/data/chips/STM32L496VE.json +++ b/data/chips/STM32L496VE.json @@ -4973,6 +4973,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496VG.json b/data/chips/STM32L496VG.json index 9f020f1..5b2d94d 100644 --- a/data/chips/STM32L496VG.json +++ b/data/chips/STM32L496VG.json @@ -6797,6 +6797,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496WG.json b/data/chips/STM32L496WG.json index c7b9e40..d796f76 100644 --- a/data/chips/STM32L496WG.json +++ b/data/chips/STM32L496WG.json @@ -5267,6 +5267,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496ZE.json b/data/chips/STM32L496ZE.json index fe71ef0..4dea7b1 100644 --- a/data/chips/STM32L496ZE.json +++ b/data/chips/STM32L496ZE.json @@ -5584,6 +5584,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L496ZG.json b/data/chips/STM32L496ZG.json index 1205d3a..cfebfe2 100644 --- a/data/chips/STM32L496ZG.json +++ b/data/chips/STM32L496ZG.json @@ -6460,6 +6460,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4A6AG.json b/data/chips/STM32L4A6AG.json index f3a66b7..4a24df2 100644 --- a/data/chips/STM32L4A6AG.json +++ b/data/chips/STM32L4A6AG.json @@ -6933,6 +6933,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4A6QG.json b/data/chips/STM32L4A6QG.json index cca0af5..9eddd13 100644 --- a/data/chips/STM32L4A6QG.json +++ b/data/chips/STM32L4A6QG.json @@ -6315,6 +6315,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4A6RG.json b/data/chips/STM32L4A6RG.json index f90fd06..0132472 100644 --- a/data/chips/STM32L4A6RG.json +++ b/data/chips/STM32L4A6RG.json @@ -4499,6 +4499,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4A6VG.json b/data/chips/STM32L4A6VG.json index cb414ba..f491a9b 100644 --- a/data/chips/STM32L4A6VG.json +++ b/data/chips/STM32L4A6VG.json @@ -6874,6 +6874,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4A6ZG.json b/data/chips/STM32L4A6ZG.json index a6cc68d..88642a2 100644 --- a/data/chips/STM32L4A6ZG.json +++ b/data/chips/STM32L4A6ZG.json @@ -6537,6 +6537,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5AE.json b/data/chips/STM32L4P5AE.json index e362edd..136f272 100644 --- a/data/chips/STM32L4P5AE.json +++ b/data/chips/STM32L4P5AE.json @@ -6327,6 +6327,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5AG.json b/data/chips/STM32L4P5AG.json index fde2dbc..60c8d54 100644 --- a/data/chips/STM32L4P5AG.json +++ b/data/chips/STM32L4P5AG.json @@ -7347,6 +7347,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5CE.json b/data/chips/STM32L4P5CE.json index 20bbc8b..b1ce1d0 100644 --- a/data/chips/STM32L4P5CE.json +++ b/data/chips/STM32L4P5CE.json @@ -3543,6 +3543,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5CG.json b/data/chips/STM32L4P5CG.json index b43c588..952855a 100644 --- a/data/chips/STM32L4P5CG.json +++ b/data/chips/STM32L4P5CG.json @@ -4131,6 +4131,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5QE.json b/data/chips/STM32L4P5QE.json index b0086cf..826a774 100644 --- a/data/chips/STM32L4P5QE.json +++ b/data/chips/STM32L4P5QE.json @@ -5720,6 +5720,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5QG.json b/data/chips/STM32L4P5QG.json index 421f64f..97fb687 100644 --- a/data/chips/STM32L4P5QG.json +++ b/data/chips/STM32L4P5QG.json @@ -7316,6 +7316,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5RE.json b/data/chips/STM32L4P5RE.json index 71e98f7..8ef86e4 100644 --- a/data/chips/STM32L4P5RE.json +++ b/data/chips/STM32L4P5RE.json @@ -3996,6 +3996,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5RG.json b/data/chips/STM32L4P5RG.json index 1a9220b..75d8e80 100644 --- a/data/chips/STM32L4P5RG.json +++ b/data/chips/STM32L4P5RG.json @@ -4386,6 +4386,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5VE.json b/data/chips/STM32L4P5VE.json index 78c0c3f..4c9711a 100644 --- a/data/chips/STM32L4P5VE.json +++ b/data/chips/STM32L4P5VE.json @@ -5749,6 +5749,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5VG.json b/data/chips/STM32L4P5VG.json index 23f8917..fce2352 100644 --- a/data/chips/STM32L4P5VG.json +++ b/data/chips/STM32L4P5VG.json @@ -6961,6 +6961,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5ZE.json b/data/chips/STM32L4P5ZE.json index 6114c0d..c1192ef 100644 --- a/data/chips/STM32L4P5ZE.json +++ b/data/chips/STM32L4P5ZE.json @@ -5862,6 +5862,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4P5ZG.json b/data/chips/STM32L4P5ZG.json index c87be2d..b6c4f24 100644 --- a/data/chips/STM32L4P5ZG.json +++ b/data/chips/STM32L4P5ZG.json @@ -6732,6 +6732,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4Q5AG.json b/data/chips/STM32L4Q5AG.json index ac01dce..6df2258 100644 --- a/data/chips/STM32L4Q5AG.json +++ b/data/chips/STM32L4Q5AG.json @@ -7413,6 +7413,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4Q5CG.json b/data/chips/STM32L4Q5CG.json index bff3af4..b67b4fd 100644 --- a/data/chips/STM32L4Q5CG.json +++ b/data/chips/STM32L4Q5CG.json @@ -4197,6 +4197,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4Q5QG.json b/data/chips/STM32L4Q5QG.json index a5ce8f3..7b63c8f 100644 --- a/data/chips/STM32L4Q5QG.json +++ b/data/chips/STM32L4Q5QG.json @@ -6584,6 +6584,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4Q5RG.json b/data/chips/STM32L4Q5RG.json index 7898331..2907ac4 100644 --- a/data/chips/STM32L4Q5RG.json +++ b/data/chips/STM32L4Q5RG.json @@ -4452,6 +4452,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4Q5VG.json b/data/chips/STM32L4Q5VG.json index 41f2f1b..11bf4b8 100644 --- a/data/chips/STM32L4Q5VG.json +++ b/data/chips/STM32L4Q5VG.json @@ -7027,6 +7027,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4Q5ZG.json b/data/chips/STM32L4Q5ZG.json index 5956503..c07f6b7 100644 --- a/data/chips/STM32L4Q5ZG.json +++ b/data/chips/STM32L4Q5ZG.json @@ -6798,6 +6798,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R5AG.json b/data/chips/STM32L4R5AG.json index e6950f5..779c3fe 100644 --- a/data/chips/STM32L4R5AG.json +++ b/data/chips/STM32L4R5AG.json @@ -5470,6 +5470,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R5AI.json b/data/chips/STM32L4R5AI.json index 3c96ed7..ad68378 100644 --- a/data/chips/STM32L4R5AI.json +++ b/data/chips/STM32L4R5AI.json @@ -6490,6 +6490,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R5QG.json b/data/chips/STM32L4R5QG.json index 41ce423..f6fb0cd 100644 --- a/data/chips/STM32L4R5QG.json +++ b/data/chips/STM32L4R5QG.json @@ -5791,6 +5791,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R5QI.json b/data/chips/STM32L4R5QI.json index 1168bbc..ad3f138 100644 --- a/data/chips/STM32L4R5QI.json +++ b/data/chips/STM32L4R5QI.json @@ -5791,6 +5791,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R5VG.json b/data/chips/STM32L4R5VG.json index f3405dc..99ca96a 100644 --- a/data/chips/STM32L4R5VG.json +++ b/data/chips/STM32L4R5VG.json @@ -4391,6 +4391,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R5VI.json b/data/chips/STM32L4R5VI.json index 53c0a9f..60f40fa 100644 --- a/data/chips/STM32L4R5VI.json +++ b/data/chips/STM32L4R5VI.json @@ -4391,6 +4391,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R5ZG.json b/data/chips/STM32L4R5ZG.json index c5806bc..9c9e67c 100644 --- a/data/chips/STM32L4R5ZG.json +++ b/data/chips/STM32L4R5ZG.json @@ -5995,6 +5995,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R5ZI.json b/data/chips/STM32L4R5ZI.json index 70fa18d..0f6b630 100644 --- a/data/chips/STM32L4R5ZI.json +++ b/data/chips/STM32L4R5ZI.json @@ -6871,6 +6871,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R7AI.json b/data/chips/STM32L4R7AI.json index f48537b..ff6cf4d 100644 --- a/data/chips/STM32L4R7AI.json +++ b/data/chips/STM32L4R7AI.json @@ -5725,6 +5725,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R7VI.json b/data/chips/STM32L4R7VI.json index fee15c5..593f329 100644 --- a/data/chips/STM32L4R7VI.json +++ b/data/chips/STM32L4R7VI.json @@ -4606,6 +4606,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R7ZI.json b/data/chips/STM32L4R7ZI.json index 9ed7796..7935f89 100644 --- a/data/chips/STM32L4R7ZI.json +++ b/data/chips/STM32L4R7ZI.json @@ -5380,6 +5380,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R9AG.json b/data/chips/STM32L4R9AG.json index 89200e2..0567681 100644 --- a/data/chips/STM32L4R9AG.json +++ b/data/chips/STM32L4R9AG.json @@ -5720,6 +5720,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R9AI.json b/data/chips/STM32L4R9AI.json index 76e51ad..1f604d7 100644 --- a/data/chips/STM32L4R9AI.json +++ b/data/chips/STM32L4R9AI.json @@ -5720,6 +5720,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R9VG.json b/data/chips/STM32L4R9VG.json index cf3bc9e..9a87e2e 100644 --- a/data/chips/STM32L4R9VG.json +++ b/data/chips/STM32L4R9VG.json @@ -4533,6 +4533,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R9VI.json b/data/chips/STM32L4R9VI.json index e7a586f..1533447 100644 --- a/data/chips/STM32L4R9VI.json +++ b/data/chips/STM32L4R9VI.json @@ -4533,6 +4533,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R9ZG.json b/data/chips/STM32L4R9ZG.json index 849c226..c1a703f 100644 --- a/data/chips/STM32L4R9ZG.json +++ b/data/chips/STM32L4R9ZG.json @@ -7163,6 +7163,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4R9ZI.json b/data/chips/STM32L4R9ZI.json index de0107c..d3fbeff 100644 --- a/data/chips/STM32L4R9ZI.json +++ b/data/chips/STM32L4R9ZI.json @@ -8039,6 +8039,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S5AI.json b/data/chips/STM32L4S5AI.json index b7efc0e..a6bf780 100644 --- a/data/chips/STM32L4S5AI.json +++ b/data/chips/STM32L4S5AI.json @@ -5551,6 +5551,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S5QI.json b/data/chips/STM32L4S5QI.json index b32a3c1..13e1ea9 100644 --- a/data/chips/STM32L4S5QI.json +++ b/data/chips/STM32L4S5QI.json @@ -5074,6 +5074,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S5VI.json b/data/chips/STM32L4S5VI.json index db2c78f..37bd1ba 100644 --- a/data/chips/STM32L4S5VI.json +++ b/data/chips/STM32L4S5VI.json @@ -4472,6 +4472,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S5ZI.json b/data/chips/STM32L4S5ZI.json index 9b7695d..c1ee49d 100644 --- a/data/chips/STM32L4S5ZI.json +++ b/data/chips/STM32L4S5ZI.json @@ -6076,6 +6076,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S7AI.json b/data/chips/STM32L4S7AI.json index cb7631e..2c8ab08 100644 --- a/data/chips/STM32L4S7AI.json +++ b/data/chips/STM32L4S7AI.json @@ -5806,6 +5806,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S7VI.json b/data/chips/STM32L4S7VI.json index a04e1b1..429ed2b 100644 --- a/data/chips/STM32L4S7VI.json +++ b/data/chips/STM32L4S7VI.json @@ -4687,6 +4687,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S7ZI.json b/data/chips/STM32L4S7ZI.json index f1e7fdf..39d202d 100644 --- a/data/chips/STM32L4S7ZI.json +++ b/data/chips/STM32L4S7ZI.json @@ -5461,6 +5461,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S9AI.json b/data/chips/STM32L4S9AI.json index b72dfc0..d6ef73d 100644 --- a/data/chips/STM32L4S9AI.json +++ b/data/chips/STM32L4S9AI.json @@ -5801,6 +5801,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S9VI.json b/data/chips/STM32L4S9VI.json index 8addf72..1ccc164 100644 --- a/data/chips/STM32L4S9VI.json +++ b/data/chips/STM32L4S9VI.json @@ -4614,6 +4614,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32L4S9ZI.json b/data/chips/STM32L4S9ZI.json index 208d08a..88fee91 100644 --- a/data/chips/STM32L4S9ZI.json +++ b/data/chips/STM32L4S9ZI.json @@ -7244,6 +7244,15 @@ } } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB10CC.json b/data/chips/STM32WB10CC.json index 9028d0a..c47a301 100644 --- a/data/chips/STM32WB10CC.json +++ b/data/chips/STM32WB10CC.json @@ -1836,6 +1836,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB15CC.json b/data/chips/STM32WB15CC.json index f9d171b..48963c7 100644 --- a/data/chips/STM32WB15CC.json +++ b/data/chips/STM32WB15CC.json @@ -2568,6 +2568,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB30CE.json b/data/chips/STM32WB30CE.json index 338a002..34682d6 100644 --- a/data/chips/STM32WB30CE.json +++ b/data/chips/STM32WB30CE.json @@ -1646,6 +1646,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB35CC.json b/data/chips/STM32WB35CC.json index 119ca19..a167d92 100644 --- a/data/chips/STM32WB35CC.json +++ b/data/chips/STM32WB35CC.json @@ -2243,6 +2243,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB35CE.json b/data/chips/STM32WB35CE.json index 31050fd..0dcaa77 100644 --- a/data/chips/STM32WB35CE.json +++ b/data/chips/STM32WB35CE.json @@ -2243,6 +2243,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB50CG.json b/data/chips/STM32WB50CG.json index 282add9..b99e2f9 100644 --- a/data/chips/STM32WB50CG.json +++ b/data/chips/STM32WB50CG.json @@ -1646,6 +1646,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55CC.json b/data/chips/STM32WB55CC.json index 03fc897..a7ee6c3 100644 --- a/data/chips/STM32WB55CC.json +++ b/data/chips/STM32WB55CC.json @@ -2403,6 +2403,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55CE.json b/data/chips/STM32WB55CE.json index 87bf304..8447214 100644 --- a/data/chips/STM32WB55CE.json +++ b/data/chips/STM32WB55CE.json @@ -2403,6 +2403,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55CG.json b/data/chips/STM32WB55CG.json index 5c6f191..407ffe8 100644 --- a/data/chips/STM32WB55CG.json +++ b/data/chips/STM32WB55CG.json @@ -2403,6 +2403,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55RC.json b/data/chips/STM32WB55RC.json index 1f344e6..3ff302b 100644 --- a/data/chips/STM32WB55RC.json +++ b/data/chips/STM32WB55RC.json @@ -2952,6 +2952,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55RE.json b/data/chips/STM32WB55RE.json index 31cdcf2..7094c3e 100644 --- a/data/chips/STM32WB55RE.json +++ b/data/chips/STM32WB55RE.json @@ -2952,6 +2952,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55RG.json b/data/chips/STM32WB55RG.json index 4f1e265..3d33ff0 100644 --- a/data/chips/STM32WB55RG.json +++ b/data/chips/STM32WB55RG.json @@ -2952,6 +2952,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55VC.json b/data/chips/STM32WB55VC.json index 5c2a61f..5131e31 100644 --- a/data/chips/STM32WB55VC.json +++ b/data/chips/STM32WB55VC.json @@ -4099,6 +4099,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55VE.json b/data/chips/STM32WB55VE.json index 8bfd1eb..9bd963e 100644 --- a/data/chips/STM32WB55VE.json +++ b/data/chips/STM32WB55VE.json @@ -4099,6 +4099,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55VG.json b/data/chips/STM32WB55VG.json index 40175c7..71304e3 100644 --- a/data/chips/STM32WB55VG.json +++ b/data/chips/STM32WB55VG.json @@ -4099,6 +4099,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WB55VY.json b/data/chips/STM32WB55VY.json index b1b644c..0e49bdd 100644 --- a/data/chips/STM32WB55VY.json +++ b/data/chips/STM32WB55VY.json @@ -3301,6 +3301,15 @@ "block": "SYSCFG" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WL54CC.json b/data/chips/STM32WL54CC.json index a53cb95..6e57bd0 100644 --- a/data/chips/STM32WL54CC.json +++ b/data/chips/STM32WL54CC.json @@ -2110,6 +2110,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4685,6 +4694,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WL54JC.json b/data/chips/STM32WL54JC.json index 62d33c6..d073d1a 100644 --- a/data/chips/STM32WL54JC.json +++ b/data/chips/STM32WL54JC.json @@ -2476,6 +2476,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5302,6 +5311,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WL55CC.json b/data/chips/STM32WL55CC.json index 25d52ee..cd791ef 100644 --- a/data/chips/STM32WL55CC.json +++ b/data/chips/STM32WL55CC.json @@ -2116,6 +2116,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -4691,6 +4700,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WL55JC.json b/data/chips/STM32WL55JC.json index b510379..1ae06be 100644 --- a/data/chips/STM32WL55JC.json +++ b/data/chips/STM32WL55JC.json @@ -2482,6 +2482,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, @@ -5308,6 +5317,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE4C8.json b/data/chips/STM32WLE4C8.json index 6c59219..17f1f9b 100644 --- a/data/chips/STM32WLE4C8.json +++ b/data/chips/STM32WLE4C8.json @@ -1898,6 +1898,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE4CB.json b/data/chips/STM32WLE4CB.json index bf6882f..35b5927 100644 --- a/data/chips/STM32WLE4CB.json +++ b/data/chips/STM32WLE4CB.json @@ -1898,6 +1898,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE4CC.json b/data/chips/STM32WLE4CC.json index e92fa0a..de933ff 100644 --- a/data/chips/STM32WLE4CC.json +++ b/data/chips/STM32WLE4CC.json @@ -2073,6 +2073,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE4J8.json b/data/chips/STM32WLE4J8.json index eafae42..46b79ff 100644 --- a/data/chips/STM32WLE4J8.json +++ b/data/chips/STM32WLE4J8.json @@ -2264,6 +2264,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE4JB.json b/data/chips/STM32WLE4JB.json index 724bc12..eaf998a 100644 --- a/data/chips/STM32WLE4JB.json +++ b/data/chips/STM32WLE4JB.json @@ -2264,6 +2264,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE4JC.json b/data/chips/STM32WLE4JC.json index 70d5c42..18036a8 100644 --- a/data/chips/STM32WLE4JC.json +++ b/data/chips/STM32WLE4JC.json @@ -2439,6 +2439,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE5C8.json b/data/chips/STM32WLE5C8.json index e4e3b4a..a42d6f7 100644 --- a/data/chips/STM32WLE5C8.json +++ b/data/chips/STM32WLE5C8.json @@ -2073,6 +2073,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE5CB.json b/data/chips/STM32WLE5CB.json index 1e991b0..b2510f4 100644 --- a/data/chips/STM32WLE5CB.json +++ b/data/chips/STM32WLE5CB.json @@ -2073,6 +2073,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE5CC.json b/data/chips/STM32WLE5CC.json index fe46f63..7728abf 100644 --- a/data/chips/STM32WLE5CC.json +++ b/data/chips/STM32WLE5CC.json @@ -2073,6 +2073,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE5J8.json b/data/chips/STM32WLE5J8.json index 8e684d8..38c530e 100644 --- a/data/chips/STM32WLE5J8.json +++ b/data/chips/STM32WLE5J8.json @@ -2439,6 +2439,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE5JB.json b/data/chips/STM32WLE5JB.json index ab73602..ad1183e 100644 --- a/data/chips/STM32WLE5JB.json +++ b/data/chips/STM32WLE5JB.json @@ -2439,6 +2439,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/chips/STM32WLE5JC.json b/data/chips/STM32WLE5JC.json index 97737cd..d68cc5d 100644 --- a/data/chips/STM32WLE5JC.json +++ b/data/chips/STM32WLE5JC.json @@ -2439,6 +2439,15 @@ "block": "TAMP" } }, + { + "name": "TEMPCAL", + "address": 536835496, + "registers": { + "kind": "tempcal", + "version": "v2", + "block": "TEMPCAL" + } + }, { "name": "TIM1", "address": 1073818624, diff --git a/data/registers/tempcal_v1.json b/data/registers/tempcal_v1.json new file mode 100644 index 0000000..e5729fc --- /dev/null +++ b/data/registers/tempcal_v1.json @@ -0,0 +1,21 @@ +{ + "block/TEMPCAL": { + "description": "Temperature Sensor Factory Calibration", + "items": [ + { + "name": "DATA1", + "description": "Factory calibration value at 30ºC", + "byte_offset": 0, + "access": "Read", + "bit_size": 16 + }, + { + "name": "DATA2", + "description": "Factory calibration value at 130ºC", + "byte_offset": 10, + "access": "Read", + "bit_size": 16 + } + ] + } +} \ No newline at end of file diff --git a/data/registers/tempcal_v2.json b/data/registers/tempcal_v2.json new file mode 100644 index 0000000..b58a976 --- /dev/null +++ b/data/registers/tempcal_v2.json @@ -0,0 +1,21 @@ +{ + "block/TEMPCAL": { + "description": "Temperature Sensor Factory Calibration", + "items": [ + { + "name": "DATA1", + "description": "Factory calibration value at 30ºC", + "byte_offset": 0, + "access": "Read", + "bit_size": 16 + }, + { + "name": "DATA2", + "description": "Factory calibration value at 130ºC", + "byte_offset": 34, + "access": "Read", + "bit_size": 16 + } + ] + } +} \ No newline at end of file