diff --git a/data/chips/STM32H742AG.json b/data/chips/STM32H742AG.json index 0557834..0bb6a7f 100644 --- a/data/chips/STM32H742AG.json +++ b/data/chips/STM32H742AG.json @@ -4494,7 +4494,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4640,7 +4643,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742AI.json b/data/chips/STM32H742AI.json index f6d588b..eb6fc86 100644 --- a/data/chips/STM32H742AI.json +++ b/data/chips/STM32H742AI.json @@ -4505,7 +4505,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4651,7 +4654,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742BG.json b/data/chips/STM32H742BG.json index 2ecbaff..08e830c 100644 --- a/data/chips/STM32H742BG.json +++ b/data/chips/STM32H742BG.json @@ -4647,7 +4647,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4803,7 +4806,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742BI.json b/data/chips/STM32H742BI.json index c51108f..cf4d620 100644 --- a/data/chips/STM32H742BI.json +++ b/data/chips/STM32H742BI.json @@ -4658,7 +4658,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4814,7 +4817,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742IG.json b/data/chips/STM32H742IG.json index 8a8915d..e5cfda1 100644 --- a/data/chips/STM32H742IG.json +++ b/data/chips/STM32H742IG.json @@ -4651,7 +4651,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4807,7 +4810,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742II.json b/data/chips/STM32H742II.json index 0e900ae..28fbbee 100644 --- a/data/chips/STM32H742II.json +++ b/data/chips/STM32H742II.json @@ -4662,7 +4662,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4818,7 +4821,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742VG.json b/data/chips/STM32H742VG.json index a573bb9..d5c4295 100644 --- a/data/chips/STM32H742VG.json +++ b/data/chips/STM32H742VG.json @@ -3861,7 +3861,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -3972,7 +3975,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742VI.json b/data/chips/STM32H742VI.json index 071c931..d7a02a3 100644 --- a/data/chips/STM32H742VI.json +++ b/data/chips/STM32H742VI.json @@ -3872,7 +3872,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -3983,7 +3986,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742XG.json b/data/chips/STM32H742XG.json index 2e47c4f..473da6a 100644 --- a/data/chips/STM32H742XG.json +++ b/data/chips/STM32H742XG.json @@ -4711,7 +4711,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4867,7 +4870,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742XI.json b/data/chips/STM32H742XI.json index f77d6a7..cafee8f 100644 --- a/data/chips/STM32H742XI.json +++ b/data/chips/STM32H742XI.json @@ -4722,7 +4722,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4878,7 +4881,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742ZG.json b/data/chips/STM32H742ZG.json index 72db5b0..84372b9 100644 --- a/data/chips/STM32H742ZG.json +++ b/data/chips/STM32H742ZG.json @@ -4307,7 +4307,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4433,7 +4436,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H742ZI.json b/data/chips/STM32H742ZI.json index 14f611b..487d52c 100644 --- a/data/chips/STM32H742ZI.json +++ b/data/chips/STM32H742ZI.json @@ -4318,7 +4318,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4444,7 +4447,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743AG.json b/data/chips/STM32H743AG.json index 910e8b8..f64f674 100644 --- a/data/chips/STM32H743AG.json +++ b/data/chips/STM32H743AG.json @@ -4919,7 +4919,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5065,7 +5068,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743AI.json b/data/chips/STM32H743AI.json index a2b8ed6..237c1e7 100644 --- a/data/chips/STM32H743AI.json +++ b/data/chips/STM32H743AI.json @@ -4930,7 +4930,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5076,7 +5079,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743BG.json b/data/chips/STM32H743BG.json index 2091984..2c1456f 100644 --- a/data/chips/STM32H743BG.json +++ b/data/chips/STM32H743BG.json @@ -5252,7 +5252,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5408,7 +5411,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743BI.json b/data/chips/STM32H743BI.json index 5135442..9ce5070 100644 --- a/data/chips/STM32H743BI.json +++ b/data/chips/STM32H743BI.json @@ -5263,7 +5263,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5419,7 +5422,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743IG.json b/data/chips/STM32H743IG.json index 72e4b9a..595cd86 100644 --- a/data/chips/STM32H743IG.json +++ b/data/chips/STM32H743IG.json @@ -5096,7 +5096,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5252,7 +5255,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743II.json b/data/chips/STM32H743II.json index 61e5670..d57fab7 100644 --- a/data/chips/STM32H743II.json +++ b/data/chips/STM32H743II.json @@ -5107,7 +5107,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5263,7 +5266,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743VG.json b/data/chips/STM32H743VG.json index b9f215a..c386bd6 100644 --- a/data/chips/STM32H743VG.json +++ b/data/chips/STM32H743VG.json @@ -4141,7 +4141,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4252,7 +4255,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743VI.json b/data/chips/STM32H743VI.json index 35bb5f9..3bc650f 100644 --- a/data/chips/STM32H743VI.json +++ b/data/chips/STM32H743VI.json @@ -4152,7 +4152,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4263,7 +4266,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743XG.json b/data/chips/STM32H743XG.json index c665b34..264d90d 100644 --- a/data/chips/STM32H743XG.json +++ b/data/chips/STM32H743XG.json @@ -5316,7 +5316,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5472,7 +5475,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743XI.json b/data/chips/STM32H743XI.json index 4c6ed72..82d1a0e 100644 --- a/data/chips/STM32H743XI.json +++ b/data/chips/STM32H743XI.json @@ -5327,7 +5327,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5483,7 +5486,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743ZG.json b/data/chips/STM32H743ZG.json index e154897..f4b4aed 100644 --- a/data/chips/STM32H743ZG.json +++ b/data/chips/STM32H743ZG.json @@ -4642,7 +4642,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4768,7 +4771,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H743ZI.json b/data/chips/STM32H743ZI.json index 05fae8b..3957687 100644 --- a/data/chips/STM32H743ZI.json +++ b/data/chips/STM32H743ZI.json @@ -4653,7 +4653,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4779,7 +4782,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H745BG.json b/data/chips/STM32H745BG.json index b0bfe99..3c49175 100644 --- a/data/chips/STM32H745BG.json +++ b/data/chips/STM32H745BG.json @@ -5138,7 +5138,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5294,7 +5297,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -14972,7 +14978,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15128,7 +15137,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H745BI.json b/data/chips/STM32H745BI.json index 5b21e9d..aeb45e6 100644 --- a/data/chips/STM32H745BI.json +++ b/data/chips/STM32H745BI.json @@ -5149,7 +5149,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5305,7 +5308,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -14983,7 +14989,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15139,7 +15148,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H745IG.json b/data/chips/STM32H745IG.json index 8c90de2..d77ffc8 100644 --- a/data/chips/STM32H745IG.json +++ b/data/chips/STM32H745IG.json @@ -5024,7 +5024,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5160,7 +5163,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -14600,7 +14606,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -14736,7 +14745,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H745II.json b/data/chips/STM32H745II.json index 4231119..9ef7036 100644 --- a/data/chips/STM32H745II.json +++ b/data/chips/STM32H745II.json @@ -5035,7 +5035,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5171,7 +5174,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -14611,7 +14617,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -14747,7 +14756,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H745XG.json b/data/chips/STM32H745XG.json index 1f3a436..2d6b720 100644 --- a/data/chips/STM32H745XG.json +++ b/data/chips/STM32H745XG.json @@ -5307,7 +5307,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5463,7 +5466,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -15310,7 +15316,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15466,7 +15475,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H745XI.json b/data/chips/STM32H745XI.json index 902c9fd..be0f65e 100644 --- a/data/chips/STM32H745XI.json +++ b/data/chips/STM32H745XI.json @@ -5318,7 +5318,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5474,7 +5477,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -15321,7 +15327,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15477,7 +15486,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H745ZG.json b/data/chips/STM32H745ZG.json index 8ccc479..b0b0b5b 100644 --- a/data/chips/STM32H745ZG.json +++ b/data/chips/STM32H745ZG.json @@ -4478,7 +4478,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4604,7 +4607,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13247,7 +13253,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13373,7 +13382,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H745ZI.json b/data/chips/STM32H745ZI.json index ed168c2..ed3c0fe 100644 --- a/data/chips/STM32H745ZI.json +++ b/data/chips/STM32H745ZI.json @@ -4489,7 +4489,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4615,7 +4618,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13258,7 +13264,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13384,7 +13393,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747AG.json b/data/chips/STM32H747AG.json index 5254f3d..be2029e 100644 --- a/data/chips/STM32H747AG.json +++ b/data/chips/STM32H747AG.json @@ -4639,7 +4639,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4765,7 +4768,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13627,7 +13633,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13753,7 +13762,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747AI.json b/data/chips/STM32H747AI.json index 6ca0658..38e4252 100644 --- a/data/chips/STM32H747AI.json +++ b/data/chips/STM32H747AI.json @@ -4650,7 +4650,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4776,7 +4779,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13638,7 +13644,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13764,7 +13773,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747BG.json b/data/chips/STM32H747BG.json index f7e0642..164c5ed 100644 --- a/data/chips/STM32H747BG.json +++ b/data/chips/STM32H747BG.json @@ -5099,7 +5099,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5255,7 +5258,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -14762,7 +14768,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -14918,7 +14927,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747BI.json b/data/chips/STM32H747BI.json index f26aa44..0d9129d 100644 --- a/data/chips/STM32H747BI.json +++ b/data/chips/STM32H747BI.json @@ -5110,7 +5110,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5266,7 +5269,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -14773,7 +14779,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -14929,7 +14938,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747IG.json b/data/chips/STM32H747IG.json index 39a5dc9..ab5fef6 100644 --- a/data/chips/STM32H747IG.json +++ b/data/chips/STM32H747IG.json @@ -4639,7 +4639,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4765,7 +4768,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13627,7 +13633,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13753,7 +13762,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747II.json b/data/chips/STM32H747II.json index 9a74727..f608c4c 100644 --- a/data/chips/STM32H747II.json +++ b/data/chips/STM32H747II.json @@ -4650,7 +4650,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4776,7 +4779,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13638,7 +13644,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13764,7 +13773,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747XG.json b/data/chips/STM32H747XG.json index d19dfba..d61ce67 100644 --- a/data/chips/STM32H747XG.json +++ b/data/chips/STM32H747XG.json @@ -5313,7 +5313,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5469,7 +5472,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -15320,7 +15326,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15476,7 +15485,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747XI.json b/data/chips/STM32H747XI.json index a9e9bf0..6e274fc 100644 --- a/data/chips/STM32H747XI.json +++ b/data/chips/STM32H747XI.json @@ -5324,7 +5324,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5480,7 +5483,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -15331,7 +15337,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15487,7 +15496,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H747ZI.json b/data/chips/STM32H747ZI.json index aa49231..b76b6f9 100644 --- a/data/chips/STM32H747ZI.json +++ b/data/chips/STM32H747ZI.json @@ -4358,7 +4358,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4474,7 +4477,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -12803,7 +12809,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -12919,7 +12928,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H750IB.json b/data/chips/STM32H750IB.json index 6bdc8a7..0a5c507 100644 --- a/data/chips/STM32H750IB.json +++ b/data/chips/STM32H750IB.json @@ -5157,7 +5157,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5313,7 +5316,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H750VB.json b/data/chips/STM32H750VB.json index 72a6d19..b1b5c63 100644 --- a/data/chips/STM32H750VB.json +++ b/data/chips/STM32H750VB.json @@ -4198,7 +4198,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4309,7 +4312,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H750XB.json b/data/chips/STM32H750XB.json index 7e76413..55c872e 100644 --- a/data/chips/STM32H750XB.json +++ b/data/chips/STM32H750XB.json @@ -5377,7 +5377,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5533,7 +5536,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H750ZB.json b/data/chips/STM32H750ZB.json index c6007bb..f255688 100644 --- a/data/chips/STM32H750ZB.json +++ b/data/chips/STM32H750ZB.json @@ -4691,7 +4691,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4817,7 +4820,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H753AI.json b/data/chips/STM32H753AI.json index 77cfa70..5ea5798 100644 --- a/data/chips/STM32H753AI.json +++ b/data/chips/STM32H753AI.json @@ -5009,7 +5009,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5155,7 +5158,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H753BI.json b/data/chips/STM32H753BI.json index d306951..902627e 100644 --- a/data/chips/STM32H753BI.json +++ b/data/chips/STM32H753BI.json @@ -5342,7 +5342,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5498,7 +5501,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H753II.json b/data/chips/STM32H753II.json index 50efed9..47966ef 100644 --- a/data/chips/STM32H753II.json +++ b/data/chips/STM32H753II.json @@ -5186,7 +5186,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5342,7 +5345,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H753VI.json b/data/chips/STM32H753VI.json index 21e2479..ede41fd 100644 --- a/data/chips/STM32H753VI.json +++ b/data/chips/STM32H753VI.json @@ -4231,7 +4231,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4342,7 +4345,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H753XI.json b/data/chips/STM32H753XI.json index ad469f3..7cc03c5 100644 --- a/data/chips/STM32H753XI.json +++ b/data/chips/STM32H753XI.json @@ -5406,7 +5406,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5562,7 +5565,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H753ZI.json b/data/chips/STM32H753ZI.json index a23f3a7..6f02c37 100644 --- a/data/chips/STM32H753ZI.json +++ b/data/chips/STM32H753ZI.json @@ -4732,7 +4732,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4858,7 +4861,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H755BI.json b/data/chips/STM32H755BI.json index a84daf6..ad04ec6 100644 --- a/data/chips/STM32H755BI.json +++ b/data/chips/STM32H755BI.json @@ -5228,7 +5228,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5384,7 +5387,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -15139,7 +15145,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15295,7 +15304,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H755II.json b/data/chips/STM32H755II.json index 43ff3c4..b7f2cfc 100644 --- a/data/chips/STM32H755II.json +++ b/data/chips/STM32H755II.json @@ -5114,7 +5114,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5250,7 +5253,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -14767,7 +14773,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -14903,7 +14912,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H755XI.json b/data/chips/STM32H755XI.json index 0f33a53..464da0a 100644 --- a/data/chips/STM32H755XI.json +++ b/data/chips/STM32H755XI.json @@ -5397,7 +5397,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5553,7 +5556,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -15477,7 +15483,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15633,7 +15642,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H755ZI.json b/data/chips/STM32H755ZI.json index 6db1ed1..99aa289 100644 --- a/data/chips/STM32H755ZI.json +++ b/data/chips/STM32H755ZI.json @@ -4568,7 +4568,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4694,7 +4697,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13414,7 +13420,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13540,7 +13549,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H757AI.json b/data/chips/STM32H757AI.json index c62cf7c..d3b13b1 100644 --- a/data/chips/STM32H757AI.json +++ b/data/chips/STM32H757AI.json @@ -4729,7 +4729,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4855,7 +4858,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13794,7 +13800,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13920,7 +13929,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H757BI.json b/data/chips/STM32H757BI.json index 4127494..a2b291e 100644 --- a/data/chips/STM32H757BI.json +++ b/data/chips/STM32H757BI.json @@ -5189,7 +5189,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5345,7 +5348,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -14929,7 +14935,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15085,7 +15094,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H757II.json b/data/chips/STM32H757II.json index 274b756..9d1e7d3 100644 --- a/data/chips/STM32H757II.json +++ b/data/chips/STM32H757II.json @@ -4729,7 +4729,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4855,7 +4858,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -13794,7 +13800,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13920,7 +13929,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H757XI.json b/data/chips/STM32H757XI.json index f58e838..01a7f3d 100644 --- a/data/chips/STM32H757XI.json +++ b/data/chips/STM32H757XI.json @@ -5403,7 +5403,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -5559,7 +5562,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -15487,7 +15493,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -15643,7 +15652,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" diff --git a/data/chips/STM32H757ZI.json b/data/chips/STM32H757ZI.json index ff4c48d..a61017c 100644 --- a/data/chips/STM32H757ZI.json +++ b/data/chips/STM32H757ZI.json @@ -4437,7 +4437,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -4553,7 +4556,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN" @@ -12959,7 +12965,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI2EN" @@ -13075,7 +13084,10 @@ }, "rcc": { "bus_clock": "PCLK2", - "kernel_clock": "PCLK2", + "kernel_clock": { + "register": "D2CCIP1R", + "field": "SAI23SEL" + }, "enable": { "register": "APB2ENR", "field": "SAI3EN"