diff --git a/data/chips/STM32L412C8.json b/data/chips/STM32L412C8.json index 2ca3470..1504cc6 100644 --- a/data/chips/STM32L412C8.json +++ b/data/chips/STM32L412C8.json @@ -1153,6 +1153,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L412CB.json b/data/chips/STM32L412CB.json index 56f9eba..755c81a 100644 --- a/data/chips/STM32L412CB.json +++ b/data/chips/STM32L412CB.json @@ -1741,6 +1741,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L412K8.json b/data/chips/STM32L412K8.json index 8ac3c67..bd31faf 100644 --- a/data/chips/STM32L412K8.json +++ b/data/chips/STM32L412K8.json @@ -961,6 +961,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L412KB.json b/data/chips/STM32L412KB.json index 269fb2f..f7ffd80 100644 --- a/data/chips/STM32L412KB.json +++ b/data/chips/STM32L412KB.json @@ -961,6 +961,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L412R8.json b/data/chips/STM32L412R8.json index 809937c..24b75f0 100644 --- a/data/chips/STM32L412R8.json +++ b/data/chips/STM32L412R8.json @@ -1393,6 +1393,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L412RB.json b/data/chips/STM32L412RB.json index 033ca80..2014962 100644 --- a/data/chips/STM32L412RB.json +++ b/data/chips/STM32L412RB.json @@ -2179,6 +2179,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L412T8.json b/data/chips/STM32L412T8.json index 612dccb..6401426 100644 --- a/data/chips/STM32L412T8.json +++ b/data/chips/STM32L412T8.json @@ -787,6 +787,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L412TB.json b/data/chips/STM32L412TB.json index d4c2c5b..2cc7c44 100644 --- a/data/chips/STM32L412TB.json +++ b/data/chips/STM32L412TB.json @@ -1009,6 +1009,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L422CB.json b/data/chips/STM32L422CB.json index 8fab9c0..790d973 100644 --- a/data/chips/STM32L422CB.json +++ b/data/chips/STM32L422CB.json @@ -1202,6 +1202,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L422KB.json b/data/chips/STM32L422KB.json index 15be08e..bbb6e68 100644 --- a/data/chips/STM32L422KB.json +++ b/data/chips/STM32L422KB.json @@ -1010,6 +1010,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L422RB.json b/data/chips/STM32L422RB.json index 60b094f..f3a1daf 100644 --- a/data/chips/STM32L422RB.json +++ b/data/chips/STM32L422RB.json @@ -1448,6 +1448,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L422TB.json b/data/chips/STM32L422TB.json index 72e88f5..57ba197 100644 --- a/data/chips/STM32L422TB.json +++ b/data/chips/STM32L422TB.json @@ -836,6 +836,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", diff --git a/data/chips/STM32L431CB.json b/data/chips/STM32L431CB.json index 87636d4..2e0421c 100644 --- a/data/chips/STM32L431CB.json +++ b/data/chips/STM32L431CB.json @@ -1436,6 +1436,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1497,6 +1502,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L431CC.json b/data/chips/STM32L431CC.json index cde8d81..b2f2855 100644 --- a/data/chips/STM32L431CC.json +++ b/data/chips/STM32L431CC.json @@ -1436,6 +1436,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1497,6 +1502,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L431KB.json b/data/chips/STM32L431KB.json index 0d3aaad..575b0f1 100644 --- a/data/chips/STM32L431KB.json +++ b/data/chips/STM32L431KB.json @@ -732,6 +732,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -784,6 +789,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L431KC.json b/data/chips/STM32L431KC.json index 568903f..103360b 100644 --- a/data/chips/STM32L431KC.json +++ b/data/chips/STM32L431KC.json @@ -732,6 +732,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -784,6 +789,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L431RB.json b/data/chips/STM32L431RB.json index b80aa04..0ebe30c 100644 --- a/data/chips/STM32L431RB.json +++ b/data/chips/STM32L431RB.json @@ -1738,6 +1738,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1807,6 +1812,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L431RC.json b/data/chips/STM32L431RC.json index ff1b3fd..835eb62 100644 --- a/data/chips/STM32L431RC.json +++ b/data/chips/STM32L431RC.json @@ -1738,6 +1738,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1807,6 +1812,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L431VC.json b/data/chips/STM32L431VC.json index c1e0430..f6cf32d 100644 --- a/data/chips/STM32L431VC.json +++ b/data/chips/STM32L431VC.json @@ -1790,6 +1790,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1859,6 +1864,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L432KB.json b/data/chips/STM32L432KB.json index 91ba6cf..cd2855a 100644 --- a/data/chips/STM32L432KB.json +++ b/data/chips/STM32L432KB.json @@ -738,6 +738,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -790,6 +795,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L432KC.json b/data/chips/STM32L432KC.json index 147f852..0e903ea 100644 --- a/data/chips/STM32L432KC.json +++ b/data/chips/STM32L432KC.json @@ -738,6 +738,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -790,6 +795,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L433CB.json b/data/chips/STM32L433CB.json index cf53179..18e1aed 100644 --- a/data/chips/STM32L433CB.json +++ b/data/chips/STM32L433CB.json @@ -1448,6 +1448,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1509,6 +1514,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L433CC.json b/data/chips/STM32L433CC.json index 6e36247..b30bcab 100644 --- a/data/chips/STM32L433CC.json +++ b/data/chips/STM32L433CC.json @@ -1448,6 +1448,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1509,6 +1514,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L433RB.json b/data/chips/STM32L433RB.json index bccd1ef..e3abb95 100644 --- a/data/chips/STM32L433RB.json +++ b/data/chips/STM32L433RB.json @@ -1750,6 +1750,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1819,6 +1824,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L433RC.json b/data/chips/STM32L433RC.json index 1381479..44d72d4 100644 --- a/data/chips/STM32L433RC.json +++ b/data/chips/STM32L433RC.json @@ -2146,6 +2146,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -2215,6 +2220,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L433VC.json b/data/chips/STM32L433VC.json index 2eeb381..a5c490d 100644 --- a/data/chips/STM32L433VC.json +++ b/data/chips/STM32L433VC.json @@ -1802,6 +1802,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1871,6 +1876,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L442KC.json b/data/chips/STM32L442KC.json index 0ee5627..1846c1b 100644 --- a/data/chips/STM32L442KC.json +++ b/data/chips/STM32L442KC.json @@ -787,6 +787,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -839,6 +844,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L443CC.json b/data/chips/STM32L443CC.json index eed8b75..8fad512 100644 --- a/data/chips/STM32L443CC.json +++ b/data/chips/STM32L443CC.json @@ -1797,6 +1797,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1858,6 +1863,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L443RC.json b/data/chips/STM32L443RC.json index c7a66f7..c44b6b6 100644 --- a/data/chips/STM32L443RC.json +++ b/data/chips/STM32L443RC.json @@ -1799,6 +1799,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1868,6 +1873,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L443VC.json b/data/chips/STM32L443VC.json index 18d73e9..54eb9a4 100644 --- a/data/chips/STM32L443VC.json +++ b/data/chips/STM32L443VC.json @@ -1851,6 +1851,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1920,6 +1925,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L451CC.json b/data/chips/STM32L451CC.json index 7544d86..d72d9e1 100644 --- a/data/chips/STM32L451CC.json +++ b/data/chips/STM32L451CC.json @@ -858,6 +858,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -919,6 +924,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L451CE.json b/data/chips/STM32L451CE.json index 1eff124..212d4c2 100644 --- a/data/chips/STM32L451CE.json +++ b/data/chips/STM32L451CE.json @@ -1152,6 +1152,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1213,6 +1218,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L451RC.json b/data/chips/STM32L451RC.json index 8290604..904062b 100644 --- a/data/chips/STM32L451RC.json +++ b/data/chips/STM32L451RC.json @@ -1758,6 +1758,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1827,6 +1832,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L451RE.json b/data/chips/STM32L451RE.json index 0909a4b..b9c26cc 100644 --- a/data/chips/STM32L451RE.json +++ b/data/chips/STM32L451RE.json @@ -1758,6 +1758,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1827,6 +1832,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L451VC.json b/data/chips/STM32L451VC.json index 742d57c..ee1ca53 100644 --- a/data/chips/STM32L451VC.json +++ b/data/chips/STM32L451VC.json @@ -1810,6 +1810,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1879,6 +1884,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L451VE.json b/data/chips/STM32L451VE.json index 558ed8e..d12919d 100644 --- a/data/chips/STM32L451VE.json +++ b/data/chips/STM32L451VE.json @@ -1810,6 +1810,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1879,6 +1884,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L452CC.json b/data/chips/STM32L452CC.json index 04d8363..1365e5e 100644 --- a/data/chips/STM32L452CC.json +++ b/data/chips/STM32L452CC.json @@ -864,6 +864,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -925,6 +930,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L452CE.json b/data/chips/STM32L452CE.json index 2385093..653d001 100644 --- a/data/chips/STM32L452CE.json +++ b/data/chips/STM32L452CE.json @@ -1452,6 +1452,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1513,6 +1518,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L452RC.json b/data/chips/STM32L452RC.json index 5be4e2f..a371561 100644 --- a/data/chips/STM32L452RC.json +++ b/data/chips/STM32L452RC.json @@ -1764,6 +1764,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1833,6 +1838,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L452RE.json b/data/chips/STM32L452RE.json index 5106771..44036c8 100644 --- a/data/chips/STM32L452RE.json +++ b/data/chips/STM32L452RE.json @@ -2550,6 +2550,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -2619,6 +2624,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L452VC.json b/data/chips/STM32L452VC.json index 47af629..b87dbf9 100644 --- a/data/chips/STM32L452VC.json +++ b/data/chips/STM32L452VC.json @@ -1816,6 +1816,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1885,6 +1890,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L452VE.json b/data/chips/STM32L452VE.json index 103cf26..c37ba32 100644 --- a/data/chips/STM32L452VE.json +++ b/data/chips/STM32L452VE.json @@ -1816,6 +1816,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1885,6 +1890,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L462CE.json b/data/chips/STM32L462CE.json index 9199578..23db143 100644 --- a/data/chips/STM32L462CE.json +++ b/data/chips/STM32L462CE.json @@ -1213,6 +1213,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1274,6 +1279,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L462RE.json b/data/chips/STM32L462RE.json index 0a85183..ad1d2f8 100644 --- a/data/chips/STM32L462RE.json +++ b/data/chips/STM32L462RE.json @@ -1813,6 +1813,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1882,6 +1887,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L462VE.json b/data/chips/STM32L462VE.json index 0b7b005..f3b0ca1 100644 --- a/data/chips/STM32L462VE.json +++ b/data/chips/STM32L462VE.json @@ -1865,6 +1865,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA0", @@ -1934,6 +1939,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PA2", diff --git a/data/chips/STM32L471QE.json b/data/chips/STM32L471QE.json index c7cde71..43b66c0 100644 --- a/data/chips/STM32L471QE.json +++ b/data/chips/STM32L471QE.json @@ -1561,6 +1561,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1599,6 +1604,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L471QG.json b/data/chips/STM32L471QG.json index 7b5453a..31398e9 100644 --- a/data/chips/STM32L471QG.json +++ b/data/chips/STM32L471QG.json @@ -1561,6 +1561,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1599,6 +1604,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L471RE.json b/data/chips/STM32L471RE.json index f2e482c..0a9bd98 100644 --- a/data/chips/STM32L471RE.json +++ b/data/chips/STM32L471RE.json @@ -1131,6 +1131,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1169,6 +1174,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L471RG.json b/data/chips/STM32L471RG.json index fafdcb3..7d2cac9 100644 --- a/data/chips/STM32L471RG.json +++ b/data/chips/STM32L471RG.json @@ -1131,6 +1131,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1169,6 +1174,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L471VE.json b/data/chips/STM32L471VE.json index ccdf386..68fd848 100644 --- a/data/chips/STM32L471VE.json +++ b/data/chips/STM32L471VE.json @@ -1357,6 +1357,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1395,6 +1400,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L471VG.json b/data/chips/STM32L471VG.json index a739dc0..6c75a89 100644 --- a/data/chips/STM32L471VG.json +++ b/data/chips/STM32L471VG.json @@ -1357,6 +1357,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1395,6 +1400,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L471ZE.json b/data/chips/STM32L471ZE.json index 84a14e4..c5735ca 100644 --- a/data/chips/STM32L471ZE.json +++ b/data/chips/STM32L471ZE.json @@ -2523,6 +2523,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2561,6 +2566,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L471ZG.json b/data/chips/STM32L471ZG.json index 01c26f4..3c09fef 100644 --- a/data/chips/STM32L471ZG.json +++ b/data/chips/STM32L471ZG.json @@ -2523,6 +2523,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2561,6 +2566,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L475RC.json b/data/chips/STM32L475RC.json index f27f6ac..b75b840 100644 --- a/data/chips/STM32L475RC.json +++ b/data/chips/STM32L475RC.json @@ -1137,6 +1137,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1175,6 +1180,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L475RE.json b/data/chips/STM32L475RE.json index 6ab8b39..a996295 100644 --- a/data/chips/STM32L475RE.json +++ b/data/chips/STM32L475RE.json @@ -1137,6 +1137,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1175,6 +1180,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L475RG.json b/data/chips/STM32L475RG.json index a40b7e0..c02f71f 100644 --- a/data/chips/STM32L475RG.json +++ b/data/chips/STM32L475RG.json @@ -1137,6 +1137,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1175,6 +1180,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L475VC.json b/data/chips/STM32L475VC.json index 169e995..daa7c4c 100644 --- a/data/chips/STM32L475VC.json +++ b/data/chips/STM32L475VC.json @@ -1363,6 +1363,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1401,6 +1406,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L475VE.json b/data/chips/STM32L475VE.json index 98847a5..7d3b999 100644 --- a/data/chips/STM32L475VE.json +++ b/data/chips/STM32L475VE.json @@ -1363,6 +1363,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1401,6 +1406,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L475VG.json b/data/chips/STM32L475VG.json index a83f764..59a1803 100644 --- a/data/chips/STM32L475VG.json +++ b/data/chips/STM32L475VG.json @@ -1363,6 +1363,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1401,6 +1406,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476JE.json b/data/chips/STM32L476JE.json index 76f3404..57958e8 100644 --- a/data/chips/STM32L476JE.json +++ b/data/chips/STM32L476JE.json @@ -1209,6 +1209,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1247,6 +1252,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476JG.json b/data/chips/STM32L476JG.json index 9b2676a..928eaf5 100644 --- a/data/chips/STM32L476JG.json +++ b/data/chips/STM32L476JG.json @@ -1653,6 +1653,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1691,6 +1696,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476ME.json b/data/chips/STM32L476ME.json index 44c8248..c1e7c87 100644 --- a/data/chips/STM32L476ME.json +++ b/data/chips/STM32L476ME.json @@ -1263,6 +1263,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1301,6 +1306,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476MG.json b/data/chips/STM32L476MG.json index 0e952dd..deb3756 100644 --- a/data/chips/STM32L476MG.json +++ b/data/chips/STM32L476MG.json @@ -1263,6 +1263,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1301,6 +1306,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476QE.json b/data/chips/STM32L476QE.json index a207af9..7b0fdfe 100644 --- a/data/chips/STM32L476QE.json +++ b/data/chips/STM32L476QE.json @@ -1597,6 +1597,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1635,6 +1640,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476QG.json b/data/chips/STM32L476QG.json index a4bafd4..ed2cf36 100644 --- a/data/chips/STM32L476QG.json +++ b/data/chips/STM32L476QG.json @@ -2395,6 +2395,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2433,6 +2438,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476RC.json b/data/chips/STM32L476RC.json index 3c08bd2..009cae1 100644 --- a/data/chips/STM32L476RC.json +++ b/data/chips/STM32L476RC.json @@ -1161,6 +1161,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1199,6 +1204,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476RE.json b/data/chips/STM32L476RE.json index de1ffd5..3fa8d24 100644 --- a/data/chips/STM32L476RE.json +++ b/data/chips/STM32L476RE.json @@ -1161,6 +1161,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1199,6 +1204,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476RG.json b/data/chips/STM32L476RG.json index 117bca3..80afd10 100644 --- a/data/chips/STM32L476RG.json +++ b/data/chips/STM32L476RG.json @@ -1161,6 +1161,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1199,6 +1204,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476VC.json b/data/chips/STM32L476VC.json index c668b23..9686d1e 100644 --- a/data/chips/STM32L476VC.json +++ b/data/chips/STM32L476VC.json @@ -1393,6 +1393,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1431,6 +1436,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476VE.json b/data/chips/STM32L476VE.json index 7af5000..906c8e4 100644 --- a/data/chips/STM32L476VE.json +++ b/data/chips/STM32L476VE.json @@ -1393,6 +1393,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1431,6 +1436,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476VG.json b/data/chips/STM32L476VG.json index 39aa65f..aeb3233 100644 --- a/data/chips/STM32L476VG.json +++ b/data/chips/STM32L476VG.json @@ -1993,6 +1993,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2031,6 +2036,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476ZE.json b/data/chips/STM32L476ZE.json index 974d74a..0d55206 100644 --- a/data/chips/STM32L476ZE.json +++ b/data/chips/STM32L476ZE.json @@ -1689,6 +1689,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1727,6 +1732,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L476ZG.json b/data/chips/STM32L476ZG.json index 50ee5d6..f590c99 100644 --- a/data/chips/STM32L476ZG.json +++ b/data/chips/STM32L476ZG.json @@ -3435,6 +3435,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3473,6 +3478,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L486JG.json b/data/chips/STM32L486JG.json index e8874ab..98f3419 100644 --- a/data/chips/STM32L486JG.json +++ b/data/chips/STM32L486JG.json @@ -1258,6 +1258,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1296,6 +1301,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L486QG.json b/data/chips/STM32L486QG.json index bf34948..ce9a480 100644 --- a/data/chips/STM32L486QG.json +++ b/data/chips/STM32L486QG.json @@ -1646,6 +1646,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1684,6 +1689,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L486RG.json b/data/chips/STM32L486RG.json index 6e9027c..9b284c8 100644 --- a/data/chips/STM32L486RG.json +++ b/data/chips/STM32L486RG.json @@ -1210,6 +1210,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1248,6 +1253,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L486VG.json b/data/chips/STM32L486VG.json index 5f661aa..6f70500 100644 --- a/data/chips/STM32L486VG.json +++ b/data/chips/STM32L486VG.json @@ -1442,6 +1442,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1480,6 +1485,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L486ZG.json b/data/chips/STM32L486ZG.json index 6a151da..e7ecb15 100644 --- a/data/chips/STM32L486ZG.json +++ b/data/chips/STM32L486ZG.json @@ -1738,6 +1738,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1776,6 +1781,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496AE.json b/data/chips/STM32L496AE.json index 7b30f72..2afee3d 100644 --- a/data/chips/STM32L496AE.json +++ b/data/chips/STM32L496AE.json @@ -1888,6 +1888,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1926,6 +1931,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496AG.json b/data/chips/STM32L496AG.json index 0eddfc5..742292d 100644 --- a/data/chips/STM32L496AG.json +++ b/data/chips/STM32L496AG.json @@ -2914,6 +2914,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2952,6 +2957,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496QE.json b/data/chips/STM32L496QE.json index f8a1f75..012a2f3 100644 --- a/data/chips/STM32L496QE.json +++ b/data/chips/STM32L496QE.json @@ -1652,6 +1652,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1690,6 +1695,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496QG.json b/data/chips/STM32L496QG.json index 6a0a382..50b5ecd 100644 --- a/data/chips/STM32L496QG.json +++ b/data/chips/STM32L496QG.json @@ -3248,6 +3248,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3286,6 +3291,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496RE.json b/data/chips/STM32L496RE.json index 7690fcb..79090fa 100644 --- a/data/chips/STM32L496RE.json +++ b/data/chips/STM32L496RE.json @@ -1222,6 +1222,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1260,6 +1265,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496RG.json b/data/chips/STM32L496RG.json index 49ce3d9..87a7f11 100644 --- a/data/chips/STM32L496RG.json +++ b/data/chips/STM32L496RG.json @@ -1612,6 +1612,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1650,6 +1655,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496VE.json b/data/chips/STM32L496VE.json index 461fea0..18e84b5 100644 --- a/data/chips/STM32L496VE.json +++ b/data/chips/STM32L496VE.json @@ -1448,6 +1448,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1486,6 +1491,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496VG.json b/data/chips/STM32L496VG.json index ac6f7ac..a1d7ac0 100644 --- a/data/chips/STM32L496VG.json +++ b/data/chips/STM32L496VG.json @@ -3272,6 +3272,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3310,6 +3315,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496WG.json b/data/chips/STM32L496WG.json index ff2fa99..3bb99bb 100644 --- a/data/chips/STM32L496WG.json +++ b/data/chips/STM32L496WG.json @@ -1785,6 +1785,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1823,6 +1828,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496ZE.json b/data/chips/STM32L496ZE.json index d58af6c..1241ad8 100644 --- a/data/chips/STM32L496ZE.json +++ b/data/chips/STM32L496ZE.json @@ -1744,6 +1744,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1782,6 +1787,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L496ZG.json b/data/chips/STM32L496ZG.json index 62221d1..32e05ce 100644 --- a/data/chips/STM32L496ZG.json +++ b/data/chips/STM32L496ZG.json @@ -2620,6 +2620,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2658,6 +2663,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4A6AG.json b/data/chips/STM32L4A6AG.json index fd6b84d..0c72bf7 100644 --- a/data/chips/STM32L4A6AG.json +++ b/data/chips/STM32L4A6AG.json @@ -2957,6 +2957,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2995,6 +3000,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4A6QG.json b/data/chips/STM32L4A6QG.json index 20cbab2..5a9c2a7 100644 --- a/data/chips/STM32L4A6QG.json +++ b/data/chips/STM32L4A6QG.json @@ -2499,6 +2499,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2537,6 +2542,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4A6RG.json b/data/chips/STM32L4A6RG.json index 5f4ef93..b58a903 100644 --- a/data/chips/STM32L4A6RG.json +++ b/data/chips/STM32L4A6RG.json @@ -1661,6 +1661,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1699,6 +1704,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4A6VG.json b/data/chips/STM32L4A6VG.json index 5ae9db0..6e7af55 100644 --- a/data/chips/STM32L4A6VG.json +++ b/data/chips/STM32L4A6VG.json @@ -3315,6 +3315,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3353,6 +3358,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4A6ZG.json b/data/chips/STM32L4A6ZG.json index b07e50f..f772841 100644 --- a/data/chips/STM32L4A6ZG.json +++ b/data/chips/STM32L4A6ZG.json @@ -2663,6 +2663,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2701,6 +2706,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5AE.json b/data/chips/STM32L4P5AE.json index ce42c3e..7d32cb1 100644 --- a/data/chips/STM32L4P5AE.json +++ b/data/chips/STM32L4P5AE.json @@ -1760,6 +1760,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1798,6 +1803,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5AG.json b/data/chips/STM32L4P5AG.json index af2cc2c..13bec5b 100644 --- a/data/chips/STM32L4P5AG.json +++ b/data/chips/STM32L4P5AG.json @@ -2780,6 +2780,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2818,6 +2823,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5CE.json b/data/chips/STM32L4P5CE.json index 480f2de..3211779 100644 --- a/data/chips/STM32L4P5CE.json +++ b/data/chips/STM32L4P5CE.json @@ -1260,6 +1260,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1290,6 +1295,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5CG.json b/data/chips/STM32L4P5CG.json index f9d7cb6..b8902f8 100644 --- a/data/chips/STM32L4P5CG.json +++ b/data/chips/STM32L4P5CG.json @@ -1848,6 +1848,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1878,6 +1883,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5QE.json b/data/chips/STM32L4P5QE.json index 58d4dd5..561aa2c 100644 --- a/data/chips/STM32L4P5QE.json +++ b/data/chips/STM32L4P5QE.json @@ -1528,6 +1528,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1566,6 +1571,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5QG.json b/data/chips/STM32L4P5QG.json index 1fd12b3..49c31a3 100644 --- a/data/chips/STM32L4P5QG.json +++ b/data/chips/STM32L4P5QG.json @@ -3124,6 +3124,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3162,6 +3167,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5RE.json b/data/chips/STM32L4P5RE.json index fe2fcff..d726c27 100644 --- a/data/chips/STM32L4P5RE.json +++ b/data/chips/STM32L4P5RE.json @@ -1110,6 +1110,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1148,6 +1153,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5RG.json b/data/chips/STM32L4P5RG.json index 78824a5..551f349 100644 --- a/data/chips/STM32L4P5RG.json +++ b/data/chips/STM32L4P5RG.json @@ -1500,6 +1500,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1538,6 +1543,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5VE.json b/data/chips/STM32L4P5VE.json index 76aea10..cd03112 100644 --- a/data/chips/STM32L4P5VE.json +++ b/data/chips/STM32L4P5VE.json @@ -1942,6 +1942,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1980,6 +1985,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5VG.json b/data/chips/STM32L4P5VG.json index eda8148..6972928 100644 --- a/data/chips/STM32L4P5VG.json +++ b/data/chips/STM32L4P5VG.json @@ -3154,6 +3154,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3192,6 +3197,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5ZE.json b/data/chips/STM32L4P5ZE.json index 89fa325..b3886b8 100644 --- a/data/chips/STM32L4P5ZE.json +++ b/data/chips/STM32L4P5ZE.json @@ -1600,6 +1600,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1638,6 +1643,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4P5ZG.json b/data/chips/STM32L4P5ZG.json index 83c40ec..7a86e2d 100644 --- a/data/chips/STM32L4P5ZG.json +++ b/data/chips/STM32L4P5ZG.json @@ -2470,6 +2470,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2508,6 +2513,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4Q5AG.json b/data/chips/STM32L4Q5AG.json index a6e7f02..3aaa08b 100644 --- a/data/chips/STM32L4Q5AG.json +++ b/data/chips/STM32L4Q5AG.json @@ -2819,6 +2819,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2857,6 +2862,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4Q5CG.json b/data/chips/STM32L4Q5CG.json index 77bdd06..672640b 100644 --- a/data/chips/STM32L4Q5CG.json +++ b/data/chips/STM32L4Q5CG.json @@ -1887,6 +1887,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1917,6 +1922,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4Q5QG.json b/data/chips/STM32L4Q5QG.json index e2831a5..1d57953 100644 --- a/data/chips/STM32L4Q5QG.json +++ b/data/chips/STM32L4Q5QG.json @@ -2365,6 +2365,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2403,6 +2408,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4Q5RG.json b/data/chips/STM32L4Q5RG.json index dbb58a0..4c39a04 100644 --- a/data/chips/STM32L4Q5RG.json +++ b/data/chips/STM32L4Q5RG.json @@ -1539,6 +1539,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1577,6 +1582,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4Q5VG.json b/data/chips/STM32L4Q5VG.json index b66e485..fbc730d 100644 --- a/data/chips/STM32L4Q5VG.json +++ b/data/chips/STM32L4Q5VG.json @@ -3193,6 +3193,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3231,6 +3236,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4Q5ZG.json b/data/chips/STM32L4Q5ZG.json index f5caeac..b68b4a6 100644 --- a/data/chips/STM32L4Q5ZG.json +++ b/data/chips/STM32L4Q5ZG.json @@ -2509,6 +2509,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2547,6 +2552,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R5AG.json b/data/chips/STM32L4R5AG.json index 8e81756..c2892f6 100644 --- a/data/chips/STM32L4R5AG.json +++ b/data/chips/STM32L4R5AG.json @@ -1663,6 +1663,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1701,6 +1706,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R5AI.json b/data/chips/STM32L4R5AI.json index 5e726eb..38746f9 100644 --- a/data/chips/STM32L4R5AI.json +++ b/data/chips/STM32L4R5AI.json @@ -2683,6 +2683,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2721,6 +2726,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R5QG.json b/data/chips/STM32L4R5QG.json index 2d7e428..38a8a0e 100644 --- a/data/chips/STM32L4R5QG.json +++ b/data/chips/STM32L4R5QG.json @@ -2229,6 +2229,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2267,6 +2272,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R5QI.json b/data/chips/STM32L4R5QI.json index 449c989..2048730 100644 --- a/data/chips/STM32L4R5QI.json +++ b/data/chips/STM32L4R5QI.json @@ -2229,6 +2229,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2267,6 +2272,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R5VG.json b/data/chips/STM32L4R5VG.json index 1754e9a..8b72152 100644 --- a/data/chips/STM32L4R5VG.json +++ b/data/chips/STM32L4R5VG.json @@ -1239,6 +1239,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1277,6 +1282,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R5VI.json b/data/chips/STM32L4R5VI.json index c16c74a..8c4aa86 100644 --- a/data/chips/STM32L4R5VI.json +++ b/data/chips/STM32L4R5VI.json @@ -1239,6 +1239,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1277,6 +1282,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R5ZG.json b/data/chips/STM32L4R5ZG.json index 4d04c25..1bdc408 100644 --- a/data/chips/STM32L4R5ZG.json +++ b/data/chips/STM32L4R5ZG.json @@ -2359,6 +2359,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2397,6 +2402,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R5ZI.json b/data/chips/STM32L4R5ZI.json index c0657ff..7c96022 100644 --- a/data/chips/STM32L4R5ZI.json +++ b/data/chips/STM32L4R5ZI.json @@ -3235,6 +3235,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3273,6 +3278,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R7AI.json b/data/chips/STM32L4R7AI.json index d899135..23d0222 100644 --- a/data/chips/STM32L4R7AI.json +++ b/data/chips/STM32L4R7AI.json @@ -1663,6 +1663,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1701,6 +1706,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R7VI.json b/data/chips/STM32L4R7VI.json index a84e746..f5df765 100644 --- a/data/chips/STM32L4R7VI.json +++ b/data/chips/STM32L4R7VI.json @@ -1239,6 +1239,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1277,6 +1282,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R7ZI.json b/data/chips/STM32L4R7ZI.json index dd8273d..80bb0b2 100644 --- a/data/chips/STM32L4R7ZI.json +++ b/data/chips/STM32L4R7ZI.json @@ -1503,6 +1503,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1541,6 +1546,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R9AG.json b/data/chips/STM32L4R9AG.json index 117c6f4..ce47249 100644 --- a/data/chips/STM32L4R9AG.json +++ b/data/chips/STM32L4R9AG.json @@ -1665,6 +1665,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1699,6 +1704,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R9AI.json b/data/chips/STM32L4R9AI.json index a6a24ea..486e48d 100644 --- a/data/chips/STM32L4R9AI.json +++ b/data/chips/STM32L4R9AI.json @@ -1665,6 +1665,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1699,6 +1704,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R9VG.json b/data/chips/STM32L4R9VG.json index ca95b90..c4d0486 100644 --- a/data/chips/STM32L4R9VG.json +++ b/data/chips/STM32L4R9VG.json @@ -1241,6 +1241,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1275,6 +1280,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R9VI.json b/data/chips/STM32L4R9VI.json index 5de8d1f..5cdb144 100644 --- a/data/chips/STM32L4R9VI.json +++ b/data/chips/STM32L4R9VI.json @@ -1241,6 +1241,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1275,6 +1280,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R9ZG.json b/data/chips/STM32L4R9ZG.json index 6b0de23..673fe28 100644 --- a/data/chips/STM32L4R9ZG.json +++ b/data/chips/STM32L4R9ZG.json @@ -3249,6 +3249,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3287,6 +3292,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4R9ZI.json b/data/chips/STM32L4R9ZI.json index 50dd60a..29ac0f8 100644 --- a/data/chips/STM32L4R9ZI.json +++ b/data/chips/STM32L4R9ZI.json @@ -4125,6 +4125,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -4163,6 +4168,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S5AI.json b/data/chips/STM32L4S5AI.json index d4e1c20..3c52ec7 100644 --- a/data/chips/STM32L4S5AI.json +++ b/data/chips/STM32L4S5AI.json @@ -1702,6 +1702,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1740,6 +1745,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S5QI.json b/data/chips/STM32L4S5QI.json index b03fa7d..0e86492 100644 --- a/data/chips/STM32L4S5QI.json +++ b/data/chips/STM32L4S5QI.json @@ -1470,6 +1470,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1508,6 +1513,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S5VI.json b/data/chips/STM32L4S5VI.json index d9f65f2..5250e88 100644 --- a/data/chips/STM32L4S5VI.json +++ b/data/chips/STM32L4S5VI.json @@ -1278,6 +1278,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1316,6 +1321,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S5ZI.json b/data/chips/STM32L4S5ZI.json index 888de3e..8351680 100644 --- a/data/chips/STM32L4S5ZI.json +++ b/data/chips/STM32L4S5ZI.json @@ -2398,6 +2398,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -2436,6 +2441,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S7AI.json b/data/chips/STM32L4S7AI.json index 2246d90..d3fd7da 100644 --- a/data/chips/STM32L4S7AI.json +++ b/data/chips/STM32L4S7AI.json @@ -1702,6 +1702,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1740,6 +1745,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S7VI.json b/data/chips/STM32L4S7VI.json index 56df37a..ae03e5e 100644 --- a/data/chips/STM32L4S7VI.json +++ b/data/chips/STM32L4S7VI.json @@ -1278,6 +1278,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1316,6 +1321,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S7ZI.json b/data/chips/STM32L4S7ZI.json index 395f0d1..738875f 100644 --- a/data/chips/STM32L4S7ZI.json +++ b/data/chips/STM32L4S7ZI.json @@ -1542,6 +1542,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1580,6 +1585,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S9AI.json b/data/chips/STM32L4S9AI.json index 6df1114..65f2caf 100644 --- a/data/chips/STM32L4S9AI.json +++ b/data/chips/STM32L4S9AI.json @@ -1704,6 +1704,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1738,6 +1743,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S9VI.json b/data/chips/STM32L4S9VI.json index 646e093..0f18d66 100644 --- a/data/chips/STM32L4S9VI.json +++ b/data/chips/STM32L4S9VI.json @@ -1280,6 +1280,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -1314,6 +1319,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11", diff --git a/data/chips/STM32L4S9ZI.json b/data/chips/STM32L4S9ZI.json index 43be044..d9d188f 100644 --- a/data/chips/STM32L4S9ZI.json +++ b/data/chips/STM32L4S9ZI.json @@ -3288,6 +3288,11 @@ { "name": "COMP1", "address": 1073807872, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB0", @@ -3326,6 +3331,11 @@ { "name": "COMP2", "address": 1073807876, + "registers": { + "kind": "comp", + "version": "v3", + "block": "COMP" + }, "pins": [ { "pin": "PB11",