diff --git a/data/registers/adc_f3.json b/data/registers/adc_f3.json
index 8ff3bb3..7124c43 100644
--- a/data/registers/adc_f3.json
+++ b/data/registers/adc_f3.json
@@ -220,7 +220,7 @@
       },
       {
         "name": "CONT",
-        "description": "Single / continuous conversion mode for regular conversions",
+        "description": "Continuous conversion",
         "bit_offset": 13,
         "bit_size": 1
       },
diff --git a/data/registers/adc_f3_v2.json b/data/registers/adc_f3_v2.json
index 211ed2e..7ba8187 100644
--- a/data/registers/adc_f3_v2.json
+++ b/data/registers/adc_f3_v2.json
@@ -218,7 +218,7 @@
       },
       {
         "name": "CONT",
-        "description": "continuous conversion",
+        "description": "Continuous conversion",
         "bit_offset": 1,
         "bit_size": 1
       },
diff --git a/data/registers/adc_g0.json b/data/registers/adc_g0.json
index 03502f1..5c0f4c9 100644
--- a/data/registers/adc_g0.json
+++ b/data/registers/adc_g0.json
@@ -332,7 +332,7 @@
       },
       {
         "name": "CONT",
-        "description": "ADC group regular continuous conversion mode",
+        "description": "Continuous conversion",
         "bit_offset": 13,
         "bit_size": 1
       },
diff --git a/data/registers/adc_g4.json b/data/registers/adc_g4.json
index 07cab5c..4f9d7e3 100644
--- a/data/registers/adc_g4.json
+++ b/data/registers/adc_g4.json
@@ -237,7 +237,7 @@
       },
       {
         "name": "CONT",
-        "description": "single / continuous conversion mode for regular conversions",
+        "description": "Continuous conversion",
         "bit_offset": 13,
         "bit_size": 1
       },
diff --git a/data/registers/adc_h5.json b/data/registers/adc_h5.json
index 8b42f25..82cb9ea 100644
--- a/data/registers/adc_h5.json
+++ b/data/registers/adc_h5.json
@@ -240,8 +240,7 @@
         "name": "CONT",
         "description": "Single / Continuous conversion mode for regular conversions This bit is set and cleared by software. If it is set, regular conversion takes place continuously until it is cleared. Note: It is not possible to have both Discontinuous mode and Continuous mode enabled: it is forbidden to set both DISCEN = 1 and CONT = 1. The software is allowed to write this bit only when ADSTART = 0 (which ensures that no regular conversion is ongoing).",
         "bit_offset": 13,
-        "bit_size": 1,
-        "enum": "CONT"
+        "bit_size": 1
       },
       {
         "name": "AUTDLY",
@@ -902,21 +901,6 @@
       }
     ]
   },
-  "enum/CONT": {
-    "bit_size": 1,
-    "variants": [
-      {
-        "name": "Single",
-        "description": "Single conversion mode",
-        "value": 0
-      },
-      {
-        "name": "Continuous",
-        "description": "Continuous conversion mode",
-        "value": 1
-      }
-    ]
-  },
   "enum/DMACFG": {
     "bit_size": 1,
     "variants": [
diff --git a/data/registers/adc_l0.json b/data/registers/adc_l0.json
index 8b28082..6ce5ad9 100644
--- a/data/registers/adc_l0.json
+++ b/data/registers/adc_l0.json
@@ -171,7 +171,7 @@
       },
       {
         "name": "CONT",
-        "description": "Single / continuous conversion mode",
+        "description": "Continuous conversion",
         "bit_offset": 13,
         "bit_size": 1
       },
diff --git a/data/registers/adc_u0.json b/data/registers/adc_u0.json
index e22db70..7d421c9 100644
--- a/data/registers/adc_u0.json
+++ b/data/registers/adc_u0.json
@@ -268,7 +268,7 @@
       },
       {
         "name": "CONT",
-        "description": "ADC group regular continuous conversion mode",
+        "description": "Continuous conversion",
         "bit_offset": 13,
         "bit_size": 1
       },
diff --git a/data/registers/adc_v1.json b/data/registers/adc_v1.json
index d593974..cf555d0 100644
--- a/data/registers/adc_v1.json
+++ b/data/registers/adc_v1.json
@@ -147,7 +147,7 @@
       },
       {
         "name": "CONT",
-        "description": "Single / continuous conversion mode",
+        "description": "Continuous conversion",
         "bit_offset": 13,
         "bit_size": 1
       },
diff --git a/data/registers/adc_v2.json b/data/registers/adc_v2.json
index 5994100..76a5fff 100644
--- a/data/registers/adc_v2.json
+++ b/data/registers/adc_v2.json
@@ -202,8 +202,7 @@
         "name": "CONT",
         "description": "Continuous conversion",
         "bit_offset": 1,
-        "bit_size": 1,
-        "enum": "CONT"
+        "bit_size": 1
       },
       {
         "name": "DMA",
@@ -516,21 +515,6 @@
       }
     ]
   },
-  "enum/CONT": {
-    "bit_size": 1,
-    "variants": [
-      {
-        "name": "Single",
-        "description": "Single conversion mode",
-        "value": 0
-      },
-      {
-        "name": "Continuous",
-        "description": "Continuous conversion mode",
-        "value": 1
-      }
-    ]
-  },
   "enum/DDS": {
     "bit_size": 1,
     "variants": [
diff --git a/data/registers/adc_v4.json b/data/registers/adc_v4.json
index c5283d2..dc9968f 100644
--- a/data/registers/adc_v4.json
+++ b/data/registers/adc_v4.json
@@ -271,7 +271,7 @@
       },
       {
         "name": "CONT",
-        "description": "group regular continuous conversion mode",
+        "description": "Continuous conversion",
         "bit_offset": 13,
         "bit_size": 1
       },