diff --git a/data/chips/STM32F101RC.json b/data/chips/STM32F101RC.json index 3161288..4f1cd83 100644 --- a/data/chips/STM32F101RC.json +++ b/data/chips/STM32F101RC.json @@ -1701,6 +1701,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -1742,6 +1747,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101RD.json b/data/chips/STM32F101RD.json index bef5fd4..45db4d0 100644 --- a/data/chips/STM32F101RD.json +++ b/data/chips/STM32F101RD.json @@ -1701,6 +1701,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -1742,6 +1747,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101RE.json b/data/chips/STM32F101RE.json index 1089185..886c1ee 100644 --- a/data/chips/STM32F101RE.json +++ b/data/chips/STM32F101RE.json @@ -1701,6 +1701,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -1742,6 +1747,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101RF.json b/data/chips/STM32F101RF.json index 2d835b9..d7f7d3d 100644 --- a/data/chips/STM32F101RF.json +++ b/data/chips/STM32F101RF.json @@ -2014,6 +2014,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2055,6 +2060,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101RG.json b/data/chips/STM32F101RG.json index 07a35e8..deb69f5 100644 --- a/data/chips/STM32F101RG.json +++ b/data/chips/STM32F101RG.json @@ -1996,6 +1996,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2037,6 +2042,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101VC.json b/data/chips/STM32F101VC.json index 269590f..8624a64 100644 --- a/data/chips/STM32F101VC.json +++ b/data/chips/STM32F101VC.json @@ -1935,6 +1935,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -1976,6 +1981,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101VD.json b/data/chips/STM32F101VD.json index ad23901..ad5da40 100644 --- a/data/chips/STM32F101VD.json +++ b/data/chips/STM32F101VD.json @@ -1935,6 +1935,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -1976,6 +1981,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101VE.json b/data/chips/STM32F101VE.json index 7eeab10..9478d34 100644 --- a/data/chips/STM32F101VE.json +++ b/data/chips/STM32F101VE.json @@ -1929,6 +1929,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -1970,6 +1975,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101VF.json b/data/chips/STM32F101VF.json index d850efb..14366fa 100644 --- a/data/chips/STM32F101VF.json +++ b/data/chips/STM32F101VF.json @@ -2238,6 +2238,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2279,6 +2284,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101VG.json b/data/chips/STM32F101VG.json index 6fb35d6..e593065 100644 --- a/data/chips/STM32F101VG.json +++ b/data/chips/STM32F101VG.json @@ -2238,6 +2238,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2279,6 +2284,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101ZC.json b/data/chips/STM32F101ZC.json index b3b7eda..654a6c9 100644 --- a/data/chips/STM32F101ZC.json +++ b/data/chips/STM32F101ZC.json @@ -2057,6 +2057,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2098,6 +2103,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101ZD.json b/data/chips/STM32F101ZD.json index a5caa7b..ae9ae6c 100644 --- a/data/chips/STM32F101ZD.json +++ b/data/chips/STM32F101ZD.json @@ -2057,6 +2057,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2098,6 +2103,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101ZE.json b/data/chips/STM32F101ZE.json index 79618ad..a6cd0f0 100644 --- a/data/chips/STM32F101ZE.json +++ b/data/chips/STM32F101ZE.json @@ -2057,6 +2057,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2098,6 +2103,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101ZF.json b/data/chips/STM32F101ZF.json index cc8694a..a7fc26d 100644 --- a/data/chips/STM32F101ZF.json +++ b/data/chips/STM32F101ZF.json @@ -2358,6 +2358,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2399,6 +2404,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F101ZG.json b/data/chips/STM32F101ZG.json index 5be1472..56526a3 100644 --- a/data/chips/STM32F101ZG.json +++ b/data/chips/STM32F101ZG.json @@ -2382,6 +2382,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2423,6 +2428,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103RC.json b/data/chips/STM32F103RC.json index f229796..688c15f 100644 --- a/data/chips/STM32F103RC.json +++ b/data/chips/STM32F103RC.json @@ -2245,6 +2245,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2286,6 +2291,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103RD.json b/data/chips/STM32F103RD.json index ff276d9..3cf2f47 100644 --- a/data/chips/STM32F103RD.json +++ b/data/chips/STM32F103RD.json @@ -2245,6 +2245,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2286,6 +2291,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103RE.json b/data/chips/STM32F103RE.json index ce7f1ce..8d15ce8 100644 --- a/data/chips/STM32F103RE.json +++ b/data/chips/STM32F103RE.json @@ -2245,6 +2245,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2286,6 +2291,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103RF.json b/data/chips/STM32F103RF.json index 7905b13..7ff0d70 100644 --- a/data/chips/STM32F103RF.json +++ b/data/chips/STM32F103RF.json @@ -2542,6 +2542,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2583,6 +2588,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103RG.json b/data/chips/STM32F103RG.json index 887ea12..90d224c 100644 --- a/data/chips/STM32F103RG.json +++ b/data/chips/STM32F103RG.json @@ -2542,6 +2542,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2583,6 +2588,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103VC.json b/data/chips/STM32F103VC.json index 204b380..937cb0a 100644 --- a/data/chips/STM32F103VC.json +++ b/data/chips/STM32F103VC.json @@ -2529,6 +2529,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2570,6 +2575,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103VD.json b/data/chips/STM32F103VD.json index d695e6e..b49b3eb 100644 --- a/data/chips/STM32F103VD.json +++ b/data/chips/STM32F103VD.json @@ -2529,6 +2529,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2570,6 +2575,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103VE.json b/data/chips/STM32F103VE.json index 27af2c3..44e98a3 100644 --- a/data/chips/STM32F103VE.json +++ b/data/chips/STM32F103VE.json @@ -2529,6 +2529,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2570,6 +2575,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103VF.json b/data/chips/STM32F103VF.json index f3bac34..7f3ca34 100644 --- a/data/chips/STM32F103VF.json +++ b/data/chips/STM32F103VF.json @@ -2834,6 +2834,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2875,6 +2880,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103VG.json b/data/chips/STM32F103VG.json index a1d1c7c..540a9e8 100644 --- a/data/chips/STM32F103VG.json +++ b/data/chips/STM32F103VG.json @@ -2834,6 +2834,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2875,6 +2880,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103ZC.json b/data/chips/STM32F103ZC.json index e3ce7b4..a98a2cc 100644 --- a/data/chips/STM32F103ZC.json +++ b/data/chips/STM32F103ZC.json @@ -2677,6 +2677,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2718,6 +2723,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103ZD.json b/data/chips/STM32F103ZD.json index c9a740f..8ff92a3 100644 --- a/data/chips/STM32F103ZD.json +++ b/data/chips/STM32F103ZD.json @@ -2677,6 +2677,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2718,6 +2723,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103ZE.json b/data/chips/STM32F103ZE.json index 973873d..8605a01 100644 --- a/data/chips/STM32F103ZE.json +++ b/data/chips/STM32F103ZE.json @@ -2677,6 +2677,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2718,6 +2723,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103ZF.json b/data/chips/STM32F103ZF.json index 6ac9e45..bf6a4ef 100644 --- a/data/chips/STM32F103ZF.json +++ b/data/chips/STM32F103ZF.json @@ -3002,6 +3002,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -3043,6 +3048,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F103ZG.json b/data/chips/STM32F103ZG.json index f465342..f28c692 100644 --- a/data/chips/STM32F103ZG.json +++ b/data/chips/STM32F103ZG.json @@ -3002,6 +3002,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -3043,6 +3048,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F105R8.json b/data/chips/STM32F105R8.json index 6abd45f..33917f6 100644 --- a/data/chips/STM32F105R8.json +++ b/data/chips/STM32F105R8.json @@ -2033,6 +2033,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2074,6 +2079,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F105RB.json b/data/chips/STM32F105RB.json index a7cd8e8..64b11e7 100644 --- a/data/chips/STM32F105RB.json +++ b/data/chips/STM32F105RB.json @@ -2033,6 +2033,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2074,6 +2079,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F105RC.json b/data/chips/STM32F105RC.json index 82d87e2..200b022 100644 --- a/data/chips/STM32F105RC.json +++ b/data/chips/STM32F105RC.json @@ -2033,6 +2033,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2074,6 +2079,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F105V8.json b/data/chips/STM32F105V8.json index ea64686..6a4f3da 100644 --- a/data/chips/STM32F105V8.json +++ b/data/chips/STM32F105V8.json @@ -2093,6 +2093,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2134,6 +2139,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F105VB.json b/data/chips/STM32F105VB.json index c8c4bef..15d2af8 100644 --- a/data/chips/STM32F105VB.json +++ b/data/chips/STM32F105VB.json @@ -2093,6 +2093,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2134,6 +2139,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F105VC.json b/data/chips/STM32F105VC.json index e4382fe..76a8113 100644 --- a/data/chips/STM32F105VC.json +++ b/data/chips/STM32F105VC.json @@ -2089,6 +2089,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2130,6 +2135,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F107RB.json b/data/chips/STM32F107RB.json index ce4c491..40b95f4 100644 --- a/data/chips/STM32F107RB.json +++ b/data/chips/STM32F107RB.json @@ -2091,6 +2091,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2132,6 +2137,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F107RC.json b/data/chips/STM32F107RC.json index b0d36d1..78012b3 100644 --- a/data/chips/STM32F107RC.json +++ b/data/chips/STM32F107RC.json @@ -2091,6 +2091,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2132,6 +2137,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F107VB.json b/data/chips/STM32F107VB.json index eb2043f..e789e48 100644 --- a/data/chips/STM32F107VB.json +++ b/data/chips/STM32F107VB.json @@ -2171,6 +2171,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2212,6 +2217,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { diff --git a/data/chips/STM32F107VC.json b/data/chips/STM32F107VC.json index a23f0b4..1f10b7f 100644 --- a/data/chips/STM32F107VC.json +++ b/data/chips/STM32F107VC.json @@ -2175,6 +2175,11 @@ { "name": "UART4", "address": 1073761280, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": { @@ -2216,6 +2221,11 @@ { "name": "UART5", "address": 1073762304, + "registers": { + "kind": "usart", + "version": "v1", + "block": "USART" + }, "rcc": { "clock": "pclk1", "enable": {