diff --git a/data/registers/cordic_v1.json b/data/registers/cordic_v1.json index 49087d2..4bf497a 100644 --- a/data/registers/cordic_v1.json +++ b/data/registers/cordic_v1.json @@ -39,9 +39,10 @@ }, { "name": "SCALE", - "description": "Scaling factor (2^-n for arguments, 2^n for results).", + "description": "Scaling factor.\nInput value has been multiplied by 2^(-n) before for argument.\nOutput value will need to be multiplied by 2^n later for results.", "bit_offset": 8, - "bit_size": 3 + "bit_size": 3, + "enum": "Scale" }, { "name": "IEN", @@ -247,6 +248,51 @@ } ] }, + "enum/Scale": { + "bit_size": 3, + "variants": [ + { + "name": "A1_R1", + "description": "Argument multiplied by 1, result multiplied by 1", + "value": 0 + }, + { + "name": "A1o2_R2", + "description": "Argument multiplied by 1/2, result multiplied by 2", + "value": 1 + }, + { + "name": "A1o4_R4", + "description": "Argument multiplied by 1/4, result multiplied by 4", + "value": 2 + }, + { + "name": "A1o8_R8", + "description": "Argument multiplied by 1/8, result multiplied by 8", + "value": 3 + }, + { + "name": "A1o16_R16", + "description": "Argument multiplied by 1/16, result multiplied by 16", + "value": 4 + }, + { + "name": "A1o32_R32", + "description": "Argument multiplied by 1/32, result multiplied by 32", + "value": 5 + }, + { + "name": "A1o64_R64", + "description": "Argument multiplied by 1/64, result multiplied by 64", + "value": 6 + }, + { + "name": "A1o128_R128", + "description": "Argument multiplied by 1/128, result multiplied by 128", + "value": 7 + } + ] + }, "enum/Size": { "bit_size": 1, "variants": [ diff --git a/data/registers/timer_l0.json b/data/registers/timer_l0.json index 9147c05..9536366 100644 --- a/data/registers/timer_l0.json +++ b/data/registers/timer_l0.json @@ -7,6 +7,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_1CH" }, { @@ -26,6 +27,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_1CH" }, { @@ -104,6 +106,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_2CH" }, { @@ -175,6 +178,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_CORE" }, { @@ -194,6 +198,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_CORE" }, { @@ -206,7 +211,7 @@ "name": "PSC", "description": "prescaler", "byte_offset": 40, - "fieldset": "PSC_CORE" + "bit_size": 16 }, { "name": "ARR", @@ -224,6 +229,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_GP16" }, { @@ -255,6 +261,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_GP16" }, { @@ -976,17 +983,6 @@ } ] }, - "fieldset/PSC_CORE": { - "description": "prescaler", - "fields": [ - { - "name": "PSC", - "description": "Prescaler value", - "bit_offset": 0, - "bit_size": 16 - } - ] - }, "fieldset/SMCR_2CH": { "description": "slave mode control register", "fields": [ diff --git a/data/registers/timer_v1.json b/data/registers/timer_v1.json index 5d4ecf9..2e5eea4 100644 --- a/data/registers/timer_v1.json +++ b/data/registers/timer_v1.json @@ -7,6 +7,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_1CH" }, { @@ -26,6 +27,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_1CH" }, { @@ -104,6 +106,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_1CH_CMP" }, { @@ -116,6 +119,7 @@ "name": "RCR", "description": "repetition counter register", "byte_offset": 48, + "bit_size": 16, "fieldset": "RCR_1CH_CMP" }, { @@ -177,6 +181,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_2CH" }, { @@ -256,6 +261,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_2CH_CMP" }, { @@ -328,6 +334,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_GP16" }, { @@ -359,6 +366,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_ADV" }, { @@ -391,6 +399,7 @@ "name": "RCR", "description": "repetition counter register", "byte_offset": 48, + "bit_size": 16, "fieldset": "RCR_ADV" }, { @@ -483,6 +492,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_CORE" }, { @@ -502,6 +512,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_CORE" }, { @@ -514,7 +525,7 @@ "name": "PSC", "description": "prescaler", "byte_offset": 40, - "fieldset": "PSC_CORE" + "bit_size": 16 }, { "name": "ARR", @@ -532,6 +543,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_GP16" }, { @@ -563,6 +575,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_GP16" }, { @@ -1962,17 +1975,6 @@ } ] }, - "fieldset/PSC_CORE": { - "description": "prescaler", - "fields": [ - { - "name": "PSC", - "description": "Prescaler value", - "bit_offset": 0, - "bit_size": 16 - } - ] - }, "fieldset/RCR_1CH_CMP": { "description": "repetition counter register", "fields": [ diff --git a/data/registers/timer_v2.json b/data/registers/timer_v2.json index 4061550..9d499bc 100644 --- a/data/registers/timer_v2.json +++ b/data/registers/timer_v2.json @@ -7,6 +7,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_1CH" }, { @@ -26,6 +27,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_1CH" }, { @@ -114,6 +116,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_1CH_CMP" }, { @@ -126,6 +129,7 @@ "name": "RCR", "description": "repetition counter register", "byte_offset": 48, + "bit_size": 16, "fieldset": "RCR_1CH_CMP" }, { @@ -198,6 +202,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_2CH" }, { @@ -287,6 +292,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_2CH_CMP" }, { @@ -347,6 +353,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_GP16" }, { @@ -378,6 +385,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_ADV" }, { @@ -410,6 +418,7 @@ "name": "RCR", "description": "repetition counter register", "byte_offset": 48, + "bit_size": 16, "fieldset": "RCR_ADV" }, { @@ -509,6 +518,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_CORE" }, { @@ -528,6 +538,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_CORE" }, { @@ -540,7 +551,7 @@ "name": "PSC", "description": "prescaler", "byte_offset": 40, - "fieldset": "PSC_CORE" + "bit_size": 16 }, { "name": "ARR", @@ -564,6 +575,7 @@ "name": "CR1", "description": "control register 1", "byte_offset": 0, + "bit_size": 16, "fieldset": "CR1_GP16" }, { @@ -595,6 +607,7 @@ "description": "event generation register", "byte_offset": 20, "access": "Write", + "bit_size": 16, "fieldset": "EGR_GP16" }, { @@ -2342,17 +2355,6 @@ } ] }, - "fieldset/PSC_CORE": { - "description": "prescaler", - "fields": [ - { - "name": "PSC", - "description": "Prescaler value", - "bit_offset": 0, - "bit_size": 16 - } - ] - }, "fieldset/RCR_1CH_CMP": { "description": "repetition counter register", "fields": [