block/WDT:
  description: Watchdog Timer.
  items:
  - name: TASKS_START
    description: Start the watchdog.
    byte_offset: 0
    access: Write
  - name: EVENTS_TIMEOUT
    description: Watchdog timeout.
    byte_offset: 256
  - name: INTENSET
    description: Enable interrupt.
    byte_offset: 772
    fieldset: INTENSET
  - name: INTENCLR
    description: Disable interrupt.
    byte_offset: 776
    fieldset: INTENCLR
  - name: RUNSTATUS
    description: Run status.
    byte_offset: 1024
    access: Read
    fieldset: RUNSTATUS
  - name: REQSTATUS
    description: Request status.
    byte_offset: 1028
    access: Read
    fieldset: REQSTATUS
  - name: CRV
    description: Counter reload value.
    byte_offset: 1284
    fieldset: CRV
  - name: RREN
    description: Enable register for reload request registers.
    byte_offset: 1288
    fieldset: RREN
  - name: CONFIG
    description: Configuration register.
    byte_offset: 1292
    fieldset: CONFIG
  - name: RR
    description: 'Description collection[0]: Reload request 0.'
    array:
      len: 8
      stride: 4
    byte_offset: 1536
    access: Write
    fieldset: RR
fieldset/CONFIG:
  description: Configuration register.
  fields:
  - name: SLEEP
    description: Configure the watchdog to either be paused, or kept running, while the CPU is sleeping.
    bit_offset: 0
    bit_size: 1
    enum: SLEEP
  - name: HALT
    description: Configure the watchdog to either be paused, or kept running, while the CPU is halted by the debugger.
    bit_offset: 3
    bit_size: 1
    enum: HALT
fieldset/CRV:
  description: Counter reload value.
  fields:
  - name: CRV
    description: Counter reload value in number of cycles of the 32.768 kHz clock.
    bit_offset: 0
    bit_size: 32
fieldset/INTENCLR:
  description: Disable interrupt.
  fields:
  - name: TIMEOUT
    description: Write '1' to Disable interrupt for TIMEOUT event.
    bit_offset: 0
    bit_size: 1
    enum: INTENCLR_TIMEOUT
fieldset/INTENSET:
  description: Enable interrupt.
  fields:
  - name: TIMEOUT
    description: Write '1' to Enable interrupt for TIMEOUT event.
    bit_offset: 0
    bit_size: 1
    enum: INTENSET_TIMEOUT
fieldset/REQSTATUS:
  description: Request status.
  fields:
  - name: RR0
    description: Request status for RR[0] register.
    bit_offset: 0
    bit_size: 1
    enum: REQSTATUS_RR0
  - name: RR1
    description: Request status for RR[1] register.
    bit_offset: 1
    bit_size: 1
    enum: REQSTATUS_RR1
  - name: RR2
    description: Request status for RR[2] register.
    bit_offset: 2
    bit_size: 1
    enum: REQSTATUS_RR2
  - name: RR3
    description: Request status for RR[3] register.
    bit_offset: 3
    bit_size: 1
    enum: REQSTATUS_RR3
  - name: RR4
    description: Request status for RR[4] register.
    bit_offset: 4
    bit_size: 1
    enum: REQSTATUS_RR4
  - name: RR5
    description: Request status for RR[5] register.
    bit_offset: 5
    bit_size: 1
    enum: REQSTATUS_RR5
  - name: RR6
    description: Request status for RR[6] register.
    bit_offset: 6
    bit_size: 1
    enum: REQSTATUS_RR6
  - name: RR7
    description: Request status for RR[7] register.
    bit_offset: 7
    bit_size: 1
    enum: REQSTATUS_RR7
fieldset/RR:
  description: 'Description collection[0]: Reload request 0.'
  fields:
  - name: RR
    description: Reload request register.
    bit_offset: 0
    bit_size: 32
    enum: RR
fieldset/RREN:
  description: Enable register for reload request registers.
  fields:
  - name: RR0
    description: Enable or disable RR[0] register.
    bit_offset: 0
    bit_size: 1
    enum: RREN_RR0
  - name: RR1
    description: Enable or disable RR[1] register.
    bit_offset: 1
    bit_size: 1
    enum: RREN_RR1
  - name: RR2
    description: Enable or disable RR[2] register.
    bit_offset: 2
    bit_size: 1
    enum: RREN_RR2
  - name: RR3
    description: Enable or disable RR[3] register.
    bit_offset: 3
    bit_size: 1
    enum: RREN_RR3
  - name: RR4
    description: Enable or disable RR[4] register.
    bit_offset: 4
    bit_size: 1
    enum: RREN_RR4
  - name: RR5
    description: Enable or disable RR[5] register.
    bit_offset: 5
    bit_size: 1
    enum: RREN_RR5
  - name: RR6
    description: Enable or disable RR[6] register.
    bit_offset: 6
    bit_size: 1
    enum: RREN_RR6
  - name: RR7
    description: Enable or disable RR[7] register.
    bit_offset: 7
    bit_size: 1
    enum: RREN_RR7
fieldset/RUNSTATUS:
  description: Run status.
  fields:
  - name: RUNSTATUS
    description: Indicates whether or not the watchdog is running.
    bit_offset: 0
    bit_size: 1
    enum: RUNSTATUS
enum/HALT:
  bit_size: 1
  variants:
  - name: Pause
    description: Pause watchdog while the CPU is halted by the debugger.
    value: 0
  - name: Run
    description: Keep the watchdog running while the CPU is halted by the debugger.
    value: 1
enum/INTENCLR_TIMEOUT:
  bit_size: 1
  variants:
  - name: Disabled
    description: 'Read: Disabled.'
    value: 0
  - name: R_Enabled_W_Clear
    description: 'Read: Enabled.'
    value: 1
enum/INTENSET_TIMEOUT:
  bit_size: 1
  variants:
  - name: Disabled
    description: 'Read: Disabled.'
    value: 0
  - name: R_Enabled_W_Set
    description: 'Read: Enabled.'
    value: 1
enum/REQSTATUS_RR0:
  bit_size: 1
  variants:
  - name: DisabledOrRequested
    description: RR[0] register is not enabled, or are already requesting reload.
    value: 0
  - name: EnabledAndUnrequested
    description: RR[0] register is enabled, and are not yet requesting reload.
    value: 1
enum/REQSTATUS_RR1:
  bit_size: 1
  variants:
  - name: DisabledOrRequested
    description: RR[1] register is not enabled, or are already requesting reload.
    value: 0
  - name: EnabledAndUnrequested
    description: RR[1] register is enabled, and are not yet requesting reload.
    value: 1
enum/REQSTATUS_RR2:
  bit_size: 1
  variants:
  - name: DisabledOrRequested
    description: RR[2] register is not enabled, or are already requesting reload.
    value: 0
  - name: EnabledAndUnrequested
    description: RR[2] register is enabled, and are not yet requesting reload.
    value: 1
enum/REQSTATUS_RR3:
  bit_size: 1
  variants:
  - name: DisabledOrRequested
    description: RR[3] register is not enabled, or are already requesting reload.
    value: 0
  - name: EnabledAndUnrequested
    description: RR[3] register is enabled, and are not yet requesting reload.
    value: 1
enum/REQSTATUS_RR4:
  bit_size: 1
  variants:
  - name: DisabledOrRequested
    description: RR[4] register is not enabled, or are already requesting reload.
    value: 0
  - name: EnabledAndUnrequested
    description: RR[4] register is enabled, and are not yet requesting reload.
    value: 1
enum/REQSTATUS_RR5:
  bit_size: 1
  variants:
  - name: DisabledOrRequested
    description: RR[5] register is not enabled, or are already requesting reload.
    value: 0
  - name: EnabledAndUnrequested
    description: RR[5] register is enabled, and are not yet requesting reload.
    value: 1
enum/REQSTATUS_RR6:
  bit_size: 1
  variants:
  - name: DisabledOrRequested
    description: RR[6] register is not enabled, or are already requesting reload.
    value: 0
  - name: EnabledAndUnrequested
    description: RR[6] register is enabled, and are not yet requesting reload.
    value: 1
enum/REQSTATUS_RR7:
  bit_size: 1
  variants:
  - name: DisabledOrRequested
    description: RR[7] register is not enabled, or are already requesting reload.
    value: 0
  - name: EnabledAndUnrequested
    description: RR[7] register is enabled, and are not yet requesting reload.
    value: 1
enum/RR:
  bit_size: 32
  variants:
  - name: Reload
    description: Value to request a reload of the watchdog timer.
    value: 1850885685
enum/RREN_RR0:
  bit_size: 1
  variants:
  - name: Disabled
    description: Disable RR[0] register.
    value: 0
  - name: Enabled
    description: Enable RR[0] register.
    value: 1
enum/RREN_RR1:
  bit_size: 1
  variants:
  - name: Disabled
    description: Disable RR[1] register.
    value: 0
  - name: Enabled
    description: Enable RR[1] register.
    value: 1
enum/RREN_RR2:
  bit_size: 1
  variants:
  - name: Disabled
    description: Disable RR[2] register.
    value: 0
  - name: Enabled
    description: Enable RR[2] register.
    value: 1
enum/RREN_RR3:
  bit_size: 1
  variants:
  - name: Disabled
    description: Disable RR[3] register.
    value: 0
  - name: Enabled
    description: Enable RR[3] register.
    value: 1
enum/RREN_RR4:
  bit_size: 1
  variants:
  - name: Disabled
    description: Disable RR[4] register.
    value: 0
  - name: Enabled
    description: Enable RR[4] register.
    value: 1
enum/RREN_RR5:
  bit_size: 1
  variants:
  - name: Disabled
    description: Disable RR[5] register.
    value: 0
  - name: Enabled
    description: Enable RR[5] register.
    value: 1
enum/RREN_RR6:
  bit_size: 1
  variants:
  - name: Disabled
    description: Disable RR[6] register.
    value: 0
  - name: Enabled
    description: Enable RR[6] register.
    value: 1
enum/RREN_RR7:
  bit_size: 1
  variants:
  - name: Disabled
    description: Disable RR[7] register.
    value: 0
  - name: Enabled
    description: Enable RR[7] register.
    value: 1
enum/RUNSTATUS:
  bit_size: 1
  variants:
  - name: NotRunning
    description: Watchdog not running.
    value: 0
  - name: Running
    description: Watchdog is running.
    value: 1
enum/SLEEP:
  bit_size: 1
  variants:
  - name: Pause
    description: Pause watchdog while the CPU is sleeping.
    value: 0
  - name: Run
    description: Keep the watchdog running while the CPU is sleeping.
    value: 1