block/RMT:
  description: Remote Control.
  items:
  - name: CHDATA
    description: RMT_CH%sDATA_REG.
    array:
      len: 4
      stride: 4
    byte_offset: 0
    fieldset: CHDATA
  - name: CH_TX_CONF0
    description: RMT_CH%sCONF%s_REG.
    array:
      len: 2
      stride: 4
    byte_offset: 16
    fieldset: CH_TX_CONF0
  - name: CH_RX_CONF0
    description: RMT_CH2CONF0_REG.
    array:
      len: 2
      stride: 8
    byte_offset: 24
    fieldset: CH_RX_CONF0
  - name: CH_RX_CONF1
    description: RMT_CH2CONF1_REG.
    array:
      len: 2
      stride: 8
    byte_offset: 28
    fieldset: CH_RX_CONF1
  - name: CH_TX_STATUS
    description: RMT_CH%sSTATUS_REG.
    array:
      len: 2
      stride: 4
    byte_offset: 40
    fieldset: CH_TX_STATUS
  - name: CH_RX_STATUS
    description: RMT_CH2STATUS_REG.
    array:
      len: 2
      stride: 4
    byte_offset: 48
    fieldset: CH_RX_STATUS
  - name: INT_RAW
    description: RMT_INT_RAW_REG.
    byte_offset: 56
    fieldset: INT_RAW
  - name: INT_ST
    description: RMT_INT_ST_REG.
    byte_offset: 60
    fieldset: INT_ST
  - name: INT_ENA
    description: RMT_INT_ENA_REG.
    byte_offset: 64
    fieldset: INT_ENA
  - name: INT_CLR
    description: RMT_INT_CLR_REG.
    byte_offset: 68
    fieldset: INT_CLR
  - name: CHCARRIER_DUTY
    description: RMT_CH%sCARRIER_DUTY_REG.
    array:
      len: 2
      stride: 4
    byte_offset: 72
    fieldset: CHCARRIER_DUTY
  - name: CH_RX_CARRIER_RM
    description: RMT_CH2_RX_CARRIER_RM_REG.
    array:
      len: 2
      stride: 4
    byte_offset: 80
    fieldset: CH_RX_CARRIER_RM
  - name: CH_TX_LIM
    description: RMT_CH%s_TX_LIM_REG.
    array:
      len: 2
      stride: 4
    byte_offset: 88
    fieldset: CH_TX_LIM
  - name: CH_RX_LIM
    description: RMT_CH2_RX_LIM_REG.
    array:
      len: 2
      stride: 4
    byte_offset: 96
    fieldset: CH_RX_LIM
  - name: SYS_CONF
    description: RMT_SYS_CONF_REG.
    byte_offset: 104
    fieldset: SYS_CONF
  - name: TX_SIM
    description: RMT_TX_SIM_REG.
    byte_offset: 108
    fieldset: TX_SIM
  - name: REF_CNT_RST
    description: RMT_REF_CNT_RST_REG.
    byte_offset: 112
    fieldset: REF_CNT_RST
  - name: DATE
    description: RMT_DATE_REG.
    byte_offset: 204
    fieldset: DATE
fieldset/CHCARRIER_DUTY:
  description: RMT_CH%sCARRIER_DUTY_REG.
  fields:
  - name: CARRIER_LOW
    description: reg_carrier_low_ch0.
    bit_offset: 0
    bit_size: 16
  - name: CARRIER_HIGH
    description: reg_carrier_high_ch0.
    bit_offset: 16
    bit_size: 16
fieldset/CHDATA:
  description: RMT_CH%sDATA_REG.
  fields:
  - name: DATA
    description: Reserved.
    bit_offset: 0
    bit_size: 32
fieldset/CH_RX_CARRIER_RM:
  description: RMT_CH2_RX_CARRIER_RM_REG.
  fields:
  - name: CARRIER_LOW_THRES
    description: reg_carrier_low_thres_ch2.
    bit_offset: 0
    bit_size: 16
  - name: CARRIER_HIGH_THRES
    description: reg_carrier_high_thres_ch2.
    bit_offset: 16
    bit_size: 16
fieldset/CH_RX_CONF0:
  description: RMT_CH2CONF0_REG.
  fields:
  - name: DIV_CNT
    description: reg_div_cnt_ch2.
    bit_offset: 0
    bit_size: 8
  - name: IDLE_THRES
    description: reg_idle_thres_ch2.
    bit_offset: 8
    bit_size: 15
  - name: MEM_SIZE
    description: reg_mem_size_ch2.
    bit_offset: 23
    bit_size: 3
  - name: CARRIER_EN
    description: reg_carrier_en_ch2.
    bit_offset: 28
    bit_size: 1
  - name: CARRIER_OUT_LV
    description: reg_carrier_out_lv_ch2.
    bit_offset: 29
    bit_size: 1
fieldset/CH_RX_CONF1:
  description: RMT_CH2CONF1_REG.
  fields:
  - name: RX_EN
    description: reg_rx_en_ch2.
    bit_offset: 0
    bit_size: 1
  - name: MEM_WR_RST
    description: reg_mem_wr_rst_ch2.
    bit_offset: 1
    bit_size: 1
  - name: APB_MEM_RST
    description: reg_apb_mem_rst_ch2.
    bit_offset: 2
    bit_size: 1
  - name: MEM_OWNER
    description: reg_mem_owner_ch2.
    bit_offset: 3
    bit_size: 1
  - name: RX_FILTER_EN
    description: reg_rx_filter_en_ch2.
    bit_offset: 4
    bit_size: 1
  - name: RX_FILTER_THRES
    description: reg_rx_filter_thres_ch2.
    bit_offset: 5
    bit_size: 8
  - name: MEM_RX_WRAP_EN
    description: reg_mem_rx_wrap_en_ch2.
    bit_offset: 13
    bit_size: 1
  - name: AFIFO_RST
    description: reg_afifo_rst_ch2.
    bit_offset: 14
    bit_size: 1
  - name: CONF_UPDATE
    description: reg_conf_update_ch2.
    bit_offset: 15
    bit_size: 1
fieldset/CH_RX_LIM:
  description: RMT_CH2_RX_LIM_REG.
  fields:
  - name: RX_LIM
    description: reg_rmt_rx_lim_ch2.
    bit_offset: 0
    bit_size: 9
fieldset/CH_RX_STATUS:
  description: RMT_CH2STATUS_REG.
  fields:
  - name: MEM_WADDR_EX
    description: reg_mem_waddr_ex_ch2.
    bit_offset: 0
    bit_size: 9
  - name: APB_MEM_RADDR
    description: reg_apb_mem_raddr_ch2.
    bit_offset: 12
    bit_size: 9
  - name: STATE
    description: reg_state_ch2.
    bit_offset: 22
    bit_size: 3
  - name: MEM_OWNER_ERR
    description: reg_mem_owner_err_ch2.
    bit_offset: 25
    bit_size: 1
  - name: MEM_FULL
    description: reg_mem_full_ch2.
    bit_offset: 26
    bit_size: 1
  - name: APB_MEM_RD_ERR
    description: reg_apb_mem_rd_err_ch2.
    bit_offset: 27
    bit_size: 1
fieldset/CH_TX_CONF0:
  description: RMT_CH%sCONF%s_REG.
  fields:
  - name: TX_START
    description: reg_tx_start_ch0.
    bit_offset: 0
    bit_size: 1
  - name: MEM_RD_RST
    description: reg_mem_rd_rst_ch0.
    bit_offset: 1
    bit_size: 1
  - name: APB_MEM_RST
    description: reg_apb_mem_rst_ch0.
    bit_offset: 2
    bit_size: 1
  - name: TX_CONTI_MODE
    description: reg_tx_conti_mode_ch0.
    bit_offset: 3
    bit_size: 1
  - name: MEM_TX_WRAP_EN
    description: reg_mem_tx_wrap_en_ch0.
    bit_offset: 4
    bit_size: 1
  - name: IDLE_OUT_LV
    description: reg_idle_out_lv_ch0.
    bit_offset: 5
    bit_size: 1
  - name: IDLE_OUT_EN
    description: reg_idle_out_en_ch0.
    bit_offset: 6
    bit_size: 1
  - name: TX_STOP
    description: reg_tx_stop_ch0.
    bit_offset: 7
    bit_size: 1
  - name: DIV_CNT
    description: reg_div_cnt_ch0.
    bit_offset: 8
    bit_size: 8
  - name: MEM_SIZE
    description: reg_mem_size_ch0.
    bit_offset: 16
    bit_size: 3
  - name: CARRIER_EFF_EN
    description: reg_carrier_eff_en_ch0.
    bit_offset: 20
    bit_size: 1
  - name: CARRIER_EN
    description: reg_carrier_en_ch0.
    bit_offset: 21
    bit_size: 1
  - name: CARRIER_OUT_LV
    description: reg_carrier_out_lv_ch0.
    bit_offset: 22
    bit_size: 1
  - name: AFIFO_RST
    description: reg_afifo_rst_ch0.
    bit_offset: 23
    bit_size: 1
  - name: CONF_UPDATE
    description: reg_reg_conf_update_ch0.
    bit_offset: 24
    bit_size: 1
fieldset/CH_TX_LIM:
  description: RMT_CH%s_TX_LIM_REG.
  fields:
  - name: TX_LIM
    description: reg_rmt_tx_lim_ch0.
    bit_offset: 0
    bit_size: 9
  - name: TX_LOOP_NUM
    description: reg_rmt_tx_loop_num_ch0.
    bit_offset: 9
    bit_size: 10
  - name: TX_LOOP_CNT_EN
    description: reg_rmt_tx_loop_cnt_en_ch0.
    bit_offset: 19
    bit_size: 1
  - name: LOOP_COUNT_RESET
    description: reg_loop_count_reset_ch0.
    bit_offset: 20
    bit_size: 1
fieldset/CH_TX_STATUS:
  description: RMT_CH%sSTATUS_REG.
  fields:
  - name: MEM_RADDR_EX
    description: reg_mem_raddr_ex_ch0.
    bit_offset: 0
    bit_size: 9
  - name: STATE
    description: reg_state_ch0.
    bit_offset: 9
    bit_size: 3
  - name: APB_MEM_WADDR
    description: reg_apb_mem_waddr_ch0.
    bit_offset: 12
    bit_size: 9
  - name: APB_MEM_RD_ERR
    description: reg_apb_mem_rd_err_ch0.
    bit_offset: 21
    bit_size: 1
  - name: MEM_EMPTY
    description: reg_mem_empty_ch0.
    bit_offset: 22
    bit_size: 1
  - name: APB_MEM_WR_ERR
    description: reg_apb_mem_wr_err_ch0.
    bit_offset: 23
    bit_size: 1
  - name: APB_MEM_RADDR
    description: reg_apb_mem_raddr_ch0.
    bit_offset: 24
    bit_size: 8
fieldset/DATE:
  description: RMT_DATE_REG.
  fields:
  - name: DATE
    description: reg_rmt_date.
    bit_offset: 0
    bit_size: 28
fieldset/INT_CLR:
  description: RMT_INT_CLR_REG.
  fields:
  - name: CH_TX_END
    description: reg_ch%s_tx_end_int_clr.
    bit_offset: 0
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_END
    description: reg_ch2_rx_end_int_clr.
    bit_offset: 2
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_ERR
    description: reg_ch%s_err_int_clr.
    bit_offset: 4
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_ERR
    description: reg_ch2_err_int_clr.
    bit_offset: 6
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_THR_EVENT
    description: reg_ch%s_tx_thr_event_int_clr.
    bit_offset: 8
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_THR_EVENT
    description: reg_ch2_rx_thr_event_int_clr.
    bit_offset: 10
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_LOOP
    description: reg_ch%s_tx_loop_int_clr.
    bit_offset: 12
    bit_size: 1
    array:
      len: 2
      stride: 1
fieldset/INT_ENA:
  description: RMT_INT_ENA_REG.
  fields:
  - name: CH_TX_END
    description: reg_ch%s_tx_end_int_ena.
    bit_offset: 0
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_END
    description: reg_ch2_rx_end_int_ena.
    bit_offset: 2
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_ERR
    description: reg_ch%s_err_int_ena.
    bit_offset: 4
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_ERR
    description: reg_ch2_err_int_ena.
    bit_offset: 6
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_THR_EVENT
    description: reg_ch%s_tx_thr_event_int_ena.
    bit_offset: 8
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_THR_EVENT
    description: reg_ch2_rx_thr_event_int_ena.
    bit_offset: 10
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_LOOP
    description: reg_ch%s_tx_loop_int_ena.
    bit_offset: 12
    bit_size: 1
    array:
      len: 2
      stride: 1
fieldset/INT_RAW:
  description: RMT_INT_RAW_REG.
  fields:
  - name: CH_TX_END
    description: reg_ch%s_tx_end_int_raw.
    bit_offset: 0
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_END
    description: reg_ch2_rx_end_int_raw.
    bit_offset: 2
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_ERR
    description: reg_ch%s_err_int_raw.
    bit_offset: 4
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_ERR
    description: reg_ch2_err_int_raw.
    bit_offset: 6
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_THR_EVENT
    description: reg_ch%s_tx_thr_event_int_raw.
    bit_offset: 8
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_THR_EVENT
    description: reg_ch2_rx_thr_event_int_raw.
    bit_offset: 10
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_LOOP
    description: reg_ch%s_tx_loop_int_raw.
    bit_offset: 12
    bit_size: 1
    array:
      len: 2
      stride: 1
fieldset/INT_ST:
  description: RMT_INT_ST_REG.
  fields:
  - name: CH_TX_END
    description: reg_ch%s_tx_end_int_st.
    bit_offset: 0
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_END
    description: reg_ch2_rx_end_int_st.
    bit_offset: 2
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_ERR
    description: reg_ch%s_err_int_st.
    bit_offset: 4
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_ERR
    description: reg_ch2_err_int_st.
    bit_offset: 6
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_THR_EVENT
    description: reg_ch%s_tx_thr_event_int_st.
    bit_offset: 8
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_RX_THR_EVENT
    description: reg_ch2_rx_thr_event_int_st.
    bit_offset: 10
    bit_size: 1
    array:
      len: 2
      stride: 1
  - name: CH_TX_LOOP
    description: reg_ch%s_tx_loop_int_st.
    bit_offset: 12
    bit_size: 1
    array:
      len: 2
      stride: 1
fieldset/REF_CNT_RST:
  description: RMT_REF_CNT_RST_REG.
  fields:
  - name: CH0
    description: reg_ref_cnt_rst_ch0.
    bit_offset: 0
    bit_size: 1
  - name: CH1
    description: reg_ref_cnt_rst_ch1.
    bit_offset: 1
    bit_size: 1
  - name: CH2
    description: reg_ref_cnt_rst_ch2.
    bit_offset: 2
    bit_size: 1
  - name: CH3
    description: reg_ref_cnt_rst_ch3.
    bit_offset: 3
    bit_size: 1
fieldset/SYS_CONF:
  description: RMT_SYS_CONF_REG.
  fields:
  - name: APB_FIFO_MASK
    description: reg_apb_fifo_mask.
    bit_offset: 0
    bit_size: 1
  - name: MEM_CLK_FORCE_ON
    description: reg_mem_clk_force_on.
    bit_offset: 1
    bit_size: 1
  - name: MEM_FORCE_PD
    description: reg_rmt_mem_force_pd.
    bit_offset: 2
    bit_size: 1
  - name: MEM_FORCE_PU
    description: reg_rmt_mem_force_pu.
    bit_offset: 3
    bit_size: 1
  - name: SCLK_DIV_NUM
    description: reg_rmt_sclk_div_num.
    bit_offset: 4
    bit_size: 8
  - name: SCLK_DIV_A
    description: reg_rmt_sclk_div_a.
    bit_offset: 12
    bit_size: 6
  - name: SCLK_DIV_B
    description: reg_rmt_sclk_div_b.
    bit_offset: 18
    bit_size: 6
  - name: SCLK_SEL
    description: reg_rmt_sclk_sel.
    bit_offset: 24
    bit_size: 2
  - name: SCLK_ACTIVE
    description: reg_rmt_sclk_active.
    bit_offset: 26
    bit_size: 1
  - name: CLK_EN
    description: reg_clk_en.
    bit_offset: 31
    bit_size: 1
fieldset/TX_SIM:
  description: RMT_TX_SIM_REG.
  fields:
  - name: TX_SIM_CH0
    description: reg_rmt_tx_sim_ch0.
    bit_offset: 0
    bit_size: 1
  - name: TX_SIM_CH1
    description: reg_rmt_tx_sim_ch1.
    bit_offset: 1
    bit_size: 1
  - name: TX_SIM_EN
    description: reg_rmt_tx_sim_en.
    bit_offset: 2
    bit_size: 1