block/SLC: description: SLC Peripheral. items: - name: CONF0 byte_offset: 0 fieldset: CONF0 - name: _0INT_RAW byte_offset: 4 fieldset: _0INT_RAW - name: _0INT_ST byte_offset: 8 fieldset: _0INT_ST - name: _0INT_ENA byte_offset: 12 fieldset: _0INT_ENA - name: _0INT_CLR byte_offset: 16 fieldset: _0INT_CLR - name: _1INT_RAW byte_offset: 20 fieldset: _1INT_RAW - name: _1INT_ST byte_offset: 24 fieldset: _1INT_ST - name: _1INT_ENA byte_offset: 28 fieldset: _1INT_ENA - name: _1INT_CLR byte_offset: 32 fieldset: _1INT_CLR - name: RX_STATUS byte_offset: 36 fieldset: RX_STATUS - name: _0RXFIFO_PUSH byte_offset: 40 fieldset: _0RXFIFO_PUSH - name: _1RXFIFO_PUSH byte_offset: 44 fieldset: _1RXFIFO_PUSH - name: TX_STATUS byte_offset: 48 fieldset: TX_STATUS - name: _0TXFIFO_POP byte_offset: 52 fieldset: _0TXFIFO_POP - name: _1TXFIFO_POP byte_offset: 56 fieldset: _1TXFIFO_POP - name: _0RX_LINK byte_offset: 60 fieldset: _0RX_LINK - name: _0TX_LINK byte_offset: 64 fieldset: _0TX_LINK - name: _1RX_LINK byte_offset: 68 fieldset: _1RX_LINK - name: _1TX_LINK byte_offset: 72 fieldset: _1TX_LINK - name: INTVEC_TOHOST byte_offset: 76 fieldset: INTVEC_TOHOST - name: _0TOKEN0 byte_offset: 80 fieldset: _0TOKEN0 - name: _0TOKEN1 byte_offset: 84 fieldset: _0TOKEN1 - name: _1TOKEN0 byte_offset: 88 fieldset: _1TOKEN0 - name: _1TOKEN1 byte_offset: 92 fieldset: _1TOKEN1 - name: CONF1 byte_offset: 96 fieldset: CONF1 - name: _0_STATE0 byte_offset: 100 fieldset: _0_STATE0 - name: _0_STATE1 byte_offset: 104 fieldset: _0_STATE1 - name: _1_STATE0 byte_offset: 108 fieldset: _1_STATE0 - name: _1_STATE1 byte_offset: 112 fieldset: _1_STATE1 - name: BRIDGE_CONF byte_offset: 116 fieldset: BRIDGE_CONF - name: _0_TO_EOF_DES_ADDR byte_offset: 120 fieldset: _0_TO_EOF_DES_ADDR - name: _0_TX_EOF_DES_ADDR byte_offset: 124 fieldset: _0_TX_EOF_DES_ADDR - name: _0_TO_EOF_BFR_DES_ADDR byte_offset: 128 fieldset: _0_TO_EOF_BFR_DES_ADDR - name: _1_TO_EOF_DES_ADDR byte_offset: 132 fieldset: _1_TO_EOF_DES_ADDR - name: _1_TX_EOF_DES_ADDR byte_offset: 136 fieldset: _1_TX_EOF_DES_ADDR - name: _1_TO_EOF_BFR_DES_ADDR byte_offset: 140 fieldset: _1_TO_EOF_BFR_DES_ADDR - name: AHB_TEST byte_offset: 144 fieldset: AHB_TEST - name: SDIO_ST byte_offset: 148 fieldset: SDIO_ST - name: RX_DSCR_CONF byte_offset: 152 fieldset: RX_DSCR_CONF - name: _0_TXLINK_DSCR byte_offset: 156 fieldset: _0_TXLINK_DSCR - name: _0_TXLINK_DSCR_BF0 byte_offset: 160 fieldset: _0_TXLINK_DSCR_BF0 - name: _0_TXLINK_DSCR_BF1 byte_offset: 164 fieldset: _0_TXLINK_DSCR_BF1 - name: _0_RXLINK_DSCR byte_offset: 168 fieldset: _0_RXLINK_DSCR - name: _0_RXLINK_DSCR_BF0 byte_offset: 172 fieldset: _0_RXLINK_DSCR_BF0 - name: _0_RXLINK_DSCR_BF1 byte_offset: 176 fieldset: _0_RXLINK_DSCR_BF1 - name: _1_TXLINK_DSCR byte_offset: 180 fieldset: _1_TXLINK_DSCR - name: _1_TXLINK_DSCR_BF0 byte_offset: 184 fieldset: _1_TXLINK_DSCR_BF0 - name: _1_TXLINK_DSCR_BF1 byte_offset: 188 fieldset: _1_TXLINK_DSCR_BF1 - name: _1_RXLINK_DSCR byte_offset: 192 fieldset: _1_RXLINK_DSCR - name: _1_RXLINK_DSCR_BF0 byte_offset: 196 fieldset: _1_RXLINK_DSCR_BF0 - name: _1_RXLINK_DSCR_BF1 byte_offset: 200 fieldset: _1_RXLINK_DSCR_BF1 - name: _0_TX_ERREOF_DES_ADDR byte_offset: 204 fieldset: _0_TX_ERREOF_DES_ADDR - name: _1_TX_ERREOF_DES_ADDR byte_offset: 208 fieldset: _1_TX_ERREOF_DES_ADDR - name: TOKEN_LAT byte_offset: 212 fieldset: TOKEN_LAT - name: TX_DSCR_CONF byte_offset: 216 fieldset: TX_DSCR_CONF - name: CMD_INFOR0 byte_offset: 220 fieldset: CMD_INFOR0 - name: CMD_INFOR1 byte_offset: 224 fieldset: CMD_INFOR1 - name: _0_LEN_CONF byte_offset: 228 fieldset: _0_LEN_CONF - name: _0_LENGTH byte_offset: 232 fieldset: _0_LENGTH - name: _0_TXPKT_H_DSCR byte_offset: 236 fieldset: _0_TXPKT_H_DSCR - name: _0_TXPKT_E_DSCR byte_offset: 240 fieldset: _0_TXPKT_E_DSCR - name: _0_RXPKT_H_DSCR byte_offset: 244 fieldset: _0_RXPKT_H_DSCR - name: _0_RXPKT_E_DSCR byte_offset: 248 fieldset: _0_RXPKT_E_DSCR - name: _0_TXPKTU_H_DSCR byte_offset: 252 fieldset: _0_TXPKTU_H_DSCR - name: _0_TXPKTU_E_DSCR byte_offset: 256 fieldset: _0_TXPKTU_E_DSCR - name: _0_RXPKTU_H_DSCR byte_offset: 260 fieldset: _0_RXPKTU_H_DSCR - name: _0_RXPKTU_E_DSCR byte_offset: 264 fieldset: _0_RXPKTU_E_DSCR - name: SEQ_POSITION byte_offset: 276 fieldset: SEQ_POSITION - name: _0_DSCR_REC_CONF byte_offset: 280 fieldset: _0_DSCR_REC_CONF - name: SDIO_CRC_ST0 byte_offset: 284 fieldset: SDIO_CRC_ST0 - name: SDIO_CRC_ST1 byte_offset: 288 fieldset: SDIO_CRC_ST1 - name: _0_EOF_START_DES byte_offset: 292 fieldset: _0_EOF_START_DES - name: _0_PUSH_DSCR_ADDR byte_offset: 296 fieldset: _0_PUSH_DSCR_ADDR - name: _0_DONE_DSCR_ADDR byte_offset: 300 fieldset: _0_DONE_DSCR_ADDR - name: _0_SUB_START_DES byte_offset: 304 fieldset: _0_SUB_START_DES - name: _0_DSCR_CNT byte_offset: 308 fieldset: _0_DSCR_CNT - name: _0_LEN_LIM_CONF byte_offset: 312 fieldset: _0_LEN_LIM_CONF - name: _0INT_ST1 byte_offset: 316 fieldset: _0INT_ST1 - name: _0INT_ENA1 byte_offset: 320 fieldset: _0INT_ENA1 - name: _1INT_ST1 byte_offset: 324 fieldset: _1INT_ST1 - name: _1INT_ENA1 byte_offset: 328 fieldset: _1INT_ENA1 - name: DATE byte_offset: 504 fieldset: DATE - name: ID byte_offset: 508 fieldset: ID fieldset/AHB_TEST: fields: - name: AHB_TESTMODE bit_offset: 0 bit_size: 3 - name: AHB_TESTADDR bit_offset: 4 bit_size: 2 fieldset/BRIDGE_CONF: fields: - name: TXEOF_ENA bit_offset: 0 bit_size: 6 - name: FIFO_MAP_ENA bit_offset: 8 bit_size: 4 - name: SLC0_TX_DUMMY_MODE bit_offset: 12 bit_size: 1 - name: HDA_MAP_128K bit_offset: 13 bit_size: 1 - name: SLC1_TX_DUMMY_MODE bit_offset: 14 bit_size: 1 - name: TX_PUSH_IDLE_NUM bit_offset: 16 bit_size: 16 fieldset/CMD_INFOR0: fields: - name: CMD_CONTENT0 bit_offset: 0 bit_size: 32 fieldset/CMD_INFOR1: fields: - name: CMD_CONTENT1 bit_offset: 0 bit_size: 32 fieldset/CONF0: fields: - name: SLC0_TX_RST bit_offset: 0 bit_size: 1 - name: SLC0_RX_RST bit_offset: 1 bit_size: 1 - name: AHBM_FIFO_RST bit_offset: 2 bit_size: 1 - name: AHBM_RST bit_offset: 3 bit_size: 1 - name: SLC0_TX_LOOP_TEST bit_offset: 4 bit_size: 1 - name: SLC0_RX_LOOP_TEST bit_offset: 5 bit_size: 1 - name: SLC0_RX_AUTO_WRBACK bit_offset: 6 bit_size: 1 - name: SLC0_RX_NO_RESTART_CLR bit_offset: 7 bit_size: 1 - name: SLC0_RXDSCR_BURST_EN bit_offset: 8 bit_size: 1 - name: SLC0_RXDATA_BURST_EN bit_offset: 9 bit_size: 1 - name: SLC0_RXLINK_AUTO_RET bit_offset: 10 bit_size: 1 - name: SLC0_TXLINK_AUTO_RET bit_offset: 11 bit_size: 1 - name: SLC0_TXDSCR_BURST_EN bit_offset: 12 bit_size: 1 - name: SLC0_TXDATA_BURST_EN bit_offset: 13 bit_size: 1 - name: SLC0_TOKEN_AUTO_CLR bit_offset: 14 bit_size: 1 - name: SLC0_TOKEN_SEL bit_offset: 15 bit_size: 1 - name: SLC1_TX_RST bit_offset: 16 bit_size: 1 - name: SLC1_RX_RST bit_offset: 17 bit_size: 1 - name: SLC0_WR_RETRY_MASK_EN bit_offset: 18 bit_size: 1 - name: SLC1_WR_RETRY_MASK_EN bit_offset: 19 bit_size: 1 - name: SLC1_TX_LOOP_TEST bit_offset: 20 bit_size: 1 - name: SLC1_RX_LOOP_TEST bit_offset: 21 bit_size: 1 - name: SLC1_RX_AUTO_WRBACK bit_offset: 22 bit_size: 1 - name: SLC1_RX_NO_RESTART_CLR bit_offset: 23 bit_size: 1 - name: SLC1_RXDSCR_BURST_EN bit_offset: 24 bit_size: 1 - name: SLC1_RXDATA_BURST_EN bit_offset: 25 bit_size: 1 - name: SLC1_RXLINK_AUTO_RET bit_offset: 26 bit_size: 1 - name: SLC1_TXLINK_AUTO_RET bit_offset: 27 bit_size: 1 - name: SLC1_TXDSCR_BURST_EN bit_offset: 28 bit_size: 1 - name: SLC1_TXDATA_BURST_EN bit_offset: 29 bit_size: 1 - name: SLC1_TOKEN_AUTO_CLR bit_offset: 30 bit_size: 1 - name: SLC1_TOKEN_SEL bit_offset: 31 bit_size: 1 fieldset/CONF1: fields: - name: SLC0_CHECK_OWNER bit_offset: 0 bit_size: 1 - name: SLC0_TX_CHECK_SUM_EN bit_offset: 1 bit_size: 1 - name: SLC0_RX_CHECK_SUM_EN bit_offset: 2 bit_size: 1 - name: CMD_HOLD_EN bit_offset: 3 bit_size: 1 - name: SLC0_LEN_AUTO_CLR bit_offset: 4 bit_size: 1 - name: SLC0_TX_STITCH_EN bit_offset: 5 bit_size: 1 - name: SLC0_RX_STITCH_EN bit_offset: 6 bit_size: 1 - name: SLC1_CHECK_OWNER bit_offset: 16 bit_size: 1 - name: SLC1_TX_CHECK_SUM_EN bit_offset: 17 bit_size: 1 - name: SLC1_RX_CHECK_SUM_EN bit_offset: 18 bit_size: 1 - name: HOST_INT_LEVEL_SEL bit_offset: 19 bit_size: 1 - name: SLC1_TX_STITCH_EN bit_offset: 20 bit_size: 1 - name: SLC1_RX_STITCH_EN bit_offset: 21 bit_size: 1 - name: CLK_EN bit_offset: 22 bit_size: 1 fieldset/DATE: fields: - name: DATE bit_offset: 0 bit_size: 32 fieldset/ID: fields: - name: ID bit_offset: 0 bit_size: 32 fieldset/INTVEC_TOHOST: fields: - name: SLC0_TOHOST_INTVEC bit_offset: 0 bit_size: 8 - name: SLC1_TOHOST_INTVEC bit_offset: 16 bit_size: 8 fieldset/RX_DSCR_CONF: fields: - name: SLC0_TOKEN_NO_REPLACE bit_offset: 0 bit_size: 1 - name: SLC0_INFOR_NO_REPLACE bit_offset: 1 bit_size: 1 - name: SLC0_RX_FILL_MODE bit_offset: 2 bit_size: 1 - name: SLC0_RX_EOF_MODE bit_offset: 3 bit_size: 1 - name: SLC0_RX_FILL_EN bit_offset: 4 bit_size: 1 - name: SLC0_RD_RETRY_THRESHOLD bit_offset: 5 bit_size: 11 - name: SLC1_TOKEN_NO_REPLACE bit_offset: 16 bit_size: 1 - name: SLC1_INFOR_NO_REPLACE bit_offset: 17 bit_size: 1 - name: SLC1_RX_FILL_MODE bit_offset: 18 bit_size: 1 - name: SLC1_RX_EOF_MODE bit_offset: 19 bit_size: 1 - name: SLC1_RX_FILL_EN bit_offset: 20 bit_size: 1 - name: SLC1_RD_RETRY_THRESHOLD bit_offset: 21 bit_size: 11 fieldset/RX_STATUS: fields: - name: SLC0_RX_FULL bit_offset: 0 bit_size: 1 - name: SLC0_RX_EMPTY bit_offset: 1 bit_size: 1 - name: SLC1_RX_FULL bit_offset: 16 bit_size: 1 - name: SLC1_RX_EMPTY bit_offset: 17 bit_size: 1 fieldset/SDIO_CRC_ST0: fields: - name: DAT0_CRC_ERR_CNT bit_offset: 0 bit_size: 8 - name: DAT1_CRC_ERR_CNT bit_offset: 8 bit_size: 8 - name: DAT2_CRC_ERR_CNT bit_offset: 16 bit_size: 8 - name: DAT3_CRC_ERR_CNT bit_offset: 24 bit_size: 8 fieldset/SDIO_CRC_ST1: fields: - name: CMD_CRC_ERR_CNT bit_offset: 0 bit_size: 8 - name: ERR_CNT_CLR bit_offset: 31 bit_size: 1 fieldset/SDIO_ST: fields: - name: CMD_ST bit_offset: 0 bit_size: 3 - name: FUNC_ST bit_offset: 4 bit_size: 4 - name: SDIO_WAKEUP bit_offset: 8 bit_size: 1 - name: BUS_ST bit_offset: 12 bit_size: 3 - name: FUNC1_ACC_STATE bit_offset: 16 bit_size: 5 - name: FUNC2_ACC_STATE bit_offset: 24 bit_size: 5 fieldset/SEQ_POSITION: fields: - name: SLC0_SEQ_POSITION bit_offset: 0 bit_size: 8 - name: SLC1_SEQ_POSITION bit_offset: 8 bit_size: 8 fieldset/TOKEN_LAT: fields: - name: SLC0_TOKEN bit_offset: 0 bit_size: 12 - name: SLC1_TOKEN bit_offset: 16 bit_size: 12 fieldset/TX_DSCR_CONF: fields: - name: WR_RETRY_THRESHOLD bit_offset: 0 bit_size: 11 fieldset/TX_STATUS: fields: - name: SLC0_TX_FULL bit_offset: 0 bit_size: 1 - name: SLC0_TX_EMPTY bit_offset: 1 bit_size: 1 - name: SLC1_TX_FULL bit_offset: 16 bit_size: 1 - name: SLC1_TX_EMPTY bit_offset: 17 bit_size: 1 fieldset/_0INT_CLR: fields: - name: FRHOST_BIT0_INT_CLR bit_offset: 0 bit_size: 1 - name: FRHOST_BIT1_INT_CLR bit_offset: 1 bit_size: 1 - name: FRHOST_BIT2_INT_CLR bit_offset: 2 bit_size: 1 - name: FRHOST_BIT3_INT_CLR bit_offset: 3 bit_size: 1 - name: FRHOST_BIT4_INT_CLR bit_offset: 4 bit_size: 1 - name: FRHOST_BIT5_INT_CLR bit_offset: 5 bit_size: 1 - name: FRHOST_BIT6_INT_CLR bit_offset: 6 bit_size: 1 - name: FRHOST_BIT7_INT_CLR bit_offset: 7 bit_size: 1 - name: SLC0_RX_START_INT_CLR bit_offset: 8 bit_size: 1 - name: SLC0_TX_START_INT_CLR bit_offset: 9 bit_size: 1 - name: SLC0_RX_UDF_INT_CLR bit_offset: 10 bit_size: 1 - name: SLC0_TX_OVF_INT_CLR bit_offset: 11 bit_size: 1 - name: SLC0_TOKEN0_1TO0_INT_CLR bit_offset: 12 bit_size: 1 - name: SLC0_TOKEN1_1TO0_INT_CLR bit_offset: 13 bit_size: 1 - name: SLC0_TX_DONE_INT_CLR bit_offset: 14 bit_size: 1 - name: SLC0_TX_SUC_EOF_INT_CLR bit_offset: 15 bit_size: 1 - name: SLC0_RX_DONE_INT_CLR bit_offset: 16 bit_size: 1 - name: SLC0_RX_EOF_INT_CLR bit_offset: 17 bit_size: 1 - name: SLC0_TOHOST_INT_CLR bit_offset: 18 bit_size: 1 - name: SLC0_TX_DSCR_ERR_INT_CLR bit_offset: 19 bit_size: 1 - name: SLC0_RX_DSCR_ERR_INT_CLR bit_offset: 20 bit_size: 1 - name: SLC0_TX_DSCR_EMPTY_INT_CLR bit_offset: 21 bit_size: 1 - name: SLC0_HOST_RD_ACK_INT_CLR bit_offset: 22 bit_size: 1 - name: SLC0_WR_RETRY_DONE_INT_CLR bit_offset: 23 bit_size: 1 - name: SLC0_TX_ERR_EOF_INT_CLR bit_offset: 24 bit_size: 1 - name: CMD_DTC_INT_CLR bit_offset: 25 bit_size: 1 - name: SLC0_RX_QUICK_EOF_INT_CLR bit_offset: 26 bit_size: 1 fieldset/_0INT_ENA: fields: - name: FRHOST_BIT0_INT_ENA bit_offset: 0 bit_size: 1 - name: FRHOST_BIT1_INT_ENA bit_offset: 1 bit_size: 1 - name: FRHOST_BIT2_INT_ENA bit_offset: 2 bit_size: 1 - name: FRHOST_BIT3_INT_ENA bit_offset: 3 bit_size: 1 - name: FRHOST_BIT4_INT_ENA bit_offset: 4 bit_size: 1 - name: FRHOST_BIT5_INT_ENA bit_offset: 5 bit_size: 1 - name: FRHOST_BIT6_INT_ENA bit_offset: 6 bit_size: 1 - name: FRHOST_BIT7_INT_ENA bit_offset: 7 bit_size: 1 - name: SLC0_RX_START_INT_ENA bit_offset: 8 bit_size: 1 - name: SLC0_TX_START_INT_ENA bit_offset: 9 bit_size: 1 - name: SLC0_RX_UDF_INT_ENA bit_offset: 10 bit_size: 1 - name: SLC0_TX_OVF_INT_ENA bit_offset: 11 bit_size: 1 - name: SLC0_TOKEN0_1TO0_INT_ENA bit_offset: 12 bit_size: 1 - name: SLC0_TOKEN1_1TO0_INT_ENA bit_offset: 13 bit_size: 1 - name: SLC0_TX_DONE_INT_ENA bit_offset: 14 bit_size: 1 - name: SLC0_TX_SUC_EOF_INT_ENA bit_offset: 15 bit_size: 1 - name: SLC0_RX_DONE_INT_ENA bit_offset: 16 bit_size: 1 - name: SLC0_RX_EOF_INT_ENA bit_offset: 17 bit_size: 1 - name: SLC0_TOHOST_INT_ENA bit_offset: 18 bit_size: 1 - name: SLC0_TX_DSCR_ERR_INT_ENA bit_offset: 19 bit_size: 1 - name: SLC0_RX_DSCR_ERR_INT_ENA bit_offset: 20 bit_size: 1 - name: SLC0_TX_DSCR_EMPTY_INT_ENA bit_offset: 21 bit_size: 1 - name: SLC0_HOST_RD_ACK_INT_ENA bit_offset: 22 bit_size: 1 - name: SLC0_WR_RETRY_DONE_INT_ENA bit_offset: 23 bit_size: 1 - name: SLC0_TX_ERR_EOF_INT_ENA bit_offset: 24 bit_size: 1 - name: CMD_DTC_INT_ENA bit_offset: 25 bit_size: 1 - name: SLC0_RX_QUICK_EOF_INT_ENA bit_offset: 26 bit_size: 1 fieldset/_0INT_ENA1: fields: - name: FRHOST_BIT0_INT_ENA1 bit_offset: 0 bit_size: 1 - name: FRHOST_BIT1_INT_ENA1 bit_offset: 1 bit_size: 1 - name: FRHOST_BIT2_INT_ENA1 bit_offset: 2 bit_size: 1 - name: FRHOST_BIT3_INT_ENA1 bit_offset: 3 bit_size: 1 - name: FRHOST_BIT4_INT_ENA1 bit_offset: 4 bit_size: 1 - name: FRHOST_BIT5_INT_ENA1 bit_offset: 5 bit_size: 1 - name: FRHOST_BIT6_INT_ENA1 bit_offset: 6 bit_size: 1 - name: FRHOST_BIT7_INT_ENA1 bit_offset: 7 bit_size: 1 - name: SLC0_RX_START_INT_ENA1 bit_offset: 8 bit_size: 1 - name: SLC0_TX_START_INT_ENA1 bit_offset: 9 bit_size: 1 - name: SLC0_RX_UDF_INT_ENA1 bit_offset: 10 bit_size: 1 - name: SLC0_TX_OVF_INT_ENA1 bit_offset: 11 bit_size: 1 - name: SLC0_TOKEN0_1TO0_INT_ENA1 bit_offset: 12 bit_size: 1 - name: SLC0_TOKEN1_1TO0_INT_ENA1 bit_offset: 13 bit_size: 1 - name: SLC0_TX_DONE_INT_ENA1 bit_offset: 14 bit_size: 1 - name: SLC0_TX_SUC_EOF_INT_ENA1 bit_offset: 15 bit_size: 1 - name: SLC0_RX_DONE_INT_ENA1 bit_offset: 16 bit_size: 1 - name: SLC0_RX_EOF_INT_ENA1 bit_offset: 17 bit_size: 1 - name: SLC0_TOHOST_INT_ENA1 bit_offset: 18 bit_size: 1 - name: SLC0_TX_DSCR_ERR_INT_ENA1 bit_offset: 19 bit_size: 1 - name: SLC0_RX_DSCR_ERR_INT_ENA1 bit_offset: 20 bit_size: 1 - name: SLC0_TX_DSCR_EMPTY_INT_ENA1 bit_offset: 21 bit_size: 1 - name: SLC0_HOST_RD_ACK_INT_ENA1 bit_offset: 22 bit_size: 1 - name: SLC0_WR_RETRY_DONE_INT_ENA1 bit_offset: 23 bit_size: 1 - name: SLC0_TX_ERR_EOF_INT_ENA1 bit_offset: 24 bit_size: 1 - name: CMD_DTC_INT_ENA1 bit_offset: 25 bit_size: 1 - name: SLC0_RX_QUICK_EOF_INT_ENA1 bit_offset: 26 bit_size: 1 fieldset/_0INT_RAW: fields: - name: FRHOST_BIT0_INT_RAW bit_offset: 0 bit_size: 1 - name: FRHOST_BIT1_INT_RAW bit_offset: 1 bit_size: 1 - name: FRHOST_BIT2_INT_RAW bit_offset: 2 bit_size: 1 - name: FRHOST_BIT3_INT_RAW bit_offset: 3 bit_size: 1 - name: FRHOST_BIT4_INT_RAW bit_offset: 4 bit_size: 1 - name: FRHOST_BIT5_INT_RAW bit_offset: 5 bit_size: 1 - name: FRHOST_BIT6_INT_RAW bit_offset: 6 bit_size: 1 - name: FRHOST_BIT7_INT_RAW bit_offset: 7 bit_size: 1 - name: SLC0_RX_START_INT_RAW bit_offset: 8 bit_size: 1 - name: SLC0_TX_START_INT_RAW bit_offset: 9 bit_size: 1 - name: SLC0_RX_UDF_INT_RAW bit_offset: 10 bit_size: 1 - name: SLC0_TX_OVF_INT_RAW bit_offset: 11 bit_size: 1 - name: SLC0_TOKEN0_1TO0_INT_RAW bit_offset: 12 bit_size: 1 - name: SLC0_TOKEN1_1TO0_INT_RAW bit_offset: 13 bit_size: 1 - name: SLC0_TX_DONE_INT_RAW bit_offset: 14 bit_size: 1 - name: SLC0_TX_SUC_EOF_INT_RAW bit_offset: 15 bit_size: 1 - name: SLC0_RX_DONE_INT_RAW bit_offset: 16 bit_size: 1 - name: SLC0_RX_EOF_INT_RAW bit_offset: 17 bit_size: 1 - name: SLC0_TOHOST_INT_RAW bit_offset: 18 bit_size: 1 - name: SLC0_TX_DSCR_ERR_INT_RAW bit_offset: 19 bit_size: 1 - name: SLC0_RX_DSCR_ERR_INT_RAW bit_offset: 20 bit_size: 1 - name: SLC0_TX_DSCR_EMPTY_INT_RAW bit_offset: 21 bit_size: 1 - name: SLC0_HOST_RD_ACK_INT_RAW bit_offset: 22 bit_size: 1 - name: SLC0_WR_RETRY_DONE_INT_RAW bit_offset: 23 bit_size: 1 - name: SLC0_TX_ERR_EOF_INT_RAW bit_offset: 24 bit_size: 1 - name: CMD_DTC_INT_RAW bit_offset: 25 bit_size: 1 - name: SLC0_RX_QUICK_EOF_INT_RAW bit_offset: 26 bit_size: 1 fieldset/_0INT_ST: fields: - name: FRHOST_BIT0_INT_ST bit_offset: 0 bit_size: 1 - name: FRHOST_BIT1_INT_ST bit_offset: 1 bit_size: 1 - name: FRHOST_BIT2_INT_ST bit_offset: 2 bit_size: 1 - name: FRHOST_BIT3_INT_ST bit_offset: 3 bit_size: 1 - name: FRHOST_BIT4_INT_ST bit_offset: 4 bit_size: 1 - name: FRHOST_BIT5_INT_ST bit_offset: 5 bit_size: 1 - name: FRHOST_BIT6_INT_ST bit_offset: 6 bit_size: 1 - name: FRHOST_BIT7_INT_ST bit_offset: 7 bit_size: 1 - name: SLC0_RX_START_INT_ST bit_offset: 8 bit_size: 1 - name: SLC0_TX_START_INT_ST bit_offset: 9 bit_size: 1 - name: SLC0_RX_UDF_INT_ST bit_offset: 10 bit_size: 1 - name: SLC0_TX_OVF_INT_ST bit_offset: 11 bit_size: 1 - name: SLC0_TOKEN0_1TO0_INT_ST bit_offset: 12 bit_size: 1 - name: SLC0_TOKEN1_1TO0_INT_ST bit_offset: 13 bit_size: 1 - name: SLC0_TX_DONE_INT_ST bit_offset: 14 bit_size: 1 - name: SLC0_TX_SUC_EOF_INT_ST bit_offset: 15 bit_size: 1 - name: SLC0_RX_DONE_INT_ST bit_offset: 16 bit_size: 1 - name: SLC0_RX_EOF_INT_ST bit_offset: 17 bit_size: 1 - name: SLC0_TOHOST_INT_ST bit_offset: 18 bit_size: 1 - name: SLC0_TX_DSCR_ERR_INT_ST bit_offset: 19 bit_size: 1 - name: SLC0_RX_DSCR_ERR_INT_ST bit_offset: 20 bit_size: 1 - name: SLC0_TX_DSCR_EMPTY_INT_ST bit_offset: 21 bit_size: 1 - name: SLC0_HOST_RD_ACK_INT_ST bit_offset: 22 bit_size: 1 - name: SLC0_WR_RETRY_DONE_INT_ST bit_offset: 23 bit_size: 1 - name: SLC0_TX_ERR_EOF_INT_ST bit_offset: 24 bit_size: 1 - name: CMD_DTC_INT_ST bit_offset: 25 bit_size: 1 - name: SLC0_RX_QUICK_EOF_INT_ST bit_offset: 26 bit_size: 1 fieldset/_0INT_ST1: fields: - name: FRHOST_BIT0_INT_ST1 bit_offset: 0 bit_size: 1 - name: FRHOST_BIT1_INT_ST1 bit_offset: 1 bit_size: 1 - name: FRHOST_BIT2_INT_ST1 bit_offset: 2 bit_size: 1 - name: FRHOST_BIT3_INT_ST1 bit_offset: 3 bit_size: 1 - name: FRHOST_BIT4_INT_ST1 bit_offset: 4 bit_size: 1 - name: FRHOST_BIT5_INT_ST1 bit_offset: 5 bit_size: 1 - name: FRHOST_BIT6_INT_ST1 bit_offset: 6 bit_size: 1 - name: FRHOST_BIT7_INT_ST1 bit_offset: 7 bit_size: 1 - name: SLC0_RX_START_INT_ST1 bit_offset: 8 bit_size: 1 - name: SLC0_TX_START_INT_ST1 bit_offset: 9 bit_size: 1 - name: SLC0_RX_UDF_INT_ST1 bit_offset: 10 bit_size: 1 - name: SLC0_TX_OVF_INT_ST1 bit_offset: 11 bit_size: 1 - name: SLC0_TOKEN0_1TO0_INT_ST1 bit_offset: 12 bit_size: 1 - name: SLC0_TOKEN1_1TO0_INT_ST1 bit_offset: 13 bit_size: 1 - name: SLC0_TX_DONE_INT_ST1 bit_offset: 14 bit_size: 1 - name: SLC0_TX_SUC_EOF_INT_ST1 bit_offset: 15 bit_size: 1 - name: SLC0_RX_DONE_INT_ST1 bit_offset: 16 bit_size: 1 - name: SLC0_RX_EOF_INT_ST1 bit_offset: 17 bit_size: 1 - name: SLC0_TOHOST_INT_ST1 bit_offset: 18 bit_size: 1 - name: SLC0_TX_DSCR_ERR_INT_ST1 bit_offset: 19 bit_size: 1 - name: SLC0_RX_DSCR_ERR_INT_ST1 bit_offset: 20 bit_size: 1 - name: SLC0_TX_DSCR_EMPTY_INT_ST1 bit_offset: 21 bit_size: 1 - name: SLC0_HOST_RD_ACK_INT_ST1 bit_offset: 22 bit_size: 1 - name: SLC0_WR_RETRY_DONE_INT_ST1 bit_offset: 23 bit_size: 1 - name: SLC0_TX_ERR_EOF_INT_ST1 bit_offset: 24 bit_size: 1 - name: CMD_DTC_INT_ST1 bit_offset: 25 bit_size: 1 - name: SLC0_RX_QUICK_EOF_INT_ST1 bit_offset: 26 bit_size: 1 fieldset/_0RXFIFO_PUSH: fields: - name: SLC0_RXFIFO_WDATA bit_offset: 0 bit_size: 9 - name: SLC0_RXFIFO_PUSH bit_offset: 16 bit_size: 1 fieldset/_0RX_LINK: fields: - name: SLC0_RXLINK_ADDR bit_offset: 0 bit_size: 20 - name: SLC0_RXLINK_STOP bit_offset: 28 bit_size: 1 - name: SLC0_RXLINK_START bit_offset: 29 bit_size: 1 - name: SLC0_RXLINK_RESTART bit_offset: 30 bit_size: 1 - name: SLC0_RXLINK_PARK bit_offset: 31 bit_size: 1 fieldset/_0TOKEN0: fields: - name: SLC0_TOKEN0_WDATA bit_offset: 0 bit_size: 12 - name: SLC0_TOKEN0_WR bit_offset: 12 bit_size: 1 - name: SLC0_TOKEN0_INC bit_offset: 13 bit_size: 1 - name: SLC0_TOKEN0_INC_MORE bit_offset: 14 bit_size: 1 - name: SLC0_TOKEN0 bit_offset: 16 bit_size: 12 fieldset/_0TOKEN1: fields: - name: SLC0_TOKEN1_WDATA bit_offset: 0 bit_size: 12 - name: SLC0_TOKEN1_WR bit_offset: 12 bit_size: 1 - name: SLC0_TOKEN1_INC bit_offset: 13 bit_size: 1 - name: SLC0_TOKEN1_INC_MORE bit_offset: 14 bit_size: 1 - name: SLC0_TOKEN1 bit_offset: 16 bit_size: 12 fieldset/_0TXFIFO_POP: fields: - name: SLC0_TXFIFO_RDATA bit_offset: 0 bit_size: 11 - name: SLC0_TXFIFO_POP bit_offset: 16 bit_size: 1 fieldset/_0TX_LINK: fields: - name: SLC0_TXLINK_ADDR bit_offset: 0 bit_size: 20 - name: SLC0_TXLINK_STOP bit_offset: 28 bit_size: 1 - name: SLC0_TXLINK_START bit_offset: 29 bit_size: 1 - name: SLC0_TXLINK_RESTART bit_offset: 30 bit_size: 1 - name: SLC0_TXLINK_PARK bit_offset: 31 bit_size: 1 fieldset/_0_DONE_DSCR_ADDR: fields: - name: SLC0_RX_DONE_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_DSCR_CNT: fields: - name: SLC0_RX_DSCR_CNT_LAT bit_offset: 0 bit_size: 10 - name: SLC0_RX_GET_EOF_OCC bit_offset: 16 bit_size: 1 fieldset/_0_DSCR_REC_CONF: fields: - name: SLC0_RX_DSCR_REC_LIM bit_offset: 0 bit_size: 10 fieldset/_0_EOF_START_DES: fields: - name: SLC0_EOF_START_DES_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_LENGTH: fields: - name: SLC0_LEN bit_offset: 0 bit_size: 20 fieldset/_0_LEN_CONF: fields: - name: SLC0_LEN_WDATA bit_offset: 0 bit_size: 20 - name: SLC0_LEN_WR bit_offset: 20 bit_size: 1 - name: SLC0_LEN_INC bit_offset: 21 bit_size: 1 - name: SLC0_LEN_INC_MORE bit_offset: 22 bit_size: 1 - name: SLC0_RX_PACKET_LOAD_EN bit_offset: 23 bit_size: 1 - name: SLC0_TX_PACKET_LOAD_EN bit_offset: 24 bit_size: 1 - name: SLC0_RX_GET_USED_DSCR bit_offset: 25 bit_size: 1 - name: SLC0_TX_GET_USED_DSCR bit_offset: 26 bit_size: 1 - name: SLC0_RX_NEW_PKT_IND bit_offset: 27 bit_size: 1 - name: SLC0_TX_NEW_PKT_IND bit_offset: 28 bit_size: 1 fieldset/_0_LEN_LIM_CONF: fields: - name: SLC0_LEN_LIM bit_offset: 0 bit_size: 20 fieldset/_0_PUSH_DSCR_ADDR: fields: - name: SLC0_RX_PUSH_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_RXLINK_DSCR: fields: - name: SLC0_RXLINK_DSCR bit_offset: 0 bit_size: 32 fieldset/_0_RXLINK_DSCR_BF0: fields: - name: SLC0_RXLINK_DSCR_BF0 bit_offset: 0 bit_size: 32 fieldset/_0_RXLINK_DSCR_BF1: fields: - name: SLC0_RXLINK_DSCR_BF1 bit_offset: 0 bit_size: 32 fieldset/_0_RXPKTU_E_DSCR: fields: - name: SLC0_RX_PKT_END_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_RXPKTU_H_DSCR: fields: - name: SLC0_RX_PKT_START_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_RXPKT_E_DSCR: fields: - name: SLC0_RX_PKT_E_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_RXPKT_H_DSCR: fields: - name: SLC0_RX_PKT_H_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_STATE0: fields: - name: SLC0_STATE0 bit_offset: 0 bit_size: 32 fieldset/_0_STATE1: fields: - name: SLC0_STATE1 bit_offset: 0 bit_size: 32 fieldset/_0_SUB_START_DES: fields: - name: SLC0_SUB_PAC_START_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_TO_EOF_BFR_DES_ADDR: fields: - name: SLC0_TO_EOF_BFR_DES_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_TO_EOF_DES_ADDR: fields: - name: SLC0_TO_EOF_DES_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_TXLINK_DSCR: fields: - name: SLC0_TXLINK_DSCR bit_offset: 0 bit_size: 32 fieldset/_0_TXLINK_DSCR_BF0: fields: - name: SLC0_TXLINK_DSCR_BF0 bit_offset: 0 bit_size: 32 fieldset/_0_TXLINK_DSCR_BF1: fields: - name: SLC0_TXLINK_DSCR_BF1 bit_offset: 0 bit_size: 32 fieldset/_0_TXPKTU_E_DSCR: fields: - name: SLC0_TX_PKT_END_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_TXPKTU_H_DSCR: fields: - name: SLC0_TX_PKT_START_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_TXPKT_E_DSCR: fields: - name: SLC0_TX_PKT_E_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_TXPKT_H_DSCR: fields: - name: SLC0_TX_PKT_H_DSCR_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_TX_EOF_DES_ADDR: fields: - name: SLC0_TX_SUC_EOF_DES_ADDR bit_offset: 0 bit_size: 32 fieldset/_0_TX_ERREOF_DES_ADDR: fields: - name: SLC0_TX_ERR_EOF_DES_ADDR bit_offset: 0 bit_size: 32 fieldset/_1INT_CLR: fields: - name: FRHOST_BIT8_INT_CLR bit_offset: 0 bit_size: 1 - name: FRHOST_BIT9_INT_CLR bit_offset: 1 bit_size: 1 - name: FRHOST_BIT10_INT_CLR bit_offset: 2 bit_size: 1 - name: FRHOST_BIT11_INT_CLR bit_offset: 3 bit_size: 1 - name: FRHOST_BIT12_INT_CLR bit_offset: 4 bit_size: 1 - name: FRHOST_BIT13_INT_CLR bit_offset: 5 bit_size: 1 - name: FRHOST_BIT14_INT_CLR bit_offset: 6 bit_size: 1 - name: FRHOST_BIT15_INT_CLR bit_offset: 7 bit_size: 1 - name: SLC1_RX_START_INT_CLR bit_offset: 8 bit_size: 1 - name: SLC1_TX_START_INT_CLR bit_offset: 9 bit_size: 1 - name: SLC1_RX_UDF_INT_CLR bit_offset: 10 bit_size: 1 - name: SLC1_TX_OVF_INT_CLR bit_offset: 11 bit_size: 1 - name: SLC1_TOKEN0_1TO0_INT_CLR bit_offset: 12 bit_size: 1 - name: SLC1_TOKEN1_1TO0_INT_CLR bit_offset: 13 bit_size: 1 - name: SLC1_TX_DONE_INT_CLR bit_offset: 14 bit_size: 1 - name: SLC1_TX_SUC_EOF_INT_CLR bit_offset: 15 bit_size: 1 - name: SLC1_RX_DONE_INT_CLR bit_offset: 16 bit_size: 1 - name: SLC1_RX_EOF_INT_CLR bit_offset: 17 bit_size: 1 - name: SLC1_TOHOST_INT_CLR bit_offset: 18 bit_size: 1 - name: SLC1_TX_DSCR_ERR_INT_CLR bit_offset: 19 bit_size: 1 - name: SLC1_RX_DSCR_ERR_INT_CLR bit_offset: 20 bit_size: 1 - name: SLC1_TX_DSCR_EMPTY_INT_CLR bit_offset: 21 bit_size: 1 - name: SLC1_HOST_RD_ACK_INT_CLR bit_offset: 22 bit_size: 1 - name: SLC1_WR_RETRY_DONE_INT_CLR bit_offset: 23 bit_size: 1 - name: SLC1_TX_ERR_EOF_INT_CLR bit_offset: 24 bit_size: 1 fieldset/_1INT_ENA: fields: - name: FRHOST_BIT8_INT_ENA bit_offset: 0 bit_size: 1 - name: FRHOST_BIT9_INT_ENA bit_offset: 1 bit_size: 1 - name: FRHOST_BIT10_INT_ENA bit_offset: 2 bit_size: 1 - name: FRHOST_BIT11_INT_ENA bit_offset: 3 bit_size: 1 - name: FRHOST_BIT12_INT_ENA bit_offset: 4 bit_size: 1 - name: FRHOST_BIT13_INT_ENA bit_offset: 5 bit_size: 1 - name: FRHOST_BIT14_INT_ENA bit_offset: 6 bit_size: 1 - name: FRHOST_BIT15_INT_ENA bit_offset: 7 bit_size: 1 - name: SLC1_RX_START_INT_ENA bit_offset: 8 bit_size: 1 - name: SLC1_TX_START_INT_ENA bit_offset: 9 bit_size: 1 - name: SLC1_RX_UDF_INT_ENA bit_offset: 10 bit_size: 1 - name: SLC1_TX_OVF_INT_ENA bit_offset: 11 bit_size: 1 - name: SLC1_TOKEN0_1TO0_INT_ENA bit_offset: 12 bit_size: 1 - name: SLC1_TOKEN1_1TO0_INT_ENA bit_offset: 13 bit_size: 1 - name: SLC1_TX_DONE_INT_ENA bit_offset: 14 bit_size: 1 - name: SLC1_TX_SUC_EOF_INT_ENA bit_offset: 15 bit_size: 1 - name: SLC1_RX_DONE_INT_ENA bit_offset: 16 bit_size: 1 - name: SLC1_RX_EOF_INT_ENA bit_offset: 17 bit_size: 1 - name: SLC1_TOHOST_INT_ENA bit_offset: 18 bit_size: 1 - name: SLC1_TX_DSCR_ERR_INT_ENA bit_offset: 19 bit_size: 1 - name: SLC1_RX_DSCR_ERR_INT_ENA bit_offset: 20 bit_size: 1 - name: SLC1_TX_DSCR_EMPTY_INT_ENA bit_offset: 21 bit_size: 1 - name: SLC1_HOST_RD_ACK_INT_ENA bit_offset: 22 bit_size: 1 - name: SLC1_WR_RETRY_DONE_INT_ENA bit_offset: 23 bit_size: 1 - name: SLC1_TX_ERR_EOF_INT_ENA bit_offset: 24 bit_size: 1 fieldset/_1INT_ENA1: fields: - name: FRHOST_BIT8_INT_ENA1 bit_offset: 0 bit_size: 1 - name: FRHOST_BIT9_INT_ENA1 bit_offset: 1 bit_size: 1 - name: FRHOST_BIT10_INT_ENA1 bit_offset: 2 bit_size: 1 - name: FRHOST_BIT11_INT_ENA1 bit_offset: 3 bit_size: 1 - name: FRHOST_BIT12_INT_ENA1 bit_offset: 4 bit_size: 1 - name: FRHOST_BIT13_INT_ENA1 bit_offset: 5 bit_size: 1 - name: FRHOST_BIT14_INT_ENA1 bit_offset: 6 bit_size: 1 - name: FRHOST_BIT15_INT_ENA1 bit_offset: 7 bit_size: 1 - name: SLC1_RX_START_INT_ENA1 bit_offset: 8 bit_size: 1 - name: SLC1_TX_START_INT_ENA1 bit_offset: 9 bit_size: 1 - name: SLC1_RX_UDF_INT_ENA1 bit_offset: 10 bit_size: 1 - name: SLC1_TX_OVF_INT_ENA1 bit_offset: 11 bit_size: 1 - name: SLC1_TOKEN0_1TO0_INT_ENA1 bit_offset: 12 bit_size: 1 - name: SLC1_TOKEN1_1TO0_INT_ENA1 bit_offset: 13 bit_size: 1 - name: SLC1_TX_DONE_INT_ENA1 bit_offset: 14 bit_size: 1 - name: SLC1_TX_SUC_EOF_INT_ENA1 bit_offset: 15 bit_size: 1 - name: SLC1_RX_DONE_INT_ENA1 bit_offset: 16 bit_size: 1 - name: SLC1_RX_EOF_INT_ENA1 bit_offset: 17 bit_size: 1 - name: SLC1_TOHOST_INT_ENA1 bit_offset: 18 bit_size: 1 - name: SLC1_TX_DSCR_ERR_INT_ENA1 bit_offset: 19 bit_size: 1 - name: SLC1_RX_DSCR_ERR_INT_ENA1 bit_offset: 20 bit_size: 1 - name: SLC1_TX_DSCR_EMPTY_INT_ENA1 bit_offset: 21 bit_size: 1 - name: SLC1_HOST_RD_ACK_INT_ENA1 bit_offset: 22 bit_size: 1 - name: SLC1_WR_RETRY_DONE_INT_ENA1 bit_offset: 23 bit_size: 1 - name: SLC1_TX_ERR_EOF_INT_ENA1 bit_offset: 24 bit_size: 1 fieldset/_1INT_RAW: fields: - name: FRHOST_BIT8_INT_RAW bit_offset: 0 bit_size: 1 - name: FRHOST_BIT9_INT_RAW bit_offset: 1 bit_size: 1 - name: FRHOST_BIT10_INT_RAW bit_offset: 2 bit_size: 1 - name: FRHOST_BIT11_INT_RAW bit_offset: 3 bit_size: 1 - name: FRHOST_BIT12_INT_RAW bit_offset: 4 bit_size: 1 - name: FRHOST_BIT13_INT_RAW bit_offset: 5 bit_size: 1 - name: FRHOST_BIT14_INT_RAW bit_offset: 6 bit_size: 1 - name: FRHOST_BIT15_INT_RAW bit_offset: 7 bit_size: 1 - name: SLC1_RX_START_INT_RAW bit_offset: 8 bit_size: 1 - name: SLC1_TX_START_INT_RAW bit_offset: 9 bit_size: 1 - name: SLC1_RX_UDF_INT_RAW bit_offset: 10 bit_size: 1 - name: SLC1_TX_OVF_INT_RAW bit_offset: 11 bit_size: 1 - name: SLC1_TOKEN0_1TO0_INT_RAW bit_offset: 12 bit_size: 1 - name: SLC1_TOKEN1_1TO0_INT_RAW bit_offset: 13 bit_size: 1 - name: SLC1_TX_DONE_INT_RAW bit_offset: 14 bit_size: 1 - name: SLC1_TX_SUC_EOF_INT_RAW bit_offset: 15 bit_size: 1 - name: SLC1_RX_DONE_INT_RAW bit_offset: 16 bit_size: 1 - name: SLC1_RX_EOF_INT_RAW bit_offset: 17 bit_size: 1 - name: SLC1_TOHOST_INT_RAW bit_offset: 18 bit_size: 1 - name: SLC1_TX_DSCR_ERR_INT_RAW bit_offset: 19 bit_size: 1 - name: SLC1_RX_DSCR_ERR_INT_RAW bit_offset: 20 bit_size: 1 - name: SLC1_TX_DSCR_EMPTY_INT_RAW bit_offset: 21 bit_size: 1 - name: SLC1_HOST_RD_ACK_INT_RAW bit_offset: 22 bit_size: 1 - name: SLC1_WR_RETRY_DONE_INT_RAW bit_offset: 23 bit_size: 1 - name: SLC1_TX_ERR_EOF_INT_RAW bit_offset: 24 bit_size: 1 fieldset/_1INT_ST: fields: - name: FRHOST_BIT8_INT_ST bit_offset: 0 bit_size: 1 - name: FRHOST_BIT9_INT_ST bit_offset: 1 bit_size: 1 - name: FRHOST_BIT10_INT_ST bit_offset: 2 bit_size: 1 - name: FRHOST_BIT11_INT_ST bit_offset: 3 bit_size: 1 - name: FRHOST_BIT12_INT_ST bit_offset: 4 bit_size: 1 - name: FRHOST_BIT13_INT_ST bit_offset: 5 bit_size: 1 - name: FRHOST_BIT14_INT_ST bit_offset: 6 bit_size: 1 - name: FRHOST_BIT15_INT_ST bit_offset: 7 bit_size: 1 - name: SLC1_RX_START_INT_ST bit_offset: 8 bit_size: 1 - name: SLC1_TX_START_INT_ST bit_offset: 9 bit_size: 1 - name: SLC1_RX_UDF_INT_ST bit_offset: 10 bit_size: 1 - name: SLC1_TX_OVF_INT_ST bit_offset: 11 bit_size: 1 - name: SLC1_TOKEN0_1TO0_INT_ST bit_offset: 12 bit_size: 1 - name: SLC1_TOKEN1_1TO0_INT_ST bit_offset: 13 bit_size: 1 - name: SLC1_TX_DONE_INT_ST bit_offset: 14 bit_size: 1 - name: SLC1_TX_SUC_EOF_INT_ST bit_offset: 15 bit_size: 1 - name: SLC1_RX_DONE_INT_ST bit_offset: 16 bit_size: 1 - name: SLC1_RX_EOF_INT_ST bit_offset: 17 bit_size: 1 - name: SLC1_TOHOST_INT_ST bit_offset: 18 bit_size: 1 - name: SLC1_TX_DSCR_ERR_INT_ST bit_offset: 19 bit_size: 1 - name: SLC1_RX_DSCR_ERR_INT_ST bit_offset: 20 bit_size: 1 - name: SLC1_TX_DSCR_EMPTY_INT_ST bit_offset: 21 bit_size: 1 - name: SLC1_HOST_RD_ACK_INT_ST bit_offset: 22 bit_size: 1 - name: SLC1_WR_RETRY_DONE_INT_ST bit_offset: 23 bit_size: 1 - name: SLC1_TX_ERR_EOF_INT_ST bit_offset: 24 bit_size: 1 fieldset/_1INT_ST1: fields: - name: FRHOST_BIT8_INT_ST1 bit_offset: 0 bit_size: 1 - name: FRHOST_BIT9_INT_ST1 bit_offset: 1 bit_size: 1 - name: FRHOST_BIT10_INT_ST1 bit_offset: 2 bit_size: 1 - name: FRHOST_BIT11_INT_ST1 bit_offset: 3 bit_size: 1 - name: FRHOST_BIT12_INT_ST1 bit_offset: 4 bit_size: 1 - name: FRHOST_BIT13_INT_ST1 bit_offset: 5 bit_size: 1 - name: FRHOST_BIT14_INT_ST1 bit_offset: 6 bit_size: 1 - name: FRHOST_BIT15_INT_ST1 bit_offset: 7 bit_size: 1 - name: SLC1_RX_START_INT_ST1 bit_offset: 8 bit_size: 1 - name: SLC1_TX_START_INT_ST1 bit_offset: 9 bit_size: 1 - name: SLC1_RX_UDF_INT_ST1 bit_offset: 10 bit_size: 1 - name: SLC1_TX_OVF_INT_ST1 bit_offset: 11 bit_size: 1 - name: SLC1_TOKEN0_1TO0_INT_ST1 bit_offset: 12 bit_size: 1 - name: SLC1_TOKEN1_1TO0_INT_ST1 bit_offset: 13 bit_size: 1 - name: SLC1_TX_DONE_INT_ST1 bit_offset: 14 bit_size: 1 - name: SLC1_TX_SUC_EOF_INT_ST1 bit_offset: 15 bit_size: 1 - name: SLC1_RX_DONE_INT_ST1 bit_offset: 16 bit_size: 1 - name: SLC1_RX_EOF_INT_ST1 bit_offset: 17 bit_size: 1 - name: SLC1_TOHOST_INT_ST1 bit_offset: 18 bit_size: 1 - name: SLC1_TX_DSCR_ERR_INT_ST1 bit_offset: 19 bit_size: 1 - name: SLC1_RX_DSCR_ERR_INT_ST1 bit_offset: 20 bit_size: 1 - name: SLC1_TX_DSCR_EMPTY_INT_ST1 bit_offset: 21 bit_size: 1 - name: SLC1_HOST_RD_ACK_INT_ST1 bit_offset: 22 bit_size: 1 - name: SLC1_WR_RETRY_DONE_INT_ST1 bit_offset: 23 bit_size: 1 - name: SLC1_TX_ERR_EOF_INT_ST1 bit_offset: 24 bit_size: 1 fieldset/_1RXFIFO_PUSH: fields: - name: SLC1_RXFIFO_WDATA bit_offset: 0 bit_size: 9 - name: SLC1_RXFIFO_PUSH bit_offset: 16 bit_size: 1 fieldset/_1RX_LINK: fields: - name: SLC1_RXLINK_ADDR bit_offset: 0 bit_size: 20 - name: SLC1_BT_PACKET bit_offset: 20 bit_size: 1 - name: SLC1_RXLINK_STOP bit_offset: 28 bit_size: 1 - name: SLC1_RXLINK_START bit_offset: 29 bit_size: 1 - name: SLC1_RXLINK_RESTART bit_offset: 30 bit_size: 1 - name: SLC1_RXLINK_PARK bit_offset: 31 bit_size: 1 fieldset/_1TOKEN0: fields: - name: SLC1_TOKEN0_WDATA bit_offset: 0 bit_size: 12 - name: SLC1_TOKEN0_WR bit_offset: 12 bit_size: 1 - name: SLC1_TOKEN0_INC bit_offset: 13 bit_size: 1 - name: SLC1_TOKEN0_INC_MORE bit_offset: 14 bit_size: 1 - name: SLC1_TOKEN0 bit_offset: 16 bit_size: 12 fieldset/_1TOKEN1: fields: - name: SLC1_TOKEN1_WDATA bit_offset: 0 bit_size: 12 - name: SLC1_TOKEN1_WR bit_offset: 12 bit_size: 1 - name: SLC1_TOKEN1_INC bit_offset: 13 bit_size: 1 - name: SLC1_TOKEN1_INC_MORE bit_offset: 14 bit_size: 1 - name: SLC1_TOKEN1 bit_offset: 16 bit_size: 12 fieldset/_1TXFIFO_POP: fields: - name: SLC1_TXFIFO_RDATA bit_offset: 0 bit_size: 11 - name: SLC1_TXFIFO_POP bit_offset: 16 bit_size: 1 fieldset/_1TX_LINK: fields: - name: SLC1_TXLINK_ADDR bit_offset: 0 bit_size: 20 - name: SLC1_TXLINK_STOP bit_offset: 28 bit_size: 1 - name: SLC1_TXLINK_START bit_offset: 29 bit_size: 1 - name: SLC1_TXLINK_RESTART bit_offset: 30 bit_size: 1 - name: SLC1_TXLINK_PARK bit_offset: 31 bit_size: 1 fieldset/_1_RXLINK_DSCR: fields: - name: SLC1_RXLINK_DSCR bit_offset: 0 bit_size: 32 fieldset/_1_RXLINK_DSCR_BF0: fields: - name: SLC1_RXLINK_DSCR_BF0 bit_offset: 0 bit_size: 32 fieldset/_1_RXLINK_DSCR_BF1: fields: - name: SLC1_RXLINK_DSCR_BF1 bit_offset: 0 bit_size: 32 fieldset/_1_STATE0: fields: - name: SLC1_STATE0 bit_offset: 0 bit_size: 32 fieldset/_1_STATE1: fields: - name: SLC1_STATE1 bit_offset: 0 bit_size: 32 fieldset/_1_TO_EOF_BFR_DES_ADDR: fields: - name: SLC1_TO_EOF_BFR_DES_ADDR bit_offset: 0 bit_size: 32 fieldset/_1_TO_EOF_DES_ADDR: fields: - name: SLC1_TO_EOF_DES_ADDR bit_offset: 0 bit_size: 32 fieldset/_1_TXLINK_DSCR: fields: - name: SLC1_TXLINK_DSCR bit_offset: 0 bit_size: 32 fieldset/_1_TXLINK_DSCR_BF0: fields: - name: SLC1_TXLINK_DSCR_BF0 bit_offset: 0 bit_size: 32 fieldset/_1_TXLINK_DSCR_BF1: fields: - name: SLC1_TXLINK_DSCR_BF1 bit_offset: 0 bit_size: 32 fieldset/_1_TX_EOF_DES_ADDR: fields: - name: SLC1_TX_SUC_EOF_DES_ADDR bit_offset: 0 bit_size: 32 fieldset/_1_TX_ERREOF_DES_ADDR: fields: - name: SLC1_TX_ERR_EOF_DES_ADDR bit_offset: 0 bit_size: 32