block/USART1: description: Universal synchronous asynchronous receiver transmitter. items: - name: CR1 description: Control register 1. byte_offset: 0 fieldset: CR1 - name: CR2 description: Control register 2. byte_offset: 4 fieldset: CR2 - name: CR3 description: Control register 3. byte_offset: 8 fieldset: CR3 - name: BRR description: Baud rate register. byte_offset: 12 fieldset: BRR - name: GTPR description: Guard time and prescaler register. byte_offset: 16 fieldset: GTPR - name: RTOR description: Receiver timeout register. byte_offset: 20 fieldset: RTOR - name: RQR description: Request register. byte_offset: 24 access: Write fieldset: RQR - name: ISR description: Interrupt & status register. byte_offset: 28 access: Read fieldset: ISR - name: ICR description: Interrupt flag clear register. byte_offset: 32 access: Write fieldset: ICR - name: RDR description: Receive data register. byte_offset: 36 access: Read fieldset: RDR - name: TDR description: Transmit data register. byte_offset: 40 fieldset: TDR - name: PRESC description: Prescaler register. byte_offset: 44 fieldset: PRESC fieldset/BRR: description: Baud rate register. fields: - name: BRR description: BRR_4_15. bit_offset: 0 bit_size: 16 fieldset/CR1: description: Control register 1. fields: - name: UE description: USART enable. bit_offset: 0 bit_size: 1 enum: UE - name: UESM description: USART enable in Stop mode. bit_offset: 1 bit_size: 1 enum: UESM - name: RE description: Receiver enable. bit_offset: 2 bit_size: 1 enum: RE - name: TE description: Transmitter enable. bit_offset: 3 bit_size: 1 enum: TE - name: IDLEIE description: IDLE interrupt enable. bit_offset: 4 bit_size: 1 enum: IDLEIE - name: RXNEIE description: RXNE interrupt enable. bit_offset: 5 bit_size: 1 enum: RXNEIE - name: TCIE description: Transmission complete interrupt enable. bit_offset: 6 bit_size: 1 enum: TCIE - name: TXEIE description: interrupt enable. bit_offset: 7 bit_size: 1 enum: TXEIE - name: PEIE description: PE interrupt enable. bit_offset: 8 bit_size: 1 enum: PEIE - name: PS description: Parity selection. bit_offset: 9 bit_size: 1 enum: PS - name: PCE description: Parity control enable. bit_offset: 10 bit_size: 1 enum: PCE - name: WAKE description: Receiver wakeup method. bit_offset: 11 bit_size: 1 enum: WAKE - name: M0 description: Word length. bit_offset: 12 bit_size: 1 enum: M0 - name: MME description: Mute mode enable. bit_offset: 13 bit_size: 1 enum: MME - name: CMIE description: Character match interrupt enable. bit_offset: 14 bit_size: 1 enum: CMIE - name: OVER8 description: Oversampling mode. bit_offset: 15 bit_size: 1 enum: OVER8 - name: DEDT description: Driver Enable de-assertion time. bit_offset: 16 bit_size: 5 - name: DEAT description: Driver Enable assertion time. bit_offset: 21 bit_size: 5 - name: RTOIE description: Receiver timeout interrupt enable. bit_offset: 26 bit_size: 1 enum: RTOIE - name: EOBIE description: End of Block interrupt enable. bit_offset: 27 bit_size: 1 enum: EOBIE - name: M1 description: Word length. bit_offset: 28 bit_size: 1 enum: M1 - name: FIFOEN description: FIFO mode enable. bit_offset: 29 bit_size: 1 enum: FIFOEN - name: TXFEIE description: TXFIFO empty interrupt enable. bit_offset: 30 bit_size: 1 enum: TXFEIE - name: RXFFIE description: RXFIFO Full interrupt enable. bit_offset: 31 bit_size: 1 enum: RXFFIE fieldset/CR2: description: Control register 2. fields: - name: SLVEN description: Synchronous Slave mode enable. bit_offset: 0 bit_size: 1 enum: SLVEN - name: DIS_NSS description: When the DSI_NSS bit is set, the NSS pin input will be ignored. bit_offset: 3 bit_size: 1 enum: DIS_NSS - name: ADDM7 description: 7-bit Address Detection/4-bit Address Detection. bit_offset: 4 bit_size: 1 enum: ADDM7 - name: LBDL description: LIN break detection length. bit_offset: 5 bit_size: 1 enum: LBDL - name: LBDIE description: LIN break detection interrupt enable. bit_offset: 6 bit_size: 1 enum: LBDIE - name: LBCL description: Last bit clock pulse. bit_offset: 8 bit_size: 1 enum: LBCL - name: CPHA description: Clock phase. bit_offset: 9 bit_size: 1 enum: CPHA - name: CPOL description: Clock polarity. bit_offset: 10 bit_size: 1 enum: CPOL - name: CLKEN description: Clock enable. bit_offset: 11 bit_size: 1 enum: CLKEN - name: STOP description: STOP bits. bit_offset: 12 bit_size: 2 enum: STOP - name: LINEN description: LIN mode enable. bit_offset: 14 bit_size: 1 enum: LINEN - name: SWAP description: Swap TX/RX pins. bit_offset: 15 bit_size: 1 enum: SWAP - name: RXINV description: RX pin active level inversion. bit_offset: 16 bit_size: 1 enum: RXINV - name: TXINV description: TX pin active level inversion. bit_offset: 17 bit_size: 1 enum: TXINV - name: DATAINV description: Binary data inversion. bit_offset: 18 bit_size: 1 enum: DATAINV - name: MSBFIRST description: Most significant bit first. bit_offset: 19 bit_size: 1 enum: MSBFIRST - name: ABREN description: Auto baud rate enable. bit_offset: 20 bit_size: 1 enum: ABREN - name: ABRMOD description: Auto baud rate mode. bit_offset: 21 bit_size: 2 enum: ABRMOD - name: RTOEN description: Receiver timeout enable. bit_offset: 23 bit_size: 1 enum: RTOEN - name: ADD description: Address of the USART node. bit_offset: 24 bit_size: 8 fieldset/CR3: description: Control register 3. fields: - name: EIE description: Error interrupt enable. bit_offset: 0 bit_size: 1 enum: EIE - name: IREN description: Ir mode enable. bit_offset: 1 bit_size: 1 enum: IREN - name: IRLP description: Ir low-power. bit_offset: 2 bit_size: 1 enum: IRLP - name: HDSEL description: Half-duplex selection. bit_offset: 3 bit_size: 1 enum: HDSEL - name: NACK description: Smartcard NACK enable. bit_offset: 4 bit_size: 1 enum: NACK - name: SCEN description: Smartcard mode enable. bit_offset: 5 bit_size: 1 enum: SCEN - name: DMAR description: DMA enable receiver. bit_offset: 6 bit_size: 1 enum: DMAR - name: DMAT description: DMA enable transmitter. bit_offset: 7 bit_size: 1 enum: DMAT - name: RTSE description: RTS enable. bit_offset: 8 bit_size: 1 enum: RTSE - name: CTSE description: CTS enable. bit_offset: 9 bit_size: 1 enum: CTSE - name: CTSIE description: CTS interrupt enable. bit_offset: 10 bit_size: 1 enum: CTSIE - name: ONEBIT description: One sample bit method enable. bit_offset: 11 bit_size: 1 enum: ONEBIT - name: OVRDIS description: Overrun Disable. bit_offset: 12 bit_size: 1 enum: OVRDIS - name: DDRE description: DMA Disable on Reception Error. bit_offset: 13 bit_size: 1 enum: DDRE - name: DEM description: Driver enable mode. bit_offset: 14 bit_size: 1 enum: DEM - name: DEP description: Driver enable polarity selection. bit_offset: 15 bit_size: 1 enum: DEP - name: SCARCNT description: Smartcard auto-retry count. bit_offset: 17 bit_size: 3 - name: WUS description: Wakeup from Stop mode interrupt flag selection. bit_offset: 20 bit_size: 2 enum: WUS - name: WUFIE description: Wakeup from Stop mode interrupt enable. bit_offset: 22 bit_size: 1 enum: WUFIE - name: TXFTIE description: threshold interrupt enable. bit_offset: 23 bit_size: 1 enum: TXFTIE - name: TCBGTIE description: Tr Complete before guard time, interrupt enable. bit_offset: 24 bit_size: 1 enum: TCBGTIE - name: RXFTCFG description: Receive FIFO threshold configuration. bit_offset: 25 bit_size: 3 enum: RXFTCFG - name: RXFTIE description: RXFIFO threshold interrupt enable. bit_offset: 28 bit_size: 1 enum: RXFTIE - name: TXFTCFG description: TXFIFO threshold configuration. bit_offset: 29 bit_size: 3 enum: TXFTCFG fieldset/GTPR: description: Guard time and prescaler register. fields: - name: PSC description: Prescaler value. bit_offset: 0 bit_size: 8 - name: GT description: Guard time value. bit_offset: 8 bit_size: 8 fieldset/ICR: description: Interrupt flag clear register. fields: - name: PECF description: Parity error clear flag. bit_offset: 0 bit_size: 1 enum: PECF - name: FECF description: Framing error clear flag. bit_offset: 1 bit_size: 1 enum: FECF - name: NCF description: Noise detected clear flag. bit_offset: 2 bit_size: 1 enum: NCF - name: ORECF description: Overrun error clear flag. bit_offset: 3 bit_size: 1 enum: ORECF - name: IDLECF description: Idle line detected clear flag. bit_offset: 4 bit_size: 1 enum: IDLECF - name: TXFECF description: TXFIFO empty clear flag. bit_offset: 5 bit_size: 1 enum: TXFECF - name: TCCF description: Transmission complete clear flag. bit_offset: 6 bit_size: 1 enum: TCCF - name: TCBGTCF description: Transmission complete before Guard time clear flag. bit_offset: 7 bit_size: 1 enum: TCBGTCF - name: LBDCF description: LIN break detection clear flag. bit_offset: 8 bit_size: 1 enum: LBDCF - name: CTSCF description: CTS clear flag. bit_offset: 9 bit_size: 1 enum: CTSCF - name: RTOCF description: Receiver timeout clear flag. bit_offset: 11 bit_size: 1 enum: RTOCF - name: EOBCF description: End of block clear flag. bit_offset: 12 bit_size: 1 enum: EOBCF - name: UDRCF description: SPI slave underrun clear flag. bit_offset: 13 bit_size: 1 enum: UDRCF - name: CMCF description: Character match clear flag. bit_offset: 17 bit_size: 1 enum: CMCF - name: WUCF description: Wakeup from Stop mode clear flag. bit_offset: 20 bit_size: 1 enum: WUCF fieldset/ISR: description: Interrupt & status register. fields: - name: PE description: PE. bit_offset: 0 bit_size: 1 enum: PE - name: FE description: FE. bit_offset: 1 bit_size: 1 enum: FE - name: NF description: NF. bit_offset: 2 bit_size: 1 enum: NF - name: ORE description: ORE. bit_offset: 3 bit_size: 1 enum: ORE - name: IDLE description: IDLE. bit_offset: 4 bit_size: 1 enum: IDLE - name: RXNE description: RXNE. bit_offset: 5 bit_size: 1 enum: RXNE - name: TC description: TC. bit_offset: 6 bit_size: 1 enum: TC - name: TXE description: TXE. bit_offset: 7 bit_size: 1 enum: TXE - name: LBDF description: LBDF. bit_offset: 8 bit_size: 1 enum: LBDF - name: CTSIF description: CTSIF. bit_offset: 9 bit_size: 1 enum: CTSIF - name: CTS description: CTS. bit_offset: 10 bit_size: 1 enum: CTS - name: RTOF description: RTOF. bit_offset: 11 bit_size: 1 enum: RTOF - name: EOBF description: EOBF. bit_offset: 12 bit_size: 1 enum: EOBF - name: UDR description: SPI slave underrun error flag. bit_offset: 13 bit_size: 1 enum: UDR - name: ABRE description: ABRE. bit_offset: 14 bit_size: 1 - name: ABRF description: ABRF. bit_offset: 15 bit_size: 1 - name: BUSY description: BUSY. bit_offset: 16 bit_size: 1 enum: BUSY - name: CMF description: CMF. bit_offset: 17 bit_size: 1 enum: CMF - name: SBKF description: SBKF. bit_offset: 18 bit_size: 1 enum: SBKF - name: RWU description: RWU. bit_offset: 19 bit_size: 1 enum: RWU - name: WUF description: WUF. bit_offset: 20 bit_size: 1 - name: TEACK description: TEACK. bit_offset: 21 bit_size: 1 - name: REACK description: REACK. bit_offset: 22 bit_size: 1 - name: TXFE description: TXFIFO Empty. bit_offset: 23 bit_size: 1 enum: TXFE - name: RXFF description: RXFIFO Full. bit_offset: 24 bit_size: 1 enum: RXFF - name: TCBGT description: Transmission complete before guard time flag. bit_offset: 25 bit_size: 1 enum: TCBGT - name: RXFT description: RXFIFO threshold flag. bit_offset: 26 bit_size: 1 enum: RXFT - name: TXFT description: TXFIFO threshold flag. bit_offset: 27 bit_size: 1 enum: TXFT fieldset/PRESC: description: Prescaler register. fields: - name: PRESCALER description: Clock prescaler. bit_offset: 0 bit_size: 4 enum: PRESCALER fieldset/RDR: description: Receive data register. fields: - name: RDR description: Receive data value. bit_offset: 0 bit_size: 9 fieldset/RQR: description: Request register. fields: - name: ABRRQ description: Auto baud rate request. bit_offset: 0 bit_size: 1 enum: ABRRQ - name: SBKRQ description: Send break request. bit_offset: 1 bit_size: 1 enum: SBKRQ - name: MMRQ description: Mute mode request. bit_offset: 2 bit_size: 1 enum: MMRQ - name: RXFRQ description: Receive data flush request. bit_offset: 3 bit_size: 1 enum: RXFRQ - name: TXFRQ description: Transmit data flush request. bit_offset: 4 bit_size: 1 enum: TXFRQ fieldset/RTOR: description: Receiver timeout register. fields: - name: RTO description: Receiver timeout value. bit_offset: 0 bit_size: 24 - name: BLEN description: Block Length. bit_offset: 24 bit_size: 8 fieldset/TDR: description: Transmit data register. fields: - name: TDR description: Transmit data value. bit_offset: 0 bit_size: 9 enum/ABREN: bit_size: 1 variants: - name: Disabled description: Auto baud rate detection is disabled. value: 0 - name: Enabled description: Auto baud rate detection is enabled. value: 1 enum/ABRMOD: bit_size: 2 variants: - name: Start description: Measurement of the start bit is used to detect the baud rate. value: 0 - name: Edge description: Falling edge to falling edge measurement. value: 1 - name: Frame7F description: 0x7F frame detection. value: 2 - name: Frame55 description: 0x55 frame detection. value: 3 enum/ABRRQ: bit_size: 1 variants: - name: Request description: resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame. value: 1 enum/ADDM7: bit_size: 1 variants: - name: Bit4 description: 4-bit address detection. value: 0 - name: Bit7 description: 7-bit address detection. value: 1 enum/BUSY: bit_size: 1 variants: - name: Idle description: USART is idle (no reception). value: 0 - name: Busy description: Reception on going. value: 1 enum/CLKEN: bit_size: 1 variants: - name: Disabled description: CK pin disabled. value: 0 - name: Enabled description: CK pin enabled. value: 1 enum/CMCF: bit_size: 1 variants: - name: Clear description: Clears the CMF flag in the ISR register. value: 1 enum/CMF: bit_size: 1 variants: - name: NoMatch description: No Character match detected. value: 0 - name: Match description: Character match detected. value: 1 enum/CMIE: bit_size: 1 variants: - name: Disabled description: Interrupt is disabled. value: 0 - name: Enabled description: Interrupt is generated when the CMF bit is set in the ISR register. value: 1 enum/CPHA: bit_size: 1 variants: - name: First description: The first clock transition is the first data capture edge. value: 0 - name: Second description: The second clock transition is the first data capture edge. value: 1 enum/CPOL: bit_size: 1 variants: - name: Low description: Steady low value on CK pin outside transmission window. value: 0 - name: High description: Steady high value on CK pin outside transmission window. value: 1 enum/CTS: bit_size: 1 variants: - name: Set description: CTS line set. value: 0 - name: Reset description: CTS line reset. value: 1 enum/CTSCF: bit_size: 1 variants: - name: Clear description: Clears the CTSIF flag in the ISR register. value: 1 enum/CTSE: bit_size: 1 variants: - name: Disabled description: CTS hardware flow control disabled. value: 0 - name: Enabled description: CTS mode enabled, data is only transmitted when the CTS input is asserted. value: 1 enum/CTSIE: bit_size: 1 variants: - name: Disabled description: Interrupt is inhibited. value: 0 - name: Enabled description: An interrupt is generated whenever CTSIF=1 in the ISR register. value: 1 enum/CTSIF: bit_size: 1 variants: - name: NotChanged description: No change occurred on the CTS status line. value: 0 - name: Changed description: A change occurred on the CTS status line. value: 1 enum/DATAINV: bit_size: 1 variants: - name: Positive description: Logical data from the data register are send/received in positive/direct logic. value: 0 - name: Negative description: Logical data from the data register are send/received in negative/inverse logic. value: 1 enum/DDRE: bit_size: 1 variants: - name: NotDisabled description: DMA is not disabled in case of reception error. value: 0 - name: Disabled description: DMA is disabled following a reception error. value: 1 enum/DEM: bit_size: 1 variants: - name: Disabled description: DE function is disabled. value: 0 - name: Enabled description: The DE signal is output on the RTS pin. value: 1 enum/DEP: bit_size: 1 variants: - name: High description: DE signal is active high. value: 0 - name: Low description: DE signal is active low. value: 1 enum/DIS_NSS: bit_size: 1 variants: - name: Disabled description: SPI slave selection depends on NSS input pin. value: 0 - name: Enabled description: SPI slave is always selected and NSS input pin is ignored. value: 1 enum/DMAR: bit_size: 1 variants: - name: Disabled description: DMA mode is disabled for reception. value: 0 - name: Enabled description: DMA mode is enabled for reception. value: 1 enum/DMAT: bit_size: 1 variants: - name: Disabled description: DMA mode is disabled for transmission. value: 0 - name: Enabled description: DMA mode is enabled for transmission. value: 1 enum/EIE: bit_size: 1 variants: - name: Disabled description: Interrupt is inhibited. value: 0 - name: Enabled description: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the ISR register. value: 1 enum/EOBCF: bit_size: 1 variants: - name: Clear description: Clears the EOBF flag in the ISR register. value: 1 enum/EOBF: bit_size: 1 variants: - name: NotReached description: End of Block not reached. value: 0 - name: Reached description: End of Block (number of characters) reached. value: 1 enum/EOBIE: bit_size: 1 variants: - name: Disabled description: Interrupt is inhibited. value: 0 - name: Enabled description: A USART interrupt is generated when the EOBF flag is set in the ISR register. value: 1 enum/FE: bit_size: 1 variants: - name: NoError description: No Framing error is detected. value: 0 - name: Error description: Framing error or break character is detected. value: 1 enum/FECF: bit_size: 1 variants: - name: Clear description: Clears the FE flag in the ISR register. value: 1 enum/FIFOEN: bit_size: 1 variants: - name: Disabled description: FIFO mode is disabled. value: 0 - name: Enabled description: FIFO mode is enabled. value: 1 enum/HDSEL: bit_size: 1 variants: - name: NotSelected description: Half duplex mode is not selected. value: 0 - name: Selected description: Half duplex mode is selected. value: 1 enum/IDLE: bit_size: 1 variants: - name: NoIdle description: No Idle Line is detected. value: 0 - name: Idle description: Idle Line is detected. value: 1 enum/IDLECF: bit_size: 1 variants: - name: Clear description: Clears the IDLE flag in the ISR register. value: 1 enum/IDLEIE: bit_size: 1 variants: - name: Disabled description: Interrupt is disabled. value: 0 - name: Enabled description: Interrupt is generated whenever IDLE=1 in the ISR register. value: 1 enum/IREN: bit_size: 1 variants: - name: Disabled description: IrDA disabled. value: 0 - name: Enabled description: IrDA enabled. value: 1 enum/IRLP: bit_size: 1 variants: - name: Normal description: Normal mode. value: 0 - name: LowPower description: Low-power mode. value: 1 enum/LBCL: bit_size: 1 variants: - name: NotOutput description: The clock pulse of the last data bit is not output to the CK pin. value: 0 - name: Output description: The clock pulse of the last data bit is output to the CK pin. value: 1 enum/LBDCF: bit_size: 1 variants: - name: Clear description: Clears the LBDF flag in the ISR register. value: 1 enum/LBDF: bit_size: 1 variants: - name: NotDetected description: LIN break not detected. value: 0 - name: Detected description: LIN break detected. value: 1 enum/LBDIE: bit_size: 1 variants: - name: Disabled description: Interrupt is inhibited. value: 0 - name: Enabled description: An interrupt is generated whenever LBDF=1 in the ISR register. value: 1 enum/LBDL: bit_size: 1 variants: - name: Bit10 description: 10-bit break detection. value: 0 - name: Bit11 description: 11-bit break detection. value: 1 enum/LINEN: bit_size: 1 variants: - name: Disabled description: LIN mode disabled. value: 0 - name: Enabled description: LIN mode enabled. value: 1 enum/M0: bit_size: 1 variants: - name: Bit8 description: 1 start bit, 8 data bits, n stop bits. value: 0 - name: Bit9 description: 1 start bit, 9 data bits, n stop bits. value: 1 enum/M1: bit_size: 1 variants: - name: M0 description: Use M0 to set the data bits. value: 0 - name: Bit7 description: 1 start bit, 7 data bits, n stop bits. value: 1 enum/MME: bit_size: 1 variants: - name: Disabled description: Receiver in active mode permanently. value: 0 - name: Enabled description: Receiver can switch between mute mode and active mode. value: 1 enum/MMRQ: bit_size: 1 variants: - name: Mute description: Puts the USART in mute mode and sets the RWU flag. value: 1 enum/MSBFIRST: bit_size: 1 variants: - name: LSB description: data is transmitted/received with data bit 0 first, following the start bit. value: 0 - name: MSB description: data is transmitted/received with MSB (bit 7/8/9) first, following the start bit. value: 1 enum/NACK: bit_size: 1 variants: - name: Disabled description: NACK transmission in case of parity error is disabled. value: 0 - name: Enabled description: NACK transmission during parity error is enabled. value: 1 enum/NCF: bit_size: 1 variants: - name: Clear description: Clears the NF flag in the ISR register. value: 1 enum/NF: bit_size: 1 variants: - name: NoNoise description: No noise is detected. value: 0 - name: Noise description: Noise is detected. value: 1 enum/ONEBIT: bit_size: 1 variants: - name: Sample3 description: Three sample bit method. value: 0 - name: Sample1 description: One sample bit method. value: 1 enum/ORE: bit_size: 1 variants: - name: NoOverrun description: No Overrun error. value: 0 - name: Overrun description: Overrun error is detected. value: 1 enum/ORECF: bit_size: 1 variants: - name: Clear description: Clears the ORE flag in the ISR register. value: 1 enum/OVER8: bit_size: 1 variants: - name: Oversampling16 description: Oversampling by 16. value: 0 - name: Oversampling8 description: Oversampling by 8. value: 1 enum/OVRDIS: bit_size: 1 variants: - name: Enabled description: Overrun Error Flag, ORE, is set when received data is not read before receiving new data. value: 0 - name: Disabled description: Overrun functionality is disabled. If new data is received while the RXNE flag is still set the ORE flag is not set and the new received data overwrites the previous content of the RDR register. value: 1 enum/PCE: bit_size: 1 variants: - name: Disabled description: Parity control disabled. value: 0 - name: Enabled description: Parity control enabled. value: 1 enum/PE: bit_size: 1 variants: - name: NoError description: No parity error. value: 0 - name: Error description: Parity error. value: 1 enum/PECF: bit_size: 1 variants: - name: Clear description: Clears the PE flag in the ISR register. value: 1 enum/PEIE: bit_size: 1 variants: - name: Disabled description: Interrupt is disabled. value: 0 - name: Enabled description: Interrupt is generated whenever PE=1 in the ISR register. value: 1 enum/PRESCALER: bit_size: 4 variants: - name: Div1 description: Input clock divided by 1. value: 0 - name: Div2 description: Input clock divided by 2. value: 1 - name: Div4 description: Input clock divided by 4. value: 2 - name: Div6 description: Input clock divided by 6. value: 3 - name: Div8 description: Input clock divided by 8. value: 4 - name: Div10 description: Input clock divided by 10. value: 5 - name: Div12 description: Input clock divided by 12. value: 6 - name: Div16 description: Input clock divided by 16. value: 7 - name: Div32 description: Input clock divided by 32. value: 8 - name: Div64 description: Input clock divided by 64. value: 9 - name: Div128 description: Input clock divided by 128. value: 10 - name: Div256 description: Input clock divided by 256. value: 11 enum/PS: bit_size: 1 variants: - name: Even description: Even parity. value: 0 - name: Odd description: Odd parity. value: 1 enum/RE: bit_size: 1 variants: - name: Disabled description: Receiver is disabled. value: 0 - name: Enabled description: Receiver is enabled. value: 1 enum/RTOCF: bit_size: 1 variants: - name: Clear description: Clears the RTOF flag in the ISR register. value: 1 enum/RTOEN: bit_size: 1 variants: - name: Disabled description: Receiver timeout feature disabled. value: 0 - name: Enabled description: Receiver timeout feature enabled. value: 1 enum/RTOF: bit_size: 1 variants: - name: NotReached description: Timeout value not reached. value: 0 - name: Reached description: Timeout value reached without any data reception. value: 1 enum/RTOIE: bit_size: 1 variants: - name: Disabled description: Interrupt is inhibited. value: 0 - name: Enabled description: An USART interrupt is generated when the RTOF bit is set in the ISR register. value: 1 enum/RTSE: bit_size: 1 variants: - name: Disabled description: RTS hardware flow control disabled. value: 0 - name: Enabled description: RTS output enabled, data is only requested when there is space in the receive buffer. value: 1 enum/RWU: bit_size: 1 variants: - name: Active description: Receiver in Active mode. value: 0 - name: Mute description: Receiver in Mute mode. value: 1 enum/RXFF: bit_size: 1 variants: - name: NotFull description: RXFIFO not full. value: 0 - name: Full description: RXFIFO Full. value: 1 enum/RXFFIE: bit_size: 1 variants: - name: Disabled description: Interrupt inhibited. value: 0 - name: Enabled description: USART interrupt generated when RXFF = 1 in the USART_ISR register. value: 1 enum/RXFRQ: bit_size: 1 variants: - name: Discard description: clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition. value: 1 enum/RXFT: bit_size: 1 variants: - name: NotReached description: Receive FIFO does not reach the programmed threshold. value: 0 - name: Reached description: Receive FIFO reached the programmed threshold. value: 1 enum/RXFTCFG: bit_size: 3 variants: - name: Depth_1_8 description: RXFIFO reaches 1/8 of its depth. value: 0 - name: Depth_1_4 description: RXFIFO reaches 1/4 of its depth. value: 1 - name: Depth_1_2 description: RXFIFO reaches 1/2 of its depth. value: 2 - name: Depth_3_4 description: RXFIFO reaches 3/4 of its depth. value: 3 - name: Depth_7_8 description: RXFIFO reaches 7/8 of its depth. value: 4 - name: Full description: RXFIFO becomes full. value: 5 enum/RXFTIE: bit_size: 1 variants: - name: Disabled description: Interrupt inhibited. value: 0 - name: Enabled description: USART interrupt generated when Receive FIFO reaches the threshold programmed in RXFTCFG. value: 1 enum/RXINV: bit_size: 1 variants: - name: Standard description: RX pin signal works using the standard logic levels. value: 0 - name: Inverted description: RX pin signal values are inverted. value: 1 enum/RXNE: bit_size: 1 variants: - name: NoData description: Data is not received. value: 0 - name: DataReady description: Received data is ready to be read. value: 1 enum/RXNEIE: bit_size: 1 variants: - name: Disabled description: Interrupt is disabled. value: 0 - name: Enabled description: Interrupt is generated whenever ORE=1 or RXNE=1 in the ISR register. value: 1 enum/SBKF: bit_size: 1 variants: - name: NoBreak description: No break character transmitted. value: 0 - name: Break description: Break character transmitted. value: 1 enum/SBKRQ: bit_size: 1 variants: - name: Break description: sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available. value: 1 enum/SCEN: bit_size: 1 variants: - name: Disabled description: Smartcard Mode disabled. value: 0 - name: Enabled description: Smartcard Mode enabled. value: 1 enum/SLVEN: bit_size: 1 variants: - name: Disabled description: Slave mode disabled. value: 0 - name: Enabled description: Slave mode enabled. value: 1 enum/STOP: bit_size: 2 variants: - name: Stop1 description: 1 stop bit. value: 0 - name: Stop0p5 description: 0.5 stop bit. value: 1 - name: Stop2 description: 2 stop bit. value: 2 - name: Stop1p5 description: 1.5 stop bit. value: 3 enum/SWAP: bit_size: 1 variants: - name: Standard description: TX/RX pins are used as defined in standard pinout. value: 0 - name: Swapped description: The TX and RX pins functions are swapped. value: 1 enum/TC: bit_size: 1 variants: - name: TxNotComplete description: Transmission is not complete. value: 0 - name: TxComplete description: Transmission is complete. value: 1 enum/TCBGT: bit_size: 1 variants: - name: NotCompleted description: Transmission is not complete or transmission is complete unsuccessfully (i.e. a NACK is received from the card). value: 0 - name: Completed description: Transmission is complete successfully (before Guard time completion and there is no NACK from the smart card). value: 1 enum/TCBGTCF: bit_size: 1 variants: - name: Clear description: Clear the TCBGT flag in the ISR register. value: 1 enum/TCBGTIE: bit_size: 1 variants: - name: Disabled description: Interrupt inhibited. value: 0 - name: Enabled description: USART interrupt generated whenever TCBGT=1 in the USART_ISR register. value: 1 enum/TCCF: bit_size: 1 variants: - name: Clear description: Clears the TC flag in the ISR register. value: 1 enum/TCIE: bit_size: 1 variants: - name: Disabled description: Interrupt is disabled. value: 0 - name: Enabled description: Interrupt is generated whenever TC=1 in the ISR register. value: 1 enum/TE: bit_size: 1 variants: - name: Disabled description: Transmitter is disabled. value: 0 - name: Enabled description: Transmitter is enabled. value: 1 enum/TXE: bit_size: 1 variants: - name: Full description: Transmit FIFO is full. value: 0 - name: NotFull description: Transmit FIFO is not full. value: 1 enum/TXEIE: bit_size: 1 variants: - name: Disabled description: Interrupt is disabled. value: 0 - name: Enabled description: Interrupt is generated whenever TXE=1 in the ISR register. value: 1 enum/TXFE: bit_size: 1 variants: - name: NotEmpty description: TXFIFO not empty. value: 0 - name: Empty description: TXFIFO empty. value: 1 enum/TXFECF: bit_size: 1 variants: - name: Clear description: Clear the TXFE flag in the ISR register. value: 1 enum/TXFEIE: bit_size: 1 variants: - name: Disabled description: Interrupt inhibited. value: 0 - name: Enabled description: USART interrupt generated when TXFE = 1 in the USART_ISR register. value: 1 enum/TXFRQ: bit_size: 1 variants: - name: Discard description: Set the TXE flags. This allows to discard the transmit data. value: 1 enum/TXFT: bit_size: 1 variants: - name: NotReached description: TXFIFO does not reach the programmed threshold. value: 0 - name: Reached description: TXFIFO reached the programmed threshold. value: 1 enum/TXFTCFG: bit_size: 3 variants: - name: Depth_1_8 description: TXFIFO reaches 1/8 of its depth. value: 0 - name: Depth_1_4 description: TXFIFO reaches 1/4 of its depth. value: 1 - name: Depth_1_2 description: TXFIFO reaches 1/2 of its depth. value: 2 - name: Depth_3_4 description: TXFIFO reaches 3/4 of its depth. value: 3 - name: Depth_7_8 description: TXFIFO reaches 7/8 of its depth. value: 4 - name: Empty description: TXFIFO becomes empty. value: 5 enum/TXFTIE: bit_size: 1 variants: - name: Disabled description: Interrupt inhibited. value: 0 - name: Enabled description: USART interrupt generated when Transmit FIFO reaches the threshold programmed in TXFTCFG. value: 1 enum/TXINV: bit_size: 1 variants: - name: Standard description: TX pin signal works using the standard logic levels. value: 0 - name: Inverted description: TX pin signal values are inverted. value: 1 enum/UDR: bit_size: 1 variants: - name: NoUnderrun description: No underrun error. value: 0 - name: Underrun description: underrun error. value: 1 enum/UDRCF: bit_size: 1 variants: - name: Clear description: Clear the UDR flag in the ISR register. value: 1 enum/UE: bit_size: 1 variants: - name: Disabled description: UART is disabled. value: 0 - name: Enabled description: UART is enabled. value: 1 enum/UESM: bit_size: 1 variants: - name: Disabled description: USART not able to wake up the MCU from Stop mode. value: 0 - name: Enabled description: USART able to wake up the MCU from Stop mode. value: 1 enum/WAKE: bit_size: 1 variants: - name: Idle description: Idle line. value: 0 - name: Address description: Address mask. value: 1 enum/WUCF: bit_size: 1 variants: - name: Clear description: Clears the WUF flag in the ISR register. value: 1 enum/WUFIE: bit_size: 1 variants: - name: Disabled description: Interrupt is inhibited. value: 0 - name: Enabled description: An USART interrupt is generated whenever WUF=1 in the ISR register. value: 1 enum/WUS: bit_size: 2 variants: - name: Address description: WUF active on address match. value: 0 - name: Start description: WuF active on Start bit detection. value: 2 - name: RXNE description: WUF active on RXNE. value: 3