block/ADC_Common: description: ADC common registers. items: - name: CSR description: ADC common status register. byte_offset: 0 access: Read fieldset: CSR - name: CCR description: ADC common control register. byte_offset: 8 fieldset: CCR fieldset/CCR: description: ADC common control register. fields: - name: CKMODE description: ADC clock mode. bit_offset: 16 bit_size: 2 - name: PRESC description: ADC prescaler. bit_offset: 18 bit_size: 4 - name: VREFEN description: Vrefint enable. bit_offset: 22 bit_size: 1 - name: CH17SEL description: CH17 selection (temperature). bit_offset: 23 bit_size: 1 - name: CH18SEL description: CH18 selection (Vbat). bit_offset: 24 bit_size: 1 fieldset/CSR: description: ADC common status register. fields: - name: ADRDY_MST description: master ADC ready. bit_offset: 0 bit_size: 1 - name: EOSMP_MST description: End of Sampling phase flag of the master ADC. bit_offset: 1 bit_size: 1 - name: EOC_MST description: End of regular conversion flag of the master ADC. bit_offset: 2 bit_size: 1 - name: EOS_MST description: End of regular sequence flag of the master ADC. bit_offset: 3 bit_size: 1 - name: OVR_MST description: Overrun flag of the master ADC. bit_offset: 4 bit_size: 1 - name: JEOC_MST description: End of injected conversion flag of the master ADC. bit_offset: 5 bit_size: 1 - name: JEOS_MST description: End of injected sequence flag of the master ADC. bit_offset: 6 bit_size: 1 - name: AWD1_MST description: Analog watchdog 1 flag of the master ADC. bit_offset: 7 bit_size: 1 - name: AWD2_MST description: Analog watchdog 2 flag of the master ADC. bit_offset: 8 bit_size: 1 - name: AWD3_MST description: Analog watchdog 3 flag of the master ADC. bit_offset: 9 bit_size: 1 - name: JQOVF_MST description: Injected Context Queue Overflow flag of the master ADC. bit_offset: 10 bit_size: 1