block/GPIOZ: description: GPIOZ. items: - name: GPIOZ_MODER description: GPIO port mode register. byte_offset: 0 fieldset: GPIOZ_MODER - name: GPIOZ_OTYPER description: GPIO port output type register. byte_offset: 4 fieldset: GPIOZ_OTYPER - name: GPIOZ_OSPEEDR description: GPIO port output speed register. byte_offset: 8 fieldset: GPIOZ_OSPEEDR - name: GPIOZ_PUPDR description: GPIO port pull-up/pull-down register. byte_offset: 12 fieldset: GPIOZ_PUPDR - name: GPIOZ_IDR description: GPIO port input data register. byte_offset: 16 access: Read fieldset: GPIOZ_IDR - name: GPIOZ_ODR description: GPIO port output data register. byte_offset: 20 fieldset: GPIOZ_ODR - name: GPIOZ_BSRR description: GPIO port bit set/reset register. byte_offset: 24 access: Write fieldset: GPIOZ_BSRR - name: GPIOZ_LCKR description: This register is used to lock the configuration of the port bits when a correct write sequence is applied to bit 16 (LCKK). The value of bits [15:0] is used to lock the configuration of the GPIO. During the write sequence, the value of LCKR[15:0] must not change. When the LOCK sequence has been applied on a port bit, the value of this port bit can no longer be modified until the next MCU reset or peripheral reset. A specific write sequence is used to write to the GPIOx_LCKR register. Only word access (32-bit long) is allowed during this locking sequence. Each lock bit freezes a specific configuration register (control and alternate function registers). byte_offset: 28 fieldset: GPIOZ_LCKR - name: GPIOZ_AFRL description: GPIO alternate function low register. byte_offset: 32 fieldset: GPIOZ_AFRL - name: GPIOZ_AFRH description: GPIO alternate function high register. byte_offset: 36 fieldset: GPIOZ_AFRH - name: GPIOZ_BRR description: GPIO port bit reset register. byte_offset: 40 access: Write fieldset: GPIOZ_BRR - name: GPIOZ_SECCFGR description: This register provides write access security and can be written only by a secure access. It is used to configure a selected I/O as secure. A non-secure write access to this register is discarded. byte_offset: 48 access: Write fieldset: GPIOZ_SECCFGR - name: GPIOZ_HWCFGR10 description: 'For GPIOA, B, C, D, E, F, G, H, I, J and GPIOK: For GPIOZ:.' byte_offset: 968 access: Read fieldset: GPIOZ_HWCFGR10 - name: GPIOZ_HWCFGR9 description: 'For GPIOA, B, C, D, E, F, G, H, I, and GPIOJ: For GPIOK and GPIOZ:.' byte_offset: 972 access: Read fieldset: GPIOZ_HWCFGR9 - name: GPIOZ_HWCFGR8 description: 'For GPIOA, B, C, D, E, F, G, H, I, and GPIOJ: For GPIOK and GPIOZ:.' byte_offset: 976 access: Read fieldset: GPIOZ_HWCFGR8 - name: GPIOZ_HWCFGR7 description: GPIO hardware configuration register 7. byte_offset: 980 access: Read fieldset: GPIOZ_HWCFGR7 - name: GPIOZ_HWCFGR6 description: GPIO hardware configuration register 6. byte_offset: 984 access: Read fieldset: GPIOZ_HWCFGR6 - name: GPIOZ_HWCFGR5 description: GPIO hardware configuration register 5. byte_offset: 988 access: Read fieldset: GPIOZ_HWCFGR5 - name: GPIOZ_HWCFGR4 description: GPIO hardware configuration register 4. byte_offset: 992 access: Read fieldset: GPIOZ_HWCFGR4 - name: GPIOZ_HWCFGR3 description: GPIO hardware configuration register 3. byte_offset: 996 access: Read fieldset: GPIOZ_HWCFGR3 - name: GPIOZ_HWCFGR2 description: GPIO hardware configuration register 2. byte_offset: 1000 access: Read fieldset: GPIOZ_HWCFGR2 - name: GPIOZ_HWCFGR1 description: GPIO hardware configuration register 1. byte_offset: 1004 access: Read fieldset: GPIOZ_HWCFGR1 - name: GPIOZ_HWCFGR0 description: GPIO hardware configuration register 0. byte_offset: 1008 access: Read fieldset: GPIOZ_HWCFGR0 - name: GPIOZ_VERR description: GPIO version register. byte_offset: 1012 access: Read fieldset: GPIOZ_VERR - name: GPIOZ_IPIDR description: GPIO identification register. byte_offset: 1016 access: Read fieldset: GPIOZ_IPIDR - name: GPIOZ_SIDR description: GPIO size identification register. byte_offset: 1020 access: Read fieldset: GPIOZ_SIDR fieldset/GPIOZ_AFRH: description: GPIO alternate function high register. fields: - name: AFR8 description: AFR8. bit_offset: 0 bit_size: 4 - name: AFR9 description: AFR9. bit_offset: 4 bit_size: 4 - name: AFR10 description: AFR10. bit_offset: 8 bit_size: 4 - name: AFR11 description: AFR11. bit_offset: 12 bit_size: 4 - name: AFR12 description: AFR12. bit_offset: 16 bit_size: 4 - name: AFR13 description: AFR13. bit_offset: 20 bit_size: 4 - name: AFR14 description: AFR14. bit_offset: 24 bit_size: 4 - name: AFR15 description: AFR15. bit_offset: 28 bit_size: 4 fieldset/GPIOZ_AFRL: description: GPIO alternate function low register. fields: - name: AFR0 description: AFR0. bit_offset: 0 bit_size: 4 - name: AFR1 description: AFR1. bit_offset: 4 bit_size: 4 - name: AFR2 description: AFR2. bit_offset: 8 bit_size: 4 - name: AFR3 description: AFR3. bit_offset: 12 bit_size: 4 - name: AFR4 description: AFR4. bit_offset: 16 bit_size: 4 - name: AFR5 description: AFR5. bit_offset: 20 bit_size: 4 - name: AFR6 description: AFR6. bit_offset: 24 bit_size: 4 - name: AFR7 description: AFR7. bit_offset: 28 bit_size: 4 fieldset/GPIOZ_BRR: description: GPIO port bit reset register. fields: - name: BR0 description: BR0. bit_offset: 0 bit_size: 1 - name: BR1 description: BR1. bit_offset: 1 bit_size: 1 - name: BR2 description: BR2. bit_offset: 2 bit_size: 1 - name: BR3 description: BR3. bit_offset: 3 bit_size: 1 - name: BR4 description: BR4. bit_offset: 4 bit_size: 1 - name: BR5 description: BR5. bit_offset: 5 bit_size: 1 - name: BR6 description: BR6. bit_offset: 6 bit_size: 1 - name: BR7 description: BR7. bit_offset: 7 bit_size: 1 - name: BR8 description: BR8. bit_offset: 8 bit_size: 1 - name: BR9 description: BR9. bit_offset: 9 bit_size: 1 - name: BR10 description: BR10. bit_offset: 10 bit_size: 1 - name: BR11 description: BR11. bit_offset: 11 bit_size: 1 - name: BR12 description: BR12. bit_offset: 12 bit_size: 1 - name: BR13 description: BR13. bit_offset: 13 bit_size: 1 - name: BR14 description: BR14. bit_offset: 14 bit_size: 1 - name: BR15 description: BR15. bit_offset: 15 bit_size: 1 fieldset/GPIOZ_BSRR: description: GPIO port bit set/reset register. fields: - name: BS0 description: BS0. bit_offset: 0 bit_size: 1 - name: BS1 description: BS1. bit_offset: 1 bit_size: 1 - name: BS2 description: BS2. bit_offset: 2 bit_size: 1 - name: BS3 description: BS3. bit_offset: 3 bit_size: 1 - name: BS4 description: BS4. bit_offset: 4 bit_size: 1 - name: BS5 description: BS5. bit_offset: 5 bit_size: 1 - name: BS6 description: BS6. bit_offset: 6 bit_size: 1 - name: BS7 description: BS7. bit_offset: 7 bit_size: 1 - name: BS8 description: BS8. bit_offset: 8 bit_size: 1 - name: BS9 description: BS9. bit_offset: 9 bit_size: 1 - name: BS10 description: BS10. bit_offset: 10 bit_size: 1 - name: BS11 description: BS11. bit_offset: 11 bit_size: 1 - name: BS12 description: BS12. bit_offset: 12 bit_size: 1 - name: BS13 description: BS13. bit_offset: 13 bit_size: 1 - name: BS14 description: BS14. bit_offset: 14 bit_size: 1 - name: BS15 description: BS15. bit_offset: 15 bit_size: 1 - name: BR0 description: BR0. bit_offset: 16 bit_size: 1 - name: BR1 description: BR1. bit_offset: 17 bit_size: 1 - name: BR2 description: BR2. bit_offset: 18 bit_size: 1 - name: BR3 description: BR3. bit_offset: 19 bit_size: 1 - name: BR4 description: BR4. bit_offset: 20 bit_size: 1 - name: BR5 description: BR5. bit_offset: 21 bit_size: 1 - name: BR6 description: BR6. bit_offset: 22 bit_size: 1 - name: BR7 description: BR7. bit_offset: 23 bit_size: 1 - name: BR8 description: BR8. bit_offset: 24 bit_size: 1 - name: BR9 description: BR9. bit_offset: 25 bit_size: 1 - name: BR10 description: BR10. bit_offset: 26 bit_size: 1 - name: BR11 description: BR11. bit_offset: 27 bit_size: 1 - name: BR12 description: BR12. bit_offset: 28 bit_size: 1 - name: BR13 description: BR13. bit_offset: 29 bit_size: 1 - name: BR14 description: BR14. bit_offset: 30 bit_size: 1 - name: BR15 description: BR15. bit_offset: 31 bit_size: 1 fieldset/GPIOZ_HWCFGR0: description: GPIO hardware configuration register 0. fields: - name: OR_RES description: OR_RES. bit_offset: 0 bit_size: 16 fieldset/GPIOZ_HWCFGR1: description: GPIO hardware configuration register 1. fields: - name: AFRH_RES description: AFRH_RES. bit_offset: 0 bit_size: 32 fieldset/GPIOZ_HWCFGR10: description: 'For GPIOA, B, C, D, E, F, G, H, I, J and GPIOK: For GPIOZ:.' fields: - name: AHB_IOP description: AHB_IOP. bit_offset: 0 bit_size: 4 - name: AF_SIZE description: AF_SIZE. bit_offset: 4 bit_size: 4 - name: SPEED_CFG description: SPEED_CFG. bit_offset: 8 bit_size: 4 - name: LOCK_CFG description: LOCK_CFG. bit_offset: 12 bit_size: 4 - name: SEC_CFG description: SEC_CFG. bit_offset: 16 bit_size: 4 - name: OR_CFG description: OR_CFG. bit_offset: 20 bit_size: 4 fieldset/GPIOZ_HWCFGR2: description: GPIO hardware configuration register 2. fields: - name: AFRL_RES description: AFRL_RES. bit_offset: 0 bit_size: 32 fieldset/GPIOZ_HWCFGR3: description: GPIO hardware configuration register 3. fields: - name: ODR_RES description: ODR_RES. bit_offset: 0 bit_size: 16 - name: OTYPER_RES description: OTYPER_RES. bit_offset: 16 bit_size: 16 fieldset/GPIOZ_HWCFGR4: description: GPIO hardware configuration register 4. fields: - name: OSPEED_RES description: OSPEED_RES. bit_offset: 0 bit_size: 32 fieldset/GPIOZ_HWCFGR5: description: GPIO hardware configuration register 5. fields: - name: PUPDR_RES description: PUPDR_RES. bit_offset: 0 bit_size: 32 fieldset/GPIOZ_HWCFGR6: description: GPIO hardware configuration register 6. fields: - name: MODER_RES description: MODER_RES. bit_offset: 0 bit_size: 32 fieldset/GPIOZ_HWCFGR7: description: GPIO hardware configuration register 7. fields: - name: AF_PRIO0 description: AF_PRIO0. bit_offset: 0 bit_size: 4 - name: AF_PRIO1 description: AF_PRIO1. bit_offset: 4 bit_size: 4 - name: AF_PRIO2 description: AF_PRIO2. bit_offset: 8 bit_size: 4 - name: AF_PRIO3 description: AF_PRIO3. bit_offset: 12 bit_size: 4 - name: AF_PRIO4 description: AF_PRIO4. bit_offset: 16 bit_size: 4 - name: AF_PRIO5 description: AF_PRIO5. bit_offset: 20 bit_size: 4 - name: AF_PRIO6 description: AF_PRIO6. bit_offset: 24 bit_size: 4 - name: AF_PRIO7 description: AF_PRIO7. bit_offset: 28 bit_size: 4 fieldset/GPIOZ_HWCFGR8: description: 'For GPIOA, B, C, D, E, F, G, H, I, and GPIOJ: For GPIOK and GPIOZ:.' fields: - name: AF_PRIO8 description: AF_PRIO8. bit_offset: 0 bit_size: 4 - name: AF_PRIO9 description: AF_PRIO9. bit_offset: 4 bit_size: 4 - name: AF_PRIO10 description: AF_PRIO10. bit_offset: 8 bit_size: 4 - name: AF_PRIO11 description: AF_PRIO11. bit_offset: 12 bit_size: 4 - name: AF_PRIO12 description: AF_PRIO12. bit_offset: 16 bit_size: 4 - name: AF_PRIO13 description: AF_PRIO13. bit_offset: 20 bit_size: 4 - name: AF_PRIO14 description: AF_PRIO14. bit_offset: 24 bit_size: 4 - name: AF_PRIO15 description: AF_PRIO15. bit_offset: 28 bit_size: 4 fieldset/GPIOZ_HWCFGR9: description: 'For GPIOA, B, C, D, E, F, G, H, I, and GPIOJ: For GPIOK and GPIOZ:.' fields: - name: EN_IO description: EN_IO. bit_offset: 0 bit_size: 16 fieldset/GPIOZ_IDR: description: GPIO port input data register. fields: - name: IDR0 description: IDR0. bit_offset: 0 bit_size: 1 - name: IDR1 description: IDR1. bit_offset: 1 bit_size: 1 - name: IDR2 description: IDR2. bit_offset: 2 bit_size: 1 - name: IDR3 description: IDR3. bit_offset: 3 bit_size: 1 - name: IDR4 description: IDR4. bit_offset: 4 bit_size: 1 - name: IDR5 description: IDR5. bit_offset: 5 bit_size: 1 - name: IDR6 description: IDR6. bit_offset: 6 bit_size: 1 - name: IDR7 description: IDR7. bit_offset: 7 bit_size: 1 - name: IDR8 description: IDR8. bit_offset: 8 bit_size: 1 - name: IDR9 description: IDR9. bit_offset: 9 bit_size: 1 - name: IDR10 description: IDR10. bit_offset: 10 bit_size: 1 - name: IDR11 description: IDR11. bit_offset: 11 bit_size: 1 - name: IDR12 description: IDR12. bit_offset: 12 bit_size: 1 - name: IDR13 description: IDR13. bit_offset: 13 bit_size: 1 - name: IDR14 description: IDR14. bit_offset: 14 bit_size: 1 - name: IDR15 description: IDR15. bit_offset: 15 bit_size: 1 fieldset/GPIOZ_IPIDR: description: GPIO identification register. fields: - name: IPIDR description: IPIDR. bit_offset: 0 bit_size: 32 fieldset/GPIOZ_LCKR: description: This register is used to lock the configuration of the port bits when a correct write sequence is applied to bit 16 (LCKK). The value of bits [15:0] is used to lock the configuration of the GPIO. During the write sequence, the value of LCKR[15:0] must not change. When the LOCK sequence has been applied on a port bit, the value of this port bit can no longer be modified until the next MCU reset or peripheral reset. A specific write sequence is used to write to the GPIOx_LCKR register. Only word access (32-bit long) is allowed during this locking sequence. Each lock bit freezes a specific configuration register (control and alternate function registers). fields: - name: LCK0 description: LCK0. bit_offset: 0 bit_size: 1 - name: LCK1 description: LCK1. bit_offset: 1 bit_size: 1 - name: LCK2 description: LCK2. bit_offset: 2 bit_size: 1 - name: LCK3 description: LCK3. bit_offset: 3 bit_size: 1 - name: LCK4 description: LCK4. bit_offset: 4 bit_size: 1 - name: LCK5 description: LCK5. bit_offset: 5 bit_size: 1 - name: LCK6 description: LCK6. bit_offset: 6 bit_size: 1 - name: LCK7 description: LCK7. bit_offset: 7 bit_size: 1 - name: LCK8 description: LCK8. bit_offset: 8 bit_size: 1 - name: LCK9 description: LCK9. bit_offset: 9 bit_size: 1 - name: LCK10 description: LCK10. bit_offset: 10 bit_size: 1 - name: LCK11 description: LCK11. bit_offset: 11 bit_size: 1 - name: LCK12 description: LCK12. bit_offset: 12 bit_size: 1 - name: LCK13 description: LCK13. bit_offset: 13 bit_size: 1 - name: LCK14 description: LCK14. bit_offset: 14 bit_size: 1 - name: LCK15 description: LCK15. bit_offset: 15 bit_size: 1 - name: LCKK description: LCKK. bit_offset: 16 bit_size: 1 fieldset/GPIOZ_MODER: description: GPIO port mode register. fields: - name: MODER0 description: MODER0. bit_offset: 0 bit_size: 2 - name: MODER1 description: MODER1. bit_offset: 2 bit_size: 2 - name: MODER2 description: MODER2. bit_offset: 4 bit_size: 2 - name: MODER3 description: MODER3. bit_offset: 6 bit_size: 2 - name: MODER4 description: MODER4. bit_offset: 8 bit_size: 2 - name: MODER5 description: MODER5. bit_offset: 10 bit_size: 2 - name: MODER6 description: MODER6. bit_offset: 12 bit_size: 2 - name: MODER7 description: MODER7. bit_offset: 14 bit_size: 2 - name: MODER8 description: MODER8. bit_offset: 16 bit_size: 2 - name: MODER9 description: MODER9. bit_offset: 18 bit_size: 2 - name: MODER10 description: MODER10. bit_offset: 20 bit_size: 2 - name: MODER11 description: MODER11. bit_offset: 22 bit_size: 2 - name: MODER12 description: MODER12. bit_offset: 24 bit_size: 2 - name: MODER13 description: MODER13. bit_offset: 26 bit_size: 2 - name: MODER14 description: MODER14. bit_offset: 28 bit_size: 2 - name: MODER15 description: MODER15. bit_offset: 30 bit_size: 2 fieldset/GPIOZ_ODR: description: GPIO port output data register. fields: - name: ODR0 description: ODR0. bit_offset: 0 bit_size: 1 - name: ODR1 description: ODR1. bit_offset: 1 bit_size: 1 - name: ODR2 description: ODR2. bit_offset: 2 bit_size: 1 - name: ODR3 description: ODR3. bit_offset: 3 bit_size: 1 - name: ODR4 description: ODR4. bit_offset: 4 bit_size: 1 - name: ODR5 description: ODR5. bit_offset: 5 bit_size: 1 - name: ODR6 description: ODR6. bit_offset: 6 bit_size: 1 - name: ODR7 description: ODR7. bit_offset: 7 bit_size: 1 - name: ODR8 description: ODR8. bit_offset: 8 bit_size: 1 - name: ODR9 description: ODR9. bit_offset: 9 bit_size: 1 - name: ODR10 description: ODR10. bit_offset: 10 bit_size: 1 - name: ODR11 description: ODR11. bit_offset: 11 bit_size: 1 - name: ODR12 description: ODR12. bit_offset: 12 bit_size: 1 - name: ODR13 description: ODR13. bit_offset: 13 bit_size: 1 - name: ODR14 description: ODR14. bit_offset: 14 bit_size: 1 - name: ODR15 description: ODR15. bit_offset: 15 bit_size: 1 fieldset/GPIOZ_OSPEEDR: description: GPIO port output speed register. fields: - name: OSPEEDR0 description: OSPEEDR0. bit_offset: 0 bit_size: 2 - name: OSPEEDR1 description: OSPEEDR1. bit_offset: 2 bit_size: 2 - name: OSPEEDR2 description: OSPEEDR2. bit_offset: 4 bit_size: 2 - name: OSPEEDR3 description: OSPEEDR3. bit_offset: 6 bit_size: 2 - name: OSPEEDR4 description: OSPEEDR4. bit_offset: 8 bit_size: 2 - name: OSPEEDR5 description: OSPEEDR5. bit_offset: 10 bit_size: 2 - name: OSPEEDR6 description: OSPEEDR6. bit_offset: 12 bit_size: 2 - name: OSPEEDR7 description: OSPEEDR7. bit_offset: 14 bit_size: 2 - name: OSPEEDR8 description: OSPEEDR8. bit_offset: 16 bit_size: 2 - name: OSPEEDR9 description: OSPEEDR9. bit_offset: 18 bit_size: 2 - name: OSPEEDR10 description: OSPEEDR10. bit_offset: 20 bit_size: 2 - name: OSPEEDR11 description: OSPEEDR11. bit_offset: 22 bit_size: 2 - name: OSPEEDR12 description: OSPEEDR12. bit_offset: 24 bit_size: 2 - name: OSPEEDR13 description: OSPEEDR13. bit_offset: 26 bit_size: 2 - name: OSPEEDR14 description: OSPEEDR14. bit_offset: 28 bit_size: 2 - name: OSPEEDR15 description: OSPEEDR15. bit_offset: 30 bit_size: 2 fieldset/GPIOZ_OTYPER: description: GPIO port output type register. fields: - name: OT0 description: OT0. bit_offset: 0 bit_size: 1 - name: OT1 description: OT1. bit_offset: 1 bit_size: 1 - name: OT2 description: OT2. bit_offset: 2 bit_size: 1 - name: OT3 description: OT3. bit_offset: 3 bit_size: 1 - name: OT4 description: OT4. bit_offset: 4 bit_size: 1 - name: OT5 description: OT5. bit_offset: 5 bit_size: 1 - name: OT6 description: OT6. bit_offset: 6 bit_size: 1 - name: OT7 description: OT7. bit_offset: 7 bit_size: 1 - name: OT8 description: OT8. bit_offset: 8 bit_size: 1 - name: OT9 description: OT9. bit_offset: 9 bit_size: 1 - name: OT10 description: OT10. bit_offset: 10 bit_size: 1 - name: OT11 description: OT11. bit_offset: 11 bit_size: 1 - name: OT12 description: OT12. bit_offset: 12 bit_size: 1 - name: OT13 description: OT13. bit_offset: 13 bit_size: 1 - name: OT14 description: OT14. bit_offset: 14 bit_size: 1 - name: OT15 description: OT15. bit_offset: 15 bit_size: 1 fieldset/GPIOZ_PUPDR: description: GPIO port pull-up/pull-down register. fields: - name: PUPDR0 description: PUPDR0. bit_offset: 0 bit_size: 2 - name: PUPDR1 description: PUPDR1. bit_offset: 2 bit_size: 2 - name: PUPDR2 description: PUPDR2. bit_offset: 4 bit_size: 2 - name: PUPDR3 description: PUPDR3. bit_offset: 6 bit_size: 2 - name: PUPDR4 description: PUPDR4. bit_offset: 8 bit_size: 2 - name: PUPDR5 description: PUPDR5. bit_offset: 10 bit_size: 2 - name: PUPDR6 description: PUPDR6. bit_offset: 12 bit_size: 2 - name: PUPDR7 description: PUPDR7. bit_offset: 14 bit_size: 2 - name: PUPDR8 description: PUPDR8. bit_offset: 16 bit_size: 2 - name: PUPDR9 description: PUPDR9. bit_offset: 18 bit_size: 2 - name: PUPDR10 description: PUPDR10. bit_offset: 20 bit_size: 2 - name: PUPDR11 description: PUPDR11. bit_offset: 22 bit_size: 2 - name: PUPDR12 description: PUPDR12. bit_offset: 24 bit_size: 2 - name: PUPDR13 description: PUPDR13. bit_offset: 26 bit_size: 2 - name: PUPDR14 description: PUPDR14. bit_offset: 28 bit_size: 2 - name: PUPDR15 description: PUPDR15. bit_offset: 30 bit_size: 2 fieldset/GPIOZ_SECCFGR: description: This register provides write access security and can be written only by a secure access. It is used to configure a selected I/O as secure. A non-secure write access to this register is discarded. fields: - name: SEC0 description: SEC0. bit_offset: 0 bit_size: 1 - name: SEC1 description: SEC1. bit_offset: 1 bit_size: 1 - name: SEC2 description: SEC2. bit_offset: 2 bit_size: 1 - name: SEC3 description: SEC3. bit_offset: 3 bit_size: 1 - name: SEC4 description: SEC4. bit_offset: 4 bit_size: 1 - name: SEC5 description: SEC5. bit_offset: 5 bit_size: 1 - name: SEC6 description: SEC6. bit_offset: 6 bit_size: 1 - name: SEC7 description: SEC7. bit_offset: 7 bit_size: 1 fieldset/GPIOZ_SIDR: description: GPIO size identification register. fields: - name: SIDR description: SIDR. bit_offset: 0 bit_size: 32 fieldset/GPIOZ_VERR: description: GPIO version register. fields: - name: MINREV description: MINREV. bit_offset: 0 bit_size: 4 - name: MAJREV description: MAJREV. bit_offset: 4 bit_size: 4