block/DMAMUX: description: DMAMUX register block. items: - name: CCR description: DMA Multiplexer Channel %s Control register. array: len: 3 stride: 4 byte_offset: 0 fieldset: CCR - name: CSR description: DMAMUX request line multiplexer interrupt channel status register. byte_offset: 128 fieldset: CSR - name: CFR description: DMAMUX request line multiplexer interrupt clear flag register. byte_offset: 132 fieldset: CFR - name: RGCR description: DMAMUX request generator channel %s configuration register. array: len: 4 stride: 4 byte_offset: 256 fieldset: RGCR - name: RGSR description: DMAMUX request generator interrupt status register. byte_offset: 320 fieldset: RGSR - name: RGCFR description: DMAMUX request generator interrupt clear flag register. byte_offset: 324 fieldset: RGCFR fieldset/CCR: description: DMA Multiplexer Channel %s Control register. fields: - name: DMAREQ_ID description: DMA request identification Selects the input DMA request. See the DMAMUX table about assignments of multiplexer inputs to resources. bit_offset: 0 bit_size: 6 - name: SOIE description: Synchronization overrun interrupt enable. bit_offset: 8 bit_size: 1 enum: SOIE - name: EGE description: Event generation enable. bit_offset: 9 bit_size: 1 enum: EGE - name: SE description: Synchronization enable. bit_offset: 16 bit_size: 1 enum: SE - name: SPOL description: Synchronization polarity Defines the edge polarity of the selected synchronization input:. bit_offset: 17 bit_size: 2 enum: SPOL - name: NBREQ description: Number of DMA requests minus 1 to forward Defines the number of DMA requests to forward to the DMA controller after a synchronization event, and/or the number of DMA requests before an output event is generated. This field shall only be written when both SE and EGE bits are low. bit_offset: 19 bit_size: 5 - name: SYNC_ID description: Synchronization identification Selects the synchronization input (see inputs to resources). bit_offset: 24 bit_size: 5 fieldset/CFR: description: DMAMUX request line multiplexer interrupt clear flag register. fields: - name: CSOF description: Synchronization Clear Overrun Flag %s. bit_offset: 0 bit_size: 1 array: len: 3 stride: 1 enum: CSOF fieldset/CSR: description: DMAMUX request line multiplexer interrupt channel status register. fields: - name: SOF description: Synchronization Overrun Flag %s. bit_offset: 0 bit_size: 1 array: len: 3 stride: 1 enum: SOF fieldset/RGCFR: description: DMAMUX request generator interrupt clear flag register. fields: - name: COF description: Generator Clear Overrun Flag %s. bit_offset: 0 bit_size: 1 array: len: 4 stride: 1 enum: COF fieldset/RGCR: description: DMAMUX request generator channel %s configuration register. fields: - name: SIG_ID description: Signal identification Selects the DMA request trigger input used for the channel x of the DMA request generator. bit_offset: 0 bit_size: 5 - name: OIE description: Trigger overrun interrupt enable. bit_offset: 8 bit_size: 1 enum: OIE - name: GE description: DMA request generator channel x enable. bit_offset: 16 bit_size: 1 enum: GE - name: GPOL description: DMA request generator trigger polarity Defines the edge polarity of the selected trigger input. bit_offset: 17 bit_size: 2 enum: GPOL - name: GNBREQ description: 'Number of DMA requests to be generated (minus 1) Defines the number of DMA requests to be generated after a trigger event. The actual number of generated DMA requests is GNBREQ +1. Note: This field must be written only when GE bit is disabled.' bit_offset: 19 bit_size: 5 fieldset/RGSR: description: DMAMUX request generator interrupt status register. fields: - name: OF description: Generator Overrun Flag %s. bit_offset: 0 bit_size: 1 array: len: 4 stride: 1 enum: OF enum/COF: bit_size: 1 variants: - name: Clear description: Clear overrun flag. value: 1 enum/CSOF: bit_size: 1 variants: - name: Clear description: Clear synchronization flag. value: 1 enum/EGE: bit_size: 1 variants: - name: Disabled description: Event generation disabled. value: 0 - name: Enabled description: Event generation enabled. value: 1 enum/GE: bit_size: 1 variants: - name: Disabled description: DMA request generation disabled. value: 0 - name: Enabled description: DMA request enabled. value: 1 enum/GPOL: bit_size: 2 variants: - name: NoEdge description: No event, i.e. no detection nor generation. value: 0 - name: RisingEdge description: Rising edge. value: 1 - name: FallingEdge description: Falling edge. value: 2 - name: BothEdges description: Rising and falling edges. value: 3 enum/OF: bit_size: 1 variants: - name: NoTrigger description: No new trigger event occured on DMA request generator channel x, before the request counter underrun. value: 0 - name: Trigger description: New trigger event occured on DMA request generator channel x, before the request counter underrun. value: 1 enum/OIE: bit_size: 1 variants: - name: Disabled description: Trigger overrun interrupt disabled. value: 0 - name: Enabled description: Trigger overrun interrupt enabled. value: 1 enum/SE: bit_size: 1 variants: - name: Disabled description: Synchronization disabled. value: 0 - name: Enabled description: Synchronization enabled. value: 1 enum/SOF: bit_size: 1 variants: - name: NoSyncEvent description: No synchronization event occured on a DMA request line multiplexer channel x, while the DMA request counter value is lower than NBREQ. value: 0 - name: SyncEvent description: Synchronization event occured on a DMA request line multiplexer channel x, while the DMA request counter value is lower than NBREQ. value: 1 enum/SOIE: bit_size: 1 variants: - name: Disabled description: Synchronization overrun interrupt disabled. value: 0 - name: Enabled description: Synchronization overrun interrupt enabled. value: 1 enum/SPOL: bit_size: 2 variants: - name: NoEdge description: No event, i.e. no synchronization nor detection. value: 0 - name: RisingEdge description: Rising edge. value: 1 - name: FallingEdge description: Falling edge. value: 2 - name: BothEdges description: Rising and falling edges. value: 3